A dq transformation-based wind power converter parallel bus midpoint balance control method

Abstract

The application provides a wind power converter parallel bus midpoint balance control method based on dq transformation, relates to the parallel bus midpoint balance control technical field, and specifically comprises the following steps: identifying the number of current grid-connected converters; extracting a parallel bus power grid voltage synchronization angle, calculating a parallel ring current component, filtering and separating to retain a fundamental ring current component; obtaining a zero sequence voltage amplitude, combining a bus terminal average potential and an initial zero sequence voltage direction of a quadrature axis current polarity to determine a final direction, correcting a safety threshold interval of the zero sequence voltage amplitude, configuring a dynamic inverse proportional weight according to a capacitor voltage difference of each converter, distributing the zero sequence voltage amplitude, and using generated control parameters to make the parallel system reach a steady state balance. The application solves the problem of insufficient ring current suppression, realizes accurate matching of control parameters and parallel system working conditions and imbalance degree, and fundamentally solves the problem of insufficient control caused by control direction misalignment and parameter fixation in the prior art.

Description

Technical Field

[0001] This invention relates to the field of midpoint balance control technology for parallel bus systems, specifically a method for midpoint balance control of wind power converter parallel bus systems based on dq transformation. Background Technology

[0002] In the engineering application of high-power wind power systems, the parallel connection scheme of multiple wind power converters is widely used because it can effectively improve the power level and operational stability. However, this architecture inevitably introduces a zero-sequence circulating current channel, which poses a severe challenge to the traditional converter DC bus midpoint potential balance control strategy.

[0003] To address the issues of midpoint potential control and zero-sequence circulating current suppression during parallel operation of multilevel converters, existing technologies have conducted relevant research. Some solutions obtain the zero-sequence circulating current value and the zero-sequence voltage component that needs to be suppressed, limit the zero-sequence voltage component and superimpose it onto the three-phase modulation wave, and further adjust the modulation wave in conjunction with the DC side voltage, ultimately achieving decoupling control of the midpoint potential and zero-sequence circulating current.

[0004] However, in the scenario of parallel operation of wind power converters, existing technologies still have significant shortcomings. Among them, the lack of accurate quantification in zero-sequence circulating current calculation is the core problem, directly leading to the failure of subsequent control. Specifically, the defects are as follows: the lack of precise methods such as grid voltage synchronization angle calibration and dq transformation to obtain circulating current information results in insufficient targeted circulating current suppression; at the same time, due to the limitation of circulating current calculation accuracy, it is impossible to determine the control direction or the control strength through the polarity of the quadrature-axis current and the average potential at the bus end, leading to control mismatch and making it difficult to achieve precise control in parallel operation scenarios.

[0005] The information disclosed in the background section is only intended to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0006] The purpose of this invention is to provide a method for controlling the midpoint balance of the parallel bus of a wind power converter based on dq transformation, so as to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, the present invention provides the following technical solution:

[0008] A method for midpoint balance control of wind power converter parallel bus based on dq transformation, comprising the following steps:

[0009] S1. Collect the DC bus capacitor voltage difference, output circulating current, and bus terminal potential of all converters, including the target converter, and simultaneously collect the DC bus capacitor charging and discharging rate of all converters to identify the number of grid-connected converters. Based on the bus terminal potential of all converters, obtain the average bus terminal potential.

[0010] S2. Extract the grid voltage synchronization angle of the parallel bus, perform dq transformation on the output circulating current of the target converter, extract the quadrature axis current component and polarity, use the synchronization angle as a reference, perform dq transformation on the preset circulating current reference value of the parallel system and extract the quadrature axis current component, calculate the difference between the two to obtain the parallel circulating current component, and retain the fundamental circulating current component after low-pass filtering;

[0011] S3. Input the capacitor voltage difference of the target converter into the PI controller to obtain the zero-sequence voltage amplitude. Combine the average potential of the bus terminal and the polarity of the quadrature-axis current of the target converter to obtain the preliminary zero-sequence voltage direction. After verification by the charging and discharging rate of the target converter capacitor, the final direction is determined. Based on the number of grid-connected converters and the fundamental circulating current component, the safe threshold range of the zero-sequence voltage amplitude is determined and corrected. Dynamic inverse proportional weights are configured according to the capacitor voltage difference of each converter to allocate the zero-sequence voltage amplitude within the corrected safe threshold range. Combined with the final zero-sequence voltage direction, the final zero-sequence voltage control parameters are generated.

[0012] S4. Based on the final zero-sequence voltage regulation parameters, the original three-phase modulation wave of the target converter is superimposed, pulse width modulated and zero-sequence voltage injected to regulate the DC bus midpoint current until the parallel system reaches steady-state balance.

[0013] Furthermore, the output circulating current and DC bus capacitor charging and discharging rates of all converters are collected to identify the number of currently grid-connected converters. The specific logic is as follows:

[0014] Based on the output circulating current of all converters, the amplitude of the three-phase current of each converter is extracted one by one, and the state of each converter is determined as follows:

[0015] If the amplitude of the three-phase current of a converter exceeds the preset amplitude threshold and the duration is not less than the preset time threshold, and the charging and discharging rate of its DC bus capacitor is within the preset steady-state operating rate range, then the converter is determined to be in grid-connected state.

[0016] If the amplitude of the three-phase current of a converter does not exceed the preset amplitude threshold and the duration is not less than the preset time threshold, and the charging and discharging rate of its DC bus capacitor is zero or within the preset shutdown discharge rate range, then the converter is determined to be in the exit state or standby state.

[0017] The number of converters that meet the above grid connection status criteria is the current number of grid-connected converters.

[0018] Furthermore, the capacitor voltage difference of the target converter is preprocessed before being input into the PI controller to filter valid capacitor voltage differences. The specific logic is as follows:

[0019] Settings include A sliding window with multiple sampling points is used to preprocess the sequence of capacitor voltage difference sampling values ​​obtained continuously at fixed time intervals based on this sliding window. The specific process is as follows:

[0020] Extracting values ​​sequentially from a continuous sequence of capacitor voltage difference samples, based on the sampling time sequence. A series of continuous sampled values ​​are used to form the first sliding window. The arithmetic mean of all sampled values ​​in the sliding window is calculated to obtain the average capacitor voltage difference corresponding to the first sliding window, and this average value is used as the initial valid judgment benchmark value.

[0021] Shift the sliding window backward by one sampling point along the time axis of the sampled value sequence, and truncate it. The second sliding window is formed by a series of consecutive sampled values. The arithmetic mean of the sampled values ​​within the sliding window is calculated and updated to the baseline value corresponding to the current sliding window.

[0022] Repeat the sliding and calculation steps above until the sliding window can no longer capture the area. A series of continuous sampled values ​​are used to generate a series of average capacitor voltage difference reference values ​​that are updated synchronously with the sampled value sequence.

[0023] During the continuous acquisition and moving average calculation of capacitor voltage difference, the difference between the currently acquired capacitor voltage difference sample value and the previous sample value is calculated one by one, and the validity of the sample value is determined based on the calculation result.

[0024] If the absolute value of the difference between the two exceeds the first preset difference threshold, the current sampled value is determined to be an outlier and is removed. The reference value corresponding to the previous sliding window is then used as the current effective capacitor voltage difference.

[0025] If the absolute value of the difference between the two does not exceed the first preset difference threshold, the current sampled value is determined to be a valid sampled value, retained, and included in the averaging calculation of the subsequent sliding window. Simultaneously, the reference value sequence is updated based on the arithmetic mean result of the current sliding window. Further, the preliminary zero-sequence voltage direction is obtained by combining the average potential at the bus terminal and the polarity of the target converter's quadrature-axis current. The specific logic is as follows:

[0026] Using the average potential at the bus terminals as a reference, determine the direction of the difference between the DC bus midpoint potential and the average potential at the bus terminals of the target converter, and preliminarily determine the direction of the zero-sequence voltage output:

[0027] If the DC bus midpoint potential is higher than the average potential of the bus end, then a negative zero-sequence voltage is output. This voltage is used to lower the DC bus midpoint potential, driving the midpoint potential to gradually approach the average potential of the bus end, thus reducing the potential difference between the two.

[0028] If the DC bus midpoint potential is lower than the average potential of the bus end, then a positive zero-sequence voltage is output. This voltage is used to raise the DC bus midpoint potential, driving the midpoint potential to gradually approach the average potential of the bus end, thus reducing the potential difference between the two.

[0029] Based on the polarity of the quadrature-axis current of the target converter, the above preliminary determination direction is corrected according to the following rules:

[0030] If the polarity of the quadrature-axis current is positive and consistent with the initial voltage direction adjustment requirement, then the original initial direction should be maintained.

[0031] If the polarity of the quadrature-axis current is negative and contradicts the initial determination of the voltage direction adjustment requirement, then the initial determination of the direction should be reversed.

[0032] If the polarity of the quadrature-axis current is positive and contradicts the initial determination of the voltage direction adjustment requirement, then the initial determination of the direction should be reversed.

[0033] If the polarity of the quadrature-axis current is negative and it is consistent with the initial voltage direction adjustment requirement, then the original initial direction should be maintained.

[0034] Based on the above preliminary judgment and polarity correction results, the preliminary zero-sequence voltage direction is obtained.

[0035] Furthermore, the initial zero-sequence voltage direction is determined to be the final direction after verification by the target converter capacitor charging and discharging rate. The specific logic is as follows:

[0036] The current DC bus capacitor charging and discharging rate of the target converter is collected, the rate change trend is recorded, and the control expectation corresponding to the initial zero-sequence voltage direction is correlated. That is, after the voltage is injected in this direction, the capacitor charging and discharging rate shows a change pattern that matches the midpoint potential control target.

[0037] If the trend of the capacitor charging and discharging rate is consistent with the expected regulation of the initial zero-sequence voltage direction, and the capacitor charging and discharging rate is within the preset steady-state operating rate range, it indicates that the initial direction can achieve the midpoint potential regulation target, the verification is passed, and the initial zero-sequence voltage direction is maintained as the final direction.

[0038] If the trend of the capacitor charging and discharging rate changes contrary to the expected adjustment of the initial zero-sequence voltage direction, or if the capacitor charging and discharging rate exceeds the steady-state operating rate range, it indicates that there is a deviation in the initial direction and the verification fails. The initial zero-sequence voltage direction should be adjusted 180° in the opposite direction.

[0039] After the reverse adjustment, the capacitor charging and discharging rate is collected again to verify whether the control trend of the adjusted direction is consistent with the change of the capacitor charging and discharging rate. This continues until the trend of the capacitor charging and discharging rate meets expectations and is within the preset steady-state operating rate range. The adjusted direction is then determined to be the final zero-sequence voltage direction.

[0040] Furthermore, based on the current number of grid-connected converters and the fundamental circulating current component, the safe threshold range for determining and correcting the zero-sequence voltage amplitude is as follows:

[0041] The maximum allowable value of zero-sequence voltage amplitude is preset when a single converter operates independently;

[0042] Based on the current number of grid-connected converters, the maximum allowable value of the zero-sequence voltage amplitude of a single converter is reduced proportionally to obtain the upper limit of the initial safety threshold range, while its lower limit is fixed at 0.

[0043] Extract the fundamental current component obtained by low-pass filtering, and simultaneously preset a fundamental current safety threshold. Based on the relationship between the fundamental current component and the fundamental current safety threshold, adjust the initial safety threshold range:

[0044] If the fundamental circulation component is less than or equal to the fundamental circulation safety threshold, the initial safety threshold range remains unchanged.

[0045] If the fundamental wave circulation component is greater than the fundamental wave circulation safety threshold, calculate the proportion of the fundamental wave circulation component that exceeds the fundamental wave circulation safety threshold to obtain the proportion of the fundamental wave circulation exceeding the standard. Add 1 to the proportion of the fundamental wave circulation exceeding the standard, and then multiply it by the upper limit of the initial safety threshold interval to obtain the corrected upper limit of the safety threshold interval.

[0046] If the upper limit of the corrected safety threshold range is greater than the upper limit of the zero-sequence voltage amplitude limit, then the upper limit of the zero-sequence voltage amplitude limit shall be taken as the final upper limit of the safety threshold range.

[0047] Conversely, the upper limit of the corrected safety threshold range is taken as the final upper limit of the safety threshold range.

[0048] Based on the final upper and lower limits of the safety threshold range, the corrected zero-sequence voltage amplitude safety threshold range is obtained.

[0049] Furthermore, a dynamic inverse-proportional weight is configured based on the voltage difference between the capacitors of each converter to allocate the zero-sequence voltage amplitude within the corrected safety threshold range. The specific logic is as follows:

[0050] Extract the effective capacitor voltage difference of all grid-connected converters and synchronously call the corrected zero-sequence voltage amplitude safety threshold range.

[0051] If the effective capacitor voltage difference of a converter is 0, then its weight allocation coefficient is set to the maximum value of the weights of all grid-connected converters.

[0052] If the effective capacitor voltage difference of all grid-connected converters is not zero, calculate the reciprocal of the effective capacitor voltage difference of each converter.

[0053] Divide the reciprocal of the effective capacitor voltage difference of each converter by the sum of the reciprocals of the effective capacitor voltage differences of all grid-connected converters to obtain the weight allocation coefficient of each converter.

[0054] For the target converter, the weight allocation coefficient corresponding to the target converter is calculated by the ratio of the reciprocal of its effective capacitor voltage difference to the sum of the reciprocals of the effective capacitor voltage differences of all grid-connected converters.

[0055] Multiply the corrected upper limit of the zero-sequence voltage amplitude safety threshold range by the weight allocation coefficient of the target converter to obtain the initial zero-sequence voltage amplitude allocated to the target converter;

[0056] The initial zero-sequence voltage amplitude allocated to the target converter is verified, with the corrected zero-sequence voltage amplitude safety threshold range as a constraint:

[0057] If the initially allocated zero-sequence voltage amplitude is less than the lower limit of the above-mentioned safety threshold range, then the lower limit of the safety threshold range shall be used as the final zero-sequence voltage amplitude of the target converter.

[0058] If the initially allocated zero-sequence voltage amplitude is within the aforementioned safety threshold range, then the initially allocated zero-sequence voltage amplitude will be used as the final zero-sequence voltage amplitude of the target converter.

[0059] If the initially allocated zero-sequence voltage amplitude is greater than the upper limit of the aforementioned safety threshold range, then the upper limit of the safety threshold range will be used as the final zero-sequence voltage amplitude of the target converter.

[0060] Furthermore, the final zero-sequence voltage regulation parameters include the final zero-sequence voltage amplitude and the final zero-sequence voltage direction; the criterion for determining that the parallel system has reached steady-state equilibrium is: the DC bus midpoint current of each grid-connected converter is 0, and the difference between the DC bus midpoint potential of each grid-connected converter and the average potential at the bus end is within the second preset difference threshold.

[0061] Compared with the prior art, the beneficial effects of the present invention are:

[0062] This invention uses the grid voltage synchronization angle of the parallel bus as a reference, performs dq transformation on the output circulating current of the target converter and the preset circulating current reference value of the parallel system, calculates the difference between the two to obtain the parallel circulating current component, solves the problem of insufficient targeted circulating current suppression due to the lack of precise quantification methods in the existing technology, and provides high-precision data support for subsequent regulation.

[0063] This invention initially determines the zero-sequence voltage direction based on the average potential at the bus end and the polarity of the cross-axis current of the target converter. Simultaneously, the final direction is determined after verification of the charging and discharging rate of the target converter capacitor. Based on the number of grid-connected converters and the fundamental circulating current component, the safe threshold range of the zero-sequence voltage amplitude is determined and corrected. Dynamic inverse proportional weights are configured according to the voltage difference of each converter capacitor to allocate the zero-sequence voltage amplitude within the corrected safe threshold range. This achieves precise matching between the control parameters and the operating conditions and imbalance degree of the parallel system, fundamentally solving the problem of insufficient control caused by misalignment of the control direction and fixed parameters in existing technologies. Attached Figure Description

[0064] Figure 1 This is a schematic diagram of the overall method flow of the present invention. Detailed Implementation

[0065] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments.

[0066] It should be noted that, unless otherwise defined, the technical or scientific terms used in this invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0067] Example:

[0068] Please see Figure 1 The present invention provides a technical solution:

[0069] A method for midpoint balance control of wind power converter parallel bus based on dq transformation, comprising the following steps:

[0070] S1. Collect the DC bus capacitor voltage difference, output circulating current, and bus terminal potential of all converters, including the target converter, and simultaneously collect the DC bus capacitor charging and discharging rate of all converters to identify the number of grid-connected converters. Based on the bus terminal potential of all converters, obtain the average bus terminal potential.

[0071] Among them, the target converter refers to the single wind power converter currently under control, which is the core entity for data acquisition, signal processing, and generation of control parameters.

[0072] Based on the above embodiments, the DC bus capacitor voltage difference, output circulating current, bus terminal potential, and DC bus capacitor charging and discharging rate of all converters, including the target converter, are collected. The specific method is as follows:

[0073] Differential voltage sensors are used to collect voltage signals from the positive / negative DC bus and the midpoint of all converters. After the signals are filtered by RC low-pass filtering to suppress interference, they are converted from analog to digital by a 16-bit ADC chip at a sampling rate of 10kHz-20kHz to obtain the DC bus capacitor voltage difference.

[0074] Hall current sensors are used to collect the current signals of the three-phase branches on the output side of all converters. After the signals are amplified by opto-isolation, they are synchronously triggered by the voltage acquisition to trigger ADC conversion to obtain the three-phase current. Then, the zero-sequence current component is extracted by the symmetrical component method. This zero-sequence current component is the output circulating current (in parallel systems, the output circulating current is mainly manifested as the zero-sequence component generated by the imbalance of the three-phase current, which can be accurately separated by the symmetrical component method).

[0075] A wide-range differential voltage sensor with an optical fiber interface is used to acquire the potential signal of the common busbar of the parallel converter relative to a dedicated grounding reference point. The signal is transmitted to the controller over a long distance via optical fiber. All converters use the same sensor model and are calibrated synchronously to obtain the bus terminal potential.

[0076] Based on the obtained DC bus capacitor voltage difference of each converter, the instantaneous value of the charging and discharging rate is calculated using a first-order numerical differential algorithm. After smoothing the signal by moving average filtering for 3-5 control cycles, the charging and discharging rate of the DC bus capacitor of all converters is obtained.

[0077] The control cycle refers to the complete timing cycle in which the converter controller completes one data acquisition, calculation, and instruction output.

[0078] Based on the above, it should be noted that:

[0079] DC bus capacitor voltage difference: As the core input basis for generating zero-sequence voltage amplitude, it directly quantifies the degree of imbalance of the DC bus midpoint potential of each converter. It is a key feedback signal for triggering the midpoint balance control logic and judging the urgency of control needs. At the same time, it provides basic data for the calculation of dynamic inverse proportional weight and supports the differentiated amplitude allocation of multiple machines.

[0080] Output circulating current: This is a core parameter characterizing the three-phase current imbalance state of the parallel system and the grid-connected operation characteristics of the converter. On the one hand, it provides raw data for dq conversion to extract quadrature-axis current components, calculate parallel circulating current components and fundamental circulating current components, and supports the initial determination of zero-sequence voltage direction and correction of safety threshold range. On the other hand, by extracting the amplitude of three-phase phase current, it can help determine the grid-connected / de-connected / standby status of each converter and provide data support for counting the number of grid-connected converters.

[0081] Bus terminal potential: As a unified potential reference benchmark for the parallel system, it provides a reference for determining the initial zero-sequence voltage direction. By comparing the difference between the DC bus midpoint potential of each converter and the common terminal potential, the control trend of zero-sequence voltage "rise / fall" is clarified, avoiding conflicts in the control direction of multiple machines. It is a key prerequisite for achieving coordinated balance of multiple converters and ensuring the stability of the parallel bus potential.

[0082] DC bus capacitor charge / discharge rate: This is primarily used to verify the rationality of the initial zero-sequence voltage direction, providing real-time feedback on whether the voltage injection direction aligns with the midpoint potential balance target. By monitoring the rate change trend and its matching degree with the expected control, erroneous voltage directions can be corrected promptly, avoiding problems such as increased output circulating current, worsened midpoint potential imbalance, and device overload caused by direction determination deviations. This provides a reliable verification basis for determining the final zero-sequence voltage direction; simultaneously, it assists in determining the converter's operating status, distinguishing between grid-connected steady-state operation and shutdown / standby states.

[0083] Based on the above embodiments, the output circulating current and DC bus capacitor charging and discharging rate of all converters are collected to identify the number of currently grid-connected converters. The specific logic is as follows:

[0084] Based on the output circulating current of all converters, the amplitude of the three-phase current of each converter is extracted one by one, and the state of each converter is determined as follows:

[0085] If the amplitude of the three-phase current of a converter exceeds the preset amplitude threshold and the duration is not less than the preset time threshold, and the charging and discharging rate of its DC bus capacitor is within the preset steady-state operating rate range, then the converter is determined to be in grid-connected state.

[0086] If the amplitude of the three-phase current of a converter does not exceed the preset amplitude threshold and the duration is not less than the preset time threshold, and the charging and discharging rate of its DC bus capacitor is zero or within the preset shutdown discharge rate range, then the converter is determined to be in the exit state or standby state.

[0087] The number of all converters that meet the above grid connection status determination conditions is the current number of grid-connected converters. The current number of grid-connected converters is directly used as the basis for subsequent correction of the zero-sequence voltage amplitude safety threshold range based on the current number of grid-connected converters.

[0088] Specifically, based on the output circulating current of all converters, the amplitude of the three-phase current of each converter is extracted one by one. The specific logic is as follows:

[0089] The output circulating current is obtained by separating the three-phase current through the symmetrical component method. Therefore, the original three-phase current signal is directly traced back for amplitude extraction. For each converter, the absolute value of the preprocessed instantaneous three-phase current is taken to eliminate the positive and negative directional influences.

[0090] By using a moving average filter over 3-5 control cycles to filter out instantaneous current fluctuations, the effective value of the current in each phase is calculated. This effective value is the amplitude of the phase current in the corresponding phase. By processing the three-phase branch signals of each converter one by one in this way, the amplitude of the three-phase current in all converters can be obtained.

[0091] The preset amplitude threshold and preset time threshold are set based on the historical operating data of the parallel system, using a "baseline value + floating adjustment" method.

[0092] Based on the rated operating parameters of each type of converter in the parallel system, and combined with the historical grid-connected operation data of the past 6 months, the minimum value of the three-phase current amplitude when each converter is stably connected to the grid is extracted as the current amplitude benchmark value. The preset amplitude threshold value is obtained by floating 20% ​​on the basis of the benchmark value.

[0093] Based on historical operating data, the average transition time from grid connection to output current stabilization of the converter is extracted as a time reference value. The preset time threshold is obtained by increasing the value by 20% on top of this reference value.

[0094] Based on the above embodiments, the average bus terminal potential is obtained according to the bus terminal potential of all converters. The specific logic is as follows:

[0095] All converters identified as being in grid-connected status are screened, and their corresponding bus terminal potential acquisition values ​​are extracted. Potential data of converters in shutdown or standby status are removed. The arithmetic average algorithm is used to sum the bus terminal potential acquisition values ​​of all grid-connected converters, and then divide by the number of grid-connected converters to obtain the average bus terminal potential.

[0096] Based on the above, it should be noted that:

[0097] Using the average potential at the bus end as a reference, the midpoint potential of each grid-connected converter is guided to approach the system average, reducing the impact of potential fluctuations of a single device on the overall bus, reducing the risk of circulating current caused by potential differences in the parallel system, helping the system to quickly reach steady-state equilibrium, and improving the stability and safety of parallel operation.

[0098] S2. Extract the grid voltage synchronization angle of the parallel bus, perform dq transformation on the output circulating current of the target converter, extract the quadrature axis current component and polarity, use the synchronization angle as a reference, perform dq transformation on the system preset circulating current reference value and extract the quadrature axis current component, calculate the difference between the two to obtain the parallel circulating current component, and retain the fundamental circulating current component after low-pass filtering;

[0099] Based on the above embodiments, the voltage synchronization angle of the parallel bus grid is extracted, and the specific method is as follows:

[0100] A high-precision voltage transformer with an error of less than or equal to 0.2% and a range adapted to the rated voltage of the bus is selected to collect three-phase voltage signals. These signals are transmitted via shielded cables to a conditioning module, where they are stepped down to a 0-5V standard analog signal. The signal is then filtered by an RC low-pass filter to remove the 5th and 7th harmonics and high-frequency noise, resulting in a clean signal. This signal is then input into a synchronous rotating coordinate system digital phase-locked loop (PLL). The PLL uses a built-in algorithm to calculate the fundamental phase and angular velocity signals in real time. These signals are then converted into digital values ​​by a 16-bit DAC and stored in the controller's buffer. The system is calibrated hourly using a standard phase signal to control the angle error within ±0.1°, compensating for deviations caused by three-phase voltage imbalance. Ultimately, this yields a precise synchronization angle of the parallel bus grid voltage.

[0101] Based on the above embodiments, a dq transformation is performed on the output circulating current of the target converter to extract the quadrature-axis current component and its polarity. The specific logic is as follows:

[0102] The target converter output circulating current signal, which has been collected and filtered in the previous steps, is called to ensure that the signal is free of abnormal noise; at the same time, the grid voltage synchronization angle of the parallel bus obtained in the above steps is retrieved as the core synchronization reference for dq conversion to ensure the consistency of conversion timing.

[0103] First, the output circulating current signal in the three-phase stationary coordinate system is converted into components in the two-phase stationary coordinate system through Clark transformation, eliminating the coupling relationship between the three-phase signals. Then, based on the aforementioned synchronization angle, the components in the two-phase stationary coordinate system are converted into direct-axis current (d-axis current) and quadrature-axis current (q-axis current) in the synchronous rotating dq coordinate system through Park transformation, realizing the DC conversion of the alternating circulating current signal, which facilitates the accurate extraction of the target quadrature-axis component.

[0104] After the transformation is completed, the quadrature axis current data in the synchronous rotating dq coordinate system is read from the controller buffer, which is the quadrature axis current component corresponding to the output circulating current of the target converter;

[0105] The controller uses a built-in comparator to determine the polarity of the quadrature axis current component. If the quadrature axis current component is greater than 0, its polarity is determined to be positive; if the quadrature axis current component is less than 0, its polarity is determined to be negative; if the quadrature axis current component is equal to 0, it is determined to be in a phase balance state, and the polarity is marked as zero.

[0106] Based on the above embodiments, the preset circulating current reference value of the parallel system is subjected to dq transformation and the quadrature-axis current component is extracted. The specific logic is as follows:

[0107] The preset three-phase circulating current reference value of the parallel system is retrieved, and the aforementioned parallel bus grid voltage synchronization angle is used as the dq transformation reference to ensure consistency with the transformation reference of the target converter output circulating current.

[0108] Using the same transformation logic as the target converter output circulating current, the three-phase circulating current reference value is first converted into two-phase stationary coordinate system components through Clark transformation. Then, based on the above synchronization angle, Park transformation is performed to obtain the reference direct-axis current and reference quadrature-axis current in the dq coordinate system. This data is temporarily stored in the controller buffer.

[0109] The reference quadrature-axis current generated in the above steps is read from the controller buffer, which is the quadrature-axis current component after the preset circulating current reference value is transformed.

[0110] Based on the above embodiments, the difference between the quadrature-axis current component of the target converter output circulating current and the reference quadrature-axis current component read from the buffer is calculated using the following formula:

[0111]

[0112] in, For the parallel circulating current component, The quadrature-axis current component is obtained by dq transformation of the circulating current at the output of the target converter. The reference quadrature-axis current component is obtained by dq transformation of the preset circulating reference value.

[0113] Based on the above, it should be noted that:

[0114] By calculating the difference between the quadrature-axis current component of the target converter output circulating current and the reference quadrature-axis current component, the parallel circulating current component is obtained. This difference can intuitively quantify the degree of deviation between the actual circulating current state of the target converter and the ideal circulating current reference of the system. The larger the absolute value of the difference, the more the circulating current of the target converter deviates from the ideal operating state, and the more prominent the three-phase current imbalance problem of the system is. This provides a precise quantitative basis for subsequent zero-sequence voltage amplitude safety threshold correction and neutral point potential balance control.

[0115] Based on the above embodiments, the fundamental circulating current component is retained after low-pass filtering, and the specific logic is as follows:

[0116] The calculated parallel circulating current component is subjected to low-pass filtering using an RC low-pass filter circuit with a cutoff frequency of 50Hz. This filters out high-frequency harmonics, transient impulses, and other interference components from the circulating current component, retaining only the fundamental circulating current component. This processing eliminates the influence of non-steady-state interference on the circulating current judgment, ensuring the accuracy and reliability of subsequent control logic based on the fundamental circulating current component.

[0117] S3. Input the capacitor voltage difference of the target converter into the PI controller to obtain the zero-sequence voltage amplitude. Combine the average potential at the bus end and the polarity of the quadrature-axis current of the target converter to obtain the preliminary zero-sequence voltage direction. After verification by the charging and discharging rate of the target converter capacitor, the final direction is determined. Based on the number of grid-connected converters and the fundamental circulating current component, the safe threshold range of the zero-sequence voltage amplitude is determined and corrected. Dynamic inverse proportional weights are configured according to the capacitor voltage difference of each converter to allocate the zero-sequence voltage amplitude within the corrected safe threshold range. Combined with the final zero-sequence voltage direction, the final zero-sequence voltage control parameters are generated.

[0118] Based on the above embodiments, the capacitor voltage difference of the target converter is preprocessed before being input into the PI controller to filter valid capacitor voltage differences. The specific logic is as follows:

[0119] Settings include A sliding window with 1 sampling point is used to preprocess the sequence of capacitor voltage difference samples obtained continuously at fixed time intervals, as follows:

[0120] Extracting values ​​sequentially from a continuous sequence of capacitor voltage difference samples, based on the sampling time sequence. A series of continuous sampled values ​​are used to form the first sliding window. The arithmetic mean of all sampled values ​​in the sliding window is calculated to obtain the average capacitor voltage difference corresponding to the first sliding window, and this average value is used as the initial valid judgment benchmark value.

[0121] Shift the sliding window backward by one sampling point along the time axis of the sampled value sequence, and truncate it. The second sliding window is formed by a series of consecutive sampled values. The arithmetic mean of the sampled values ​​within the sliding window is calculated and updated to the baseline value corresponding to the current sliding window.

[0122] Repeat the sliding and calculation steps above until the sliding window can no longer capture the area. A series of continuous sampled values ​​are used to generate a series of average capacitor voltage difference reference values ​​that are updated synchronously with the sampled value sequence.

[0123] During the continuous acquisition and moving average calculation of capacitor voltage difference, the difference between the currently acquired capacitor voltage difference sample value and the previous sample value is calculated one by one, and the validity of the sample value is determined based on the calculation result.

[0124] If the absolute value of the difference between the two exceeds the first preset difference threshold, the current sampled value is determined to be an outlier and is removed. The reference value corresponding to the previous sliding window is then used as the current effective capacitor voltage difference.

[0125] If the absolute value of the difference between the two does not exceed the first preset difference threshold, the current sampled value is determined to be a valid sampled value, retained, and included in the averaging calculation of the subsequent sliding window. At the same time, the benchmark value sequence is updated based on the arithmetic mean result of the current sliding window. Specifically, based on the historical operating data of the DC bus capacitor voltage difference of the target converter, its benchmark fluctuation range is determined through statistical analysis. The upper limit of the benchmark fluctuation range is taken and floated up by 20% to obtain the first preset difference threshold.

[0126] Based on the above embodiments, the preliminary zero-sequence voltage direction is obtained by combining the average potential at the bus terminal and the polarity of the target converter's quadrature-axis current. The specific logic is as follows:

[0127] Using the average potential at the bus terminals as a reference, determine the direction of the difference between the DC bus midpoint potential and the average potential at the bus terminals of the target converter, and preliminarily determine the direction of the zero-sequence voltage output:

[0128] If the DC bus midpoint potential is higher than the average potential of the bus end, then a negative zero-sequence voltage is output. This voltage is used to lower the DC bus midpoint potential, driving the midpoint potential to gradually approach the average potential of the bus end, thus reducing the potential difference between the two.

[0129] If the DC bus midpoint potential is lower than the average potential of the bus end, then a positive zero-sequence voltage is output. This voltage is used to raise the DC bus midpoint potential, driving the midpoint potential to gradually approach the average potential of the bus end, thus reducing the potential difference between the two.

[0130] Based on the polarity of the quadrature-axis current of the target converter, the above preliminary determination direction is corrected according to the following rules:

[0131] If the polarity of the quadrature-axis current is positive and consistent with the initial voltage direction adjustment requirement, then the original initial direction should be maintained.

[0132] If the polarity of the quadrature-axis current is negative and contradicts the initial determination of the voltage direction adjustment requirement, then the initial determination of the direction should be reversed.

[0133] If the polarity of the quadrature-axis current is positive and contradicts the initial determination of the voltage direction adjustment requirement, then the initial determination of the direction should be reversed.

[0134] If the polarity of the quadrature-axis current is negative and it is consistent with the initial voltage direction adjustment requirement, then the original initial direction should be maintained.

[0135] Based on the above preliminary judgment and polarity correction results, the preliminary zero-sequence voltage direction is obtained.

[0136] Based on the above embodiments, the safety threshold range for zero-sequence voltage amplitude is determined and corrected according to the number of grid-connected converters and the fundamental circulating current component. The specific logic is as follows:

[0137] The maximum allowable value of zero-sequence voltage amplitude is preset when a single converter is operating independently. Simultaneously, a fundamental current circulation safety threshold is preset, denoted as... Set the absolute upper limit of the zero-sequence voltage amplitude, denoted as . ;

[0138] Based on the current number of grid-connected converters, the maximum allowable value of the zero-sequence voltage amplitude of a single converter is proportionally reduced, and the upper limit of the initial safety threshold range is calculated. Its lower limit is fixed at 0, and the calculation formula is as follows: The initial safety threshold range is ;

[0139] Extract the fundamental circulating current component obtained by low-pass filtering Based on the relationship between the fundamental current component and the fundamental current safety threshold, the initial safety threshold range is adjusted according to different cases:

[0140] like That is, the fundamental circulation component is less than or equal to the fundamental circulation safety threshold, and the initial safety threshold range remains unchanged.

[0141] like That is, the proportion of the fundamental wave circulation component exceeding the fundamental wave circulation safety threshold is calculated to obtain the proportion of the fundamental wave circulation exceeding the safety threshold. The formula used is as follows:

[0142]

[0143] Then, calculate the upper limit of the corrected safety threshold range based on the proportion of fundamental current exceeding the standard. The formula used is as follows:

[0144]

[0145] The upper limit of the revised safety threshold range is absolutely limited to avoid exceeding the safety capacity of the equipment and system.

[0146] like If the upper limit of the corrected safety threshold range is greater than the upper limit of the zero-sequence voltage amplitude limit, then the upper limit of the zero-sequence voltage amplitude limit is taken as the final upper limit of the safety threshold range. Based on the final upper and lower limits of the safety threshold range, the corrected zero-sequence voltage amplitude safety threshold range is obtained. ;

[0147] Conversely, the upper limit of the corrected safety threshold range is taken as the final upper limit of the safety threshold range. Based on the final upper and lower limits of the safety threshold range, the corrected zero-sequence voltage amplitude safety threshold range is obtained. .

[0148] Among them, the maximum allowable value of zero-sequence voltage amplitude Fundamental wave circulation safety threshold Zero-sequence voltage amplitude limit upper limit The settings of the three parameters are all based on historical operating data and determined in conjunction with safety redundancy. The specific method is as follows:

[0149] Collect historical zero-sequence voltage data when the converter is running independently, filter the zero-sequence voltage amplitude under stable operation, no voltage distortion, and no protection action conditions, take the zero-sequence voltage amplitude as the reference value, and float it up by 10%-20% as a safety redundancy to obtain the maximum allowable value of the zero-sequence voltage amplitude of a single unit.

[0150] Collect historical data of fundamental current during stable operation of the parallel system, and use the maximum fundamental current value within the 95% confidence interval as the benchmark value. Based on the benchmark value, increase it by 15%-25% as a safety redundancy to obtain the fundamental current safety threshold.

[0151] The maximum zero-sequence voltage corresponding to the inverter insulation level is used as the hardware reference value. At the same time, the upper limit of zero-sequence voltage distortion allowed in the power grid dispatching specification is referenced to determine the standard reference value. The smaller of the two is taken as the final reference value. Based on the reference value, 10%-20% is added as a safety redundancy to obtain the upper limit value of the zero-sequence voltage amplitude.

[0152] Based on the above, it should be noted that:

[0153] Based on the current number of grid-connected converters The maximum allowable value of zero-sequence voltage for a single device is proportionally reduced to match the characteristics of mutual influence when multiple devices are connected in parallel. This avoids system voltage distortion caused by excessively high zero-sequence voltage of a single device, and prevents equipment malfunctions due to voltage distortion.

[0154] The final dynamic safety threshold range provides a clear quantitative boundary for zero-sequence voltage amplitude regulation, which avoids the inability of insufficient zero-sequence voltage amplitude to effectively offset circulating current and stabilize potential, and also prevents safety risks caused by excessive zero-sequence voltage amplitude, providing key quantitative support for closed-loop control of the entire link.

[0155] Based on the above embodiments, dynamic inverse proportional weights are configured according to the magnitude of the voltage difference between the capacitors of each converter to allocate the zero-sequence voltage amplitude within the corrected safety threshold range. The specific logic is as follows:

[0156] Extract the effective capacitor voltage difference of the current grid-connected converter and synchronously call the corrected zero-sequence voltage amplitude safety threshold range;

[0157] If the effective capacitor voltage difference of a converter is 0, it means that the DC bus potential of the converter is in an ideal equilibrium state and there is no potential deviation. It is the converter with the optimal operating state in the parallel system.

[0158] The weighting allocation coefficient directly determines the allocation ratio of the zero-sequence voltage amplitude. The larger the weighting allocation coefficient, the more reasonable the allocated zero-sequence voltage amplitude, and the more precise the control effect.

[0159] Assigning the maximum weight allocation coefficient to a converter with balanced potential enables it to obtain a zero-sequence voltage amplitude that matches the optimal operating state, thus avoiding the disruption of its balance state due to unreasonable regulation; at the same time, assigning amplitudes to converters with unbalanced potential according to an inverse weight allocation method can specifically correct their potential deviations.

[0160] If the effective capacitor voltage difference of multiple converters is 0, then these converters are equally distributed with the maximum weight allocation coefficient to ensure that the equipment group with the optimal operating status operates synchronously and stably.

[0161] If the effective capacitor voltage difference of all grid-connected converters is not zero, calculate the reciprocal of the effective capacitor voltage difference of each converter.

[0162] Divide the reciprocal of the effective capacitor voltage difference of each converter by the sum of the reciprocals of the effective capacitor voltage differences of all grid-connected converters to obtain the weight allocation coefficient of each converter.

[0163] For the target converter, the weight allocation coefficient corresponding to the target converter is calculated by the ratio of the reciprocal of its effective capacitor voltage difference to the sum of the reciprocals of the effective capacitor voltage differences of all grid-connected converters.

[0164] The modified upper limit of the zero-sequence voltage amplitude safety threshold range is multiplied by the weighting coefficient of the target converter to obtain the initial zero-sequence voltage amplitude allocated to the target converter, based on the following formula:

[0165]

[0166] in, The initial zero-sequence voltage amplitude allocated to the target converter. Assign weighting coefficients to the target converter. To correct the upper limit of the safe threshold range for zero-sequence voltage amplitude, for or ;

[0167] The initial zero-sequence voltage amplitude allocated to the target converter is verified, with the corrected zero-sequence voltage amplitude safety threshold range as a constraint:

[0168] If the initially allocated zero-sequence voltage amplitude is less than the lower limit of the aforementioned safety threshold range, i.e. Then the lower limit of the safety threshold range, i.e., 0, is taken as the zero-sequence voltage amplitude of the final output of the target converter.

[0169] If the initially allocated zero-sequence voltage amplitude is within the aforementioned safety threshold range, i.e. Then the initially allocated zero-sequence voltage amplitude, i.e. The zero-sequence voltage amplitude is the final output of the target converter;

[0170] If the initially allocated zero-sequence voltage amplitude is greater than the upper limit of the aforementioned safety threshold range, that is... Then the upper limit of the safety threshold range, i.e. The zero-sequence voltage amplitude is the final output of the target converter.

[0171] Based on the above, it should be noted that:

[0172] When the effective capacitor voltage difference of a converter increases, its weight allocation coefficient decreases accordingly, and the allocated zero-sequence voltage regulation amplitude decreases. This can prevent over-regulation of severely unbalanced converters from causing their condition to deteriorate. When multiple converters are unbalanced at the same time, the system can allocate regulation resources differently according to the degree of imbalance. Converters with a less severe imbalance receive higher weights and more regulation amplitudes, while converters with a more severe imbalance are matched with appropriate regulation amplitudes, thereby ensuring the coordinated balance of multiple converters.

[0173] Simultaneously, the overall circulating current deviation of the system is judged by combining the quantization results of the fundamental circulating current component. If the fundamental circulating current component exceeds the safe range, the upper limit of the zero-sequence voltage amplitude distribution can be further constrained. Finally, combined with the zero-sequence voltage direction, the zero-sequence voltage control parameters corresponding to the amplitude and direction of a single converter are generated. The input to the converter control loop realizes the precise matching of the control parameters with the operating conditions and imbalance degree of the parallel system, fundamentally solving the problem of insufficient control caused by the misalignment of the control direction and the fixed parameters in the existing technology.

[0174] S4. Based on the final zero-sequence voltage control parameters, the original three-phase modulation wave of the target converter is superimposed, pulse width modulated and zero-sequence voltage injected to control the DC bus midpoint current until the parallel system reaches steady-state balance.

[0175] Based on the above embodiments, the final zero-sequence voltage regulation parameters include the final zero-sequence voltage amplitude and the final zero-sequence voltage direction; the final zero-sequence voltage direction is divided into positive (corresponding to the midpoint potential rise requirement) and negative (corresponding to the midpoint potential reduction requirement). The direction parameter is converted into a symbol, with positive marked as "+" and negative marked as "-", to obtain the zero-sequence voltage regulation value with a sign.

[0176] Simultaneously, the original three-phase modulation wave signal of the target converter is retrieved, and the signed zero-sequence voltage control value is synchronously superimposed on the original three-phase modulation wave of the target converter to generate the superimposed three-phase modulation wave signal. The superposition is the addition of each corresponding phase, that is, each signal of the original three-phase modulation wave is added to the corresponding signed zero-sequence voltage control value.

[0177] During the superposition process, the phase difference of the three-phase modulation waves remains unchanged, and only the overall amplitude of the three-phase signals is shifted to avoid the problem of three-phase voltage imbalance after superposition.

[0178] The superimposed three-phase modulated wave signal is input to the target converter PWM controller, and the corresponding drive pulse signal is generated using the space vector pulse width modulation algorithm. That is, by adjusting the zero-level duty cycle in the pulse signal, the discharge time ratio of the positive and negative capacitors of the DC bus is changed: when it is necessary to raise the midpoint potential, the positive zero-level duty cycle is increased and the discharge time of the negative capacitor is reduced; when it is necessary to lower the midpoint potential, the reverse zero-level duty cycle is increased and the discharge time of the positive capacitor is reduced, thereby controlling the magnitude and direction of the DC bus midpoint current.

[0179] The zero-level duty cycle adopts a dynamic fine-tuning mode, which needs to be linked with the direction of the zero-sequence voltage and track the DC bus capacitor voltage difference of the target converter in real time: the larger the capacitor voltage difference, the larger the duty cycle adjustment range, and the faster the midpoint potential balance speed; the smaller the capacitor voltage difference, the smaller the adjustment range, and avoid over-control causing bus voltage oscillation.

[0180] The PWM drive pulse signal is output to the converter power module. By precisely controlling the turn-on and turn-off timing of the power devices, the three-phase voltage superimposed with zero-sequence voltage is injected into the parallel bus, completing the hardware implementation of the control signal. During the injection process, the DC bus midpoint current is collected in real time by a midpoint current sensor. This current directly reflects the charging and discharging balance of the positive and negative capacitors: when the DC bus midpoint current is equal to 0, it indicates that the positive and negative capacitors are charging and discharging in a balanced manner, and the midpoint potential is stable; when the DC bus midpoint current is not equal to 0, it indicates that there is a midpoint potential offset, and the zero-level duty cycle needs to be continuously adjusted based on current feedback.

[0181] When each grid-connected converter in the parallel system meets the following conditions, the parallel system is considered to have reached steady-state equilibrium:

[0182] The midpoint current of the DC bus of each grid-connected converter is 0, and the difference between the midpoint potential of the DC bus of each grid-connected converter and the average potential of the bus end is within the second preset difference threshold.

[0183] If the parallel system does not reach steady-state equilibrium, the above steps S1-S3 are executed iteratively, and the modulation wave superposition, pulse width modulation and zero-sequence voltage injection process in step S4 is repeated until the above conditions are met.

[0184] Among them, historical data of the difference between the DC bus midpoint potential and the average potential at the bus end of each grid-connected converter are collected when the parallel system is in a steady-state equilibrium state; statistical analysis is performed on the collected historical difference data to calculate its 95% confidence interval, and the upper limit of the interval is taken as the benchmark threshold; based on the benchmark threshold, 10%-15% is added as a safety redundancy, and finally the second preset difference threshold is obtained.

[0185] The above formulas are all dimensionless calculations. The formulas are derived from software simulations based on a large amount of collected data to obtain the most recent real-world results. The preset parameters in the formulas are set by those skilled in the art according to the actual situation.

[0186] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented in software, the above embodiments can be implemented, in whole or in part, as a computer program product. Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented by software, electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution.

[0187] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0188] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A method for midpoint balance control of a wind power converter parallel bus based on dq transformation, characterized in that, The specific steps include: S1. Collect the DC bus capacitor voltage difference, output circulating current, and bus terminal potential of all converters, including the target converter, and simultaneously collect the DC bus capacitor charging and discharging rate of all converters to identify the number of grid-connected converters. Based on the bus terminal potential of all converters, obtain the average bus terminal potential. S2. Extract the grid voltage synchronization angle of the parallel bus, perform dq transformation on the output circulating current of the target converter, extract the quadrature axis current component and polarity, use the synchronization angle as a reference, perform dq transformation on the preset circulating current reference value of the parallel system and extract the quadrature axis current component, calculate the difference between the two to obtain the parallel circulating current component, and retain the fundamental circulating current component after low-pass filtering; S3. Input the capacitor voltage difference of the target converter into the PI controller to obtain the zero-sequence voltage amplitude. Combine the average potential of the bus terminal and the polarity of the quadrature-axis current of the target converter to obtain the preliminary zero-sequence voltage direction. After verification by the charging and discharging rate of the target converter capacitor, the final direction is determined. Based on the number of grid-connected converters and the fundamental circulating current component, the safe threshold range of the zero-sequence voltage amplitude is determined and corrected. Dynamic inverse proportional weights are configured according to the capacitor voltage difference of each converter to allocate the zero-sequence voltage amplitude within the corrected safe threshold range. Combined with the final zero-sequence voltage direction, the final zero-sequence voltage control parameters are generated. S4. Based on the final zero-sequence voltage regulation parameters, the original three-phase modulation wave of the target converter is superimposed, pulse width modulated and zero-sequence voltage injected to regulate the DC bus midpoint current until the parallel system reaches steady-state balance.

2. The method for midpoint balance control of wind power converter parallel bus based on dq transformation according to claim 1, characterized in that, The system collects the output circulating current and DC bus capacitor charging and discharging rate of all converters to identify the number of currently grid-connected converters. The specific logic is as follows: Based on the output circulating current of all converters, the amplitude of the three-phase current of each converter is extracted one by one, and the state of each converter is determined as follows: If the amplitude of the three-phase current of a converter exceeds the preset amplitude threshold and the duration is not less than the preset time threshold, and the charging and discharging rate of its DC bus capacitor is within the preset steady-state operating rate range, then the converter is determined to be in grid-connected state. If the amplitude of the three-phase current of a converter does not exceed the preset amplitude threshold and the duration is not less than the preset time threshold, and the charging and discharging rate of its DC bus capacitor is zero or within the preset shutdown discharge rate range, then the converter is determined to be in the exit state or standby state. The number of converters that meet the above grid connection status criteria is the current number of grid-connected converters.

3. The method for midpoint balance control of wind power converter parallel bus based on dq transformation according to claim 1, characterized in that, The capacitor voltage difference of the target converter is preprocessed before being input into the PI controller to filter valid capacitor voltage differences. The specific logic is as follows: Settings include A sliding window with multiple sampling points is used to preprocess the sequence of capacitor voltage difference sampling values ​​obtained continuously at fixed time intervals based on this sliding window. The specific process is as follows: Extracting values ​​sequentially from a continuous sequence of capacitor voltage difference samples, based on the sampling time sequence. A series of continuous sampled values ​​are used to form the first sliding window. The arithmetic mean of all sampled values ​​in the sliding window is calculated to obtain the average capacitor voltage difference corresponding to the first sliding window, and this average value is used as the initial valid judgment benchmark value. Shift the sliding window backward by one sampling point along the time axis of the sampled value sequence, and truncate it. The second sliding window is formed by a series of consecutive sampled values. The arithmetic mean of the sampled values ​​within the sliding window is calculated and updated to the baseline value corresponding to the current sliding window. Repeat the sliding and calculation steps above until the sliding window can no longer capture the area. A series of continuous sampled values ​​are used to generate a series of average capacitor voltage difference reference values ​​that are updated synchronously with the sampled value sequence. During the continuous acquisition and moving average calculation of capacitor voltage difference, the difference between the currently acquired capacitor voltage difference sample value and the previous sample value is calculated one by one, and the validity of the sample value is determined based on the calculation result. If the absolute value of the difference between the two exceeds the first preset difference threshold, the current sampled value is determined to be an outlier and is removed. The reference value corresponding to the previous sliding window is then used as the current effective capacitor voltage difference. If the absolute value of the difference between the two does not exceed the first preset difference threshold, the current sampled value is determined to be a valid sampled value, which is retained and included in the average calculation of the subsequent sliding window. At the same time, the benchmark value sequence is updated based on the arithmetic mean result of the current sliding window.

4. The method for midpoint balance control of wind power converter parallel bus based on dq transformation according to claim 1, characterized in that, The initial zero-sequence voltage direction is obtained by combining the average potential at the bus terminals and the polarity of the quadrature-axis current of the target converter. The specific logic is as follows: Using the average potential at the bus terminals as a reference, determine the direction of the difference between the DC bus midpoint potential and the average potential at the bus terminals of the target converter, and preliminarily determine the direction of the zero-sequence voltage output: If the DC bus midpoint potential is higher than the average potential of the bus end, then a negative zero-sequence voltage is output. This voltage is used to lower the DC bus midpoint potential, driving the midpoint potential to gradually approach the average potential of the bus end, thus reducing the potential difference between the two. If the DC bus midpoint potential is lower than the average potential of the bus end, then a positive zero-sequence voltage is output. This voltage is used to raise the DC bus midpoint potential, driving the midpoint potential to gradually approach the average potential of the bus end, thus reducing the potential difference between the two. Based on the polarity of the quadrature-axis current of the target converter, the above preliminary determination direction is corrected according to the following rules: If the polarity of the quadrature-axis current is positive and consistent with the initial voltage direction adjustment requirement, then the original initial direction should be maintained. If the polarity of the quadrature-axis current is negative and contradicts the initial determination of the voltage direction adjustment requirement, then the initial determination of the direction should be reversed. If the polarity of the quadrature-axis current is positive and contradicts the initial determination of the voltage direction adjustment requirement, then the initial determination of the direction should be reversed. If the polarity of the quadrature-axis current is negative and it is consistent with the initial voltage direction adjustment requirement, then the original initial direction should be maintained. Based on the above preliminary judgment and polarity correction results, the preliminary zero-sequence voltage direction is obtained.

5. The method for midpoint balance control of wind power converter parallel bus based on dq transformation according to claim 4, characterized in that, The initial zero-sequence voltage direction is determined to the final direction after verification by the target converter capacitor's charge and discharge rate. The specific logic is as follows: The current DC bus capacitor charging and discharging rate of the target converter is collected, the rate change trend is recorded, and the control expectation corresponding to the initial zero-sequence voltage direction is correlated. That is, after the voltage is injected in this direction, the capacitor charging and discharging rate shows a change pattern that matches the midpoint potential control target. If the trend of the capacitor charging and discharging rate is consistent with the expected regulation of the initial zero-sequence voltage direction, and the capacitor charging and discharging rate is within the preset steady-state operating rate range, it indicates that the initial direction can achieve the midpoint potential regulation target, the verification is passed, and the initial zero-sequence voltage direction is maintained as the final direction. If the trend of the capacitor charging and discharging rate changes contrary to the expected adjustment of the initial zero-sequence voltage direction, or if the capacitor charging and discharging rate exceeds the steady-state operating rate range, it indicates that there is a deviation in the initial direction and the verification fails. The initial zero-sequence voltage direction should be adjusted 180° in the opposite direction. After the reverse adjustment, the capacitor charging and discharging rate is collected again to verify whether the control trend of the adjusted direction is consistent with the change of the capacitor charging and discharging rate. This continues until the trend of the capacitor charging and discharging rate meets expectations and is within the preset steady-state operating rate range. The adjusted direction is then determined to be the final zero-sequence voltage direction.

6. The method for midpoint balance control of wind power converter parallel bus based on dq transformation according to claim 1, characterized in that, Based on the current number of grid-connected converters and the fundamental circulating current component, the safe threshold range for determining and correcting the zero-sequence voltage amplitude is as follows: The maximum allowable value of zero-sequence voltage amplitude is preset when a single converter operates independently; Based on the current number of grid-connected converters, the maximum allowable value of the zero-sequence voltage amplitude of a single converter is reduced proportionally to obtain the upper limit of the initial safety threshold range, while its lower limit is fixed at 0. Extract the fundamental current component obtained by low-pass filtering, and simultaneously preset a fundamental current safety threshold. Based on the relationship between the fundamental current component and the fundamental current safety threshold, adjust the initial safety threshold range: If the fundamental circulation component is less than or equal to the fundamental circulation safety threshold, the initial safety threshold range remains unchanged. If the fundamental wave circulation component is greater than the fundamental wave circulation safety threshold, calculate the proportion of the fundamental wave circulation component that exceeds the fundamental wave circulation safety threshold to obtain the proportion of the fundamental wave circulation exceeding the standard. Add 1 to the proportion of the fundamental wave circulation exceeding the standard, and then multiply it by the upper limit of the initial safety threshold interval to obtain the corrected upper limit of the safety threshold interval. If the upper limit of the corrected safety threshold range is greater than the upper limit of the zero-sequence voltage amplitude limit, then the upper limit of the zero-sequence voltage amplitude limit shall be taken as the final upper limit of the safety threshold range. Conversely, the upper limit of the corrected safety threshold range is taken as the final upper limit of the safety threshold range. Based on the final upper and lower limits of the safety threshold range, the corrected zero-sequence voltage amplitude safety threshold range is obtained.

7. The method for midpoint balance control of wind power converter parallel bus based on dq transformation according to claim 6, characterized in that, Dynamic inverse-proportional weights are configured based on the voltage difference between the capacitors of each converter to allocate the zero-sequence voltage amplitude within the corrected safety threshold range. The specific logic is as follows: Extract the effective capacitor voltage difference of all grid-connected converters and synchronously call the corrected zero-sequence voltage amplitude safety threshold range. If the effective capacitor voltage difference of a converter is 0, then its weight allocation coefficient is set to the maximum value of the weights of all grid-connected converters. If the effective capacitor voltage difference of all grid-connected converters is not zero, calculate the reciprocal of the effective capacitor voltage difference of each converter. Divide the reciprocal of the effective capacitor voltage difference of each converter by the sum of the reciprocals of the effective capacitor voltage differences of all grid-connected converters to obtain the weight allocation coefficient of each converter. For the target converter, the weight allocation coefficient corresponding to the target converter is calculated by the ratio of the reciprocal of its effective capacitor voltage difference to the sum of the reciprocals of the effective capacitor voltage differences of all grid-connected converters. Multiply the corrected upper limit of the zero-sequence voltage amplitude safety threshold range by the weight allocation coefficient of the target converter to obtain the initial zero-sequence voltage amplitude allocated to the target converter; The initial zero-sequence voltage amplitude allocated to the target converter is verified, with the corrected zero-sequence voltage amplitude safety threshold range as a constraint: If the initially allocated zero-sequence voltage amplitude is less than the lower limit of the above-mentioned safety threshold range, then the lower limit of the safety threshold range shall be used as the final zero-sequence voltage amplitude of the target converter. If the initially allocated zero-sequence voltage amplitude is within the aforementioned safety threshold range, then the initially allocated zero-sequence voltage amplitude will be used as the final zero-sequence voltage amplitude of the target converter. If the initially allocated zero-sequence voltage amplitude is greater than the upper limit of the aforementioned safety threshold range, then the upper limit of the safety threshold range will be used as the final zero-sequence voltage amplitude of the target converter.

8. The method for midpoint balance control of wind power converter parallel bus based on dq transformation according to claim 1, characterized in that, The final zero-sequence voltage control parameters include the final zero-sequence voltage amplitude and the final zero-sequence voltage direction; the criteria for determining that the parallel system has reached steady-state equilibrium are: the DC bus midpoint current of each grid-connected converter is 0, and the difference between the DC bus midpoint potential of each grid-connected converter and the average potential at the bus end is within the second preset difference threshold.

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