Circulation suppression method and device of H-bridge MMC valve test device and medium

Abstract

The invention relates to a circulating current suppression method and device of an H-bridge type MMC valve test device and a medium. The method comprises the steps that S1, a frequency doubling circulating current detection value is obtained; s2, comparing the double-frequency circulating current detection value with a pre-configured reference value to obtain a double-frequency circulating current error signal, inputting the double-frequency circulating current error signal into a proportional resonance controller, providing resonance gain at a double power grid frequency, and outputting a double-frequency compensation voltage instruction; and S3, superposing the double-frequency compensation voltage instruction to a two-phase reference modulation wave of four bridge arms, generating a corrected bridge arm modulation wave, and further generating a trigger pulse signal of each sub-module of the bridge arms. Compared with the prior art, on the premise that the test topology is not changed, the double-frequency circulating current is effectively restrained, sub-module capacitor voltage fluctuation and valve test current distortion are reduced, the control structure is simple, and good test stress equivalence can be kept in a multi-working-condition valve operation test.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power electronics, in particular to a circulating current suppression method and device for an H-bridge MMC valve test device and a medium. BACKGROUND

[0002] As the core equipment of flexible DC power transmission, the modular multilevel converter valve (hereinafter referred to as MMC valve) usually contains thousands of insulated gate bipolar transistors (IGBT). Since IGBT is sensitive to key electrical stresses such as temperature, voltage, current and its rate of change, and is vulnerable under repeated high-voltage and high-current conditions, it is necessary to conduct operation test on large-capacity MMC valves before design and delivery to verify their reliability. Since direct testing on the entire converter valve will increase the cost, it is necessary to use equivalent operation test topology to reproduce the valve voltage, current and switching stress in actual engineering under limited power supply capacity. The common MMC operation test topology at present includes three-phase back-to-back structure, single-phase back-to-back structure, half-bridge counter structure and H-bridge structure, etc.

[0003] Affected by the capacitor voltage fluctuation and the modulation method, there is a double-frequency circulating current in the equivalent operation test topology. The double-frequency circulating current will increase the bridge arm current, increase the additional loss, and even affect the normal operation of the equivalent operation test. Therefore, it is necessary to propose a double-frequency suppression method for the MMC equivalent operation test topology.

[0004] For a two-phase four-bridge-arm structure, the H-bridge MMC valve equivalent operation test topology with the two-phase bridge arm midpoint connected through the load inductance can better reproduce the AC / DC operating stress of the engineering MMC valve under limited power supply capacity, but it will still produce obvious double-frequency circulating current during operation test. If there is no effective suppression measure, it will lead to test loop current distortion, increase of sub-module capacitor voltage fluctuation and increase of device loss, thereby affecting the stability and stress equivalence of the valve operation test.

[0005] In view of this problem, the prior art has proposed various control strategies, for example, Chinese patent CN117638842A discloses a proportional integral control in the dq coordinate system and a feedforward decoupling compensation method; for example, Chinese patent CN110011554A discloses using a notch filter to extract the double-frequency component of the circulating current, and then injecting a compensation voltage through proportional resonance control; introducing a virtual impedance in front of the bridge arm inductance to improve the damping of the circulating current loop to weaken the circulating current oscillation and part of the low-frequency component, etc.

[0006] However, the above-mentioned prior art is mostly for specific valve segment test loop topology structure, such as three-phase back-to-back structure and half-bridge counter structure, etc. For the H-bridge MMC valve test device with different structure and power flow direction from the above-mentioned topology, its applicability and control effect are still limited.

[0007] The H-bridge MMC valve test device adopts a two-phase four-bridge-arm structure, the two-phase bridge-arm midpoints are connected through a load reactor, and the upper and lower bridge arms are connected in parallel with a DC power supply and a smoothing reactor at both ends. This topology aims to reproduce the AC / DC operating stress of the engineering MMC valve under small power supply capacity, but its symmetrical structure and power flow are fundamentally different from the common three-phase back-to-back or half-bridge pair topology. This hardware configuration leads to the generation mechanism and control requirements of circulating current, especially the generation mechanism and control requirements of the second-order circulating current, which are different from other topologies. The existing method cannot be optimized for this structure, so the effect is limited.

[0008] The proportional-integral control and feedforward decoupling compensation method is usually implemented in the dq coordinate system. The circulating current is adjusted by proportional-integral (PI) control, and the AC and DC components are decoupled by feedforward compensation. This method is suitable for three-phase systems where current components can be decoupled by Park transformation. However, the H-bridge type is a two-phase system, not a three-phase system. The dq transformation and decoupling strategy is based on the three-phase balance assumption, but the power flow of the two-phase structure is not symmetrical. The feedforward compensation cannot effectively handle the coupling between the two phases, resulting in incomplete decoupling and reduced circulating current suppression accuracy. In addition, in the H-bridge type test device, the sub-module switching frequency and control system delay will affect the circulating current dynamics. The existing PI control lacks gain at the second harmonic and lacks phase compensation, which cannot respond to circulating current changes in time, exacerbating current distortion. Finally, the H-bridge type topology needs to maintain the equivalence of test voltage, current, and engineering working conditions. However, the static error and decoupling error of PI control may introduce additional harmonics, increasing the sub-module capacitor voltage fluctuation, which violates the equivalence principle.

[0009] In the notch filter extraction + proportional-resonant control combined with virtual impedance method, a notch filter is used to extract the second-order circulating current component, and a proportional-resonant (PR) controller is used to inject a compensation voltage. Virtual impedance is used to improve the damping of the circulating current loop and suppress oscillation. However, the circulating current of the H-bridge type is mainly concentrated at the second harmonic, but the notch filter is usually designed with a fixed frequency passband. The frequency of the circulating current of the H-bridge type may shift due to operating conditions, and the second-order filter needs to have an adjustable passband near the second harmonic. However, the existing notch filter usually has a fixed bandwidth and cannot adapt to the frequency changes of the H-bridge type, resulting in noise or missing frequencies in the extracted components. In addition, the virtual impedance method weakens oscillation by increasing loop damping, but the circulating current path of the H-bridge type passes through the load reactor and bridge arm inductance, and its impedance characteristics are different from those of a three-phase system. The existing virtual impedance value may not consider the shift of the resonance point caused by the connection of the two-phase midpoints, and may instead introduce low-frequency oscillation. Finally, the H-bridge type needs to decouple the circulating current suppression from the DC and fundamental frequency current control. However, in the existing method, the PR controller and virtual impedance may interfere with other control loops, disrupting symmetry. For example, if the compensation voltage is not evenly added to the four bridge arms, it will exacerbate asymmetric operation. SUMMARY

[0010] The purpose of this invention is to provide a circulating current suppression method, device, and medium for H-bridge type MMC valve testing equipment. Without changing the test topology of H-bridge type MMC valve, it achieves effective suppression of second harmonic circulating current, reduces submodule capacitor voltage fluctuations and valve test current distortion, has a simple control structure, and can maintain good test stress equivalence in multi-condition valve operation tests.

[0011] The objective of this invention can be achieved through the following technical solutions: A method for suppressing circulating flow in an H-bridge type MMC valve testing device includes: Step S1: Obtain the second harmonic circulating current detection value; Step S2: Compare the second harmonic circulating current detection value with the pre-configured reference value to obtain the second harmonic circulating current error signal, input the second harmonic circulating current error signal into the proportional resonant controller, provide resonant gain at twice the grid frequency, and output the second harmonic compensation voltage command; Step S3: The second-harmonic compensation voltage command is superimposed on the reference modulation wave of the four bridge arms of the two phases to generate the corrected bridge arm modulation wave, thereby generating the trigger pulse signal of each sub-module of the bridge arm.

[0012] Step S1 includes: Step S1-1: During the equivalent operation test of the H-bridge MMC, sample the upper arm current and lower arm current of any phase; Step S1-2: Input the sampled upper arm current and lower arm current into the corresponding second-order filters respectively to obtain the double grid frequency current components of the upper and lower arms respectively. Step S1-3: Calculate the arithmetic mean of the double-frequency current components of the upper and lower bridge arms to obtain the double-frequency circulating current detection value: in: This is the second harmonic circulating current detection value. The current component of the upper bridge arm is twice the grid frequency. The current component is twice the grid frequency of the lower bridge arm.

[0013] The second-order filter is configured to have passband characteristics near twice the grid frequency to suppress frequency components other than the twice grid frequency component.

[0014] The pre-configured reference value is set to 0.

[0015] The transfer function of the proportional resonant controller for: in: This is the proportionality coefficient. The resonance coefficient, s For the Laplace operator, For phase compensation angle, The frequency of the second harmonic circulating current detection value.

[0016] The frequency harmonic compensation voltage command is as follows: in: This is a frequency-doubled compensation voltage command. This is the second harmonic circulating current error signal.

[0017] The generation process of the reference modulation wave includes: Step A-1: ​​Collect the DC current and fundamental frequency current of the test circuit; Step A-2: Decouple the DC current and the fundamental frequency current: in: It is direct current. This represents the effective value of the fundamental frequency AC voltage output by phase A. This represents the effective value of the base frequency AC voltage output by phase B. This is the DC power supply voltage. It is the power frequency angular frequency. For loop inductance, The initial phase angle, It is the fundamental frequency current; Step A-3: Define the first variable η and the second variable λ: Step A-4: Generate the relationship between the first variable η and the second variable λ and the initial phase angle and modulation ratio: in: m Modulation ratio; Step A-5: Using a proportional-integral controller, with the DC current setpoint and the fundamental frequency current setpoint of the test circuit as targets, dynamically adjust the first variable η and the second variable λ, and output the initial phase angle and modulation ratio; Step A-6: Substitute the effective values ​​of the fundamental frequency AC voltage outputs of phase A and phase B into the reference modulation wave formula to generate a continuous waveform as the reference modulation wave: in: This is the reference modulation wave for phase A. t is the reference modulation wave for phase B, and t is time.

[0018] Each arm of the H-bridge type MMC valve includes multiple series-connected half-bridge sub-modules and arm reactors. Each half-bridge module includes two IGBTs connected in series, each IGBT is connected in anti-parallel with a freewheeling diode, and each half-bridge module is connected in parallel with a capacitor.

[0019] A circulating flow suppression device for an H-bridge type MMC valve testing apparatus includes a memory, a processor, and a program stored in the memory, wherein the processor executes the program to implement the method described above.

[0020] A storage medium having a program stored thereon, which, when executed, implements the method described above.

[0021] Compared with the prior art, the present invention has the following beneficial effects: 1. Only the upper and lower arm currents of any one phase need to be sampled. The second-order filter is used to extract the twice grid frequency component and calculate the arithmetic mean to obtain the second-order frequency circulating current detection value. There is no need to sample all arm or loop currents. It does not rely on complex algorithms such as second-order generalized integrators. The hardware overhead and implementation difficulty are both low.

[0022] 2. The pre-configured reference value is zero, so that the second harmonic circulating current detection value approaches zero under steady state, thereby suppressing the second harmonic grid frequency circulating current in the test circuit.

[0023] 3. The proportional resonant controller includes a proportional element and a resonant element, and is equipped with a phase lead compensation element. The phase lead compensation element provides an approximately 90° phase lead at twice the grid frequency to compensate for the phase lag introduced by the resonant controller.

[0024] 4. During the valve operation test, a DC and base frequency current closed-loop control strategy based on mathematical transformation decoupling is adopted to generate a reference modulation wave. The second harmonic compensation voltage command is superimposed on the reference modulation wave as an additional quantity, so that the second harmonic circulating current suppression control and the operation test current control are decoupled from each other, thereby achieving second harmonic circulating current suppression while maintaining the equivalence of test voltage, current and switching stress with engineering operating conditions.

[0025] 5. This invention employs a proportional resonant controller with phase lead compensation, which provides resonant gain and compensates for phase lag at twice the grid frequency. The generated second harmonic compensation voltage command is symmetrically superimposed on the modulation wave of the four bridge arms of the two phases. While effectively suppressing the second harmonic circulating current, reducing bridge arm current distortion and submodule capacitor voltage fluctuation, it maintains the symmetrical structure and stress equivalence of the H-bridge type MMC valve operation test topology. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the H-bridge type MMC valve operation test topology in an embodiment of the present invention; Figure 2 This is a schematic diagram of a single bridge arm and half-bridge sub-module structure of the H-bridge type MMC valve in an embodiment of the present invention; Figure 3 This is a schematic diagram of the main steps of the method of the present invention; Figure 4 This is a structural block diagram of the circulating flow suppression control system in an embodiment of the present invention; Figure 5 This is a schematic diagram of the simulation system in an embodiment of the present invention; Figure 6 This is a schematic diagram showing the change in the waveform of the second harmonic current component before and after the application of circulating current suppression in an embodiment of the present invention. Detailed Implementation

[0027] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. These embodiments are based on the technical solution of the present invention and provide detailed implementation methods and specific operating procedures. However, the scope of protection of the present invention is not limited to the following embodiments.

[0028] Example 1 A circulating current suppression method for an H-bridge type MMC valve test device is proposed. By using a reasonable current sampling and second harmonic component extraction method, combined with a proportional resonance control strategy that can compensate for phase angle lag, the second harmonic circulating current in the test circuit is effectively suppressed without changing the existing equivalent operating test topology. This reduces the voltage fluctuation of the submodule capacitor and the distortion of the valve test current, thereby improving the stability and stress equivalence of the valve operation test.

[0029] like Figure 3 As shown, it includes: Step S1: Obtain the second harmonic circulating current detection value; Test apparatus such as Figure 1 As shown, a two-phase four-arm H-bridge type MMC valve operation test topology is adopted. The midpoints of the two phase arms are connected through a load reactor, and DC power supply and smoothing reactor are connected in parallel at both ends of the upper and lower arms to equivalently reproduce the AC and DC operating stress of the engineering MMC valve with a smaller power supply capacity. Figure 1 middle, This is the DC power supply voltage. For bridge arm inductance, For load inductance, This refers to the current in the upper arm of phase A. This refers to the current in the lower arm of phase A. This refers to the current in the upper arm of phase B. This refers to the current in the lower arm of phase B. The AC voltage is output at the midpoint of the bridge arm of phase A. The AC voltage is output at the midpoint of the bridge arm of phase B unit.

[0030] A schematic diagram of the structure of a single bridge arm and half-bridge module of an H-bridge type MMC valve is shown below. Figure 2 As shown. Each bridge arm consists of several half-bridge sub-modules connected in series with a bridge arm inductor. Each half-bridge module includes two sets of insulated-gate bipolar transistors (IGBTs) connected in series, an anti-parallel freewheeling diode, and a capacitor. Figure 2 middle, It is a half-bridge sub-module. For bridge arm inductance, For IGBT, For the next IGBT, It is an anti-parallel freewheeling diode. It is a lower anti-parallel freewheeling diode. For submodule capacitors.

[0031] Step S1 includes: Step S1-1: During the equivalent operation test of the H-bridge MMC, sample the upper arm current and lower arm current of any phase; Step S1-2: Input the sampled upper arm current and lower arm current into the corresponding second-order filters respectively to obtain the double grid frequency current components of the upper and lower arms respectively. The second-order filter is configured to have passband characteristics near the second harmonic grid frequency to suppress frequency components other than the second harmonic grid frequency component, thereby improving the accuracy of the second harmonic circulating current detection value. Preferably, a digital second-order IIR filter is implemented in the controller, and the bandwidth is tuned according to factors such as the second harmonic circulating current frequency offset and control delay, to ensure sufficient passage of the second harmonic component while suppressing other frequency components. In this embodiment, the center frequency of the second-order filter is selected as [missing information]. The quality factor is selected as Bandwidth selection is .

[0032] Step S1-3: Calculate the arithmetic mean of the double-frequency current components of the upper and lower bridge arms to obtain the double-frequency circulating current detection value: in: This is the second harmonic circulating current detection value. The current component of the upper bridge arm is twice the grid frequency. The current component is twice the grid frequency of the lower bridge arm.

[0033] Step S2: Compare the second harmonic circulating current detection value with the pre-configured reference value to obtain the second harmonic circulating current error signal. Input the second harmonic circulating current error signal into the proportional resonant controller to provide resonant gain at twice the grid frequency and output the second harmonic compensation voltage command. The pre-configured reference value is set to 0, so that the second harmonic circulating current detection value approaches zero under steady state, thereby suppressing the second harmonic grid frequency circulating current in the test circuit.

[0034] Transfer function of proportional resonant controller for: in: This is the proportionality coefficient. The resonance coefficient, s For the Laplace operator, For phase compensation angle, The frequency of the second harmonic circulating current detection value. In this embodiment, the scaling factor is selected as [value missing]. The resonance coefficient is chosen as The frequency of the second harmonic circulating current detection value is selected as follows: The phase compensation angle is selected as .

[0035] The proportional resonant controller includes a proportional element and a resonant element, and is equipped with a phase lead compensation element. The phase lead compensation element provides a phase lead of approximately 90° at twice the grid frequency to compensate for the phase lag introduced by the resonant controller.

[0036] The double-frequency compensation voltage command is: in: This is a frequency-doubled compensation voltage command. This is the second harmonic circulating current error signal.

[0037] Step S3: The double-frequency compensation voltage command is superimposed on the reference modulation wave of the four bridge arms of the two phases to generate the corrected bridge arm modulation wave, which in turn generates the trigger pulse signal of each sub-module of the bridge arm.

[0038] Each arm of the H-bridge type MMC valve includes multiple series-connected half-bridge sub-modules and arm reactors. Each half-bridge module includes two IGBTs connected in series, each IGBT is connected in anti-parallel with a freewheeling diode, and each half-bridge module is connected in parallel with a capacitor.

[0039] To maintain symmetrical operation of the H-bridge MMC valve test setup, the second-harmonic compensation voltage command is evenly superimposed onto the modulation waves of the upper and lower bridge arms of both phases. The corrected bridge arm modulation waves are used to generate trigger signals for each half-bridge submodule, thereby adjusting the output level of each bridge arm.

[0040] The block diagram of the circulation suppression control system is as follows: Figure 4 As shown: First, the current of any one phase upper and lower bridge arm is sampled, and the second harmonic circulating current detection value is obtained through a second-order filter and arithmetic average operation; then, the second harmonic circulating current detection value is input into the proportional resonant controller to calculate the second harmonic compensation voltage command; finally, the second harmonic compensation voltage command is superimposed on the modulation wave of the four bridge arms of the two phases, and the second harmonic circulating current is suppressed by the sub-module drive.

[0041] The process of generating the reference modulation wave includes: Step A-1: ​​Collect the DC current and fundamental frequency current of the test circuit; Step A-2: Decouple the DC current and the fundamental frequency current: in: It is direct current. This represents the effective value of the fundamental frequency AC voltage output by phase A. This represents the effective value of the base frequency AC voltage output by phase B. This is the DC power supply voltage. It is the power frequency angular frequency. For loop inductance, The initial phase angle, This is the fundamental frequency current; Step A-3: Define the first variable η and the second variable λ: Step A-4: Generate the relationship between the first variable η and the second variable λ and the initial phase angle and modulation ratio: in: m The modulation ratio; Step A-5: Using a proportional-integral controller, with the DC current setpoint and the fundamental frequency current setpoint of the test circuit as targets, dynamically adjust the first variable η and the second variable λ, and output the initial phase angle and modulation ratio; Step A-6: Substitute the effective values ​​of the fundamental frequency AC voltage outputs of phase A and phase B into the reference modulation wave formula to generate a continuous waveform as the reference modulation wave: in: This is the reference modulation wave for phase A. t is the reference modulation wave for phase B, and t is time.

[0042] The principle behind the above process is as follows: During the valve operation test, a DC and fundamental frequency current closed-loop control strategy based on mathematical transformation decoupling was adopted. Specifically, when the test circuit is running normally, the AC output voltage at the midpoint of the two-phase unit bridge arm is... (2) in, , This represents the effective value of the two-phase output fundamental frequency AC voltage. The initial phase angle, This is the power frequency angular frequency. The derivation shows that the direct current... The expression is (3) Effective value of fundamental frequency current in upper and lower bridge arms The expression is (4) From equations (3) and (4), it can be seen that, , and , , This constitutes a multi-input multi-output coupled system with 3 degrees of freedom, which can be decoupled into two single-input single-output subsystems through equivalent mathematical transformations. Let... Then equations (3) and (4) can be transformed into (5) (6) Perform an equivalent mathematical transformation on the two equations above, and define two new variables. and , respectively with and One-to-one correspondence, there is (7) (8) Therefore, the test loop system is decoupled into two single-input single-output subsystems, and when and After the reference value is determined, and The reference value is also a uniquely determined constant, therefore a proportional-integral controller as shown in equation (9) can be used to achieve the control of the reference value. and Control, thereby achieving control and Control.

[0043] (9) Quantities with superscripts are reference values, while those without superscripts are actual values. , , , All are constants. (Obtained) and Afterwards, according to The effective value of the two-phase output base frequency AC voltage can be obtained, and a reference modulation wave is generated by equation (2). The second harmonic compensation voltage command is superimposed on the reference modulation wave as an additional quantity. The second harmonic circulating current suppression control and the operating test current control are decoupled from each other, so as to maintain the equivalence of the test voltage, current and switching stress with the engineering working conditions while realizing the second harmonic circulating current suppression.

[0044] To verify the effectiveness of the circulating current suppression method of the H-bridge type MMC valve test device of the present invention, a typical 27-level H-bridge type MMC valve test device simulation system is used as an example for verification. A schematic diagram of the simulation system is shown below. Figure 5 As shown in Table 1, the main parameters of the system are as follows.

[0045] Table 1 The rectifier station employs constant DC voltage and constant reactive power control, transmitting power to the test circuit station via transmission lines. The test circuit station utilizes the DC and fundamental frequency current closed-loop control strategy based on mathematical transformation decoupling and the second harmonic circulating current suppression method of this invention. The reference value for the rectifier station's DC voltage is 60kV, and the reference value for reactive power is 0. The reference value for the test circuit station's DC current is 0.531kA, and the reference value for the fundamental frequency current is 0.844kA.

[0046] The program used was built in the electromagnetic transient simulation program PSCAD / EMTDC V5.0.0, and the simulation step size was set to 50 microseconds.

[0047] The second-harmonic circulating current suppression strategy is set to activate at the 3rd second. A schematic diagram showing the changes in the second-harmonic current component waveform before and after implementing circulating current suppression is shown below. Figure 6 As shown in the figure, after the circulating current suppression strategy is activated, the amplitude of the second harmonic current component quickly drops from about 0.8kA to almost 0, verifying the effectiveness of the circulating current suppression method of the H-bridge type MMC valve test device of this invention.

[0048] Example 2 The electronic device of this invention includes a central processing unit (CPU), which can perform various appropriate actions and processes according to computer program instructions stored in read-only memory (ROM) or loaded from a storage unit into random access memory (RAM). The RAM may also store various programs and data required for device operation. The CPU, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.

[0049] Multiple components in the device are connected to the I / O interface, including: input units such as keyboards and mice; output units such as various types of displays and speakers; storage units such as disks and optical discs; and communication units such as network interface cards (NICs), modems, and wireless transceivers. The communication unit allows the device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0050] The processing unit executes the various methods and processes described above, such as steps S1 to S3. For example, in some embodiments, steps S1 to S3 may be implemented as a computer software program tangibly contained in a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed on the device via ROM and / or a communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more steps of steps S1 to S3 described above may be performed. Alternatively, in other embodiments, the CPU may be configured to execute steps S1 to S3 by any other suitable means (e.g., by means of firmware).

[0051] The functions described above in this document can be performed, at least in part, by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: Field Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), Application Standard Products (ASSPs), System-on-Chip (SoCs), Complex Programmable Logic Devices (CPLDs), and so on.

[0052] The program code used to implement the methods of the present invention can be written in any combination of one or more programming languages. This program code can be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0053] In the context of this invention, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0054] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A method for suppressing circulating flow in an H-bridge type MMC valve testing device, characterized in that, include: Step S1: Obtain the second harmonic circulating current detection value; Step S2: Compare the second harmonic circulating current detection value with the pre-configured reference value to obtain the second harmonic circulating current error signal, input the second harmonic circulating current error signal into the proportional resonant controller, provide resonant gain at twice the grid frequency, and output the second harmonic compensation voltage command; Step S3: The second-harmonic compensation voltage command is superimposed on the reference modulation wave of the four bridge arms of the two phases to generate the corrected bridge arm modulation wave, thereby generating the trigger pulse signal of each sub-module of the bridge arm.

2. The method for suppressing circulating flow in an H-bridge type MMC valve testing device according to claim 1, characterized in that, Step S1 includes: Step S1-1: During the equivalent operation test of the H-bridge MMC, sample the upper arm current and lower arm current of any phase; Step S1-2: Input the sampled upper arm current and lower arm current into the corresponding second-order filters respectively to obtain the double grid frequency current components of the upper and lower arms respectively. Step S1-3: Calculate the arithmetic mean of the double-frequency current components of the upper and lower bridge arms to obtain the double-frequency circulating current detection value: in: This is the second harmonic circulating current detection value. The current component of the upper bridge arm is twice the grid frequency. The current component is twice the grid frequency of the lower bridge arm.

3. The method for suppressing circulating flow in an H-bridge type MMC valve testing device according to claim 2, characterized in that, The second-order filter is configured to have passband characteristics near twice the grid frequency to suppress frequency components other than the twice grid frequency component.

4. The method for suppressing circulating flow in an H-bridge type MMC valve testing device according to claim 1, characterized in that, The pre-configured reference value is set to 0.

5. The method for suppressing circulating flow in an H-bridge type MMC valve testing device according to claim 1, characterized in that, The transfer function of the proportional resonant controller for: in: This is the proportionality coefficient. The resonance coefficient, s For the Laplace operator, For phase compensation angle, The frequency of the second harmonic circulating current detection value.

6. The method for suppressing circulating flow in an H-bridge type MMC valve testing device according to claim 5, characterized in that, The frequency harmonic compensation voltage command is as follows: in: This is a frequency-doubled compensation voltage command. This is the second harmonic circulating current error signal.

7. The method for suppressing circulating flow in an H-bridge type MMC valve testing device according to claim 1, characterized in that, The generation process of the reference modulation wave includes: Step A-1: ​​Collect the DC current and fundamental frequency current of the test circuit; Step A-2: Decouple the DC current and the fundamental frequency current: in: It is direct current. This represents the effective value of the fundamental frequency AC voltage output by phase A. This represents the effective value of the base frequency AC voltage output by phase B. This is the DC power supply voltage. It is the power frequency angular frequency. For loop inductance, The initial phase angle, This is the fundamental frequency current; Step A-3: Define the first variable η and the second variable λ: Step A-4: Generate the relationship between the first variable η and the second variable λ and the initial phase angle and modulation ratio: in: m The modulation ratio; Step A-5: Using a proportional-integral controller, with the DC current setpoint and the fundamental frequency current setpoint of the test circuit as targets, dynamically adjust the first variable η and the second variable λ, and output the initial phase angle and modulation ratio; Step A-6: Substitute the effective values ​​of the fundamental frequency AC voltage outputs of phase A and phase B into the reference modulation wave formula to generate a continuous waveform as the reference modulation wave: in: This is the reference modulation wave for phase A. t is the reference modulation wave for phase B, and t is time.

8. The method for suppressing circulating flow in an H-bridge type MMC valve testing device according to claim 1, characterized in that, Each arm of the H-bridge type MMC valve includes multiple series-connected half-bridge sub-modules and arm reactors. Each half-bridge module includes two IGBTs connected in series, each IGBT is connected in anti-parallel with a freewheeling diode, and each half-bridge module is connected in parallel with a capacitor.

9. A circulating flow suppression device for an H-bridge type MMC valve testing apparatus, comprising a memory, a processor, and a program stored in the memory, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 1-8.

10. A storage medium having a program stored thereon, characterized in that, When the program is executed, it implements the method as described in any one of claims 1-8.

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