Manufacturing method of printed circuit board with embedded chip capacitor and printed circuit board

Abstract

The invention relates to a manufacturing method of a printed circuit board with an embedded chip capacitor and the printed circuit board, and the method comprises the following steps: providing a secondary outer layer substrate, and arranging a bonding pad on the secondary outer layer substrate; forming a groove in the secondary outer layer substrate to form a groove for accommodating the chip capacitor so as to expose the bonding pad; welding flux is formed on the exposed bonding pad, and the chip capacitor is mounted and welded on the bonding pad; filling an insulating packaging material in the groove containing the chip capacitor; laminating at least one layer of prepreg and copper foil on the structure filled with the insulating packaging material, and pressing to enable the prepreg to flow and be cured to form a dielectric layer covering the insulating packaging material and the chip capacitor; and forming a conductive structure penetrating through the dielectric layer, wherein the conductive structure is electrically connected with the electrode of the chip capacitor. The invention provides a manufacturing method of a printed circuit board with embedded chip capacitors and the printed circuit board. The manufacturing method has the positive effects of improving the integration level, optimizing the electrical performance and enhancing the structural reliability.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit manufacturing technology, specifically to a method for manufacturing a printed circuit board with embedded chip capacitors and the printed circuit board obtained therefrom. Background Technology

[0002] In the electronics manufacturing industry, embedding passive components within printed circuit boards (PCBs) has become a technological development trend to increase the functional density of PCBs. One existing approach involves using special thin-film materials to form capacitor layers on a substrate through patterning processes, and then embedding them into the board via lamination. This thin-film-based embedding method has limitations in achieving high capacitance values. Furthermore, this process involves the application and processing of specialized materials, and its manufacturing process and material selection may have compatibility considerations with standard PCB manufacturing processes. Therefore, the industry desires an embedding solution that can utilize mature, standard electronic components and better integrate with conventional PCB manufacturing processes to achieve improvements in integration, manufacturing cost, and reliability. Summary of the Invention

[0003] In view of this, the present invention provides a method for manufacturing a printed circuit board with embedded chip capacitors and a printed circuit board, which has positive effects on improving integration, optimizing electrical performance and enhancing structural reliability.

[0004] The objective of this invention is achieved through the following technical solution: A method for manufacturing a printed circuit board with embedded surface-mount capacitors includes the following steps: A secondary outer layer substrate is provided, wherein pads are provided on the secondary outer layer substrate; A slot is made on the outermost substrate to form a slot for accommodating the surface mount capacitor, thereby exposing the pads; Solder is formed on the exposed pads, and surface mount capacitors are mounted and soldered onto the pads; The slot containing the chip capacitor is filled with insulating encapsulation material; At least one layer of prepreg and copper foil are stacked on the structure filled with the insulating encapsulation material and pressed together, so that the prepreg flows and solidifies to form a dielectric layer covering the insulating encapsulation material and the chip capacitor. A conductive structure is formed that penetrates the dielectric layer and is electrically connected to the electrodes of the patch capacitor.

[0005] A complete process flow was employed to achieve highly reliable embedding of surface mount capacitors within printed circuit boards (PCBs). First, slots were cut into the outermost substrate to expose pads, providing precise positioning space for the surface mount capacitors and ensuring accurate alignment in subsequent processes. Then, solder was applied to the pads to complete the mounting and soldering of the surface mount capacitors. This created a robust electrical and mechanical connection within the board, laying the foundation for the embedded capacitors' functionality. After soldering, the capacitor slots were filled with insulating encapsulation material. Once cured, this material effectively secures and protects the surface mount capacitors from mechanical stress during subsequent lamination processes, while also isolating them from external environmental factors such as moisture and contaminants, significantly improving the long-term reliability of the components. Next, the prepreg and copper foil are stacked and pressed together, allowing the prepreg to flow and solidify, forming a dielectric layer covering the insulating encapsulation material and the surface-mount capacitor. This step completely encapsulates and integrates the fixed capacitor into the multilayer board structure, achieving true "embedded" integration. This structure effectively utilizes the Z-axis space within the board, significantly saving surface area and providing more layout space for surface-mounting other active and passive components, contributing to high-density integration and miniaturization of electronic products. Finally, a conductive structure is formed to connect with the surface-mount capacitor, completing the electrical interconnection between the embedded capacitor and the external circuitry, ensuring its proper function in the circuit, such as decoupling and filtering. The entire process, through innovative sequence and process combinations, successfully introduces mature surface-mount technology concepts into the in-board manufacturing stage. While ensuring excellent high-frequency performance and power integrity, it improves production consistency and yield, and offers a cost advantage due to the use of mass-produced standard surface-mount capacitors.

[0006] Preferably, the slotting is performed using a controlled-depth milling process.

[0007] Using controlled-depth milling for slotting allows for precise control of the slot depth. This precision ensures that the slot depth is just sufficient to expose the target pads without over-cutting and damaging the underlying substrate material or under-cutting and affecting pad accessibility. Precise depth control provides a flat and consistent working plane for subsequent processes such as soldering and surface mounting, ensuring uniform solder formation and coplanarity of the mounted capacitors. Good coplanarity ensures even stress distribution during capacitor soldering, reducing the risk of cold solder joints or component cracking due to stress concentration. Furthermore, controlled-depth milling, as a mature machining method, offers high processing efficiency and is easily integrated and applied in existing PCB production lines, contributing to overall process stability and production efficiency.

[0008] Preferably, the welding is performed using a reflow soldering process.

[0009] Reflow soldering enables high-quality, consistent electrical and mechanical connections between surface-mount capacitors and their pads. Through precisely controlled hot air or infrared heating, reflow solder uniformly melts and reflows, eliminating air bubbles and promoting a strong metallurgical bond. This method results in high-strength, low-resistance solder joints with excellent conductivity. Furthermore, the high degree of automation in reflow soldering allows for precise reproduction of the soldering temperature profile, ensuring uniformity and stability of solder joint quality for every embedded capacitor in mass production. This reduces failure rates due to poor soldering and improves overall product reliability.

[0010] Preferably, the insulating encapsulation material is a polymer adhesive.

[0011] Using polymer adhesives as the insulating encapsulation material effectively fills and cures within the slots accommodating surface-mount capacitors. Before curing, polymer adhesives typically possess good flowability and wettability, allowing them to fully encapsulate the capacitor body and solder joints, eliminating internal air and forming a dense protective layer. After curing, the polymer adhesive exhibits excellent electrical insulation properties, preventing short circuits between the capacitor and surrounding conductive layers. Simultaneously, it possesses sufficient mechanical strength and adhesive force to firmly fix the capacitor within the slot, buffering and absorbing some of the mechanical and thermal stresses transmitted to the capacitor from the outside, reducing damage caused by board bending or temperature changes, thereby enhancing the durability of the embedded capacitor structure in complex operating environments.

[0012] Preferably, the conductive structure is a micro-blind hole formed by laser ablation.

[0013] Using laser-ablated micro-blind vias as conductive structures enables high-precision, high-density electrical interconnects between embedded capacitors and external circuit layers. Laser processing offers extremely high positioning accuracy and aperture control, producing tiny, precisely positioned micro-blind vias, making them ideal for use as vertical interconnect channels in high-density interconnect designs. These micro-blind vias help reduce parasitic inductance and capacitance in the interconnect structure, which is crucial for maintaining signal integrity in high-speed circuits, especially high-frequency decoupling circuits. The laser ablation process is clean and efficient, minimizing the heat-affected zone of the surrounding dielectric material and preventing thermal damage to adjacent insulating encapsulation materials and capacitors during via formation, thus ensuring the quality and reliability of the interconnect structure.

[0014] Preferably, the chip capacitor is a multilayer ceramic capacitor.

[0015] The selection of multilayer ceramic capacitors as embedded components is based on their unique structural and performance advantages. Multilayer ceramic capacitors employ a structure of alternating layers of dielectric and internal electrodes. This design achieves a large electrode area within a compact volume, thus providing capacitance values ​​ranging from picofarads to microfarads to meet the capacitance requirements of various circuit designs. These capacitors are non-polarized components, allowing for unrestricted orientation during circuit design and mounting, simplifying the mounting process. More importantly, their multilayer structure and surface-mount packaging result in extremely low parasitic inductance parameters. This characteristic makes them ideal for high-frequency decoupling and noise filtering applications, helping to ensure power integrity and signal quality in the circuit system where the embedded capacitor is located.

[0016] A printed circuit board includes a secondary outer substrate, pads disposed on the secondary outer substrate, surface mount capacitors mounted on the pads, insulating encapsulation material filled in a groove, a dielectric layer laminated thereon, and a conductive structure penetrating the dielectric layer, wherein the surface mount capacitors are electrically connected to the pads via soldering.

[0017] This printed circuit board integrates embedded surface-mount capacitors using the aforementioned innovative method, resulting in multiple performance improvements. Because the capacitors are placed within the board, valuable surface space is significantly saved, allowing for the placement of more signal wiring or other surface-mount devices, greatly promoting the high-density integration and miniaturization of electronic products. The embedded structure provides the capacitors with comprehensive protection through insulating encapsulation materials and a multi-layer board structure, effectively mitigating the effects of external mechanical impacts, board bending stress, soldering thermal shock, and environmental factors such as moisture contamination. This significantly improves the reliability and lifespan of components and the entire circuit board in harsh application environments. Furthermore, the embedded capacitors are closer to the chip's power pins, shortening the charging and discharging circuit, allowing their low parasitic inductance characteristics to be better utilized, thus providing the system with excellent high-frequency decoupling capabilities and power integrity.

[0018] Preferably, the patch capacitor is a non-polarized capacitor.

[0019] Using non-polarized capacitors as embedded components simplifies the mounting process and circuit design within printed circuit boards. Since there is no distinction between positive and negative polarity, orientation identification and correction are unnecessary during placement, reducing the complexity of pick-and-place machine programming and the probability of errors, thus improving production efficiency and first-pass yield. During the circuit design phase, engineers have greater freedom in arranging the placement of capacitors within the board, unconstrained by polarity, making routing planning in high-density interconnect designs more flexible. This design convenience, combined with the advantages of automated production, facilitates the design and manufacturing of complex PCBs and reduces the risk of component damage or circuit failure due to reversed polarity.

[0020] Preferably, the surface-mount capacitor is suitable for implementing high-frequency decoupling or filtering functions.

[0021] The embedded surface-mount capacitors in this printed circuit board are particularly suitable for high-frequency decoupling or filtering. The embedded placement of the capacitors allows them to be positioned very close to the power supply pins of the load chip, significantly shortening the return path of high-frequency current. This shorter path directly leads to a reduction in interconnect loop inductance, which is crucial for effective high-frequency decoupling. When integrated circuits switch at high speeds, the embedded capacitors can quickly respond to their transient current demands, suppressing voltage fluctuations and noise in the power network and ensuring the stability of the chip's supply voltage. Simultaneously, their low parasitic inductance effectively filters out high-frequency noise on power and signal lines, improving signal purity and integrity, thereby ensuring the stable and efficient operation of the entire electronic system, especially high-speed computing systems such as AI servers.

[0022] Preferably, the parasitic inductance of the patch capacitor is lower than a preset threshold (e.g., calculated based on the operating frequency, such as lower than 100 pH).

[0023] Ensuring that the parasitic inductance of surface-mount capacitors is below a preset threshold is crucial for guaranteeing their performance in high-frequency circuits. Low parasitic inductance means that the capacitor exhibits lower impedance under high-speed switching currents, allowing it to respond more quickly and effectively to transient current demands, thus fully leveraging its decoupling and filtering functions. When parasitic inductance is controlled at a low level, the capacitor's resonant frequency is increased, enabling it to maintain good capacitance over a wider frequency range and effectively suppress high-frequency noise. This is essential for modern high-performance processors and communication chips operating in the gigahertz frequency range, directly affecting the stability of the system power distribution network and the quality of signal transmission, and is the intrinsic foundation for achieving excellent high-frequency performance and power integrity.

[0024] The advantages of this invention compared to the prior art are: The present invention provides a printed circuit board manufacturing method for embedding surface mount capacitors by creating local slots in the outermost layer of the circuit board substrate, thereby providing physical space for the embedding of standard surface mount capacitors. This design eliminates the need for specific functional thin film materials when integrating capacitors within the board, thus broadening the range of component choices and reducing material costs.

[0025] By employing a combination of solder placement and reflow soldering processes, a robust electrical interconnection between the surface mount capacitors and the on-board pads is achieved. This surface mount technology-based connection method facilitates the formation of consistent solder joints, which positively contributes to improving connection reliability.

[0026] After the capacitor is implanted, it is filled and cured with insulating material. This step helps to fix and protect the capacitor element, reducing the risk of damage from mechanical or thermal stress during subsequent lamination and use.

[0027] The entire process integrates the capacitor embedding step with conventional multilayer board lamination and via formation, demonstrating good compatibility with the standard printed circuit board manufacturing chain. This integration method provides conditions for saving board space, increasing wiring flexibility, and promoting product miniaturization.

[0028] In summary, this solution provides a path to embed capacitors using standard components through process innovation, demonstrating positive effects in cost control, production compatibility, and improving circuit board integration. Attached Figure Description

[0029] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the structure of a sub-outer layer substrate after slotting in one embodiment of the present invention.

[0031] Figure 2 This is a schematic diagram of the structure after solder is formed on the exposed pads in one embodiment of the present invention.

[0032] Figure 3 This is a schematic diagram of the structure after the surface mount capacitor is mounted and soldered to the pad in one embodiment of the present invention.

[0033] Figure 4 This is a schematic diagram of the structure after filling the groove with insulating encapsulation material in one embodiment of the present invention.

[0034] Figure 5 This is a schematic diagram of the complete structure after processing according to an embodiment of the present invention.

[0035] Labeling explanation: 101 tank, 102 solder, 103 chip capacitor, 104 insulating encapsulation material, 105 dielectric layer, 106 conductive structure. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0037] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0038] It should be noted that similar reference numerals and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. In the description of the embodiments of this application, it should be understood that the terms "upper," "lower," "left," "right," "vertical," "horizontal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the figures, or the orientation or positional relationship commonly used when the product of this application is in use, or the orientation or positional relationship commonly understood by those skilled in the art. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0039] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0040] The technical solutions in this application will now be described with reference to the accompanying drawings. Example 1

[0041] This embodiment provides a method for manufacturing a printed circuit board with embedded surface-mount capacitors, including the following steps: A secondary outer layer substrate is provided, on which pads are provided; Grooves are made on the outermost substrate to expose the pads; Solder is formed on the exposed pads, and surface mount capacitors are mounted and soldered onto the pads; The slot containing the surface mount capacitor is filled with insulating encapsulation material; At least one layer of prepreg and copper foil are stacked on a structure filled with insulating encapsulation material and then pressed together, causing the prepreg to flow and solidify, forming a dielectric layer covering the insulating encapsulation material and the chip capacitor; the dielectric layer is formed by pressing the prepreg together, and includes the area above the insulating encapsulation material. The pressing process causes the prepreg (PP) to melt and flow under heat and pressure, filling the remaining gaps and bonding with the previous insulating encapsulation material, and then solidifying to form a monolithic, flat dielectric layer; this dielectric layer forms the basis for the subsequent formation of interconnect structures; A conductive structure is formed that penetrates the dielectric layer to electrically connect the chip capacitor.

[0042] A complete process flow was employed to achieve highly reliable embedding of surface mount capacitors within printed circuit boards (PCBs). First, slots were cut into the outermost layer of the substrate to expose pads, providing precise positioning space for the surface mount capacitors and ensuring accurate alignment in subsequent processes. Then, solder was applied to the pads to complete the mounting and soldering of the surface mount capacitors. This created a robust electrical and mechanical connection within the board, laying the foundation for the embedded capacitors' functionality. After soldering, the focus shifted to component protection and structural integration. Insulating encapsulation material was filled into the soldered capacitor slots. Once cured, this material effectively secures and protects the surface mount capacitors from mechanical stress during subsequent lamination processes, while also isolating them from external environmental factors such as moisture and contaminants, significantly improving the long-term reliability of the components. Next, the prepreg and copper foil are laminated together, allowing the prepreg to flow and solidify, forming a dielectric layer covering the insulating encapsulation material and the surface-mount capacitor. This step completely encapsulates and integrates the fixed capacitor into the multilayer board structure, achieving true "embedded" integration. This structure effectively utilizes the Z-axis space within the board, significantly saving surface area and providing more layout space for surface-mounting other active and passive components, contributing to high-density integration and miniaturization of electronic products. Finally, to enable signal communication between the embedded capacitor and external circuitry, a conductive structure is formed that connects with the surface-mount capacitor, completing the electrical interconnection between the embedded capacitor and the external circuitry and ensuring its normal function in the circuit, such as decoupling and filtering. Throughout the entire process, through innovative sequence and process combinations, the mature surface-mount technology concept is successfully introduced into the in-board manufacturing stage. While ensuring excellent high-frequency performance and power integrity, it improves production consistency and yield, and achieves a cost advantage due to the use of mass-produced standard surface-mount capacitors.

[0043] In this embodiment, the slotting is achieved using a controlled-depth milling process.

[0044] Using controlled-depth milling for slotting allows for precise control of the slot depth. This precision ensures that the slot depth is just sufficient to expose the target pads without over-cutting and damaging the underlying substrate material or under-cutting and affecting pad accessibility. Precise depth control provides a flat and consistent working plane for subsequent processes such as soldering and surface mounting, ensuring uniform solder formation and coplanarity of the mounted capacitors. Good coplanarity ensures even stress distribution during capacitor soldering, reducing the risk of cold solder joints or component cracking due to stress concentration. Furthermore, controlled-depth milling, as a mature machining method, offers high processing efficiency and is easily integrated and applied in existing PCB production lines, contributing to overall process stability and production efficiency. Therefore, this choice lays a solid foundation for the precise execution of the entire embedded process.

[0045] The depth of the slot is configured to accommodate the surface mount capacitors and their solder, and the slot depth does not exceed 50% of the thickness of the outermost substrate.

[0046] In this embodiment, the welding process is reflow soldering.

[0047] Reflow soldering enables high-quality, consistent electrical and mechanical connections between surface-mount capacitors and their pads. Through precisely controlled hot air or infrared heating, reflow solder uniformly melts and reflows, eliminating air bubbles and promoting a strong metallurgical bond. This method results in solder joints with high strength, low resistance, and excellent conductivity. Furthermore, the high degree of automation in reflow soldering allows for precise reproduction of the soldering temperature profile, ensuring uniformity and stability of solder joint quality for every embedded capacitor in mass production. This reduces failure rates due to poor soldering and improves overall product reliability. In short, reflow soldering is a core technology ensuring the reliability of embedded capacitor connections.

[0048] In this embodiment, the insulating encapsulation material is a polymer adhesive.

[0049] Using polymer adhesives as the insulating encapsulation material effectively fills and cures within the slots accommodating surface-mount capacitors. Before curing, polymer adhesives typically possess good flowability and wettability, allowing them to fully encapsulate the capacitor body and solder joints, eliminating internal air and forming a dense protective layer. After curing, the polymer adhesive exhibits excellent electrical insulation properties, preventing short circuits between the capacitor and surrounding conductive layers. Simultaneously, it possesses sufficient mechanical strength and adhesive force to firmly fix the capacitor within the slot, buffering and absorbing some of the mechanical and thermal stresses transmitted to the capacitor from the outside, reducing damage caused by board bending or temperature changes, thereby enhancing the durability of the embedded capacitor structure in complex operating environments. In conclusion, the filling with polymer adhesives is a key protective measure for achieving long-term stable operation of capacitors.

[0050] In this embodiment, the conductive structure is a micro-blind hole formed by laser ablation.

[0051] Using laser-ablated micro-blind vias as conductive structures enables high-precision, high-density electrical interconnects between embedded capacitors and external circuit layers. Laser processing offers extremely high positioning accuracy and aperture control, producing tiny, precisely positioned micro-blind vias, making them ideal for use as vertical interconnect channels in high-density interconnect designs. These micro-blind vias help reduce parasitic inductance and capacitance in the interconnect structure, which is crucial for maintaining signal integrity in high-speed circuits, especially high-frequency decoupling circuits. The laser ablation process is clean and efficient, minimizing the heat-affected zone of the surrounding dielectric material and preventing thermal damage to adjacent insulating encapsulation materials and capacitors during via formation, thus ensuring the quality and reliability of the interconnect structure. Therefore, laser-ablated micro-blind vias are an ideal choice for achieving high-density, high-performance interconnects.

[0052] In this embodiment, the chip capacitor is a multilayer ceramic capacitor.

[0053] The selection of multilayer ceramic capacitors as embedded components is based on their unique structural and performance advantages. Multilayer ceramic capacitors employ a structure of alternating layers of dielectric and internal electrodes. This design achieves a large electrode area within a compact volume, thus providing capacitance values ​​ranging from picofarads to microfarads to meet the capacitance requirements of various circuit designs. These capacitors are non-polarized components, allowing for unrestricted orientation during circuit design and mounting, simplifying the mounting process. More importantly, their multilayer structure and surface-mount packaging result in extremely low parasitic inductance parameters. This characteristic makes them ideal for high-frequency decoupling and noise filtering applications, helping to ensure power integrity and signal quality in the circuit system where the embedded capacitor is located. Therefore, the characteristics of multilayer ceramic capacitors perfectly align with the objectives of this method. Example 2

[0054] A printed circuit board includes a secondary outer substrate, pads disposed on the secondary outer substrate, surface mount capacitors mounted on the pads, insulating encapsulation material filled in a groove, a dielectric layer laminated thereon, and a conductive structure penetrating the dielectric layer, wherein the surface mount capacitors are manufactured by the above method and electrically connected to the pads.

[0055] Following the detailed explanation of the innovative manufacturing method described above, this embodiment will focus on the product entity directly corresponding to this method—a printed circuit board (PCB) with integrated surface-mount capacitors. This PCB does not use traditional surface-mount or through-hole methods to mount capacitors. Instead, through a series of precise and highly compatible processes, standardized surface-mount capacitors are successfully embedded within its multi-layered structure. This unique integration method ensures that the final product not only inherits all the advantages of the manufacturing method in terms of improved integration, enhanced reliability, and optimized high-frequency performance, but also solidifies these advantages into the stable and inherent product characteristics of the PCB.

[0056] This printed circuit board integrates embedded surface-mount capacitors using an innovative method, resulting in numerous performance improvements. Because the capacitors are placed inside the board, valuable surface space is saved, allowing for the placement of more signal wiring or other surface-mount devices, significantly promoting high-density integration and miniaturization in electronic products. The embedded structure provides the capacitors with comprehensive protection through insulating encapsulation materials and a multi-layer board structure, effectively mitigating the effects of external mechanical impacts, board bending stress, soldering thermal shock, and environmental factors such as moisture contamination. This significantly improves the reliability and lifespan of components and the entire circuit board in harsh application environments. Furthermore, the embedded capacitors are closer to the chip's power pins, shortening the charging and discharging circuit, allowing their low parasitic inductance to be better utilized, thus providing excellent high-frequency decoupling and power integrity for the system.

[0057] In this embodiment, the surface-mount capacitor is a non-polarized capacitor.

[0058] Using non-polarized capacitors as embedded components simplifies the mounting process and circuit design within printed circuit boards. Since there is no distinction between positive and negative polarity, orientation identification and correction are unnecessary during placement, reducing the complexity of pick-and-place machine programming and the probability of errors, thus improving production efficiency and first-pass yield. During the circuit design phase, engineers have greater freedom in arranging the capacitor placement within the board, unconstrained by polarity, making routing planning in high-density interconnect designs more flexible. This design convenience, combined with the advantages of automated production, facilitates the design and manufacturing of complex PCBs and reduces the risk of component damage or circuit failure due to reversed polarity. This characteristic further enhances the ease of use and versatility of this manufacturing method.

[0059] In this embodiment, the surface-mount capacitor is suitable for implementing high-frequency decoupling or filtering functions.

[0060] The embedded surface-mount capacitors in this printed circuit board are particularly suitable for high-frequency decoupling or filtering. The embedded placement of the capacitors allows them to be positioned very close to the power supply pins of the load chip, significantly shortening the return path of high-frequency current. This shorter path directly leads to a reduction in interconnect loop inductance, which is crucial for effective high-frequency decoupling. When the integrated circuit switches at high speed, the embedded capacitors can quickly respond to its transient current demands, suppressing voltage fluctuations and noise in the power network and ensuring the stability of the chip's power supply voltage. Simultaneously, their low parasitic inductance effectively filters out high-frequency noise on power and signal lines, improving signal purity and integrity, thereby ensuring the stable and efficient operation of the entire electronic system, especially high-speed computing systems such as AI servers. This is precisely the core technical problem that this solution aims to solve and the value it represents.

[0061] In this embodiment, the parasitic inductance of the surface-mount capacitor is lower than a preset threshold (e.g., calculated based on the operating frequency, such as lower than 100 pH).

[0062] Ensuring that the parasitic inductance of surface-mount capacitors is below a preset threshold is crucial for guaranteeing their performance in high-frequency circuits. Low parasitic inductance means that the capacitor exhibits lower impedance under high-speed switching current, allowing it to respond more quickly and effectively to transient current demands, thus fully leveraging its decoupling and filtering functions. When parasitic inductance is controlled at a low level, the capacitor's resonant frequency is increased, enabling it to maintain good capacitance over a wider frequency range and effectively suppress high-frequency noise. This is critical for modern high-performance processors and communication chips operating in the gigahertz frequency range, directly affecting the stability of the system power distribution network and the quality of signal transmission, and is the intrinsic foundation for achieving excellent high-frequency performance and power integrity. This requirement is the quantitative basis and core principle for achieving the high-performance goals of this solution.

[0063] In summary, this embodiment not only elaborates on an innovative method for manufacturing embedded capacitors, but also systematically demonstrates the significant advantages of this solution in improving integration, ensuring signal integrity, and enhancing product reliability through in-depth analysis of key process steps and component characteristics. It provides a clear and feasible technical path for the PCB design and manufacturing of high-end electronic devices. Example 3

[0064] This embodiment provides a specific manufacturing solution for a printed circuit board with embedded surface-mount capacitors. This solution is particularly suitable for high-end computing products with stringent requirements for high-frequency performance and power integrity, such as AI servers.

[0065] I. Selection and Advantages of Core Components This solution preferentially uses multilayer ceramic chip capacitors (MLCCs) as embedded components, primarily based on their superior characteristics: Structural advantages: The non-polar design simplifies the mounting process; the multilayer stacked structure enables a wide range of capacitance values ​​(from pF to hundreds of μF) in a small volume, and has extremely low parasitic inductance.

[0066] Performance advantages: Its low parasitic inductance makes it an ideal choice for high-frequency decoupling and noise filtering, effectively ensuring power quality and signal integrity.

[0067] Cost advantage: As a standardized and mature component, MLCC has significant cost competitiveness through large-scale production, making it more economical than special thin film materials.

[0068] After identifying the core components, we designed a manufacturing process that is highly compatible with them to achieve high performance and high reliability.

[0069] II. Detailed Process Flow This solution innovatively integrates surface mount technology (SMT) into the multilayer board manufacturing process to achieve reliable capacitor embedding. The core process flow is as follows: 1. Preliminary preparation and trenching First, the fabrication of the outermost substrate is completed, on which pads for connecting the chip capacitor 103 are formed.

[0070] Subsequently, a controlled-depth milling process is used to precisely groove the area where the capacitor is to be embedded, in order to expose the underlying pads, such as... Figure 1 As shown. This step is fundamental to all subsequent delicate operations. It not only provides precise mounting space for the capacitors but also ensures the accessibility of the solder pads, creating the prerequisite for forming a good electrical connection.

[0071] Controlling the groove depth is particularly critical. It is usually set to be 15-30μm larger than the height of the chip capacitor body to ensure that after the capacitor is placed, its top surface is slightly lower than or flush with the surface of the outermost substrate, leaving space for filling glue and ensuring flatness after pressing.

[0072] 2. Capacitor mounting and soldering Solder is applied to the exposed pads to form solder 102, as shown. Figure 2 As shown.

[0073] Use a high-precision pick-and-place machine to mount the chip capacitor 103 onto the solder pads after soldering. Figure 3 As shown.

[0074] The capacitor is firmly soldered to the pads using a reflow soldering process, forming a reliable electrical and mechanical connection.

[0075] The reflow soldering process uses a temperature profile suitable for lead-free solder, with the peak temperature controlled at 240-250℃ and the time above the liquidus maintained for 50-70 seconds to ensure that the solder melts fully and forms a good metallurgical bond, while avoiding thermal shock damage to the ceramic dielectric of the chip capacitor due to overheating.

[0076] At this point, the capacitor has been successfully integrated into its designated location on the board, and a preliminary electrical connection has been established. The next crucial step is to secure and protect this delicate structure.

[0077] 3. Protective encapsulation and lamination integration In the tank 101 containing the soldered capacitors, an insulating encapsulation material 104 (such as polymer adhesive) is filled using a dispensing device to fill the gaps in the tank, such as... Figure 4 As shown. This step is crucial: once the material has cured, it not only effectively fixes and protects the capacitor, resisting the stress of subsequent pressing, but also provides a reliable insulation barrier, eliminating the risk of short circuits. The insulating encapsulation material (104) is preferably of a type with good adhesive compatibility with the prepreg (PP), for example, both being epoxy resin systems, to ensure a strong interfacial bond during pressing and avoid delamination.

[0078] The preferred insulating encapsulation material is an epoxy resin-based underfill with a coefficient of thermal expansion (CTE) that matches the PCB substrate material, typically with a cured CTE of less than 50 ppm / °C. After filling, thermosetting is required, for example, at 125°C for 30 minutes, to ensure complete curing and achieve the desired mechanical strength and insulation properties.

[0079] Subsequently, on the outermost substrate where the capacitor embedding and encapsulation have been completed, prepreg and copper foil are sequentially stacked and then laminated. This step is crucial for achieving the "embedded" structure, as it completely encapsulates and embeds the capacitor within the board, making it an integral part of the multilayer board structure, thereby maximizing the saving of surface space.

[0080] 4. Interconnection and subsequent processing After lamination, a micro-blind via is formed using laser ablation. This conductive structure 106 penetrates the dielectric layer 105 and enables electrical conduction between the embedded capacitor and the external circuit layer. Figure 5 As shown. This is the final step in connecting the embedded capacitor to the entire circuit system; high-precision laser technology ensures the accuracy and efficiency of the interconnection.

[0081] Finally, the standard printed circuit board (PCB) processes, including outer layer fabrication, solder masking, molding, electrical testing, and surface treatment (such as OSP), are completed. At this point, a multilayer PCB with embedded high-performance decoupling capacitors is finished.

[0082] III. Key Points for Process Control To ensure the smooth execution of the above process and the superior quality of the final product, precise control is required in the following aspects: Design Phase: To ensure flatness and reliability after lamination, it is recommended that the total height of the selected surface mount capacitors 103 should not exceed 30% of the total thickness of the finished board. This quantitative specification is the basis for ensuring structural compatibility and process feasibility.

[0083] During the manufacturing stage: the depth accuracy of controlled milling, the alignment accuracy of solder placement and chip mounting, the temperature profile of reflow soldering, and the fullness of adhesive filling are all key process control points affecting the final product quality. Strict control over these core parameters is the fundamental guarantee for achieving high yield and consistency.

[0084] Summarize: In summary, the solution described in this embodiment achieves three significant benefits by successfully embedding standard surface-mount capacitors 103 in the printed circuit boards of high-end products such as AI servers: Space saving: It greatly frees up board space, supports higher density component layout and wiring, and provides a physical basis for the expansion and upgrading of product functions.

[0085] Performance improvement: Thanks to the low parasitic inductance of the embedded capacitors and their close proximity to the chip, the system achieves excellent high-frequency decoupling capability and power integrity, directly improving the system's operational stability and signal quality.

[0086] Enhanced reliability: The capacitor structure embedded in the board is fully protected by insulating materials and multilayer boards, which significantly improves its resistance to mechanical stress, thermal stress and environmental interference, greatly extending the product's service life in harsh environments.

[0087] To verify the high-frequency performance of the printed circuit board fabricated in this embodiment, we tested it against a control board using conventional surface-mount MLCCs with the same capacitance values. The power-to-ground impedance curves were measured using a vector network analyzer (VNA). The test results show that, within the frequency range of 100MHz to 1GHz, the impedance of the embedded capacitor structure in this embodiment is significantly lower than that of the control board. Particularly at 500MHz, the impedance of the embedded capacitor structure is reduced by approximately 60% compared to the conventional surface-mount structure. This demonstrates that the embedded structure significantly shortens the interconnect path, effectively reducing parasitic inductance, thereby providing lower power impedance over a wider frequency band and superior high-frequency decoupling.

[0088] Furthermore, in system-level testing, the AI ​​server motherboard equipped with a printed circuit board with embedded capacitors showed a voltage ripple on its core power rail that was reduced by approximately 35% compared to motherboards using a traditional design when running high-load computing tasks, further demonstrating its significant benefits in improving power integrity.

[0089] Ultimately, this solution provides a technologically advanced and cost-effective path for the miniaturization, high performance, and high reliability design of electronic products.

[0090] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for manufacturing a printed circuit board with embedded surface-mount capacitors, characterized in that, Includes the following steps: A secondary outer layer substrate is provided, wherein pads are provided on the secondary outer layer substrate; A slot is made on the outermost substrate to form a slot for accommodating the surface mount capacitor, thereby exposing the pads; Solder is formed on the exposed pads, and surface mount capacitors are mounted and soldered onto the pads; The slot containing the chip capacitor is filled with insulating encapsulation material; At least one layer of prepreg and copper foil are stacked on the structure filled with the insulating encapsulation material and pressed together, so that the prepreg flows and solidifies to form a dielectric layer covering the insulating encapsulation material and the chip capacitor. A conductive structure is formed that penetrates the dielectric layer, and this conductive structure is electrically connected to the electrodes of the patch capacitor.

2. The method according to claim 1, characterized in that, The slotting is achieved using a controlled depth milling process.

3. The method according to claim 1, characterized in that, The welding process employs reflow soldering.

4. The method according to claim 1, characterized in that, The insulating encapsulation material is a polymer adhesive.

5. The method according to claim 1, characterized in that, The conductive structure is a micro-blind hole formed by laser ablation.

6. The method according to claim 1, characterized in that, The chip capacitor is a multilayer ceramic capacitor.

7. A printed circuit board, characterized in that, It includes a secondary outer layer substrate, pads disposed on the secondary outer layer substrate, surface mount capacitors mounted on the pads, insulating encapsulation material filled in a groove, a dielectric layer laminated thereon, and a conductive structure penetrating the dielectric layer, wherein the surface mount capacitors are electrically connected to the pads by soldering.

8. The printed circuit board according to claim 7, characterized in that, The surface-mount capacitor is a non-polarized capacitor.

9. The printed circuit board according to claim 7, characterized in that, The surface-mount capacitor is suitable for implementing high-frequency decoupling or filtering functions.

10. The printed circuit board according to claim 7, characterized in that, The parasitic inductance of the patch capacitor is lower than a preset threshold.

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