Photodiode and preparation method thereof

By using a combination of blocking film and antireflective film in the photodiode fabrication process, the problem of uneven electric field caused by uneven junction plane is solved, thereby improving the photodiode's anti-electrostatic discharge performance and response speed.

CN121751789APending Publication Date: 2026-03-27WUHAN MINDSEMI CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-11
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

In the traditional photodiode fabrication process, the junction plane formed after diffusion is not flat, resulting in uneven electric field distribution and low electrostatic discharge resistance.

Method used

A barrier film is deposited on the ohmic contact layer of the chip substrate, and a diffusion window is opened on the barrier film for Zn diffusion to form a uniform diffusion region. The flatness of the junction plane is controlled by forming an ohmic contact ring in the ohmic contact layer, and an anti-reflection film is deposited on the diffusion window layer to reduce light reflection.

Benefits of technology

This achieves a uniform electric field distribution inside the photodiode, improves its anti-electrostatic discharge performance, reduces the contact resistance of the ohmic contact layer, and improves the response speed while reducing power consumption.

✦ Generated by Eureka AI based on patent content.

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Abstract

The preparation method comprises the steps that a barrier film is deposited on an ohmic contact layer of a chip base body, the chip base body comprises a substrate, an N-type contact layer, an intrinsic absorption layer, a diffusion window layer and an ohmic contact layer, and the N-type contact layer, the intrinsic absorption layer, the diffusion window layer and the ohmic contact layer are sequentially stacked on the substrate; a diffusion window is formed in the barrier film, and a part of the ohmic contact layer corresponding to the diffusion window is exposed; performing Zn diffusion on a diffusion region corresponding to the diffusion window, wherein the diffusion region comprises a part of ohmic contact layer, a part of diffusion window layer and a part of intrinsic absorption layer; removing the barrier film to expose the ohmic contact layer; and carrying out partial corrosion treatment on the ohmic contact layer to form an ohmic contact ring which is located in the diffusion region.
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Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a photodiode and its fabrication method. Background Technology

[0002] In the field of photodiode fabrication, the core lies in the "diffusion process," which involves introducing specific impurities (dopants) into predetermined regions of semiconductor materials (such as silicon) under high-temperature conditions to alter their electrical properties and form P-type and N-type regions.

[0003] However, in the traditional fabrication process, the "junction plane" (i.e. the interface between the P-type region and the N-type region) formed after diffusion is often not flat. This uneven interface leads to a concentrated electric field distribution in the depletion region, generating high electric field peaks at certain points, which results in low overall electrostatic discharge resistance of the device. Summary of the Invention

[0004] In view of this, this application aims to provide a photodiode and its fabrication method, which solves the problems of uneven junction plane, uneven electric field distribution, and low overall electrostatic discharge resistance of the photodiode formed after diffusion in traditional processes.

[0005] In a first aspect, this application provides a method for fabricating a photodiode, comprising: A barrier film is deposited on the ohmic contact layer of a chip substrate. The chip substrate includes a substrate and an N-type contact layer, an intrinsic absorption layer, a diffusion window layer and an ohmic contact layer stacked sequentially on the substrate. A diffusion window is opened on the barrier film, exposing part of the ohmic contact layer corresponding to the diffusion window; Zn diffusion is performed on the diffusion region corresponding to the diffusion window. The diffusion region includes a partial ohmic contact layer, a partial diffusion window layer, and a partial intrinsic absorption layer. Remove the barrier film to expose the ohmic contact layer; The ohmic contact layer is partially etched to form an ohmic contact ring, which is located within the diffusion region.

[0006] In one possible implementation, the preparation method further includes: An antireflective film is deposited on the side of the ohmic contact ring and diffusion window layer facing away from the substrate; Remove part of the anti-reflective coating to expose the ohmic contact ring; A P electrode is placed on the ohmic contact ring.

[0007] In one possible implementation, the step of depositing an antireflective film on the side of the ohmic contact ring and diffusion window layer facing away from the substrate specifically includes: A dielectric film is deposited on the side of the ohmic contact ring and diffusion window layer facing away from the substrate; A P-window is opened on the dielectric film, and the ohmic contact ring is located inside the P-window and exposed. An antireflective film is deposited on the side of the ohmic contact ring, diffusion window layer, and dielectric film facing away from the substrate.

[0008] In one possible implementation, the width of the P window is smaller than the width of the diffusion window.

[0009] In one possible implementation, the barrier film includes a silicon nitride film and / or a silicon oxide film; The step of depositing a barrier film on the ohmic contact layer of the chip substrate specifically includes: Deposit a silicon nitride film on the ohmic contact layer of the chip substrate; A silicon oxide film is deposited on the side of the silicon nitride film facing away from the substrate.

[0010] Secondly, this application provides a photodiode, which is prepared using the fabrication method provided in any of the foregoing embodiments.

[0011] In one possible implementation, the photodiode includes a substrate; An N-type contact layer is stacked on one side of the substrate; An intrinsic absorption layer is stacked on the side of the N-type contact layer away from the substrate; A diffusion window layer is stacked on the side of the intrinsic absorption layer away from the substrate; An ohmic contact ring is placed on the diffusion window layer; An anti-reflective film is disposed on the diffusion window layer to avoid the ohmic contact ring being directly and / or indirectly disposed thereon. The P electrode is connected to the ohmic contact ring.

[0012] In one possible implementation, a dielectric film is provided between part of the antireflective film and the diffusion window layer.

[0013] In one possible implementation, the dielectric film comprises a silicon oxide film; or, the dielectric film comprises a stacked silicon nitride film and a silicon oxide film, wherein the silicon nitride film is disposed relative to the silicon oxide film close to the diffusion window layer.

[0014] In one possible implementation, the antireflective film comprises a silicon nitride film.

[0015] Compared with the prior art, the beneficial effects of this application are: The photodiode fabrication method provided in this application involves first depositing a barrier film on the ohmic contact layer of a chip substrate, then creating a diffusion window on the barrier film, followed by Zn diffusion to form a diffusion region corresponding to the diffusion window on the chip substrate. During Zn diffusion, the diffusion proceeds sequentially from the diffusion window towards the ohmic contact layer and the diffusion window layer, until a junction plane is formed at the intrinsic absorption layer. This results in relatively uniform diffusion in all directions, leading to a flatter junction plane at the intrinsic absorption layer. This allows for effective control of the PN junction depth, and the flat PN interface makes the depletion region width more uniform, avoiding excessively high or low local concentrations. Consequently, the internal electric field distribution of the photodiode becomes more uniform, preventing electric field concentration and significantly improving its electrostatic discharge resistance. Furthermore, the ohmic contact layer involved in Zn diffusion is used to fabricate an ohmic contact ring, enabling the ohmic contact layer to achieve a very low specific contact resistance, thereby achieving lower power consumption and faster response speed.

[0016] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A flowchart illustrating a method for fabricating a photodiode according to one embodiment of this application; Figure 2 A flowchart illustrating a method for fabricating a photodiode according to an embodiment of this application; Figure 3 A structural diagram of the chip substrate in a photodiode provided in one embodiment of this application; Figure 4 One of the schematic diagrams of a photodiode in the fabrication process provided in an embodiment of this application; Figure 5 A second schematic diagram of a photodiode in the fabrication process, provided as an embodiment of this application; Figure 6 A third schematic diagram of a photodiode in the fabrication process, provided as an embodiment of this application; Figure 7 A fourth schematic diagram of a photodiode in the fabrication process, provided as an embodiment of this application; Figure 8 Fifth schematic diagram of a photodiode in the fabrication process, provided as an embodiment of this application; Figure 9 A schematic diagram of a photodiode in the fabrication process provided in one embodiment of this application is shown in Figure 6. Figure 10 A schematic diagram (number seven) of a photodiode in the fabrication process provided in one embodiment of this application; Figure 11 Eighth schematic diagram of a photodiode in the fabrication process according to an embodiment of this application; Figure 12 A schematic diagram of a photodiode in the fabrication process provided in one embodiment of this application is shown in Figure 9. Figure 13 This is a schematic diagram of the structure of a photodiode provided in one embodiment of this application.

[0019] Explanation of reference numerals in the attached figures: 301 Substrate, 302 N-type contact layer, 303 Intrinsic absorption layer, 304 Diffusion window layer 305a ohmic contact layer, 305b ohmic contact ring, 306 junction plane. 307 barrier film, 308 diffusion window 309 dielectric film, 310 P window, 311 anti-reflective film, 312 P electrode. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0022] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0023] Furthermore, the terms "installation," "setup," "equipped with," "connection," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0024] Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, components, or parts (which may be the same or different in specific type and construction), and are not intended to indicate or imply the relative importance or quantity of the indicated devices, components, or parts. Unless otherwise stated, "a plurality of" means two or more.

[0025] Firstly, this application provides a method for fabricating a photodiode, such as... Figure 1 As shown, it includes: S101, deposit a barrier film on the ohmic contact layer of the chip substrate; S102, a diffusion window is opened on the barrier film, exposing part of the ohmic contact layer corresponding to the diffusion window; S103, Zn diffusion is performed on the diffusion region corresponding to the diffusion window; S104, Remove the barrier film to expose the ohmic contact layer; S105 involves partially etching the ohmic contact layer to form an ohmic contact ring.

[0026] The chip substrate includes a substrate 301, an N-type contact layer 302, an intrinsic absorption layer 303, a diffusion window layer 304, and an ohmic contact layer 305a, stacked sequentially. The substrate 301 provides support and includes InP sublayers. The substrate 301 is an epitaxially oriented wafer. The N-type contact layer 302 includes N+-InP. The intrinsic absorption layer 303 includes I-InGaAs. The diffusion window layer 304 includes U-InP, and the ohmic contact layer 305a includes U-InGaAs.

[0027] The method for fabricating a photodiode provided in this application involves first depositing a barrier film 307 on an ohmic contact layer 305a of a chip substrate, then opening a diffusion window 308 on the barrier film 307, and finally performing Zn diffusion to form a diffusion region on the chip substrate corresponding to the diffusion window 308. During the Zn diffusion process, the diffusion proceeds sequentially from the diffusion window 308 towards the ohmic contact layer 305a and the diffusion window layer 304, until a junction plane 306 is formed at the intrinsic absorption layer 303. Specifically, the diffusion region includes a portion of the ohmic contact layer 305a, a portion of the diffusion window layer 304, and a portion of the intrinsic absorption layer 303.

[0028] The chip substrate includes a substrate 301 and an N-type contact layer 302, an intrinsic absorption layer 303, a diffusion window layer 304 and an ohmic contact layer 305a stacked sequentially on the substrate 301.

[0029] The barrier film 307 is used to protect other areas of the chip substrate surface during the setting of the diffusion window 308. Furthermore, the diffusion window 308 can be opened on the barrier film 307 using a dry / wet etching process. The barrier film 307 includes a SiO2 monolayer film, a SiNx monolayer film, or a SiNx / SiO2 composite bilayer film.

[0030] On the one hand, because the diffusion is relatively uniform in all directions during the diffusion process, the junction plane 306 formed at the intrinsic absorption layer 303 is relatively flat, allowing for effective control of the PN junction depth. The flat PN interface makes the width of the depletion region more uniform, avoiding the problem of excessively high or low local concentrations. This also makes the internal electric field distribution of the photodiode more uniform, avoiding electric field concentration and significantly improving its electrostatic discharge resistance. On the other hand, the ohmic contact layer 305a participating in Zn diffusion is used to prepare the ohmic contact ring 305b, enabling the ohmic contact layer 305a to obtain a very low specific contact resistance, thereby achieving lower power consumption and faster response speed.

[0031] In one possible implementation, the fabrication method further includes: depositing an antireflective film 311 on the side of the ohmic contact ring 305b and the diffusion window layer 304 facing away from the substrate 301; Part of the anti-reflective film 311 is removed to expose the ohmic contact ring 305b; A P electrode 312 is disposed on the ohmic contact ring 305b.

[0032] The anti-reflective film 311 is used to fully absorb light of a specific wavelength to minimize light reflection. Depositing the anti-reflective film 311 on the outer side of the ohmic contact ring 305b is a simple process that can be used for devices with less demanding requirements, effectively saving production costs.

[0033] In one possible implementation, the step of depositing an antireflective film 311 on the side of the ohmic contact ring 305b and the diffusion window layer 304 facing away from the substrate 301 specifically includes: On the side of the ohmic contact ring 305b and the diffusion window layer 304 facing away from the substrate 301, a dielectric film 309 is deposited. A P-window 310 is formed on the dielectric film 309, and the ohmic contact ring 305b is located inside the P-window 310 and exposed. An antireflective film 311 is deposited on the side of the ohmic contact ring 305b, the diffusion window layer 304, and the dielectric film 309 facing away from the substrate 301.

[0034] The combination of dielectric film 309 and anti-reflective film 311 allows the thick dielectric film 309 to increase the toughness of gold wire bonding, prevent the film from being damaged during the soldering process, and also reduce the capacitance of the PAD, thereby improving chip performance.

[0035] In one possible implementation, the width of the P-window 310 is smaller than the width of the diffusion window 308, thereby ensuring that the P-window 310 corresponds to the diffusion region, which can guarantee that no leakage current is generated on the surface and that the dark current performance is guaranteed.

[0036] The diffusion window 308 has a width of 100 micrometers. The P window 310 has a width of 90 micrometers.

[0037] In one possible implementation, the barrier film 307 comprises a silicon nitride film and / or a silicon oxide film; The step of depositing a barrier film 307 on the ohmic contact layer 305a of the chip substrate specifically includes: A silicon nitride film is deposited on the ohmic contact layer 305a of the chip substrate; A silicon oxide film is deposited on the side of the silicon nitride film facing away from the substrate 301.

[0038] The barrier film 307 comprises a SiNx / SiO2 composite bilayer film. During the deposition of the bilayer film, a silicon oxynitride film is first deposited on the ohmic contact layer 305a, and then a silicon oxide film is deposited. This allows the overall density of the barrier film 307 to be better, thereby improving its barrier performance.

[0039] In one specific embodiment, this application provides a method for fabricating a photodiode, such as... Figure 2 As shown, it includes: S201, deposit a barrier film on the ohmic contact layer of the chip substrate; S202, a diffusion window is opened on the barrier film, exposing part of the ohmic contact layer corresponding to the diffusion window; S203, Zn diffusion is performed on the diffusion region corresponding to the diffusion window; S204, Remove the barrier film to expose the ohmic contact layer; S205, partially etches the ohmic contact layer to form an ohmic contact ring; S206, a dielectric film is deposited on the side of the ohmic contact ring and diffusion window layer facing away from the substrate; S207, a P-window is opened on the dielectric film, and the ohmic contact ring is located inside the P-window and exposed. S208, an anti-reflective film is deposited on the side of the ohmic contact ring, diffusion window layer, and dielectric film facing away from the substrate; S209, partially remove the anti-reflective film to expose the ohmic contact ring; S210, with a P electrode placed on the ohmic contact ring.

[0040] Specifically, in combination Figures 3 to 13 The fabrication process of a photodiode is explained in detail: like Figure 3 and Figure 4 As shown, a barrier film 307 is deposited on the ohmic contact layer 305a of the chip substrate.

[0041] like Figure 5 As shown, a diffusion window 308 is opened on the barrier film 307, so that a portion of the ohmic contact layer 305a corresponding to the diffusion window 308 is exposed.

[0042] like Figure 6 As shown, Zn diffusion is performed on the diffusion region corresponding to diffusion window 308. Starting from diffusion window 308, the diffusion proceeds sequentially toward ohmic contact layer 305a and diffusion window layer 304 until a junction plane 306 is formed at intrinsic absorption layer 303.

[0043] like Figure 7 As shown, the barrier film 307 is removed to expose the ohmic contact layer 305a.

[0044] like Figure 8 As shown, the ohmic contact layer 305a is partially etched to form an ohmic contact ring 305b, which corresponds to the diffusion region, the diffusion window 308, and the junction plane 306.

[0045] like Figure 9 As shown, a dielectric film 309 is deposited on the side of the ohmic contact ring 305b and the diffusion window layer 304 facing away from the substrate 301.

[0046] like Figure 10 As shown, a P-window 310 is formed on the dielectric film 309, and the ohmic contact ring 305b is located inside the P-window 310 and exposed.

[0047] like Figure 11As shown, an antireflective film 311 is deposited on the side of the ohmic contact ring 305b, the diffusion window layer 304, and the dielectric film 309 facing away from the substrate 301.

[0048] like Figure 12 As shown, part of the anti-reflective film 311 is removed to expose the ohmic contact ring 305b.

[0049] like Figure 13 As shown, a P electrode 312 is disposed on the ohmic contact ring 305b.

[0050] Secondly, this application provides a photodiode that is prepared by the preparation method provided in any of the foregoing embodiments, and thus possesses all the beneficial effects of the foregoing preparation methods, which will not be repeated here.

[0051] In one possible implementation, such as Figure 13 As shown, the photodiode includes a substrate 301, an N-type contact layer 302, an intrinsic absorption layer 303, a diffusion window layer 304, an ohmic contact ring 305b, an anti-reflective film 311, and a P-electrode 312. The N-type contact layer 302 is stacked on one side of the substrate 301. The intrinsic absorption layer 303 is stacked on the side of the N-type contact layer 302 facing away from the substrate 301. The diffusion window layer 304 is stacked on the side of the intrinsic absorption layer 303 facing away from the substrate 301. The ohmic contact ring 305b is disposed on the diffusion window layer 304. The anti-reflective film 311 is disposed directly and / or indirectly on the diffusion window layer 304, avoiding the ohmic contact ring 305b. The P-electrode 312 is connected to the ohmic contact ring 305b.

[0052] In one possible implementation, a dielectric film 309 is provided between part of the anti-reflective film 311 and the diffusion window layer 304. By using the dielectric film 309 in combination with the anti-reflective film 311, the thick dielectric film 309 can increase the toughness of the gold wire bonding, prevent the film from being damaged during the soldering process, and also reduce the capacitance of the PAD and improve chip performance.

[0053] In one possible implementation, the dielectric film 309 comprises a silicon oxide film; or, the dielectric film 309 comprises a stacked silicon nitride film and a silicon oxide film, wherein the silicon nitride film is disposed relative to the silicon oxide film near the diffusion window layer 304.

[0054] In one possible implementation, the antireflective film 311 comprises a silicon nitride film.

[0055] In one possible implementation, the P electrode 312 comprises Ti, Pt, or Au.

[0056] The photodiodes provided in this application include high-speed photodiodes (PDs) and avalanche photodiodes (APDs).

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for fabricating a photodiode, characterized in that, include: A barrier film is deposited on the ohmic contact layer of a chip substrate, the chip substrate comprising a substrate and an N-type contact layer, an intrinsic absorption layer, a diffusion window layer and the ohmic contact layer sequentially stacked on the substrate; A diffusion window is formed on the barrier film, exposing a portion of the ohmic contact layer corresponding to the diffusion window; Zn diffusion is performed on the diffusion region corresponding to the diffusion window, wherein the diffusion region includes a portion of the ohmic contact layer, a portion of the diffusion window layer, and a portion of the intrinsic absorption layer; Remove the barrier film to expose the ohmic contact layer; The ohmic contact layer is partially etched to form an ohmic contact ring located within the diffusion region.

2. The preparation method according to claim 1, characterized in that, The preparation method further includes: An antireflective film is deposited on the side of the ohmic contact ring and the diffusion window layer opposite to the substrate; Remove part of the anti-reflective film to expose the ohmic contact ring; A P electrode is disposed on the ohmic contact ring.

3. The preparation method according to claim 2, characterized in that, The step of depositing an antireflective film on the side of the ohmic contact ring and the diffusion window layer opposite to the substrate specifically includes: A dielectric film is deposited on the side of the ohmic contact ring and the diffusion window layer opposite to the substrate; A P-window is formed on the dielectric film, and the ohmic contact ring is located inside the P-window and exposed. An antireflective film is deposited on the side of the ohmic contact ring, the diffusion window layer, and the dielectric film facing away from the substrate.

4. The preparation method according to claim 3, characterized in that, The width of the P window is smaller than the width of the diffusion window.

5. The preparation method according to any one of claims 1 to 4, characterized in that, The barrier film includes a silicon nitride film and / or a silicon oxide film; The step of depositing a barrier film on the ohmic contact layer of the chip substrate specifically includes: Deposit a silicon nitride film on the ohmic contact layer of the chip substrate; A silicon oxide film is deposited on the side of the silicon nitride film facing away from the substrate.

6. A photodiode, characterized in that, It is prepared by any one of the preparation methods described in claims 1 to 5.

7. The photodiode according to claim 6, characterized in that, include: Substrate; An N-type contact layer is stacked on one side of the substrate; An intrinsic absorption layer is stacked on the side of the N-type contact layer that faces away from the substrate; A diffusion window layer is stacked on the side of the intrinsic absorption layer opposite to the substrate; An ohmic contact ring is disposed on the diffusion window layer; An anti-reflective film is disposed on the diffusion window layer to avoid the ohmic contact ring being directly or indirectly disposed on the diffusion window layer; The P electrode is connected to the ohmic contact ring.

8. The preparation method according to claim 7, characterized in that, A dielectric film is provided between the antireflective film and the diffusion window layer.

9. The preparation method according to claim 8, characterized in that, The dielectric film includes a silicon oxide film; or, the dielectric film includes a stacked silicon nitride film and a silicon oxide film, wherein the silicon nitride film is disposed relative to the silicon oxide film close to the diffusion window layer.

10. The preparation method according to claim 7, characterized in that, The antireflective film includes a silicon nitride film.