LED chip and preparation method thereof
By doping the surface of the GaP window layer with Be or Zn atoms, a non-rectified ohmic contact is formed, which overcomes the limitation that the GaP window layer can only form good contact with AuBe or AuZn alloy materials, and improves the electrical and optical performance of the LED chip.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-09
- Publication Date
- 2026-03-27
AI Technical Summary
GaP window layers can only form good ohmic contacts with AuBe or AuZn alloy materials, but cannot form direct ohmic contacts with other materials, which limits the fabrication and performance of the devices.
By doping the surface layer of the GaP window layer with the transparent conductive layer, Be or Zn atoms are added to make the window layer include a first sublayer and a second sublayer. The second sublayer is a GaP layer doped with Be or Zn, which reduces the potential barrier height at the contact and forms a non-rectified ohmic contact.
It improves the device's lateral current expansion capability, enhances electrical and optical performance, and does not block the light emitted by the light-emitting functional layer, thus optimizing overall performance.
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Figure CN121751833A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of light emitting diode, in particular to an LED chip and a preparation method thereof. BACKGROUND
[0002] For a quaternary LED chip such as an AlGaInP-based LED chip, a GaP window layer is usually arranged on the light-emitting side of the device to allow red light, orange light and yellow light with a wavelength greater than 550 nm to pass through almost without loss, thereby improving the light extraction efficiency. However, due to the material properties of GaP, the GaP window layer can only form a good ohmic contact with AuBe or AuZn alloy materials, and cannot form a direct ohmic contact with other materials, which limits the process and performance of the device. SUMMARY
[0003] To solve the above technical problems, the present application provides an LED chip and a preparation method thereof, so as to break the limitation that the GaP window layer can only form a good ohmic contact with AuBe or AuZn alloy materials, and make the GaP window layer in the LED chip form a good ohmic contact with the transparent conductive layer, thereby optimizing the device performance.
[0004] To achieve the above object, the present application provides the following technical solutions:
[0005] In a first aspect, the present application provides an LED chip, comprising:
[0006] a substrate;
[0007] a light-emitting functional layer located on one side of the substrate;
[0008] a window layer located on the side of the light-emitting functional layer away from the substrate, the window layer comprising a first sub-layer and a second sub-layer located on the side of the first sub-layer away from the substrate, the first sub-layer being a GaP layer, and the second sub-layer being a GaP layer doped with Be atoms or Zn atoms;
[0009] a transparent conductive layer located on the side of the second sub-layer away from the substrate, the transparent conductive layer forming an ohmic contact with the second sub-layer.
[0010] Optionally, the thickness of the second sub-layer is not greater than 20 nm.
[0011] Optionally, the transparent conductive layer is an indium tin oxide layer, an indium zinc oxide layer, a silver nanowire layer, a graphene layer or an aluminum-doped zinc oxide layer.
[0012] In a second aspect, the present application provides a preparation method of an LED chip, comprising:
[0013] providing a substrate;
[0014] forming a light-emitting functional layer on one side of the substrate;
[0015] forming a window layer on the side of the light-emitting functional layer away from the substrate, the window layer being a GaP layer;
[0016] forming a first metal layer on the side of the window layer away from the substrate, the first metal layer being an AuBe layer or an AuZn layer;
[0017] performing an annealing process so that Be atoms or Zn atoms in the first metal layer diffuse to a surface layer of the window layer;
[0018] removing the first metal layer, at this point, the window layer comprises a first sub-layer and a second sub-layer located on the side of the first sub-layer away from the substrate, the first sub-layer being a GaP layer, and the second sub-layer being a GaP layer doped with Be atoms or Zn atoms;
[0019] forming a transparent conductive layer on the side of the second sub-layer away from the substrate, the transparent conductive layer forming an ohmic contact with the second sub-layer.
[0020] Optionally, before forming the first metal layer on the side of the window layer away from the substrate, the method for manufacturing the LED chip further comprises:
[0021] forming a second metal layer on the side of the window layer away from the substrate, the second metal layer being an Au layer;
[0022] subsequently forming the first metal layer on the side of the second metal layer away from the substrate; and synchronously removing the second metal layer when removing the first metal layer.
[0023] Optionally, after forming the first metal layer on the side of the window layer away from the substrate and before performing the annealing process, the method for manufacturing the LED chip further comprises:
[0024] forming a third metal layer on the side of the first metal layer away from the substrate, the third metal layer being an Au layer;
[0025] subsequently synchronously removing the third metal layer when removing the first metal layer.
[0026] Optionally, the thickness of the first metal layer ranges from 120 nm to 500 nm, inclusive.
[0027] The thickness of the second metal layer ranges from 5 nm to 50 nm, inclusive.
[0028] Optionally, the annealing treatment is performed under the atmosphere of nitrogen and hydrogen, and the annealing temperature ranges from 300 DEG C to 500 DEG C, and the annealing time ranges from 10 min to 30 min.
[0029] Optionally, the removing the first metal layer comprises:
[0030] The first metal layer is etched by using a phosphoric acid etchant and a potassium iodide solution to remove the first metal layer.
[0031] Optionally, when the first metal layer is an AuBe layer, the atomic percentage of Be ranges from 1% to 2%.
[0032] When the first metal layer is an AuZn layer, the atomic percentage of Zn ranges from 5% to 10%.
[0033] Compared with the prior art, the technical solution has the following advantages:
[0034] The LED chip provided in the application comprises a substrate, a light-emitting functional layer, a window layer and a transparent conductive layer which are stacked on one side of the substrate, and the window layer is a GaP layer; in order to form an ohmic contact between the GaP window layer and the transparent conductive layer, the surface layer of the GaP window layer in contact with the transparent conductive layer is doped with Be atoms or Zn atoms, so that the window layer comprises a first sub-layer and a second sub-layer, the second sub-layer is located on the side of the first sub-layer away from the substrate, that is, the second sub-layer is the surface layer of the window layer in contact with the transparent conductive layer, the first sub-layer is a GaP layer, and the second sub-layer is a GaP layer doped with Be atoms or Zn atoms; in this way, the height of the potential barrier at the contact between the second sub-layer (GaP layer) and the transparent conductive layer can be reduced, the contact resistance between the second sub-layer (GaP layer) and the transparent conductive layer can be reduced, a non-rectifying ohmic contact can be formed between the second sub-layer (GaP layer) and the transparent conductive layer, the limitation that the GaP window layer can only form a good ohmic contact with an AuBe or AuZn alloy material is broken, and the lateral current spreading capability of the device can be improved by using the transparent conductive layer, and the electrical and optical performance of the device can be improved; and because the amount of Be atoms or Zn atoms doped in the second sub-layer of the window layer is relatively small, the second sub-layer of the window layer will not block the emission of light from the light-emitting functional layer, so the optical performance of the device will not be affected; in this way, the overall performance of the device can be optimized. BRIEF DESCRIPTION OF DRAWINGS
[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description only constitute some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.
[0036] Figure 1 A structure schematic diagram of an LED chip provided by an embodiment of the present application;
[0037] Figure 2 A structure schematic diagram corresponding to a process step in a preparation method of an LED chip provided by an embodiment of the present application;
[0038] Figure 3 A structure schematic diagram corresponding to another process step in a preparation method of an LED chip provided by an embodiment of the present application;
[0039] Figure 4 A structure schematic diagram corresponding to still another process step in a preparation method of an LED chip provided by an embodiment of the present application;
[0040] Figure 5 A structure schematic diagram corresponding to yet another process step in a preparation method of an LED chip provided by an embodiment of the present application;
[0041] Figure 6 A structure schematic diagram corresponding to a process step in another preparation method of an LED chip provided by an embodiment of the present application;
[0042] Figure 7 A structure schematic diagram corresponding to a process step in still another preparation method of an LED chip provided by an embodiment of the present application;
[0043] Figure 8 A structure schematic diagram corresponding to a process step in yet another preparation method of an LED chip provided by an embodiment of the present application.
[0044] Explanation of reference signs:
[0045] Substrate 10; light-emitting functional layer 20; first-type semiconductor layer 21; active layer 22; second-type semiconductor layer 23; window layer 30; first sub-layer 31; second sub-layer 32; transparent conductive layer 40; first electrode 51; second electrode 52; first metal layer 61; second metal layer 62; third metal layer 63. DETAILED DESCRIPTION
[0046] With reference to the drawings and briefly describing the technical schemes in the embodiments of the present application, it is obvious that the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative effort belong to the scope of protection of the present application.
[0047] The terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the terms used in this way can be interchanged, and this is only a distinguishing way adopted in the description of the embodiments of the present application for the same attribute objects in the description. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, so that the processes, methods, systems, products or equipment containing a series of units do not have to be limited to those units, but can include other units not clearly listed or inherent to these processes, methods, products or equipment.
[0048] Secondly, the present application is described in detail in combination with the schematic diagram, and in the detailed description of the embodiments of the present application, the schematic diagram of the device structure is partially enlarged without the general proportion for the convenience of description, and the schematic diagram is only an example, which should not limit the scope of protection of the present application. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in actual manufacture.
[0049] As described in the background section, due to the material properties of GaP, the GaP window layer can only form a good ohmic contact with AuBe or AuZn alloy materials, and cannot form a direct ohmic contact with other materials, which will limit the process and performance of the device.
[0050] Therefore, the embodiments of the present application provide an LED chip, Figure 1 The structure of the LED chip provided by the embodiments of the present application is shown in the schematic diagram, as shown in the figure, Figure 1 The LED chip includes a substrate 10 and a light-emitting functional layer 20, a window layer 30 and a transparent conductive layer 40 stacked on one side of the substrate 10, wherein the window layer 30 includes a first sub-layer 31 and a second sub-layer 32 located on the side of the first sub-layer 31 away from the substrate 10, the first sub-layer 31 is a GaP layer, the second sub-layer 32 is a GaP layer doped with Be atoms or Zn atoms, and the transparent conductive layer 40 forms an ohmic contact with the second sub-layer 32 in the window layer 30.
[0051] Optionally, the substrate 10 is a GaAs substrate.
[0052] In the embodiments of the present application, as shown in the figure, Figure 1As shown, the light-emitting functional layer 20 can include a first-type semiconductor layer 21, an active layer 22 and a second-type semiconductor layer 23 stacked in a direction away from the substrate 10; optionally, the first-type semiconductor layer 21 is an n-type AlGaInP layer, the active layer 22 is an undoped AlGaInP multi-quantum well light-emitting layer, and the second-type semiconductor layer 23 is a p-type AlGaInP layer; electrons provided by the first-type semiconductor layer 21 and holes provided by the second-type semiconductor layer 23 recombine in the active layer 22 to emit light, which is mainly yellow, orange and red light.
[0053] In the embodiment, the window layer 30 is a GaP layer. It can be understood that the doping type of the window layer 30 is the same as the doping type of the second-type semiconductor layer 23 in the light-emitting functional layer 20; when the second-type semiconductor layer 23 is a p-type AlGaInP layer, the window layer 30 is a p-type doped GaP layer.
[0054] As described above, a GaP window layer can only form a good ohmic contact with an AuBe or AuZn alloy material, and cannot form a direct ohmic contact with a transparent conductive layer. In the embodiment, in order to form an ohmic contact between the window layer 30 (GaP layer) and the transparent conductive layer 40, the surface layer of the window layer 30 (GaP layer) in contact with the transparent conductive layer 40 is doped with Be atoms or Zn atoms, so that the window layer 30 (GaP layer) includes a first sub-layer 31 and a second sub-layer 32; the second sub-layer 32 is the surface layer of the window layer 30 in contact with the transparent conductive layer 40, the first sub-layer 31 is a GaP layer, and the second sub-layer 32 is a GaP layer doped with Be atoms or Zn atoms. In this way, the height of the potential barrier at the contact between the second sub-layer 32 (GaP layer) and the transparent conductive layer 40 can be reduced, the contact resistance between the second sub-layer 32 (GaP layer) and the transparent conductive layer 40 can be reduced, and a non-rectifying ohmic contact between the second sub-layer 32 (GaP layer) and the transparent conductive layer 40 can be formed.
[0055] That is, the LED chip provided in the embodiment can form an ohmic contact between the surface layer of the GaP window layer and the transparent conductive layer by doping the surface layer of the GaP window layer with Be atoms or Zn atoms, thereby breaking the limitation that the GaP window layer can only form a good ohmic contact with an AuBe or AuZn alloy material.
[0056] Further, as shown in FIG. 4, an electrode (such as a p-electrode) can be arranged on the side of the transparent conductive layer 40 away from the window layer 30; the current injected by the electrode on the transparent conductive layer 40 can be expanded laterally through the transparent conductive layer 40, and then flow into the window layer 30 and the light-emitting functional layer 20, thereby improving the electrical and optical performance of the device. Figure 1
[0057] Specifically, as shown in FIG. 4, an electrode (such as a p-electrode) can be arranged on the side of the transparent conductive layer 40 away from the window layer 30; the current injected by the electrode on the transparent conductive layer 40 can be expanded laterally through the transparent conductive layer 40, and then flow into the window layer 30 and the light-emitting functional layer 20, thereby improving the electrical and optical performance of the device.
[0057] Specifically, as shown in FIG. 4, an electrode (such as a p-electrode) can be arranged on the side of the transparent conductive layer 40 away from the window layer 30; the current injected by the electrode on the transparent conductive layer 40 can be expanded laterally through the transparent conductive layer 40, and then flow into the window layer 30 and the light-emitting functional layer 20, thereby improving the electrical and optical performance of the device. Figure 1As shown, a first electrode 51 is disposed on the side of the substrate 10 away from the light-emitting functional layer 20, and a second electrode 52 is disposed on the side of the transparent conductive layer 40 away from the window layer 30; wherein, the first electrode 51 can be an n electrode made of AuGeNi material; and the second electrode 52 can be a p electrode made of AuZn or AuBe alloy material.
[0058] It should be noted that because the amount of Be or Zn atoms doped in the second sublayer 32 of the window layer 30 is relatively small, the second sublayer 32 of the window layer 30 will not block the light emitted by the light-emitting functional layer 20, thus not affecting the optical performance of the device.
[0059] It should also be noted that this application does not directly dope Be or Zn atoms into the second sub-layer 32 of the window layer 30. Instead, a p-type doped GaP layer is first formed as the window layer 30. Then, a first metal layer, which is an AuBe layer or an AuZn layer, is formed on the side of the window layer 30 away from the substrate 10. Next, an annealing process is performed to diffuse the Be or Zn atoms in the first metal layer to the surface of the window layer 30. Then, the first metal layer is removed. Thus, the window layer 30 includes a first sub-layer 31 and a second sub-layer 32 located on the side of the first sub-layer 31 away from the substrate 10. The first sub-layer 31 is still a p-type doped GaP layer, and the second sub-layer 32 is not only a p-type doped GaP layer but also doped with Be or Zn atoms. Subsequently, a transparent conductive layer 40 is formed on the side of the second sub-layer 32 away from the substrate 10. Since the second sub-layer 32 is doped with Be or Zn atoms, the second sub-layer 32 can form an ohmic contact with the transparent conductive layer 40.
[0060] Therefore, it can be understood that because the Be or Zn atoms doped in the second sublayer 32 of the window layer 30 diffuse in during the annealing process, the thickness of the second sublayer 32 doped with Be or Zn atoms in the window layer 30 is at the atomic level. Optionally, the thickness of the second sublayer 32 of the window layer 30 is no more than 20 nm. This also ensures that the amount of Be or Zn atoms doped in the second sublayer 32 of the window layer 30 is small. First, it will not block the emission of light from the light-emitting functional layer 20. At the same time, it will not cause excessive diffusion of Be and Zn atoms in the window layer 30, thus avoiding excessive concentration of Be and Zn atoms in the window layer 30, which could lead to material damage or degradation of contact properties.
[0061] Optionally, the transparent conductive layer 40 can be an indium tin oxide layer (ITO layer), an indium zinc oxide layer (IZO layer), a silver nanowire layer (AgNWs layer), a graphene layer, or an aluminum-doped zinc oxide layer (AZO layer), so that the transparent conductive layer 40 has good lateral current spreading capability without affecting light transmission.
[0062] In practical applications, a buffer layer and a Bragg mirror layer can also be provided between the substrate 10 and the light-emitting functional layer 20. The buffer layer can be a GaAs layer for lattice matching; the Bragg mirror layer can include alternating layers of GaAs and AlAs to reflect the light emitted from the light-emitting functional layer 20 toward the substrate 10 side toward the window layer 30 side, thereby improving the light efficiency.
[0063] Accordingly, this application also provides a method for fabricating an LED chip, the method comprising:
[0064] S10: As Figure 2 As shown, a substrate 10 is provided.
[0065] Optionally, substrate 10 is a GaAs substrate.
[0066] S20: As Figure 2 As shown, a light-emitting functional layer 20 is formed on one side of the substrate 10.
[0067] like Figure 2 As shown, the light-emitting functional layer 20 may include a first type semiconductor layer 21, an active layer 22, and a second type semiconductor layer 23 stacked along the direction away from the substrate 10; optionally, the first type semiconductor layer 21 is an n-type AlGaInP layer, the active layer 22 is an undoped AlGaInP multiple quantum well light-emitting layer, and the second type semiconductor layer 23 is a p-type AlGaInP layer.
[0068] S30: As Figure 2 As shown, a window layer 30 is formed on the side of the light-emitting functional layer 20 away from the substrate 10, and the window layer 30 is a GaP layer.
[0069] It is understandable that the doping type of the window layer 30 is the same as the doping type of the second type semiconductor layer 23 in the light-emitting functional layer 20. The second type semiconductor layer 23 is a p-type AlGaInP layer, so the window layer 30 as a whole is a p-type doped GaP layer.
[0070] Specifically, the luminescent functional layer 20 and the window layer 30 can be deposited sequentially using a metal-organic chemical vapor deposition (MOCVD) process.
[0071] S40: As Figure 3 As shown, a first metal layer 61 is formed on the side of the window layer 30 away from the substrate 10. The first metal layer 61 is an AuBe layer or an AuZn layer.
[0072] Specifically, an electron beam evaporation method can be used to form a first metal layer 61 on the side of the window layer 30 away from the substrate 10.
[0073] S50: such as Figure 4As shown, annealing is performed to allow Be or Zn atoms in the first metal layer 61 to diffuse to the surface of the window layer 30.
[0074] Optionally, during annealing, the annealing conditions can be: annealing temperature in a nitrogen and hydrogen atmosphere, ranging from 300℃ to 500℃ (inclusive); and annealing time ranging from 10 min to 30 min (inclusive). Under these annealing conditions, Be or Zn atoms in the first metal layer 61 can effectively diffuse and penetrate into the surface layer of the window layer 30.
[0075] In addition, Au atoms in the first metal layer 61 will also diffuse and penetrate into the surface layer of the window layer 30 in an appropriate amount, but Be atoms and Zn atoms play a dominant role in the ohmic contact characteristics of the surface layer of the window layer 30.
[0076] S60: As Figure 5 As shown, the first metal layer 61 is removed. Thus, the window layer 30 includes a first sub-layer 31 and a second sub-layer 32 located on the side of the first sub-layer 31 away from the substrate 10. The first sub-layer 31 is a GaP layer, and the second sub-layer 32 is a GaP layer doped with Be atoms or Zn atoms.
[0077] It should be emphasized that the second sublayer 32 is not a newly added layer on the window layer 30, but rather the part of the window layer 30 where Be or Zn atoms diffuse and penetrate.
[0078] Optionally, removing the first metal layer 61 includes:
[0079] The first metal layer 61 is wet-etched using phosphoric acid etchant and potassium iodide solution to remove the first metal layer 61, which is then stopped at the window layer 30.
[0080] S70: As Figure 1 As shown, a transparent conductive layer 40 is formed on the side of the second sub-layer 32 away from the substrate 10, and the transparent conductive layer 40 forms an ohmic contact with the second sub-layer 32.
[0081] Optionally, the transparent conductive layer 40 can be an indium tin oxide layer (ITO layer), an indium zinc oxide layer (IZO layer), a silver nanowire layer (AgNWs layer), a graphene layer, or an aluminum-doped zinc oxide layer (AZO layer), so that the transparent conductive layer 40 has good lateral current spreading capability without affecting light transmission.
[0082] In practical applications, this method may also include:
[0083] S80: such as Figure 1 As shown, a first electrode 51 is formed on the side of the substrate 10 away from the light-emitting functional layer 20, and a second electrode 52 is formed on the side of the transparent conductive layer 40 away from the window layer 30.
[0084] The first electrode 51 can be an n electrode made of AuGeNi material; the second electrode 52 can be a p electrode made of AuZn or AuBe alloy material.
[0085] Therefore, the LED chip fabrication method provided in this application involves first forming an AuBe or AuZn metal layer on the GaP window layer, then performing an annealing process to diffuse Be or Zn atoms to the surface of the GaP window layer, and finally removing the AuBe or AuZn metal layer. This allows the surface of the GaP window layer to form an ohmic contact with the transparent conductive layer, breaking the limitation that the GaP window layer can only form a good ohmic contact with AuBe or AuZn alloy materials. This allows the transparent conductive layer to be used to improve the lateral current spread capability of the device, thereby enhancing its electrical and optical performance. Furthermore, because the amount of Be or Zn atoms doped on the surface of the window layer is relatively small, the window layer does not block the light emitted from the light-emitting functional layer, thus not affecting the optical performance of the device. Therefore, the overall performance of the device is optimized.
[0086] The AuBe or AuZn metal layer formed on the GaP window layer exists only during the fabrication process and is etched away after annealing. Therefore, the AuBe or AuZn metal layer formed on the GaP window layer will not block the light emitted by the light-emitting functional layer.
[0087] Understandably, since the Be or Zn atoms doped in the second sublayer 32 of the window layer 30 diffuse in during the annealing process, the thickness of the second sublayer 32 doped with Be or Zn atoms in the window layer 30 is at the atomic level. Optionally, the thickness of the second sublayer 32 of the window layer 30 is no more than 20 nm. This also ensures that the amount of Be or Zn atoms doped in the second sublayer 32 of the window layer 30 is small. First, it will not block the emission of light from the light-emitting functional layer 20. At the same time, it will not cause excessive diffusion of Be and Zn atoms in the window layer 30, thus avoiding excessive concentration of Be and Zn atoms in the window layer 30, which could lead to material damage or degradation of contact properties.
[0088] Optionally, in some embodiments of this application, before the first metal layer 61 is formed on the side of the window layer 30 facing away from the substrate 10, the method for fabricating the LED chip may further include:
[0089] S41: As Figure 6 As shown, a second metal layer 62 is formed on the side of the window layer 30 away from the substrate 10. The second metal layer is an Au layer.
[0090] Specifically, the second metal layer 62 can be formed by electron beam evaporation.
[0091] It is understandable that, such as Figure 6 As shown, the first metal layer 61 is subsequently formed on the side of the second metal layer 62 away from the substrate 10.
[0092] And, as Figure 5 As shown, when the first metal layer 61 is removed, the second metal layer 62 is also removed simultaneously, ending at window layer 30.
[0093] In this embodiment, the second metal layer 62 mainly serves the following functions:
[0094] First, the second metal layer 62 (Au layer) can act as a diffusion barrier layer, inhibiting the transitional diffusion of Be and Zn atoms from the first metal layer 61 to the window layer 30, thereby preventing excessive concentrations of Be and Zn atoms in the window layer 30 that could lead to material damage or degradation of contact properties. Second, the second metal layer 62 (Au layer) can also act as a stress buffer layer, because the pure Au layer has excellent ductility, which can alleviate the difference in thermal expansion coefficients between the first metal layer 61 (AuBe layer or AuZn layer) and the window layer 30 (GaP layer), reducing the risk of thermal stress cracking. Third, the second metal layer 62... The Au layer can also serve as an interface wetting layer, improving the adhesion of the first metal layer 61 (AuBe layer or AuZn layer) to the surface of the window layer 30 (GaP layer), so that the first metal layer 61 (AuBe layer or AuZn layer) is uniformly spread on the surface of the window layer 30 (GaP layer), improving the uniformity of the diffusion of Be atoms and Zn atoms in the first metal layer 61 to the window layer 30 during subsequent annealing, thereby improving the uniformity of Be atoms and Zn atoms doping in the second sub-layer 32 of the window layer 30, so that the second sub-layer 32 of the window layer 30 forms an ohmic contact with the transparent conductive layer 40 uniformly across its entire surface.
[0095] Given the aforementioned function of the second metal layer 62, the thickness of the second metal layer 62 should not be too large. Therefore, optionally, the thickness range of the second metal layer 62 can be 5nm-50nm, including the endpoint value; at the same time, the thickness range of the first metal layer 61 can be 120nm-500nm, including the endpoint value, so as to effectively diffuse Be atoms and Zn atoms to the surface of the window layer 30.
[0096] Optionally, in some other embodiments of this application, after the first metal layer 61 is formed on the side of the window layer 30 facing away from the substrate 10 and before annealing, the method for fabricating the LED chip may further include:
[0097] S42: As Figure 7 As shown, a third metal layer 63 is formed on the side of the first metal layer 61 away from the substrate 10, and the third metal layer 63 is an Au layer.
[0098] Specifically, the third metal layer 63 can be formed by electron beam evaporation.
[0099] And, as Figure 5 As shown, when the first metal layer 61 is removed, the third metal layer 63 is also removed simultaneously, ending at window layer 30.
[0100] In this embodiment, the third metal layer 63 covers the first metal layer 61 and can serve as an antioxidant protective layer, effectively isolating the air and preventing the first metal layer 61 from contacting the air and causing oxidation failure, thereby improving the stability of the first metal layer 61.
[0101] Optionally, the thickness of the first metal layer 61 can be in the range of 120nm-500nm, including the endpoint values, so as to effectively diffuse Be atoms and Zn atoms to the surface of the window layer 30; the thickness of the third metal layer 63 can be in the range of 250nm-1000nm, including the endpoint values, so as to provide sufficient anti-oxidation protection for the first metal layer 61.
[0102] Optionally, in some other embodiments of this application, before the first metal layer 61 is formed on the side of the window layer 30 facing away from the substrate 10, the method for fabricating the LED chip may further include:
[0103] S41: As Figure 8 As shown, a second metal layer 62 is formed on the side of the window layer 30 away from the substrate 10. The second metal layer is an Au layer.
[0104] Furthermore, after the first metal layer 61 is formed on the side of the window layer 30 facing away from the substrate 10, and before annealing, the method for fabricating the LED chip may further include:
[0105] S42: As Figure 8 As shown, a third metal layer 63 is formed on the side of the first metal layer 61 away from the substrate 10, and the third metal layer 63 is an Au layer.
[0106] In this embodiment, a "sandwich" structure consisting of a second metal layer 62, a first metal layer 61, and a third metal layer 63 is formed on the window layer 30. The bottom second metal layer 62 serves two purposes: First, it acts as a diffusion barrier layer, inhibiting the transitional diffusion of Be and Zn atoms from the first metal layer 61 to the window layer 30, thereby preventing excessive concentrations of Be and Zn atoms in the window layer 30 that could lead to material damage or degradation of contact properties. Second, it also acts as a stress buffer layer, as the excellent ductility of pure Au layers can alleviate the stress on the first metal layer 61 (AuBe or AuZn layer) and its surrounding environment. The difference in thermal expansion coefficients between window layers 30 (GaP layers) reduces the risk of thermal stress cracking. Third, the second metal layer 62 (Au layer) can also serve as an interface wetting layer, improving the adhesion of the first metal layer 61 (AuBe or AuZn layer) to the surface of window layers 30 (GaP layers), ensuring uniform spreading of the first metal layer 61 (AuBe or AuZn layer) on the surface of window layers 30 (GaP layers), and improving the uniformity of Be and Zn atoms diffusion from the first metal layer 61 to window layers 30 during subsequent annealing. The function of the first metal layer 61 is to diffuse Be or Zn atoms to the surface of window layers 30 (GaP layers) during annealing, improving the ohmic contact characteristics of the surface of window layers 30 (GaP layers). The function of the third metal layer 63 is to act as an antioxidant protective layer for the first metal layer 61, effectively isolating it from air and preventing oxidation failure due to contact with air, thus improving the stability of the first metal layer 61. It can be seen that the "sandwich" structure composed of the second metal layer 62, the first metal layer 61 and the third metal layer 63 achieves a good balance between electrical performance (low contact resistance), process stability (diffusion suppression) and reliability (resistance to thermal stress / oxidation) through the synergistic effect of layering.
[0107] In this embodiment, as Figure 5 As shown, when the first metal layer 61 is removed, the second metal layer 62 and the third metal layer 63 will also be removed simultaneously, ending at window layer 30.
[0108] Optionally, the thickness of the first metal layer 61 can be in the range of 120nm-500nm, including the endpoint values, so as to effectively diffuse Be atoms and Zn atoms to the surface of the window layer 30; the thickness of the second metal layer 62 can be in the range of 5nm-50nm, including the endpoint values, and the thickness of the second metal layer 62 should not be too large; the thickness of the third metal layer 63 can be in the range of 250nm-1000nm, including the endpoint values, so as to provide sufficient anti-oxidation protection for the first metal layer 61.
[0109] Based on any of the above embodiments, optionally, when the first metal layer 61 is an AuBe layer, if the atomic percentage of Be in the first metal layer 61 is too high, it may cause the first metal layer 61 to be brittle and have poor impact resistance; if the atomic percentage of Be in the first metal layer 61 is too low, the number of Be atoms diffusing to the surface of the window layer 30 may be too small, resulting in an increase in the contact resistance of the window layer 30; therefore, the atomic percentage of Be in the first metal layer 61 can be set to a range of 1%-2%, including the endpoint value.
[0110] When the first metal layer 61 is an AuZn layer, since Zn atoms are easily oxidized, increasing the atomic percentage of Zn in the first metal layer 61 requires higher vacuum conditions, which increases the difficulty of preparation. Therefore, the atomic percentage of Zn in the first metal layer 61 can be in the range of 5%-10%, including the endpoint values.
[0111] In practical applications, before forming the light-emitting functional layer 20 on the substrate 10, a buffer layer and a Bragg reflector layer can be formed first. The buffer layer can be a GaAs layer for lattice matching. The Bragg reflector layer can include alternating layers of GaAs and AlAs to reflect the light emitted from the light-emitting functional layer 20 toward the side of the substrate 10 toward the side of the window layer 30, thereby improving the light efficiency.
[0112] The various parts of this manual are described in a combination of parallel and progressive methods. Each part focuses on the differences between the other parts, and the same or similar parts can be referred to each other.
[0113] The features described above regarding the disclosed embodiments can be substituted or combined with each other to enable those skilled in the art to implement or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. An LED chip, characterized in that, include: Substrate; A light-emitting functional layer located on one side of the substrate; A window layer located on the side of the light-emitting functional layer away from the substrate, the window layer comprising a first sub-layer and a second sub-layer located on the side of the first sub-layer away from the substrate, the first sub-layer being a GaP layer and the second sub-layer being a GaP layer doped with Be atoms or Zn atoms; A transparent conductive layer is located on the side of the second sublayer facing away from the substrate, and the transparent conductive layer forms an ohmic contact with the second sublayer.
2. The LED chip according to claim 1, characterized in that, The thickness of the second sublayer is no greater than 20 nm.
3. The LED chip according to claim 1, characterized in that, The transparent conductive layer is an indium tin oxide layer, an indium zinc oxide layer, a silver nanowire layer, a graphene layer, or an aluminum-doped zinc oxide layer.
4. A method for fabricating an LED chip, characterized in that, include: Provide substrate; A light-emitting functional layer is formed on one side of the substrate; A window layer is formed on the side of the light-emitting functional layer away from the substrate, and the window layer is a GaP layer; A first metal layer is formed on the side of the window layer opposite to the substrate, and the first metal layer is an AuBe layer or an AuZn layer; Annealing is performed to allow Be or Zn atoms in the first metal layer to diffuse to the surface of the window layer; Remove the first metal layer. Thus, the window layer includes a first sub-layer and a second sub-layer located on the side of the first sub-layer facing away from the substrate. The first sub-layer is a GaP layer, and the second sub-layer is a GaP layer doped with Be atoms or Zn atoms. A transparent conductive layer is formed on the side of the second sublayer facing away from the substrate, and the transparent conductive layer forms an ohmic contact with the second sublayer.
5. The method for preparing an LED chip according to claim 4, characterized in that, Before forming the first metal layer on the side of the window layer opposite to the substrate, the method for fabricating the LED chip further includes: A second metal layer, which is an Au layer, is formed on the side of the window layer opposite to the substrate. Subsequently, the first metal layer is formed on the side of the second metal layer opposite to the substrate; and the second metal layer is removed simultaneously when the first metal layer is removed.
6. The method for preparing an LED chip according to claim 4 or 5, characterized in that, After the first metal layer is formed on the side of the window layer facing away from the substrate, and before the annealing process is performed, the method for fabricating the LED chip further includes: A third metal layer is formed on the side of the first metal layer away from the substrate, and the third metal layer is an Au layer; Subsequently, when removing the first metal layer, the third metal layer is removed simultaneously.
7. The method for preparing an LED chip according to claim 5, characterized in that, The thickness of the first metal layer ranges from 120nm to 500nm, including the endpoint values; The thickness of the second metal layer ranges from 5nm to 50nm, including the endpoint values.
8. The method for preparing an LED chip according to claim 4, characterized in that, The annealing conditions are as follows: under a nitrogen and hydrogen atmosphere, the annealing temperature ranges from 300℃ to 500℃, including the endpoint values; the annealing time ranges from 10 min to 30 min, including the endpoint values.
9. The method for preparing an LED chip according to claim 4, characterized in that, The removal of the first metal layer includes: The first metal layer was removed by wet etching using phosphoric acid etchant and potassium iodide solution.
10. The method for preparing an LED chip according to claim 4, characterized in that, When the first metal layer is an AuBe layer, the atomic percentage of Be ranges from 1% to 2%, including the endpoint values; When the first metal layer is an AuZn layer, the atomic percentage of Zn ranges from 5% to 10%, including the endpoint values.