Optoelectronic devices, arrays, and methods for processing optoelectronic devices, arrays

Abstract

The invention relates to an optoelectronic device, in particular an LED comprising a stack of layers based on a system of phosphide materials, said stack of layers respectively comprising a p-doped side and an n-doped side with an active layer therebetween. The layer stack includes a mesa structure exposing at least the p-doped side and sidewalls of the active layer. The n-doped-side layers extend beyond sidewalls of the mesa of the layer stack in a lateral direction. A dielectric layer covers sidewall regions of the p-doped layer, and optionally a portion of a top surface of the p-doped side. An n-doped regrowth layer covers at least a portion of a sidewall of the active layer and contacts the n-doped side. The device further includes a p-contact on the top surface of the p-doped side and a contact n-doped layer, in particular an n-contact laterally displaced relative to the mesa, facing away from the main emission side.

Description

[0001] This application claims priority to German patent application DE 10 2023 122 921.4, having a date of August 25, 2023, the disclosure of which is incorporated herein in its entirety by this reference. The present invention relates to optoelectronic devices, in particular µLEDs based on phosphide material systems like InGaAlP suitable for light emission in the red and orange spectrum. The present invention further relates to methods for processing optoelectronic devices, in particular µLEDs. The present invention finally relates to arrays of such devices on a common substrate. BACKGROUND

[0002] µLEDs are used for a variety of different lighting applications, the benefit of which is to provide a relatively large luminance with a relatively low current consumption and footprint. µLEDs are optoelectronic devices having a diameter of less than 70 µm and in particular less than 20 µm, even less than 10 µm. Such µLEDs can be implemented on a variety of base material systems, for example nitride and phosphide systems. The various base material systems can be characterized by their typical emission range. For example, phosphide base material systems, for example InP, InAlP or InGaAlP with various Al, Ga and In contents, can be used for light emission in the orange spectrum to the red spectrum.

[0003] However, the charge carriers in phosphide material systems have a relatively large diffusion range of several µm. While this is not a problem for large size LEDs, this behavior has a detrimental effect at diameters of less than 70 µm, becoming worse for smaller sizes. The processing of optoelectronic devices typically creates a number of different states at the surface of the semiconductor layer and in particular at the surface of the active layer. These states form so-called non-radiative recombination centers at which the charge carriers recombine non-radiatively. The above-mentioned µLEDs based on phosphide material systems suffer from the generation of such non-radiative recombination centers due to their low ratio of the area of their active layer to their perimeter.

[0004] During the processing of a plurality of optoelectronic devices, mesa etching of the µLEDs is carried out in order to optically and electrically isolate the individual devices or to isolate the pixels in an array. The mesa etching process leads to the formation of non-radiative recombination centers at the mesa edges, which are typically dangling bonds or defects in the crystal structure. In the operation of the device, the current diffusion through the active region and in the doped layers above and below the active region and also by the active region contributes to the charge carriers at the pixel edges, which can recombine non-radiatively, thereby reducing the quantum efficiency of the device.

[0005] It is therefore an object of the present application to provide optoelectronic devices and in particular µLEDs based on phosphide material systems with an improved quantum efficiency. SUMMARY

[0006] This object and other objects are solved by the subject matter of the independent claims. Features and other aspects of the proposed principles are outlined in the dependent claims.

[0007] Various approaches have been proposed to address the above-mentioned problems and to increase the quantum efficiency or to reduce the density of non-radiative recombination centers. For phosphide material systems, e.g. based on InAlP or InGaAlP, and for material systems based on GaAs and AlGaAs, which are both commonly used for yellow / red emission, there are two main approaches to improve quantum well intermixing. One approach is based on artificially creating a larger bandgap to form a potential that prevents charge carriers from reaching non-radiative recombination centers. This approach is also known as quantum well intermixing (QWI) and is typically applied to larger µLEDs.

[0008] Another approach is based on passivating the surface of the mesa edges by a regrowth process, which is widely considered to be the approach of choice when approaching µm-sized devices. The regrowth process is typically performed by structuring the first part of the device from the p-side and subsequently applying a p-doped high bandgap material on the mesa edges. Various p-doped contact layers are then deposited by one or more epitaxy steps.

[0009] However, the inventors have found that the standard regrowth design for smallest emitter sizes is limited to vertical contact µLEDs (top and back contact) for space reasons. Furthermore, the parts of the mesa are at the same potential as the p-contact. This causes mobile charge carriers, i.e. electrons, to be partially undesirably attracted to the mesa instead of being desirably injected into the active region, causing non-radiative recombination.

[0010] Therefore, the inventors propose a modified design and processing flow of a regrowth-based horizontal µLED array with two contact types on one side. The proposed approach solves the problem of an adverse positive potential at the mesa sidewalls, effectively reducing the undesired recombination at non-radiative recombination centers. Furthermore, the arrangement of contacts on one side, in particular on the non-emitting side of the µLED, on the emitting side after growth substrate removal, allows for a high degree of freedom in the outcoupling structures with various materials, conductive and insulating, low and high refractive index, etc. Various concepts for bonding the device on an IC wafer are possible, leading to further flexibility.

[0011] In some aspects of the proposed principles, the inventors propose optoelectronic devices, in particular µLEDs, comprising a layer stack based on one of a phosphide material system and an arsenide material system. The proposed concepts are applicable to both material systems as they share similar features with respect to the above-mentioned problems.

[0012] The layer stack comprises multiple distinct doped layers forming an active layer between a p-doped side and an n-doped side. The layer stack includes a mesa structure, where the stack forms islands that expose at least the active layer and the sidewalls of the p-doped side. However, the n-doped or undoped layer on the n-doped side extends laterally beyond the sidewalls of the mesa structure of the layer stack. Therefore, this layer includes an exposed surface.

[0013] According to the proposed principle, a dielectric layer covers the sidewall region of the p-doped layer and optionally covers a portion of the top surface of the p-doped side. The dielectric layer may include, for example, SiO2, although other materials such as NbO2, HFO2, and others are possible. The optoelectronic device also includes a regrown n-doped layer covering at least a portion of the sidewall of the active layer and contacting the n-doped side, with the main emitter side of the optoelectronic device adjacent to the n-doped layer on the n-doped side. Finally, a p-contact is disposed on the top surface of the p-doped side, thereby electrically contacting the p-doped side of the device. Similarly, the n-contact contacts the n-doped layer, particularly laterally displaced relative to the mesa structure, but also away from the main emitter side.

[0014] The resulting device is configured as a horizontal µLED with two contacts on the side opposite to the main emitter side. Charge carriers injected into the active layer from the p-doped and n-doped sides have a lower probability of recombination at nonradiative recombination centers because the regenerated long n-doped layer results in a negative potential at the sidewalls of the device during operation. The negative potential repels electrons, thus preventing them from being trapped at nonradiative recombination centers (or at least reducing the probability of being trapped at nonradiative recombination centers).

[0015] In some aspects, the active layer may include a multi-quantum-well structure having multiple barrier layers and quantum-well layers, respectively. The active layer may include two undoped small cladding layers, which may form part of the active layer or a portion of the p-doped side and n-doped side, respectively. The undoped cladding layers may include, for example, InAlGaP, and serve to prevent undesirable diffusion of dopant material into the active layer. In some aspects, the doped layer may include one or more sublayers, which may include different materials and different dopant concentrations.

[0016] As described, the layer stacking is based on a phosphide material system or a GaAs material system. Such systems can include, but are not limited to, InP, AlP, GaP, InAlP, GaAlP, InGaP, InAlGaP, GaAs, and AlGaAs, with varying contents of Al, Ga, and In depending on the desired design and bandgap. For example, the blocking layer can use a higher Al content compared to the individual quantum well layers in the multi-quantum-well structure mentioned above. A higher Al content results in a higher bandgap.

[0017] In some other aspects, the n-doped regrown layer covers the sidewalls of the active layer and optionally at least covers the sidewall portion of the undoped cladding layer on the p-doped side adjacent to the active layer. Thus, the n-doped regrown layer completely covers the active layer, but may also cover the two cladding layers stacked on either side of the active layer. In some other aspects, the n-doped regrown layer may also cover the portion of the n-doped or undoped layer on the n-doped side that extends laterally beyond the sidewalls of the mesa structure. Therefore, the regrown layer thus extends not only on the sidewalls but also on the surface of the n-doped side.

[0018] In some aspects, the n-doped regrown layer comprises a low-n-type semiconductor material with high Al content, such as InGaAlP / InAlP, to match the doping concentration of the regrown long n-doped side of the layer or the undoped layer. In some aspects, the material of the n-doped regrown layer is the same as the material of the layer forming the n-doped side of its surface. In some aspects, the concentration of the regrown layer can be varied, and in particular increases with a greater distance to the sidewalls of the layer stack.

[0019] In some aspects, the regenerated layer may comprise several sublayers comprising different base materials and / or different doping concentrations. However, such sublayers may be classified as independent layers rather than part of the regenerated layer. This distinction may be based on processing and design or material selection. In some aspects, the optoelectronic device according to the proposed principles also includes an n-doped layer on the surface of an n- or undoped layer adjacent to the sidewalls of the mesa structure of the layer stack and at least a portion of the n-doped regenerated layer. This additional layer may be epitaxially deposited on the regenerated layer and is based on doped GaP and GaAs. The individual layers may be more highly doped than the regenerated layer and are suitable for depositing materials for n-contacts thereon.

[0020] Some aspects involve doping. For the regenerated layer and the n-doping of the additional layer deposited on the initial regenerated layer, either Si or Te can be used. The dopant concentration can range from 1e17 1 / cm³ to approximately 1e19 1 / cm³. In some aspects, similar concentrations are applied to both the p-doped and n-doped sides of the layer stack.

[0021] These additional one or more layers may also extend partially to the dielectric material covering but not completely covering the sidewalls. In some other respects, one or more reflective layers are arranged on portions of the sidewalls, particularly on portions of the dielectric layers. These reflective layers may be insulating or connected. In some respects, the material of the n-contact may be reflective to further increase light emission through the emitting side.

[0022] In some aspects of the proposed principle, the mesa structure extends from the top surface of the p-doped side to the active layer, leaving the sidewalls of the n-doped layer on the n-doped side unexposed. In other words, any mesa etching process can stop directly after the active layer, i.e., after the final quantum well layer or barrier layer of the multi-quantum-well structure. However, this is not mandatory; in some aspects, the sidewalls may also expose adjacent cladding layers or even a portion of the n-doped layer. The depth of the mesa structure (which is the extension of the exposed sidewalls) is a trade-off between the grain boundaries resulting from the change in the regrowth crystal angle and the steepness of the sidewalls.

[0023] Therefore, in some aspects, the sidewalls of the layer stack can be tilted, with the diameter increasing closer to the main emitter side and the n-doped side. This tilt may follow the crystal structure. In some aspects, n-contacts are arranged adjacent to the mesa structure, particularly around the surface portion of the n-doped layer of the mesa structure. In some aspects, n-contacts are arranged on highly doped layers, such as one of the additional layers mentioned above, particularly highly n-doped GaAs or GaP. The n-contacts comprise pillars of conductive material, such as metals. In some aspects, the metals are reflective, thereby further enhancing the brightness and overall efficiency of the device.

[0024] In some aspects, the proposed optoelectronic device also includes an insulating material disposed in the space between the n-contact, which is away from the main emitting side, and the covered mesa structure. The insulating material may include SiO2, but may also include SiN or any other reflective insulating material component. The insulating material may completely cover the space, thereby forming a substantially flat top surface with the surface of the p-contact. In this configuration, the n-contact, except for its top surface, may be buried in a dielectric material.

[0025] In some cases, the top surface of the n-contact is flush with the surface of the p-contact. In other cases, the top surfaces of the n-contact and p-contact form a flat surface, wherein insulating material is disposed in the space between the n-contact facing away from the main emitter side and the covered mesa structure. This simplifies subsequent device processing and placement on contact pads, such as on PCBs, chips, CMOS or integrated circuits, ICs, etc. Further processing, such as depositing conductive traces on such surfaces, can be simplified. In some other cases, the top surfaces of the p-contact and n-contact may extend beyond the top surface of the insulating material. In other words, the top surfaces of the p-contact and n-contact may extend above the surface of the insulating material.

[0026] Several other aspects involve constructing the emitter side of µLEDs and optoelectronic devices. In some aspects, the main emitter side is roughened to form an uneven surface, thereby increasing light coupling. In other aspects, the material of the main emitter side is constructed, for example, to form a µ-lens opposite the active layer. This µ-lens can also be applied in subsequent processing steps and includes materials different from the adjacent semiconductor materials of the device. Possible materials include, but are not limited to, phosphides similar to those used for layer stacking, as well as GaP, etc. In some other aspects, the optoelectronic device may include photonic structures on the main emitter side, thereby forming an optical bandgap. The photonic structures include periodically constructed surfaces. As another alternative, nano-coupling structures are applied to the n-doped side away from the contact.

[0027] Some aspects involve an array having multiple optoelectronic devices according to the proposed principles. The multiple optoelectronic devices may include a common layer on a main emitting side. They may also include a common contact plane and multiple individual contacts. The individual contacts are arranged on the surface side of the array facing away from the main emitting side. The array also includes an IC wafer having multiple contacts located opposite the common contact plane and multiple contacts.

[0028] Several other aspects relate to methods for processing optoelectronic devices. Although the proposed methods are applied here to specific material systems, general principles can also be applied to optoelectronic devices whose layer stacks are based on nitride material systems. This method proposes providing a growth substrate. The growth substrate may include one or more buffer layers of various materials and / or doping concentrations. The buffer layers are used to match the crystal structure for subsequent epitaxial steps, but should also provide a flat and defect-free surface. Furthermore, in some cases, the buffer layer may act as a sacrificial layer to re-bond the processed layer stack, thereby obtaining a pathway to the main emitting surface. In this respect, the buffer layer may also not be completely removed but instead provided with coupling structures, etc., and thus remain on the device.

[0029] In subsequent processing steps, a layer stack based on a phosphide material system is epitaxially deposited. The layer stack comprises multiple differently doped layers, forming p-doped and n-doped sides, with an active layer in between. The p-doped and n-doped sides can include various layers of different materials and dopant concentrations. Each of these layers serves a different purpose. Typical materials include doped or undoped AlInP as a barrier material, and n-doped InGaAlP layers for current diffusion and other purposes. The p-doped GaP layer can function as a current diffuser and inject current into the active layer.

[0030] In some aspects, the active layer can comprise a multi-quantum-well structure in which InGaAlP with varying Al contents is alternated to form a barrier layer and a quantum-well layer, respectively. The active layer is deposited periodically by varying, for example, the concentration of an Al precursor. In some aspects, two undoped cladding layers are deposited on either side of the active layer. The cladding layers prevent dopant from diffusing into the active layer from the p-doped or n-doped side. The cladding layers can have a thickness of several hundred nm or even less and comprise an InGaAlP material similar to the active layer but with a different Al content, thus also enabling carrier injection into the active layer.

[0031] A hard mask material, such as Al₂O₃, is deposited on the surface of the p-doped side using atomic layer deposition or a similar method, and then configured to expose portions of its p-side. A mesa etching process is then performed from the p-doped side to etch the exposed portions, thereby exposing the sidewalls of the layer stack material. Mesa etching is performed to expose at least the active layer and the sidewalls of the p-doped side, and to expose the surface of the n-doped or undoped layer on the n-side, said surface extending laterally beyond the sidewalls of the mesa structure of the layer stack.

[0032] In some respects, mesa etching is performed in a single step, but several steps can be used, particularly annealing or cleaning the surface of the active layer to reduce non-radiative centers and dangling bonds. In some respects, the hard mask layer is partially under-etched for this purpose. Therefore, the hard mask can include a size larger than the top surface size of the p-doped layer. Depending on the etching parameters and desired design, the etching process can stop directly after the final portion of the active layer (i.e., the final barrier layer or quantum well layer) or penetrate deeper into the cladding layer or even the n-doped side. The optimal depth is a trade-off between the grain boundaries resulting from changes in the regrowth crystal angle and the steepness of the sidewalls.

[0033] After removing the material from the hard mask, a dielectric layer is deposited on the sidewall regions of the p-doped layer and optionally on a portion of the top surface of the p-doped side. In some aspects, this can be done, for example, by depositing a selective region growth (SAG) mask such as SiO2, followed by a photolithography step, and then etching away the exposed portions of the dielectric material to cover only the top of the layer stack. The dielectric layer may include SiO2 or some similar material. The dielectric layer should specifically cover the sidewalls of the layer containing a high concentration of Al (or the high bandgap layer on the doped side). This will reduce or even avoid uncontrolled back-side etching during the shaping of the dielectric layer. Thus, after removing the hard mask, the dielectric layer can form a cap on the layer stack material.

[0034] In a subsequent step, an n-doped layer is regrown on at least a portion of the sidewalls of the active layer and a portion of the surface of the n-doped or undoped layer on the n-doped side.

[0035] For this purpose, an n-doped material with a high Al concentration, such as InGaAlP / InAlP, is regrown to match the upper n-type layer arranged laterally to the exposed sidewalls. The dopant concentration can be gradually increased during the regrowing process. Alternatively or additionally, in some aspects, other layers with a high n-type dopant concentration, such as n-doped GaAs or n-doped GaP, are deposited. The dopant can be, for example, Si or Te. Because the regrowing is n-type rather than p-type as in conventional designs, the regrown material introduces a negative potential at the mesa sidewalls during operation.

[0036] After the regrowth process is completed, p-contacts are provided on the top surface of the p-doped side. For this purpose, the dielectric material on the top surface is removed, and contact material is deposited on the surface. Additionally, n-contacts are provided away from the main emitter side, contacting the n-doped layer, specifically laterally displaced relative to the mesa structure. The n- and p-contact materials can be deposited simultaneously, i.e., if the materials are identical.

[0037] In some aspects of the proposed method, the step of regrowing the n-doped layer includes: regrowing the n-doped layer to cover the sidewalls of the active layer, and optionally at least covering the sidewall portion of the undoped cladding layer on the p-doped side adjacent to the active layer. The material of the regrown layer will electrically contact the n-doped layer. The electrical contact generates a potential near the surface of the active layer, leading to the repulsion of negatively charged carriers, thereby reducing the likelihood of nonradiative recombination.

[0038] In some respects, the n-doped regrown layer includes a first sublayer having the same base material as the n-doped layer. For example, InAlP or InAlGaP materials are suitable here. In other respects, the sublayer is considered a distinct layer, not part of the regrown layer. They can be deposited using additional photolithography steps, but can also be applied after the regrown process is complete. Those sublayers of the regrown layer, or those additionally deposited after the regrown layer, can be n-doped. They are deposited such that their material extends onto the dielectric layer. The thickness of these layers can vary. However, in some cases, the thickness of the regrown layer corresponds to the thickness of the dielectric layer covering the sidewalls.

[0039] In some aspects, the step of regrowing an n-doped layer may include: depositing a layer, particularly based on one of GaP and GaAs, at least partially on the surface of the n-doped or undoped layer on the n-doped side. The thickness, shape, and area coverage of those layers can vary compared to an n-doped layer directly adjacent to the active region. However, an n-contact is then formed on said layer, and thus an electrical contact is formed therewith. The material of the n-contact can be reflective. However, other reflective layers can be deposited while being electrically isolated from one of the p-contacts and the n-contact. Some reflective materials, as indicated, increase the total light emission, thereby increasing the device efficiency.

[0040] In some aspects, after the regeneration process, insulating material is deposited onto the etched regions. The insulating material thus faces away from the emitter side of the layer stack. The insulating material can fill the spaces on the p-doped side and the top surface of the layer stack, respectively, thus forming flat surfaces. In some cases, the insulating material completely fills the spaces and even extends above the top surface. This creates flat portions. The insulating material can then be configured to form recesses within these portions, thus opening up the surface portions on the p-doped and n-doped sides. These recesses are filled with conductive materials that form n-contacts and p-contacts, respectively. The size and shape of these recesses can vary. In some aspects, the recesses for n-contacts can completely surround the sidewalls of the layer stack. Utilizing a potentially reflective material as the n-contact can enhance the brightness of the device.

[0041] In some respects, the deposited material is in contact with the mesa structure, particularly around the mesa structure.

[0042] Several other aspects involve additional processing steps during layer stacking. These steps include removing the growth substrate. In some aspects, a re-bonding process is performed to bond the optoelectronic device to a temporary substrate. The growth substrate can then be reached and removed to expose the emission side. Alternatively, the device can be directly bonded to an IC or another functional wafer using the contact side. After the growth substrate, or at least part thereof, has been re-bonded and removed, various steps are performed to construct the emission side of the device. For example, in some aspects, additional layers are attached to the emission side to match the refractive index between the device and other elements such as µlenses. Because the contacts are formed opposite the emission side, there is no shading or other adverse effects regarding light formation and coupling. Contacts on the other side allow for more space and are not limited by conductivity and insulation.

[0043] In some aspects, a coupling structure is formed on the surface of the emitter side. This is accomplished, for example, by roughening the surface. In other aspects, a buffer layer or other semiconductor layer previously deposited as a buffer layer or sacrificial layer is reused to provide this coupling structure.

[0044] In some other respects, optical elements, such as nanostructures or µlenses, are formed on the emitting side. This is accomplished by etching the corresponding structure. At this point, the optical element is transparent to the light emitted by the device. In some respects, the material of the optical element can include a phosphide system similar to the phosphide system used in layer stacking, but with a higher band gap (i.e., a higher Al content) to become transparent to the generated light. Alternatively, GaAs material can be used to form nanostructures or such µlenses.

[0045] In some other respects, a photonic structure with an optical bandgap is formed on the main emitting side. Similar to before, this can be achieved by constructing the surface of the emitting side or by applying another layer of material (i.e., with an adjusted refractive index) to the emitting side and subsequently forming a periodic structure therein. Attached Figure Description

[0046] Other aspects and implementations based on the proposed principles will become apparent in relation to the various embodiments and examples described in detail with reference to the accompanying drawings, in which:

[0047] Figure 1 A cross-sectional view of a conventional optoelectronic device is shown;

[0048] Figure 2 An exemplary cross-sectional view of an optoelectronic device is shown through some aspects of the proposed principles;

[0049] Figure 3 An embodiment of the arrangement of optoelectronic devices based on some aspects of the proposed principles is shown;

[0050] Figures 4A to 4F The paper illustrates some methodological steps for processing optoelectronic devices based on some aspects of the proposed principles;

[0051] Figure 5A and Figure 5B Other method steps for processing optoelectronic devices based on some aspects of the proposed principles are shown;

[0052] Figure 6 Another methodological step based on some aspects of the proposed principles is shown;

[0053] Figure 7A and Figure 7B Two embodiments of a method for processing optoelectronic devices based on some aspects of the proposed principles are illustrated in cross-sectional views.

[0054] Figure 8 It shows Figure 7A and Figure 7B A top view of the method steps;

[0055] Figure 9A and Figure 9B Another embodiment of the processing optoelectronic device based on various aspects of the proposed principles is shown in sectional and top views.

[0056] Figure 10 and Figure 11 Two embodiments of an optoelectronic device with a process emission side, based on some aspects of the proposed principles, are shown. Detailed Implementation

[0057] The following embodiments and examples disclose various aspects and combinations thereof based on the proposed principles. The embodiments and examples are not always drawn to scale. Similarly, different elements may be shown enlarged or reduced in size to emphasize various aspects. It goes without saying that the aspects of the embodiments and examples shown in the figures can be combined with each other without further embellishment, which does not contradict the principles of the invention. Some aspects illustrate regular structures or forms. It should be noted that in practice, minor differences and deviations from the ideal form may occur, but these will not contradict the spirit of the invention.

[0058] Furthermore, the various figures and aspects are not necessarily shown at the correct dimensions, and the proportions between the elements do not necessarily have to be substantially correct. Some aspects are highlighted by magnification. However, terms such as "above," "above," "below," "below," "larger," and "smaller" are correctly used to refer to the elements in the figures. Therefore, such relationships between elements can be inferred from the figures.

[0059] Figure 1 A cross-sectional view is shown through a conventional optoelectronic device that uses a regeneration process to cover the sidewalls of the mesa etched by the stacked layers to increase quantum efficiency. According to... Figure 1 The optoelectronic device is implemented as a so-called vertical µLED. A vertical µLED is an optoelectronic device that includes electrical contacts on two opposite sides, and in particular, one of the electrical contacts is arranged substantially close to or on the main light emitting side. Figure 1 The µLED 1 comprises a stack of layers with multiple different doped layers, with an active layer 24 in between. More specifically, the µLED according to conventional methods comprises a stack of layers based on a phosphide material system. Phosphide material systems are used to provide lower orange and red optoelectronics. However, as initially noted, phosphide material systems are characterized by their relatively large diffusion length of charge carriers in the range of several micrometers.

[0060] according to Figure 1 The optoelectronic device includes a first n-doped layer stack 21 made of InAlGaP that acts as a functional layer for diffusing injected charge carriers injected through contact ring 60a. A lightly n-doped or undoped indium aluminum phosphide (InAlP) barrier layer 22 is deposited on top of the n-doped layer 21. If doped, layer 22 can actually include a variety of different dopant concentrations to transport charge carriers to the active layer 24. The same applies if layer 22 is undoped.

[0061] The active layer 24 comprises a multi-quantum-well structure having multiple alternating barrier layers and quantum-well layers. Each of those layers comprises a base material system, such as InAlGaP, but with different aluminum concentrations. More specifically, the barrier layers of the multi-quantum-well structure typically comprise a higher aluminum concentration than the individual quantum-well layers, resulting in a larger band gap for the barrier layers. The active layer 24 is encapsulated by two thin cladding layers 23 and 25, respectively. Each of those cladding layers is only tens of nanometers thick. Cladding layers 23 and 25 comprise undoped InAlGaP material and serve to prevent undesirable diffusion of dopants from adjacent functional n-doped layers 22 and p-doped layers 26 into the multi-quantum-well structure, respectively.

[0062] On top of the second cladding layer 25, a p-doped InAlP phosphide barrier layer 26 is deposited. The resulting layer stack is mesa-etched to form multiple sloping sidewalls, particularly those of the cladding layer 25, the multiple quantum well structure 24, and the second cladding layer 23. In a further processing step of the device, material for layers 26, 27, and 28 is deposited in a regrowth process to cover the exposed sidewalls of the multiple quantum well structure and the cladding layers. Thus, the sidewalls are covered with p-doped material. Another current-diffusing layer 50 is deposited on top of layer 28, and metal contacts 61 are disposed on the current-diffusing layer 50. The outer surface of the device is covered by a transparent or opaque dielectric layer 51.

[0063] The devices shown, fabricated using a standard regeneration design, allow for a variety of emitter sizes, but are typically limited to µLEDs with vertical contacts as shown. The sidewalls or sides of the so-called emitter islands, provided by a mesa etching process, therefore include or exhibit potentials that are substantially equal to, for example, the p-contacts and p-doped material of layers 26, 27, and 28.

[0064] As a result, the p-bias potential can at least partially attract electrons with higher mobility than holes in the cladding layer and active layer 24. This attraction leads to the trapping of mobile charge carriers in nonradiative recombination centers, dangling bonds, etc., at the sides induced by the previous mesa etching process. Although some of these defects can be recovered through subsequent growth processes, the defect density is still increased compared to the bulk material of active layer 24. Overall, a positive potential during device operation reduces the overall quantum efficiency.

[0065] To overcome this problem and provide improved quantum efficiency for optoelectronic devices and µLEDs based on phosphide material systems, the inventors proposed a different fabrication method that produces slightly different devices, wherein a negative potential is formed on the sidewalls and mesa sides of the active layer 24 during device operation. Therefore, highly mobile electron charge carriers are repelled by this negative potential, thus forcing them to remain away from the mesa sides and defects caused by the etching process.

[0066] Figure 2 An example of an array of multiple µLEDs already processed on a growth substrate 30 is shown. The growth substrate 30 also includes a buffer layer 31 to provide a flat and efficient surface for subsequent layer stacking and functional layers based on phosphide material systems such as InGaP or InAlGaP. Although this example relates to phosphide systems, it should be noted that the illustrated implementation is not limited thereto. GaAs and AlGaAs share similar characteristics regarding diffusion length and optoelectronic devices based on these materials, thus benefiting from the proposed ideas.

[0067] Each optoelectronic device comprises a stack of layers having a first n-doped functional layer 21, followed by a lightly n-doped or undoped layer 22. In a monolithic implementation, layers 21 and 22 may be common layers as indicated herein. Similar to... Figure 1 The conventional device presented also includes two cladding layers 23 and 25, with an active layer 24 formed as a multiple quantum well structure between them. Two p-doped layers 26 and 27 of different materials, namely InAlP or InAlGaP, are arranged on the second cladding layer 25.

[0068] The layer stack is processed in subsequent steps to form a structure such as Figure 2 The depicted islands are separated from each other. Then, multiple different regeneration processes are used to overgrow the sides of the mesa etched from those stacked layers. More specifically, a first dielectric material 51 extends from the top surface of the doped gallium phosphide (GaP) layer 27 down a portion of the sidewalls to approximately the first cladding layer 25. The dielectric material 51 does not cover the quantum well structure or the n-doped material as in previous or conventional techniques. Instead, a lightly n-doped or undoped material 22′ is regrown on the remaining exposed portions of the sides, particularly on the active layer 24 and the cladding layer 23.

[0069] In this embodiment, the regenerated n-doped layer 22′ also extends slightly onto the exposed lower portion of the cladding layer 25, directly adjacent to the active layer 24. On top of the first regenerated layer 22′, an n-doped gallium phosphide (GaP) contact and current injection layer 28 is regenerated, thereby completely covering the regenerated layer 22′ on the sidewalls of each island, and, as shown, also completely covering the regenerated layer 22′ on the top surface between the islands resulting from the layer stack. The n-doped layer 28 has a higher dopant concentration than layer 22′ and is used to inject current into the adjacent layer stack using a common n-contact material 62.

[0070] The n-doped regrown layer 28 extends slightly on top of the dielectric material 51. The dielectric material 51 comprises silicon dioxide or a similar dielectric material, although the regrown process can be controlled to avoid this growth. An additional insulating material 70 is deposited on the dielectric material 51 and the regrown layers 22' and 28, respectively. Recesses are formed therein and filled with a highly conductive material for contact purposes. A metal or similar material is used to provide individual p-contacts 61 and a common n-contact 62. The devices can then be further processed by removing the buffer layer 31 and the growth substrate 30 to obtain a pathway through the functional layer 21 to the main emitter side. The functional layers 21 and 22 are used to inject charge carriers into the active region 24.

[0071] Optoelectronic devices processed in this way form horizontal µLEDs, with each contact located on the same side and specifically opposite to the main emission direction. Among other things, this provides the benefit that light emitted toward the emission site is not blocked or reflected into the active layer. Therefore, functional layer 21 and any other layers can be constructed accordingly to improve light coupling through the surface. The optoelectronic device shown can be processed separately or as a separate device, and can also be implemented as an embedded component in an integrated module.

[0072] Figure 3 Possible applications are illustrated, where multiple µLEDs are further processed into a common module. Multiple µLEDs 1 are arranged on a single wafer in a similar manner, forming an array structure. The shape, processing, and arrangement follow... Figure 2 The indicated shape, processing, and arrangement. The µLEDs are fully embedded in an insulating material 70. Each µLED comprises a mesa-etched stack of layers, wherein the exposed edge portion of the active layer 24 is covered by a lightly n-doped regenerated layer 22′. The regenerated layer 22′ is electrically connected to a similarly lightly n-doped common layer 22, which is in electrical contact with a material 62 forming a common contact. The contact 62 extends upwards from layer 22 to a level corresponding to the top surface of another separate contact 61. The insulating material 70, contacts 61, and the top surface of 60 form flat surfaces with contact regions at certain locations. This surface is then bonded to a semiconductor wafer 2, which is processed individually and comprises different base materials, such as Si. The semiconductor wafer 2 includes multiple contact regions on its surface, which are then aligned and electrically connected and bonded to contact regions 61 and 62, respectively. This process, known as wafer-to-wafer bonding, is known in the art. The semiconductor wafer 2 includes multiple integrated circuits 2a, which are respectively connected to contacts 61 and 62. Integrated circuit 2a may include, but is not limited to, a driver circuit system for individually supplying current to optoelectronic devices. In this regard, chip 2 may provide all the power supply circuitry as well as controllers, drivers, etc., for individually addressing multiple µLEDs.

[0073] The main emitting side of the functional layer 22 of each device is then further processed, and a layer 31 is arranged on it, providing multiple optical elements 32. The optical elements 32 can provide different functions, including but not limited to guiding the coupled light, supporting light coupling, and providing optical barriers, color filters, or angular orientations. The optical elements can be individually configured for certain optoelectronic devices, or as... Figure 3 The instructions are for multiple such device settings.

[0074] Therefore, the proposed process offers high degrees of freedom in two aspects: the arrangement of individual devices as modules and embedded in a common structure or as independent devices; its contact and control circuitry system; and its coupling structure. In this particular example, the coupling structure is located on the n-doped side and comprises the same or similar material as the regenerated layer 22′ covering the mesa of the active layer 24.

[0075] Figures 4A to 4F Several steps of a method for processing optoelectronic devices, and particularly multiple µLEDs, based on the proposed principles are shown. It should be understood that certain variations and adjustments can be made to the concept, particularly regarding the stacking of various individual layers and the mesa etching process, without departing from the proposed principles. This example is illustrated with respect to phosphide material systems. However, the same principles can be applied to arsenide material systems.

[0076] The layer stack 2 is epitaxially deposited on a growth substrate 38 covered by a buffer layer 31. The growth substrate 30 comprises a GaAs or similar substrate material as a wafer, on which one or more buffer layers 31 are deposited. The buffer layers create a good interface for subsequent processing, having a virtually defect-free surface. Furthermore, the buffer layer 31 may include a sacrificial layer at which the layer stack 2 deposited thereon can be separated.

[0077] The layer stack 2 includes a first n-doped functional layer 21 made of a phosphide material system. The dopant concentration of the functional layer 21 is relatively high and can range, for example, from 5e17 1 / cm³ to 2e19 1 / cm³. The dopant concentration can be varied during the deposition of the functional layer 21. The functional n-doped layer 21 is used for carrier injection and carrier diffusion into subsequent layers.

[0078] A lightly n-doped or undoped InAlP barrier layer is deposited on top of functional layer 21. More specifically, in some cases, the lightly n-doped portion of the InAlP layer is directly adjacent to the undoped InGaAlP cladding layer 23. Similar to the previous functional layer 21, the dopant concentration can vary throughout the deposition process of layer 22, but is typically less than that of functional layer 21. The cladding layer 23 is undoped and is epitaxially deposited on InAlP layer 22, and comprises a thickness of tens of nm.

[0079] Then, the active layer 24 is deposited on the cladding layer 23. The active layer 24 comprises multiple alternating barrier layers and quantum well layers. Although the number of barrier layers and quantum well layers can vary, the number can range between 10 and 24.

[0080] The quantum well layer of active layer 24 is deposited directly adjacent to cladding layer 23, followed by a barrier layer. Both the barrier layer and the quantum well layer are made of indium gallium aluminum phosphide (InGaAlP). However, the aluminum content differs between the barrier layer and each quantum well layer. More specifically, the aluminum concentration in the barrier layer is slightly higher than that in the adjacent quantum well layers. All sublayers of active layer 24 are epitaxially deposited by varying the aluminum content throughout the deposition process. Although the individual layers can be undoped, it has been found that a small dopant concentration in the barrier layer can be beneficial in some cases. Therefore, in some aspects, the barrier layer may include a small n-type or p-type dopant concentration. In other aspects, the aluminum content between the barrier layers can also be varied to change and tune the bandgap within the barrier layer throughout the deposition process of active layer 24.

[0081] Another undoped InGaAlP cladding layer 25 is deposited on top of the final quantum well layer of the active layer 24. Similar to cladding layer 23, the thickness of cladding layer 25 can be in the range of tens of nanometers. On top of cladding layer 25, a lightly p-doped or undoped InAlP barrier layer 26 is deposited, followed by a highly p-doped GaP layer 27. The final layer also serves as a potential contact for holes and a current diffusion layer.

[0082] Various layers of stack 2 are epitaxially deposited using techniques known in the art. Vapor phase or chemical vapor deposition is applied using known techniques, precursors, and growth parameters. In the case of optoelectronic devices based on arsenide material systems, a similar approach is taken using appropriate dopants, thicknesses, and other growth parameters. Dopant concentrations can vary throughout the layers, as well as material compositions as indicated in Figure 4a herein.

[0083] The next processing step involves depositing an aluminum oxide (Al2O3) layer 40 on top of the p-doped gallium aluminum phosphide (GaAlP) layer 27 using, for example, atomic layer deposition (ALD). A dielectric layer acts as a hard mask for subsequent etching processes and is then configured to expose certain areas of the top surface of the p-doped gallium phosphide layer 27. Alternatively, the Al2O3 layer 40 can be made using NbOx, HfOx, or a photoresist. The appropriate material depends on the subsequent etching process.

[0084] Next is Figure 4B A mesa etching process is performed using plasma etching and wet etching techniques to remove material beneath the exposed surface of the p-doped gallium phosphide layer 27. So-called island etching is performed using a larger wafer structure and multiple such hard mask portions 40 arranged on the top surface, in which material is removed from the p-doped indium gallium phosphide layer 27, the barrier layer 26, and the active region 24 with two adjacent cladding layers 25 and 23. This exposes the sidewalls on the respective layer materials. The etching depth can be stopped directly after the final quantum well layer and cladding layer 23 of the active layer 24, or shortly after reaching the first portion of the indium aluminum phosphide barrier layer 22.

[0085] Depending on the etching process, an annealing process or a second etching process can be performed. If a wet etching process is used to perform the first etching process, it can isotropically etch the exposed surface. Etching and subsequent annealing or cleaning processes cause the exposed sides to tilt, such as... Figure 4B As shown. The depth of the entire etching process is a trade-off between the rising grain boundaries and the steepness of the sidewalls caused by variations in the angle of the growth process. For example, certain annealing and cleaning techniques using KOH will result in more stable and nearly vertical angles on the exposed sidewalls.

[0086] Furthermore, depending on the specific process, minor underetching may occur, exposing the bottom surface portion 41 of the hard mask layer 40. The entire process will produce... Figure 4B The truncated pyramidal structures shown range in size from 1 µm or smaller to approximately 15 µm. Therefore, the etched island structures encompass dimensions within the range of diffusion lengths.

[0087] Depending on the deposition and etching processes, the sides of the truncated pyramid can follow a specific crystal orientation, which provides better annealing and cleaning in subsequent processing steps. Furthermore, it has been found that etching along a specific orientation results in fewer dangling bonds and other defects, thereby improving the quantum efficiency of the device. As depicted, the exposed sidewalls 42 extend from the top of layer 27 through the active layer and also extend to a small portion of the indium aluminum phosphide (InAlP) barrier layer 22. However, a portion of the InAlP barrier layer 22 remains intact, thus providing its exposed top surface 22a.

[0088] After the etching process, the hard mask 40 is removed, thus exposing the surface of the top layer 27. A highly selective region growth mask is then deposited using, for example, a SiO2 deposition process, resulting in a SiO2 mask layer 50 covering the top and sidewall surfaces of the islands. Using certain photolithography processes, the mask layer 50 is etched back to cover only portions of the respective islands, and more specifically, the sides of layers 27, 26, and 25, respectively. The thickness of the SiO2 layer is, for example, in the range of 100 nm to 200 nm. The results of this process are... Figure 4D As shown, portions of the sidewalls of side 42a, including the active layer 24, the cladding layer 23, and the n-doped layer portion 22, remain exposed. In other words, the mask 51 extends only to the sidewalls of the cladding layer 25 and terminates shortly before the first quantum well layer of the active layer 24.

[0089] Based on the proposed principle, a regrowth process is then performed starting from a low duration of the doped InGaAlP material layer. This regrowth is a highly selective regional growth that does not extend onto mask 51, but only to the exposed sides and top surface of layer 22a.

[0090] The regeneration process involves a small dopant concentration that matches or exceeds the dopant concentration in layer 22. In some aspects, a very thin layer (i.e., only a few nm) covering the sidewalls of the active layer 24 is initially regenerated with almost no dopant, wherein the dopant concentration is subsequently increased with further regeneration processes. As shown in Figure 4G, the regenerated layer 22′ covers the exposed sidewalls, and specifically covers the lower portion of the cladding layer 25, the active layer 24, and layers 23 and 22. The regenerated material extends on the top surface portion 22a.

[0091] The dopant concentration in the regenerated layer creates a potential barrier, repelling electron carriers from dangling bonds and sidewalls on the mesa of the active layer 24. The thickness of the regenerated layer can be similar to or slightly larger than the thickness of the dielectric layer 51.

[0092] In subsequent steps, a highly n-doped gallium phosphide (GaP) or gallium arsenide (GaAs) layer 28 is then grown on the surface of layer 22′ and below dielectric layer 51. For example... Figure 4F As indicated, certain surface portions of dielectric layer 51 remain exposed. The highly n-doped gallium phosphide (GaP) layer comprises a dopant concentration ranging from 2e18 1 / cm³ to 2e19 1 / cm³, where the dopant can be selected from, for example, Si or Te. The highly doped layer 28 acts as a layer for carrier injection into the subsequent regrown layer 22′ and the n-doped layer 21. A small overhead 28′ covering the lower portion of dielectric layer 51 ensures substantially uniform current injection into the undoped layers 22′ and 21.

[0093] Figures 5A to 5B The next step in the manufacturing process based on the proposed principles is shown. The accompanying figures depict arrays or multiple optoelectronic devices.

[0094] Following the mesa etching and regeneration process, each top surface is covered with an evenly distributed insulating material 70. As shown, the material 70 fills the spaces between the stacked layers of the mesa etching and extends above the top surface of the dielectric material 51 on the top surface of layer 27. The resulting structure is as follows: Figure 5A As shown. After performing subsequent steps, the flat surface of the insulating material 70 provides greater flexibility in wafer-to-wafer bonding. The flat surface is then covered with a photomask layer, and it is structured to form multiple recesses. These recesses are located on the top surface of layer 27 or between the sidewalls etched onto the various mesa of the optoelectronic device. As... Figure 5B As shown, the recesses are etched into the insulating material 70 and through the dielectric layer 51, thereby exposing corresponding portions of the top surfaces of the GaP layers 27 and 28, respectively.

[0095] In this example, the etching process is performed in such a manner that the recess on the top surface of the exposed layer 28 provides slightly sloping sidewalls whose diameter decreases toward layer 28. The recess is then filled with gold or any other conductive material (i.e., metal) to form contacts 61 and 62, respectively. Since gold is a highly reflective material, the sloping sidewalls of the gold contact 62 also act as a reflective barrier, providing light reflection toward the primary emitting surface that serves as the interface between layer 21 and buffer layer 31. Although not shown herein, contacts 61 and 62, as well as the recess, can have different shapes, sizes, and dimensions, respectively.

[0096] The wafer-level devices processed in Figures 4 and 5 are now ready for re-bonding. For this purpose, the top surface of layer 70 is attached to a temporary substrate for re-bonding, thereby removing the growth substrate 30. In this particular embodiment, a portion of the buffer layer 31 remains on the surface of layer 21 to form the emitter side. This surface is roughened to form optical elements 32 or coupling structures, as shown in the region directly opposite the active layer 24 of the respective optoelectronic devices. Alternatively, the buffer layer 31 acts as a sacrificial layer and is completely removed before the exposed surfaces of layer 21 are processed. Figure 6 The device is shown.

[0097] In this respect, the contact arrangement and the processing steps that facilitate contact with 61 and 62 can be achieved through various different combinations. Figure 7A and Figure 7B Two possible options for the arrangement of such contacts 61 and 62 are shown respectively.

[0098] existFigure 7A In the process, small dielectric material portions 70 are deposited, thereby covering the exposed surface portions of dielectric material 51 and layer 28, respectively. Recesses are etched in layers 70 and 51 to expose the top surface portions of layers 27 and 28. These recesses are filled with contact material extending above the top surface of insulating material 70. Therefore, contacts 62 and 61 form various types of stops extending around the top surface, but are not necessarily flat or at the same height. At this point, contacts 62 are constructed in a manner that they are stacked around the corresponding layers of the optoelectronic device. The result is... Figure 8 As shown from a top view, the top surface 61a forms a circular contact, while the common contact 62 provides a relatively large square-shaped area around the optoelectronic device, indicated by the circles (representing islands of stacked layers) and the insulating material 70.

[0099] Figure 7B Another example is shown, in which an insulating layer material 70 is formed on a flat surface extending slightly above the top of the dielectric layer 51 or the individual islands. The insulating layer material 70 is recessed to form circumferential recesses and circular recesses on the top of layer 27. These recesses are filled to form contacts 62 and 61, respectively. When from such... Figure 8 When viewed from the top, the resulting structure is similar to Figure 7A The structure.

[0100] In another embodiment, the recesses etched in the insulating layer 70 extend substantially laterally between two adjacent electronic devices. This structure... Figure 9A The sectional view indicates, and in Figure 9B The corresponding top view is indicated in the diagram. In this particular embodiment, the contact material forming contacts 61 and 62 extends above the top surface of the insulating layer 70. However, with Figure 7A and Figure 7B Compared to the previous embodiment, the total area of ​​the material in the common contact 62 is significantly larger. Furthermore, in this embodiment, the recesses are substantially vertical, unlike the previous embodiment which has sloping sidewalls for contacting the material. Various combinations of these recess structures can be achieved without departing from the proposed principles.

[0101] Figure 10 and Figure 11 Another embodiment of the processing method after the optoelectronic device is bonded and the growth substrate is removed is shown.

[0102] Figure 10The steps in this process are illustrated, wherein the main emitting surface is formed from the top surface of functional layer 21. Microlenses 33, having the same material as or different from functional layer 21, are formed on said top surface of layer 21. In some aspects, the previously deposited material functional layer 21 can be used to construct the surface and shape the microlenses by etching. It is also possible to deposit the functional layer material in this way directly in some corresponding recesses in the buffer layer during the initial deposition process.

[0103] However, other variations in forming such microlenses are available. For example, microlens 33 is processed separately, but using the same material as functional layer 21. In subsequent steps, after aligning the microlenses on the respective emitting surfaces, wafer-to-wafer bonding is facilitated. At this point, the microlens can comprise an area larger than the actual main emitting region on the surface of layer 21, thereby simplifying the alignment process. In addition to... Figure 10 Besides the microlens shown, other optical elements can be fabricated on this separate wafer and attached to the emitting surface of the device. Microlenses, or more generally optical elements, facilitate the alignment of light emission directions and provide further benefits for improving the overall efficiency of the device.

[0104] Figure 11 An alternative is provided in which the coupling structure is formed from a periodic surface, resulting in a photonic crystal. The photonic crystal is similar to a nano-coupling structure and provides optical bandwidth to guide and collimate the emitted light generated in the active layer 24. Similar to previous embodiments, the photonic structure can be processed separately and then bonded to the functional layer 21. However, the functional layer 21 can also be constructed directly. Adjusting the periodicity in the x and / or y directions allows for the modification of the properties of the photonic structure, such as allowing specific collimation or guiding the emitted light in a specific direction.

[0105] The proposed method offers a degree of freedom in selecting the coupling structure, where other semiconductor or dielectric materials can be directly attached to functional layer 27. Similarly, functional layer 21 can be constructed to provide certain functions. Since the contact functional layer 21 occurs from the other side, any optical structure will adversely affect the contact, and vice versa. The materials used as optical elements can be doped or undoped and provide certain optical functions. As shown, photonic crystals, microlenses, etc., can be applied by constructing functional layer 27 or by directly applying other layers or corresponding optical elements. This is possible because the contact is on the back side, which allows easy access to the exposed surface of functional layer 21.

[0106] List of reference numerals

[0107] 1µLED, optoelectronic device

[0108] 2-layer stack

[0109] 2' wafer

[0110] 2a integrated circuit

[0111] 21 Functional Layer

[0112] 22nd floor

[0113] 22a surface

[0114] 22′ Regeneration Layer

[0115] 23 coating layers

[0116] 24 active layers

[0117] 25 coating layers

[0118] 26 barrier layers

[0119] 27th floor

[0120] 28 regeneration layers

[0121] 30 growth substrate

[0122] 31 Buffer Layer

[0123] 32 optical elements

[0124] 33µ lens

[0125] 50 mask layers

[0126] 51 Dielectric Materials

[0127] 61,62 contact

[0128] 62a top surface

[0129] 70 Insulation Material

Claims

1. An optoelectronic device, particularly a µLED, comprising: - A layer stack based on a phosphide material system, the layer stack comprising multiple different doped layers, the multiple different doped layers forming a p-doped side and an n-doped side respectively, with an active layer in between; - Wherein, the layer stack includes a mesa structure that exposes at least the p-doped side and the sidewalls of the active layer; - However, the n-doped or undoped layer on the n-doped side extends in the lateral direction beyond the sidewall of the mesa structure of the layer stack; - A dielectric layer that covers the sidewall region of the p-doped layer and optionally covers a portion of the top surface of the p-doped side; - An n-doped regenerated layer, the n-doped regenerated layer covering at least a portion of the sidewall of the active layer and contacting the n-doped side; - Wherein, the main emitting side of the optoelectronic device is adjacent to the n-doped layer on the n-doped side; - p-contacts on the top surface of the p-doped side; - n-contacts, which are opposite to the main emitter side and contact the n-doped layer, particularly laterally displaced relative to the mesa structure.

2. The device according to claim 1, wherein - The n-doped regenerated layer covers the sidewalls of the active layer, and optionally at least covers the sidewall portion of the undoped coating layer on the p-doped side adjacent to the active layer; and / or - The n-doped regenerated layer covers the portion of the n-doped or undoped layer on the n-doped side that extends in the lateral direction beyond the sidewall of the mesa structure.

3. The device according to any one of the preceding claims, wherein, The mesa structure extends from the top surface of the p-doped side to the active layer, leaving the sidewalls of the n-doped layer on the n-doped side unexposed.

4. The device according to any one of the preceding claims, wherein, The n-doped regeneration layer includes a first sublayer having the same base material as the n-doped layer, particularly InAlP.

5. The device according to any one of the preceding claims, wherein, The n-doped regenerated layer includes a sublayer that extends partially onto the dielectric layer.

6. The device according to any one of the preceding claims further comprises: - An n-doped layer, particularly based on one of GaP and GaAs, on the surface of the n or undoped layer adjacent to at least a portion of the sidewalls of the mesa structure of the stacked layers and the n-doped regenerated layer; or - One or more reflective layers, said one or more reflective layers being disposed on portions of said sidewall, particularly on portions of said dielectric layer.

7. The device according to any one of the preceding claims, wherein, The n-contacts are arranged on the surface portion of the n-doped layer adjacent to and particularly surrounding the mesa structure.

8. The device according to any one of the preceding claims further comprises an insulating material disposed in the space between the n-contact and the covered mesa structure opposite to the main transmitting side, the insulating material forming a substantially flat top surface with the surface of the p-contact.

9. The device according to any one of the preceding claims, wherein, The material in the n-contact extends at least to the same height as the top surface in the p-contact.

10. The device according to any one of the preceding claims, wherein, The main transmitting side includes one of the following: - Coupled structures, especially roughened surfaces; - Optical µ-lens elements, particularly comprising materials based on one of the following: ○ Phosphate material systems; ○ Dielectric materials, especially one of SiO2, Nb2O3 and SiN; - Photonic crystals that form optical band gaps, especially those with periodic structures on their surfaces; - Nano-coupled structure.

11. A method for processing optoelectronic devices, particularly µLed, comprising: - Provide growth substrate; - Epitaxially depositing a layer stack based on a phosphide material system, the layer stack comprising multiple different doped layers, the multiple different doped layers forming a p-doped side and an n-doped side respectively, with an active layer in between; - Provide a constructed hard mask on the exposed surface of the p-doped side; - Mesa etching is performed on the layer stack to expose at least the p-doped side and the sidewalls of the active layer, and to expose the surface of the n-doped or undoped layer on the n-doped side, the surface extending in the lateral direction beyond the sidewalls of the mesa structure of the layer stack; - Deposit a dielectric layer that covers the sidewall region of the p-doped layer and optionally covers a portion of the top surface of the p-doped side; - Regrow an n-doped layer on at least a portion of the sidewall of the active layer and a portion of the surface of the n-doped or undoped layer on the n-doped side; - Provide a p-contact on the top surface of the p-doped side; - Provide an n-contact that is opposite to the main emitter side and contacts the n-doped layer, particularly laterally displaced relative to the mesa structure.

12. The method according to claim 11, wherein, The step of regrowing the n-doped layer includes: regrowing the n-doped layer to cover the sidewall of the active layer, and optionally at least covering the sidewall portion of the undoped coating layer on the p-doped side adjacent to the active layer.

13. The method according to any one of claims 11 to 12, wherein, The n-doped regenerated layer includes a first sublayer having the same base material as the n-doped layer; and / or wherein the n-doped regenerated layer includes a sublayer that extends partially onto the dielectric layer.

14. The method according to any one of claims 11 to 13, wherein, The steps for regrowing the n-doped layer include: - A layer, particularly a layer based on one of GaP and GaAs, is deposited at least partially on the surface of the n-doped or undoped layer on the n-doped side, wherein the n-contact is formed on the layer; or - One or more reflective layers are deposited on portions of the sidewalls, particularly on portions of the dielectric layer.

15. The method according to any one of claims 11 to 14, wherein, The steps to provide n-contact include: - Deposit n-contact material adjacent to, and particularly surrounding, the mesa structure.

16. The method according to any one of claims 11 to 15, further comprising: - An insulating material is deposited in the space between the n-contact and the covered platform structure away from the main emitting side, wherein, optionally, the insulating material forms a substantially flat top surface with the surface of the p-contact.

17. The method according to any one of claims 11 to 16, wherein, The steps to provide n-contact include: - Deposit an insulating material on the surface of the n-doped side; - A recess is formed in the insulating material to expose a portion of the surface on the n-doped side; - Deposit conductive material in the recess to form the n-contact.

18. The method according to any one of claims 11 to 17, further comprising: - Re-attach the optoelectronic device to a second substrate, particularly a temporary substrate, an integrated circuit wafer, and a CMOS wafer; - Remove the growth substrate to expose the emission side; - On the main launching side, particularly the launching side exposed by construction, at least one of the following is provided: ○ Coupled structures, especially roughened surfaces; ○ Optical µ-lens elements, particularly comprising materials based on one of the following: ■ Phosphate material systems; ■ Dielectric material systems, especially one of SiO2, Nb2O3 and SiN; ○ Photonic crystals that form optical band gaps, especially those with periodic structures on their surfaces; ○ Nano-coupled structure.

19. An array having a plurality of optoelectronic devices according to any one of claims 1 to 10, wherein, A common contact plane and multiple individual contacts are arranged on the surface side of the array opposite to the main emitting side.

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