Power semiconductor I-V curve test circuit with adjustable pulse width
By employing segmented conduction timing control of semiconductor switches and auxiliary current-stabilizing branches, microsecond-level adjustable pulse width power semiconductor IV curve testing was achieved. This resolved the contradiction between cost and accuracy in existing technologies, reduced measurement errors caused by device self-heating effects, and is suitable for high-current, high-power testing scenarios.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-17
- Publication Date
- 2026-03-31
AI Technical Summary
Existing power semiconductor IV curve testing technologies present a trade-off between cost and accuracy. High-cost SMU solutions are difficult to popularize, while low-cost relay pulse solutions suffer from measurement errors caused by device self-heating due to excessively long pulse widths, making it difficult to meet high-precision requirements.
An adjustable pulse width power semiconductor IV curve test circuit is adopted. By combining a semiconductor switch with an auxiliary current stabilization branch and controlling the segmented conduction timing, microsecond-level adjustable pulse testing is achieved. Combined with an external constant current source and a general-purpose acquisition unit, it replaces the expensive high-precision source measurement unit.
It significantly reduces measurement errors caused by device self-heating, improves the authenticity and accuracy of testing, reduces system costs, is suitable for high current and high power testing scenarios, and has high repeatability and automation.
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Figure CN121763034A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor device performance testing technology, and in particular to an adjustable pulse width power semiconductor IV curve testing circuit. Background Technology
[0002] Power semiconductor devices (such as IGBTs and power MOSFETs) are core actuators in power electronic conversion systems. Their static electrical characteristics, especially the current-voltage (IV) characteristic curves, are crucial for evaluating their conduction performance, rated current capability, parasitic parameters, and thermal stability. Accurately obtaining the IV characteristics of devices under different current conditions is of great significance for device selection, circuit design optimization, reliability assessment, and failure analysis. Currently, there are two main technical solutions:
[0003] Existing common static testing methods for power semiconductor IV curves employ high-precision source measurement units (SMUs). These devices can provide high-precision, programmable current or voltage excitation and simultaneously perform high-precision voltage or current measurements to directly plot IV curves. Although SMUs offer high testing accuracy and functional integration, their purchase cost is extremely high, operation is complex, and the cost and size increase further in high-current testing scenarios, making it difficult to widely adopt them in production line testing or engineering field applications.
[0004] Another common static testing method for power semiconductor IV curves uses a low-cost test circuit based on the pulse current method. The typical approach involves using a mechanical relay to switch and apply a current pulse generated by an external constant current source to the two ends of the device under test (DUT), then measuring the voltage drop through a data acquisition card. While this method reduces costs to some extent, it is limited by the inherent operating time of the mechanical relay (typically in the millisecond range), resulting in a relatively long current pulse width. When testing high-current power devices, this long on-time causes significant self-heating of the device chip, leading to changes in parameters such as on-resistance and introducing non-negligible measurement errors. This affects the IV curve, especially the accuracy and comparability of transient or high-current point data.
[0005] In summary, existing IV curve testing technologies face a significant contradiction between cost and accuracy: the high cost of SMU solutions limits their widespread application; while low-cost relay pulse solutions, due to their excessively long pulse widths, cannot avoid measurement deviations caused by device self-heating, making them unsuitable for applications requiring high measurement accuracy and repeatability. Therefore, this application proposes an adjustable pulse width power semiconductor IV curve testing circuit. Summary of the Invention
[0006] The purpose of this invention is to address the prominent contradiction between cost and accuracy in existing IV curve testing technologies, and to propose an adjustable pulse width power semiconductor IV curve testing circuit.
[0007] The technical solution of this invention: A power semiconductor IV curve testing circuit with adjustable pulse width, comprising:
[0008] The control unit is used to generate and output three drive signals with preset timing logic;
[0009] The main circuit power switch has its control terminal connected to the first drive channel of the control unit, and is used to turn on or off according to the first drive signal to control the on / off state of the main circuit.
[0010] The device under test (DUT) branch is connected in series with the main circuit power switch and includes a port for connecting the DUT and a second drive channel interface connected to the gate of the DUT. The second drive channel interface is connected to the second drive channel of the control unit and is used to control the DUT to turn on and off according to the second drive signal.
[0011] An auxiliary current stabilizing branch is connected in parallel across the two ends of the device under test branch, and its control terminal is connected to the third drive channel of the control unit for turning on or off according to the third drive signal; the auxiliary current stabilizing branch is used to turn on before the device under test branch at the beginning of the measurement, to provide a current output path for the external current source and to make its output current stabilize.
[0012] The acquisition unit is connected to both ends of the branch of the device under test and is used to acquire the voltage signal at both ends of the device under test during the conduction period.
[0013] The control unit outputs drive signals in the following sequence: first, it outputs a first drive signal to turn on the main circuit power switch, and simultaneously outputs a third drive signal to turn on the auxiliary current stabilization branch for a first preset time so that the output current of the external current source reaches stability; at the end of the first preset time, it turns off the third drive signal, and simultaneously or subsequently outputs a second drive signal to turn on the device under test for a second preset time; during the second preset time, the acquisition unit acquires the voltage across the device under test.
[0014] Optionally, the main circuit power switch and / or the current stabilizing device in the auxiliary current stabilizing branch are semiconductor switching devices, including IGBTs or power MOSFETs.
[0015] Optionally, the main circuit power switch is composed of multiple semiconductor switching devices connected in parallel.
[0016] Optionally, the pulse width of the first driving signal is adjustable, and the sum of the first preset time and the second preset time is less than or equal to the high-level pulse width of the first driving signal.
[0017] Optionally, the high-level pulse width of the first driving signal is adjustable in the range of microseconds to milliseconds.
[0018] Optionally, the first preset time is greater than or equal to the time required for the output current of the external current source to reach a stable state.
[0019] Optionally, the second preset time is greater than or equal to the time required for the acquisition unit to acquire a stable voltage signal.
[0020] Optionally, the control unit is a microcontroller or a programmable logic device, which is connected to a host computer via a communication interface to receive pulse width and timing parameter instructions from the host computer.
[0021] Optionally, the acquisition unit is a differential input data acquisition card, and its sampling trigger signal is synchronized with the second drive signal output by the control unit.
[0022] Optionally, it also includes a host computer that is communicatively connected to the control unit and the acquisition unit. The host computer is used to configure test parameters, control the output current value of the external current source, and receive and process the voltage data uploaded by the acquisition unit to generate the IV characteristic curve of the device under test.
[0023] Compared with the prior art, this application includes at least one of the following beneficial technical effects:
[0024] By employing semiconductor switches and programmable short pulse (microsecond-level) control, the power-on time of the device under test is greatly shortened, effectively suppressing the changes in conduction parameters caused by device self-heating, and improving the authenticity and accuracy of IV characteristic testing.
[0025] By using a combination of an external constant current source and a general-purpose acquisition unit, the expensive high-precision source measurement unit (SMU) is replaced, which significantly reduces the hardware cost of the system while ensuring test performance. It is especially suitable for high-current and high-power test scenarios.
[0026] Semiconductor switches have much faster turn-on / turn-off times than mechanical relays (milliseconds), supporting shorter and more precise current pulses. This shortens the test cycle and eliminates timing fluctuations caused by mechanical movements, significantly improving test repeatability and reliability.
[0027] By adding an auxiliary current-stabilizing branch and segmented conduction timing, the current source can reach a stable output state in the auxiliary branch before being connected to the device under test, eliminating the contamination of the measurement point by the current rising edge impact and ensuring the purity of the steady-state measurement point.
[0028] This invention achieves microsecond-level adjustable pulse width current pulse testing by using segmented conduction timing control that combines semiconductor switches with auxiliary current stabilization branches. While significantly reducing measurement errors caused by device self-heating, it completes high-power IV characteristic testing at a cost far lower than that of high-precision source meters. It also has the comprehensive advantages of fast testing speed, high repeatability, strong resistance to transient interference, and high degree of automation throughout the process. Attached Figure Description
[0029] Figure 1 Schematic diagram of an adjustable pulse width power semiconductor IV curve test circuit;
[0030] Figure 2 Timing schematic diagram of an adjustable pulse width power semiconductor IV curve test circuit;
[0031] Figure 3 A flowchart illustrating a specific embodiment of an adjustable pulse width power semiconductor IV curve testing circuit. Detailed Implementation
[0032] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.
[0033] Example 1: As Figure 1 As shown in the figure, an adjustable pulse width power semiconductor IV curve test circuit provided by this invention mainly includes a control unit, a main circuit power switch S1, a device under test (DUT) branch, an auxiliary current stabilization branch, and a data acquisition unit. The main circuit power switch S1, the DUT branch, and the auxiliary current stabilization branch together constitute the main current path. The DUT branch and the auxiliary current stabilization branch are connected in parallel, and then connected in series with the main circuit power switch S1 to an external constant current source.
[0034] In this embodiment, the control unit uses a microcontroller (such as the STM32 series) to receive instructions from the host computer and generate three drive signals with precise timing. These three signals are output through drive channel 1, drive channel 2, and drive channel 3 respectively. The main circuit power switch S1 uses three parallel IGBT modules (such as FF450R12ME4) to carry a large test current, and its gate is connected to drive channel 1 through a dedicated gate drive circuit. The gate of the device under test (DUT, such as an IGBT or power MOSFET) is connected to drive channel 2 through another gate drive circuit. The current stabilizing device in the auxiliary current stabilizing branch is also an IGBT, and its gate is connected to drive channel 3 through a gate drive circuit. The acquisition unit uses an NI data acquisition card (such as NI-9220) with differential input and high common-mode rejection. Its positive and negative input terminals are connected to the collector (or drain) and emitter (or source) of the device under test (DUT) respectively, and its sampling trigger port is connected to the control unit to achieve synchronous triggering.
[0035] Figure 2 The core operating timing of the circuit of this invention is demonstrated. According to a preset program, the control unit first outputs a high-level signal with a pulse width of T on drive channel 1. This signal represents the total time window of the entire test current pulse. Within this window, the control unit executes a segmented conduction strategy:
[0036] Auxiliary current stabilization phase (duration T_pre): During the T_pre time period, drive channel 1 and drive channel 3 are simultaneously at a high level. At this time, both the main circuit switch S1 and the auxiliary branch current stabilization device S3 are turned on. An external constant current source (e.g., a programmable DC power supply) establishes and outputs a preset constant current in the auxiliary branch. The duration of T_pre must be longer than the time required for the external constant current source to rise from zero to the preset value and reach stability; in this embodiment, it is typically set to several hundred microseconds.
[0037] During the device under test (DUT) testing phase (duration T_on): At the end of T_pre, drive channel 3 immediately goes low, turning off the auxiliary branch. Simultaneously (or after a very short dead time), drive channel 2 goes high for a duration of T_on, turning on the DUT. Since the main circuit switch S1 remains on throughout the entire T cycle, the DUT turns on while the auxiliary branch turns off, causing the stabilized test current to instantly switch from the auxiliary branch to both ends of the DUT.
[0038] Data Acquisition Phase: During the T_on time period, a stable test current flows through the device under test (DUT) and reaches a steady state. Simultaneously, the control unit sends a synchronization trigger signal to the acquisition unit when drive channel 2 goes high. Within the T_on window, the acquisition unit differentially acquires and records the voltage across the DUT at a high sampling rate. The duration of T_on should ensure that the acquisition unit can acquire a sufficient number of stable voltage data points, typically tens to hundreds of microseconds.
[0039] Figure 3 The complete automated testing process is further illustrated in flowchart form. At the start of the test, the host computer (running a LabVIEW or Python-based control program) sends test parameters to the control unit (microcontroller), including the target test current value, total pulse width T, pre-stabilization time T_pre, test time T_on, etc., and initiates one measurement cycle. The control unit then... Figure 2 The timing sequence is executed, and simultaneously, the host computer controls the external constant current source to output the corresponding current value. The acquisition unit uploads the measured voltage data to the host computer. The host computer matches and records the previously set current value with the acquired voltage value.
[0040] After measuring a current point, the host computer automatically adjusts the output current of the external constant current source to the next preset point, repeating the above measurement cycle. This cycle continues until all preset current test points have been covered. Finally, the host computer processes and fits all current-voltage data points to plot the complete IV characteristic curve of the power semiconductor device under test.
[0041] In summary, this invention achieves precise control with microsecond-level adjustable pulse widths by using semiconductor switches (IGBTs) instead of mechanical relays as the loop switching element. The innovative introduction of an auxiliary current-stabilizing branch and a segmented conduction timing strategy ensures that the test current is fully stable before being applied to the device under test, effectively avoiding interference from transient surges during current build-up. Simultaneously, the extremely short test pulse width (T_on) minimizes measurement errors caused by device self-heating effects. The entire system is coordinated and controlled by a host computer, achieving full automation from parameter setting, timing control, data acquisition to curve generation, significantly reducing system costs while ensuring high accuracy and repeatability.
[0042] Example 2: The purpose of this invention is primarily to address the measurement error problems commonly found in existing IV curve testing technologies, such as high cost or device self-heating due to long measurement pulse times. Through technological innovation in pulse generation and loop switching methods, combined with improvements to the basic principles of conventional pulse IV curve testing, an IV curve testing method based on precise segmented driving of semiconductor switches and an auxiliary current-stabilizing branch is proposed. This patent introduces programmable total pulse width and segmented conduction in the connection and timing control of the circuit under test. By setting an auxiliary branch before the power switch, the external constant current source achieves stable output before switching to both sides of the DUT, thereby reducing the impact of device temperature rise caused by pulse time on the measurement results and improving the accuracy and repeatability of transient measurements. Compared with traditional switching methods based on mechanical relays, this invention uses semiconductor switches and dedicated gate drivers to achieve microsecond-level pulse adjustability, fast and reliable on / off switching, and can obtain IV point data with shorter pulse widths.
[0043] The IV curve testing method proposed in this invention is applicable to all single-transistor power devices (such as IGBTs and power MOSFETs). At the same time, this method uses a data acquisition unit and a constant current source controlled by a host computer to work together to achieve automated point scanning, synchronous data acquisition and post-processing, thereby meeting various application needs such as device selection, reliability analysis and engineering verification.
[0044] The schematic diagram of the power semiconductor IV curve testing circuit with adjustable current pulse width proposed in this invention patent is shown below. Figure 1 As shown. The principle of IV curve testing is based on Ohm's law. By measuring the voltage response of a semiconductor device under different electrical pulses, a current-voltage characteristic curve is plotted. The specific circuit timing diagram is shown below. Figure 2 ,in Figure 2 The variable N in the equation must be at least greater than the time it takes for the current source to reach a stable current output.
[0045] The testing device of this invention employs a control unit and a host computer program working in concert to send a controllable total pulse duration and determine the output timing of each drive signal. The control unit provides at least three digital outputs for connection to the three drive channels of the drive board, wherein:
[0046] Drive channel 1 provides the gate drive signal to the main circuit power switch S1; S1 is an IGBT module. Figure 2 The high-level time T of the total pulse S1 is an adjustable variable, and it is also the total output current time of the external current source, hence it is an adjustable current pulse width. It should be ensured that... , It must be at least longer than the time it takes for the current source to reach a stable current output.
[0047] Drive channel 2 is used to apply gate drive to the device under test (DUT) in the DUT branch; in the attached Figure 1 The symbol S2 is used to represent the on / off state of the DUT. The symbol S2 only represents the switching state of the DUT and is not an actual mechanical switch. When S2 is in the "open" state, it means that a corresponding negative voltage is applied to the gate of the DUT to turn it off. When S2 is in the "closed" state, it means that a corresponding driving voltage is applied to the gate of the DUT to turn it on.
[0048] Drive channel 3 is used to apply gate drive to the current stabilizing device in the auxiliary current stabilizing branch; in the auxiliary current stabilizing branch Figure 1 The symbol S3 is used to indicate the switching state of the current stabilizing device in the auxiliary branch. The symbol S3 only indicates the on / off state of the current stabilizing device and is not an actual mechanical switch. When S3 is in the "open" state, it means that a corresponding negative voltage is applied to the gate of the current stabilizing device to turn it on. When S3 is in the "closed" state, it means that a corresponding driving voltage is applied to the gate of the current stabilizing device to turn it on.
[0049] Furthermore, the working process of the device is as follows:
[0050] After the host computer sends the measurement parameters to the control unit and triggers the measurement, the control unit first outputs a duration of [value missing] on drive channel 1. A high-level signal is sent to turn on the main circuit power switch S1; simultaneously, drive channel 3 is set to a high level for a duration of [duration missing]. This turns on the current stabilizing device in the auxiliary current stabilizing branch; in this Within the time window, the external current source controlled by the host computer is turned on and reaches the preset stable current output value in the auxiliary branch circuit.
[0051] As attached Figure 2 As shown above, in the above At the end of the time window, drive channel 3 switches from high level to off (a negative voltage is applied to the gate); subsequently, drive channel 2 is set to high level by the control unit for a duration of [duration missing]. This allows a driving voltage to be applied to the DUT to turn it on; thus, the stable current that was originally in the auxiliary current-stabilizing branch can be switched to the two ends of the DUT instantly.
[0052] Within the time window when the DUT turns on and reaches a steady state Inside, the host computer controls the acquisition unit to synchronously acquire and record the voltage across the DUT, thereby obtaining the corresponding voltage measurement value under a given current condition.
[0053] By repeating the above process and having the host computer adjust the output current value of the external current source sequentially to cover the operating current range of the DUT, the voltage values corresponding to the different current points can be obtained, and then the complete IV characteristic curve of the device under test can be generated by splicing and processing.
[0054] The following will refer to the appendices in the embodiments of the present invention. Figure 3 The adjustable pulse width power semiconductor IV curve testing circuit in the embodiments of the present invention is clearly and completely described. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present invention.
[0055] Similar to conventional IV curve testing devices, based on Ohm's law, by applying a corresponding current pulse to the device under test and measuring the corresponding voltage across the device, the current-voltage curve of the device can be obtained.
[0056] To address the negative impacts of high cost or long relay switching time in existing IV curve testing devices, this invention innovatively improves the conventional IV curve testing circuit. This invention uses three parallel IGBT modules (to increase the testable current) as the main circuit switch S1, adds an auxiliary branch to help stabilize the current source, and uses a host computer to instantly switch the stable current to both ends of the device under test. The acquisition unit collects the corresponding voltage values on both sides of the DUT, and finally the host computer processes the current and voltage values to obtain a high-precision current-voltage curve.
[0057] This invention uses three parallel IGBT modules as the main circuit switch S1, which, together with the corresponding gate drive circuit, completes the circuit switching. Compared with the traditional method of using mechanical relays for circuit switching, the switching time is much shorter than that of mechanical switches, enabling current pulse control on the microsecond level or even shorter time scales. Using short pulse measurement can significantly reduce the self-heating effect of the device caused by excessively long on-state time, reduce transient errors, and facilitate highly repeatable IV point measurements.
[0058] In this embodiment of the invention, an IGBT is used as an auxiliary branch device. This auxiliary branch (current stabilization branch) is used to carry the output of an external current source during a dedicated auxiliary phase when the main circuit S1 is conducting, thereby establishing a steady-state current. Specifically, the control unit sets drive channel 3 to a duration of [duration missing] according to a set timing sequence. (In the embodiments of the present invention) When the external current source reaches a stable output level within the time window, the auxiliary current stabilizing device is turned on, and the external current source outputs in the auxiliary circuit and reaches a preset stable value. At the instant the auxiliary phase ends and the auxiliary device is turned off, the control unit sets drive channel 2 to a high level, turning on the DUT, and the stable current is immediately switched to both ends of the DUT. Through this segmented turn-on strategy, the external current source can achieve a stable output in a short time and avoid generating large transient impacts directly on the DUT, thereby reducing the impact of turn-on transients on the measurement results and protecting the device under test.
[0059] This invention employs an NI data acquisition card as the acquisition unit to record the voltage across the DUT. It utilizes a differential input mode and a synchronously triggered sampling method, offering advantages such as high common-mode rejection ratio, configurable sampling rate, and high trigger accuracy. By triggering differential acquisition during the DUT's steady-state conduction, the acquisition device only acquires voltage data during the target's stable period, avoiding contamination of the measured values by switching transients. Simultaneously, a LabVIEW-based host computer program can record and process the acquired parameters, achieving precise synchronization with the timing of the external current source and control unit, and automated point scanning, thereby improving the comparability of IV points and overall testing efficiency.
[0060] This invention employs a microcontroller as the control unit, which provides coordinated pulse timings to each drive channel according to a pre-set code program to ensure steady-state current establishment, smooth switching, and reliable data acquisition. The current operating timing diagram is shown below. Figure 2 The specific timing sequence is as follows: First, the output duration of the microcontroller's PC14 pin is... The high-level signal provides the driver board with the gate drive voltage for the power switch S1, enabling it to operate at a high speed within a certain time frame. The internal circuit remains on, and simultaneously, the microcontroller applies a current-regulating pressure to the gate of the auxiliary current-regulating device via the PA3 pin for a duration of... ( A high-level signal (with a duration longer than the current source's output time to stabilize) activates the auxiliary branch, enabling it to conduct and carry the external current source output. The host computer presets a current value for the external current source to reach and maintain that preset value during the auxiliary branch's conduction phase. Secondly, at the end of this auxiliary phase, pin PA3 switches from high to low to shut down the auxiliary branch; simultaneously, the microcontroller outputs a high level on pin PA1 for a duration of [duration missing]. ( The timing duration should be longer than the time it takes for the NI acquisition card to acquire a stable voltage, driving the DUT to conduct. This causes the current, previously carried and stabilized by the auxiliary branch, to instantaneously switch across the DUT, triggering the NI differential acquisition to record the corresponding voltage value upon DUT conduction. The duration and trigger points of each stage of the above timing sequence can be sent from the host computer to the microcontroller for parameterized and automated testing. The circuit flowchart is as follows: Figure 3 .
[0061] In summary, this invention utilizes a combination of semiconductor switching and segmented conduction timing techniques. By setting up an auxiliary current-stabilizing branch before the main circuit and employing precise programmable pulse timing control and a high-precision acquisition unit, it achieves IV curve testing of power semiconductor devices under controllable pulse width conditions. This method significantly reduces measurement errors caused by device self-heating due to long relay pulse durations, and also provides an alternative to high-cost source meter testing. Furthermore, it improves measurement repeatability and automation, is suitable for IV characteristic characterization of single-transistor power devices (such as IGBTs and power MOSFETs), and provides a feasible testing method for device selection and reliability assessment in the fields of new energy vehicles and power electronics.
[0062] The above specific embodiments are merely several optional embodiments of the present invention. Based on the technical solutions of the present invention and the relevant teachings of the above embodiments, those skilled in the art can make various alternative improvements and combinations to the above specific embodiments.
Claims
1. A power semiconductor IV curve testing circuit with adjustable pulse width, characterized in that, include: The control unit is used to generate and output three drive signals with preset timing logic; The main circuit power switch has its control terminal connected to the first drive channel of the control unit, and is used to turn on or off according to the first drive signal. The device under test (DUT) branch is connected in series with the main circuit power switch and includes a port for connecting the DUT and a second drive channel interface connected to the gate of the DUT. The second drive channel interface is connected to the second drive channel of the control unit. An auxiliary current-stabilizing branch is connected in parallel to both ends of the branch of the device under test, and its control terminal is connected to the third drive channel of the control unit for turning on or off according to the third drive signal. The acquisition unit is connected to both ends of the branch of the device under test and is used to acquire the voltage signal at both ends of the device under test during the conduction period. The control unit outputs drive signals in the following sequence: first, it outputs a first drive signal to turn on the main circuit power switch, and at the same time, it outputs a third drive signal to turn on the auxiliary current stabilization branch for a first preset time; at the end of the first preset time, it turns off the third drive signal, and at the same time or subsequently outputs a second drive signal to turn on the device under test for a second preset time. During the second preset time period, the acquisition unit acquires the voltage across the device under test.
2. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The main circuit power switch and / or the current stabilizing device in the auxiliary current stabilizing branch are semiconductor switching devices, including IGBTs or power MOSFETs.
3. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The main circuit power switch is composed of multiple semiconductor switching devices connected in parallel.
4. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The pulse width of the first driving signal is adjustable, and the sum of the first preset time and the second preset time is less than or equal to the high-level pulse width of the first driving signal.
5. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The high-level pulse width of the first driving signal is adjustable in the range of microseconds to milliseconds.
6. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The first preset time is greater than or equal to the time required for the output current of the external current source to reach a stable state.
7. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The second preset time is greater than or equal to the time required for the acquisition unit to acquire a stable voltage signal.
8. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The control unit is a microcontroller or a programmable logic device, which is connected to a host computer through a communication interface to receive pulse width and timing parameter instructions from the host computer.
9. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, The acquisition unit is a differential input data acquisition card, and its sampling trigger signal is synchronized with the second drive signal output by the control unit.
10. The adjustable pulse width power semiconductor IV curve testing circuit according to claim 1, characterized in that, It also includes a host computer that is communicatively connected to the control unit and the acquisition unit. The host computer is used to configure test parameters, control the output current value of the external current source, and receive and process the voltage data uploaded by the acquisition unit to generate the IV characteristic curve of the device under test.