Metal package capable of simultaneously improving heat dissipation capability of chip and gain of terahertz on-chip backfire antenna

Abstract

The invention discloses a metal package capable of simultaneously improving the heat dissipation capability of a chip and the gain of a back-fire antenna on a terahertz chip, and the metal package comprises a top dielectric layer, a first metal layer, a second metal layer, a bottom dielectric layer and a third metal layer which are sequentially stacked from top to bottom, four bent transmission lines adopting 0-degree / 0-degree / 180-degree / 180-degree phase excitation are integrated; the second metal layer is a reflecting layer, and four strip-shaped gaps corresponding to the feed transmission lines are etched in the second metal layer; the third metal layer is a guide layer and comprises a metal plane and ten metal columns extending downwards. Through the multi-layer metal packaging structure, on the premise that the aperture of the chip is not increased, the gain and the radiation efficiency of the antenna are effectively improved, the working temperature of the chip is reduced, and the antenna is suitable for an integrated on-chip system of a terahertz frequency band.

Description

Technical Field

[0001] This invention pertains to microwave and millimeter-wave communication, specifically relating to a metal package that simultaneously enhances chip heat dissipation and the gain of a terahertz on-chip backfire antenna. Background Technology

[0002] With increasingly scarce spectrum resources, the terahertz band is gradually being developed and utilized. Among them, chip-integrated terahertz systems have attracted widespread attention due to their advantages of low cost and small size. On-chip antennas, as a key module, can directly transmit or receive electromagnetic signals in space. Therefore, designing high-performance on-chip antennas with enhanced gain has a very wide range of applications.

[0003] Terahertz on-chip antennas have attracted widespread attention due to their extremely low interconnection loss with active circuits and high consistency among multiple channels. Currently, experts, scholars, and engineers in related fields have conducted a series of studies on terahertz on-chip antennas and achieved some corresponding technical results. However, regarding the currently reported designs of terahertz on-chip antennas, the following aspects need improvement: First, the gain and bandwidth of terahertz on-chip antennas are greatly limited by the silicon substrate; second, conventional gain enhancement techniques for on-chip antennas require increasing the aperture, thus increasing manufacturing costs; and third, the heat dissipation capacity of on-chip antennas themselves is limited. Summary of the Invention

[0004] The purpose of this invention is to provide a metal package that simultaneously improves chip heat dissipation and the gain of the terahertz on-chip backfire antenna, aiming to solve problems such as high substrate loss, contradiction between gain improvement and size increase, and excessive chip temperature in existing terahertz on-chip antennas.

[0005] The technical solution for achieving the objective of this invention is: a metal package that simultaneously improves chip heat dissipation and terahertz on-chip backfire antenna gain, comprising, from top to bottom, a top dielectric layer, a first metal layer, a second metal layer, a bottom dielectric layer, and a third metal layer, wherein: The first metal layer is the antenna feed layer, which includes four bent feed transmission lines, namely the first transmission line, the second transmission line, the third transmission line and the fourth transmission line. An excitation with equal amplitude and phase distribution of 0°, 0°, 180° and 180° is applied to the four feed transmission lines. The second metal layer is the reflective layer of the antenna, and four strip-shaped slots are etched on it, namely the first slot, the second slot, the third slot and the fourth slot. The four strip-shaped slots correspond to the bottom of the first transmission line, the second transmission line, the third transmission line and the fourth transmission line in the vertical direction, respectively. The third metal layer is a three-dimensional guiding layer, comprising a metal planar layer and a plurality of metal pillars extending downward from the metal planar layer.

[0006] Furthermore, the third metal layer includes ten metal pillars, namely the first metal pillar, the second metal pillar, the third metal pillar, the fourth metal pillar, the fifth metal pillar, the sixth metal pillar, the seventh metal pillar, the eighth metal pillar, the ninth metal pillar, and the tenth metal pillar. The first to fifth metal pillars are arranged periodically to form the first group, and the sixth to tenth metal pillars are arranged periodically to form the second group. The first and second groups of metal pillars are centrally symmetrically distributed, and the distance between the fifth and sixth metal pillars is greater than the distance between other adjacent metal pillars in the group.

[0007] Furthermore, the top dielectric layer is a silicon dioxide substrate.

[0008] Furthermore, the thickness of the top dielectric layer is 16.15 μm.

[0009] Furthermore, the cross-sectional shape of the metal column is square.

[0010] Furthermore, the bottom dielectric layer is a silicon substrate.

[0011] Furthermore, the thickness of the bottom dielectric layer is 303.75 μm.

[0012] Furthermore, through the synergistic effect of the feed transmission line of the first metal layer, the strip slot of the second metal layer, and the metal planar layer and metal pillar of the third metal layer, a backfire antenna system is formed, with a peak gain of 8.3 dBi and a radiation efficiency of not less than 48%.

[0013] Furthermore, this metal packaging structure can reduce the chip's operating temperature by 23.6°C compared to using a conventional PCB package.

[0014] A terahertz system-on-a-chip integrates a metal package that simultaneously enhances chip heat dissipation and the gain of the terahertz on-chip back-fire antenna.

[0015] Compared with existing technologies, the significant advantages of this invention are: 1) A highly efficient backfire antenna system is formed through the coordinated operation of a three-layer metal structure consisting of a feed layer, a reflective layer, and a three-dimensional directing layer. This structure is compact and easy to integrate with chips. 2) This design does not require additional chip area and can be implemented using standard packaging or microfabrication processes, which helps control manufacturing costs and promotes the widespread application of terahertz on-chip systems. 3) While maintaining a small size, the antenna gain and radiation efficiency are significantly improved through slot coupling and metal pillar directing. Simulations show that its peak gain can reach 8.3 dBi and its efficiency reaches 48%. 4) Compared to a PCB board without heat dissipation capabilities, loading this structure can effectively reduce the chip temperature by 23.6°C. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the hierarchical structure of the antenna in a specific embodiment of the present invention; Figure 2 This is a schematic diagram of the antenna breakdown structure in a specific embodiment of the present invention; Figure 3 This is a simulation result diagram of the antenna S-parameters in a specific embodiment of the present invention; Figure 4 This is a simulation result of the antenna gain curve in a specific embodiment of the present invention; Figure 5 This is a simulation result of the antenna efficiency curve in a specific embodiment of the present invention; Figure 6 The above is a simulation result of the radiation pattern of the antenna in a specific embodiment of the present invention (305 GHz).

[0017] Figure 7 The temperature simulation results are for a PCB-packaged chip in a specific embodiment of the present invention.

[0018] Figure 8 The temperature simulation results are shown for the chip packaged according to the present invention in a specific embodiment of the present invention.

[0019] The diagram shows: top dielectric layer 1, first metal layer 2, second metal layer 3, bottom dielectric layer 4, third metal layer 5; first transmission line 21, second transmission line 22, third transmission line 23, fourth transmission line 24, reflective layer 31, first slot 32, second slot 33, third slot 34, fourth slot 35, metal planar layer 51, first metal pillar 52, second metal pillar 53, third metal pillar 54, fourth metal pillar 55, fifth metal pillar 56, sixth metal pillar 57, seventh metal pillar 58, eighth metal pillar 59, ninth metal pillar 510, and tenth metal pillar 511. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0021] like Figure 1 and Figure 2 As shown, a metal package that simultaneously improves chip heat dissipation capability and terahertz on-chip backfire antenna gain is provided. The backfire antenna and metal package include a top dielectric layer 1, a first metal layer 2, a second metal layer 3, a bottom dielectric layer 4, and a third metal layer 5 arranged sequentially from top to bottom. Among them, the first metal layer 2 is the antenna feed layer, the second metal layer 3 is the antenna reflector layer, and the third metal layer 5 is a three-dimensional structure and is the antenna directing layer.

[0022] The first metal layer 2 includes four bent power transmission lines, namely the first transmission line 21, the second transmission line 22, the third transmission line 23, and the fourth transmission line 24, and the four transmission lines are subjected to an excitation mode with equal amplitude and phase distribution of 0° / 0° / 180° / 180°.

[0023] The first metal layer includes an antenna reflector layer 31, on which four slots are etched, namely the first slot 32, the second slot 33, the third slot 34, and the fourth slot 35. The four slots are strip-shaped structures and are located directly below the first transmission line 21, the second transmission line 22, the third transmission line 23, and the fourth transmission line 24, respectively.

[0024] The third metal layer 5 includes a metal planar layer 51, beneath which extend ten metal pillars: a first metal pillar 52, a second metal pillar 53, a third metal pillar 54, a fourth metal pillar 55, a fifth metal pillar 56, a sixth metal pillar 57, a seventh metal pillar 58, an eighth metal pillar 59, a ninth metal pillar 510, and a tenth metal pillar 511. The first to fifth metal pillars are arranged periodically, as are the sixth to tenth metal pillars, with the two groups of pillars being centrally symmetrical. The cross-sectional shape is square. To avoid obstructing the energy of the on-chip backfire antenna, the fifth and sixth metal pillars maintain a relatively large distance from the other metal pillars.

[0025] The first dielectric layer is a silicon dioxide substrate with a thickness of 16.15 mm. μ m.

[0026] The second dielectric layer is a silicon substrate with a thickness of 303.75 mm. μ m. Example

[0027] To verify the effectiveness of the present invention, the following experimental design was conducted.

[0028] First, a publicly available terahertz on-chip antenna and metal package model were simulated using commercial full-wave simulation software. Figures 3-7 Simulation results are presented. The results show that the antenna's |S11|<-10dB bandwidth is approximately 286–317 GHz; the peak gain is 8.3 dBi, and the efficiency is 56%. The chip size achieving this performance is smaller than most on-chip antennas in the same frequency band. It can be observed that the antenna's xoz and yoz plane radiation patterns are relatively stable and symmetrical at 305 GHz, with low cross-polarization. Furthermore, compared to ordinary PCB packaging, this packaging structure can effectively reduce the chip temperature by 23.6 °C.

[0029] In summary, this invention utilizes a metal packaging structure to enhance the gain of the on-chip antenna and reduce the chip temperature. At the same time, this method does not increase the chip aperture, resulting in a structure with low complexity, small size, and low cost.

[0030] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0031] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A metal package for simultaneously improving the heat dissipation capability of a chip and the gain of a terahertz on-chip backfire antenna, characterized in that, The antenna comprises, from top to bottom, a top dielectric layer (1), a first metal layer (2), a second metal layer (3), a bottom dielectric layer (4) and a third metal layer (5), wherein: The first metal layer (2) is a feed layer of the antenna, comprising four bent feed transmission lines, namely a first transmission line (21), a second transmission line (22), a third transmission line (23) and a fourth transmission line (24), and the four feed transmission lines are excited with equal amplitudes and phase distributions of 0°, 0°, 180° and 180°; The second metal layer (3) is a reflection layer of the antenna, and four strip-shaped slots are etched thereon, namely a first slot (32), a second slot (33), a third slot (34) and a fourth slot (35), and the four strip-shaped slots correspond to the positions below the first transmission line (21), the second transmission line (22), the third transmission line (23) and the fourth transmission line (24) in the vertical direction, respectively; The third metal layer (5) is a three-dimensional directing layer, comprising a metal plane layer (51) and a plurality of metal columns extending downward from the metal plane layer (51).

2. The metal package for simultaneously improving the heat dissipation capability of a chip and the gain of a terahertz on-chip backfire antenna according to claim 1, wherein The third metal layer (5) comprises ten metal columns, namely a first metal column (52), a second metal column (53), a third metal column (54), a fourth metal column (55), a fifth metal column (56), a sixth metal column (57), a seventh metal column (58), an eighth metal column (59), a ninth metal column (510) and a tenth metal column (511). The first metal column (52) to the fifth metal column (56) are periodically arranged to form a first group, the sixth metal column (57) to the tenth metal column (511) are periodically arranged to form a second group, the first group and the second group of metal columns are centrally symmetrically distributed, and the spacing between the fifth metal column (56) and the sixth metal column (57) is greater than the spacing between other adjacent metal columns in the group.

3. The metal package for simultaneously boosting the chip heat dissipation capability and the terahertz on-chip backfire antenna gain of claim 1, wherein, The top dielectric layer (1) is a silicon dioxide substrate.

4. The metal package for simultaneously enhancing the heat dissipation capability of a chip and the gain of a terahertz on-chip backfire antenna according to claim 3, wherein, The thickness of the top dielectric layer (1) is 16.15 μm.

5. The metal package for simultaneously boosting the chip heat dissipation capability and the terahertz on-chip backfire antenna gain of claim 1, wherein, The cross-sectional shape of the metal column is square.

6. The metal package for simultaneously boosting the chip heat dissipation capability and the terahertz on-chip backfire antenna gain of claim 1, wherein, The bottom dielectric layer (4) is a silicon substrate.

7. The metal package for simultaneously boosting the chip heat dissipation capability and the terahertz on-chip backfire antenna gain according to claim 6, wherein, The thickness of the bottom dielectric layer (4) is 303.75 μm.

8. The metal package for simultaneously enhancing the heat dissipation capability of a chip and the gain of a terahertz on-chip backfire antenna according to any one of claims 1-7, wherein, Through the cooperation of the feed transmission lines of the first metal layer (2), the strip-shaped slots of the second metal layer (3) and the metal plane layer (51) and the metal columns of the third metal layer (5), a backfire antenna system is formed, the peak gain of which reaches 8.3 dBi, and the radiation efficiency is not less than 48%.

9. The metal package for simultaneously enhancing the heat dissipation capability of a chip and the gain of a terahertz on-chip backfire antenna according to any one of claims 1-7, wherein, Loading the metal packaging structure can reduce the working temperature of the chip by 23.6℃ compared with using ordinary PCB packaging.

10. A terahertz system-on-a-chip, comprising: The metal packaging integrated with the antenna as claimed in any one of claims 1-9 can simultaneously improve the heat dissipation capacity of the chip and the gain of the terahertz on-chip backfire antenna.

Images