Dynamic resistance test circuit and method for high-switching-frequency power device
By designing a dynamic resistance test circuit for high-switching-frequency power devices, the problems of high measurement accuracy and high cost in high-frequency testing were solved, enabling accurate measurement of the on-resistance of power devices at high frequencies, and reducing design difficulty and cost.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-30
- Publication Date
- 2026-04-07
AI Technical Summary
Existing technologies struggle to accurately measure the on-resistance of power devices at high switching frequencies, especially third-generation semiconductors such as SiC and GaN. Furthermore, high-frequency testing methods are costly and difficult to design.
A dynamic resistance testing circuit for high-switching-frequency power devices was designed, including a power module, a power module, a clamping module, and a control sampling module. Periodic on-resistance measurement is achieved through the switching control of the power module, reducing the pressure on the clamping temperature control circuit. PID control and an adapter module are used to adjust the current, and accurate measurement is achieved by combining the clamping temperature control circuit and the inductor current sampling module.
It enables accurate measurement of on-resistance at high switching frequencies, reduces cost and design complexity, improves measurement accuracy, and is suitable for testing at frequencies of 1MHz or higher.
Smart Images
Figure CN121805685A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electronic circuit technology, and in particular to a dynamic resistance testing circuit and method for high switching frequency power devices. Background Technology
[0002] Power devices in power converters must continuously withstand the combined stress of high voltage, high current, high switching frequency, and high temperature, leading to an increase in internal interface states, accumulation of defects, and degradation of package bonding leads and solder joints, resulting in deterioration of their electrical performance parameters. This is particularly evident in third-generation semiconductor SiC and GaN power devices, affecting electrical performance parameters such as on-resistance (Rdson), threshold voltage, leakage current, and gate charge. Increased on-resistance exacerbates device power consumption and can induce reliability issues such as thermal failure in the power converter system. Therefore, on-resistance degradation has become a core indicator for evaluating the reliability of power devices. Currently, the mainstream method for measuring on-resistance is through clamping circuits, often using diodes or MOSFETs for clamping, with operational amplifiers used as conditioning circuits.
[0003] However, due to the limitations of clamping circuit bandwidth, there are currently few testing methods for switching frequencies of 1MHz or higher. Furthermore, because clamping diodes or clamping MOS have limited switching frequencies, they cannot effectively clamp at high switching frequencies such as 1MHz or higher, ensuring the ADC sampling time. Achieving high switching frequencies requires the use of high-speed devices such as high-speed ADCs and FPGAs, which increases design complexity and cost. Summary of the Invention
[0004] Based on this, the purpose of the present invention is to provide a dynamic resistance testing circuit and method for high switching frequency power devices, which has the advantages of being able to operate at high switching frequencies, having high accuracy, and low cost.
[0005] A dynamic resistance testing circuit for high switching frequency power devices includes: The system comprises a power module, a power module, an adapter module, and a control sampling module; the power module and the power module are connected in series, the adapter module and the power module are connected in parallel, and the control sampling module is connected to the power module. The power module includes a first power device, a second power device, a third power device, a fourth power device, and an inductor; the power module is connected in series with the first and second power devices; the third and fourth power devices are connected in series and then in parallel with the first and second power devices, with all power devices arranged in the same direction; one end of the inductor is connected between the first and second power devices, and the other end of the inductor is connected between the third and fourth power devices; It also includes a clamping module, which includes at least two clamping temperature control circuits; one of the clamping temperature control circuits is connected in parallel with the second power device, and the other clamping temperature control circuit is connected in parallel with the fourth power device.
[0006] The high-switching-frequency power device dynamic resistance test circuit of the present invention can realize the periodic on-resistance measurement of power devices under clamping protection by the clamping temperature control circuit by controlling the switching of the power circuit in the power module, thereby reducing the pressure on the clamping temperature control circuit and enabling testing at higher switching frequencies.
[0007] Furthermore, the drain of the first power device is connected to one end of the power module, the source of the first power device is connected to the drain of the second power device, and the source of the second power device is connected to the other end of the power module; the drain of the third power device is connected to one end of the power module, the drain of the fourth power device is connected to the source of the third power device, and the source of the fourth power device is connected to the other end of the power module; one end of the inductor is connected to the source of the first power device and the drain of the second power device, and the other end of the inductor is connected to the drain of the fourth power device and the source of the third power device.
[0008] Furthermore, it also includes a driving module, which comprises several driving circuits; the controlled sampling module is connected to the gate of each power device through each of the driving circuits.
[0009] Furthermore, it also includes an inductor current sampling module; the control sampling module includes an ADC port; the control sampling module is connected to the second power device, the fourth power device and the inductor through the ADC port; the control sampling module is connected to the inductor through the inductor current sampling module.
[0010] Furthermore, the clamping temperature control circuit is connected to the control sampling module and receives the on-resistance monitoring information of the second power device and the fourth power device obtained by the control sampling module.
[0011] A method for testing the dynamic resistance of high-switching-frequency power devices, used in the aforementioned high-switching-frequency power device dynamic resistance testing circuit, includes the following steps: S1 selects the operating mode of the test circuit and sets the target number of cycles n (n>1) through the timer; the operating mode includes hard-on / hard-off / soft-on / soft-off mode and soft-on / hard-off mode.
[0012] If S2A is in hard-on / soft-on / soft-off working mode, the PWM signals of the first power device and the second power device are complementary, the PWM signals of the third power device and the fourth power device are complementary, and the duty cycle of the third power device and the fourth power device is fixed at 50%. By controlling the duty cycle of the first power device, the current flowing through the inductor is adjusted, so that the test circuit enters the operating cycle. If S2B operates in soft-on / hard-off mode, the PWM signals of the first and second power devices are complementary, and the PWM signals of the third and fourth power devices are complementary. The duty cycles of the first and second power devices are fixed at 50%, and the duty cycles of the third and fourth power devices are fixed at 50%. By controlling the phase offset between the first and fourth power devices, the current flowing through the inductor is adjusted, allowing the test circuit to enter the operating cycle. After n operating cycles, the test circuit exits the operating cycle and saves the control parameters during the operating cycle. Then it enters the sampling cycle. It controls the first power device and the third power device to turn off and controls the second power device and the fourth power device to turn on. After a delay of several nanoseconds after the second power device and the fourth power device are turned on, it collects the on-state voltage drop of the second power device and the fourth power device and the current of the inductor, and calculates the dynamic resistance of the second power device and the fourth power device at high switching frequency. After a few microseconds, the test circuit exits the sampling cycle, reuses the control parameters saved during the running cycle to control the test circuit, re-enters the running cycle, and returns to step S2A or step S2B.
[0013] Furthermore, in step S2A, the operating cycle specifically includes the following steps: S21A turns on the first power device and the fourth power device, and turns off the second power device and the third power device. At this time, the current flows through the first power device, the inductor, the fourth power device, and the adapter module. The third power device is soft-turned off and the fourth power device is hard-turned on. S22A turns on the second and fourth power devices and turns off the first and third power devices. At this time, current flows through the second power device, the inductor, and the fourth power device. The second power device is soft-turned on and the first power device is hard-turned off. S23A turns on the second and third power devices and turns off the first and fourth power devices. At this time, the current flows through the second power device, the inductor, the third power device, and the adapter module. The third power device is soft-turned on and the fourth power device is hard-turned off. S24A turns on the first power device and the third power device, and turns off the second power device and the fourth power device. At this time, the current flows through the first power device, the inductor, and the third power device. The second power device is soft-turned off and the first power device is hard-turned on.
[0014] Furthermore, in step S2B, the operating cycle specifically includes the following steps: S21B turns on the first power device and the fourth power device, and turns off the second power device and the third power device. At this time, the current flows through the fourth power device, the inductor, the first power device, and the adapter module. The third power device is hard turned off and the fourth power device is soft turned on. At this time, the current gradually decreases. S22B turns on the first power device and the fourth power device, and turns off the second power device and the third power device. At this time, the current flows through the first power device, the inductor, the fourth power device, and the adapter module. There are no device switches. At this time, the current reverses and gradually increases. S23B turns on the second power device and the fourth power device, and turns off the first power device and the third power device. At this time, current flows through the second power device, the inductor and the fourth power device. The first power device is hard turned off and the second power device is soft turned on. S24B turns on the second and third power devices and turns off the first and fourth power devices. At this time, the current flows through the second power device, the inductor, the third power device, and the adapter module. The fourth power device is hard turned off and the third power device is soft turned on. At this time, the current gradually decreases. S25B turns on the second and third power devices and turns off the first and fourth power devices. At this time, the current flows through the third power device, the inductor, the second power device, and the adapter module. There are no device switches. At this time, the current reverses and gradually increases. S26B turns on the first power device and the third power device, and turns off the second power device and the fourth power device. At this time, the current flows through the third power device, the inductor, and the first power device. The second power device is hard turned off, and the first power device is soft turned on.
[0015] Furthermore, in steps S2A and S2B, the test circuit uses PID control to adjust the duty cycle of the first power device and the phase offset between the first power device and the fourth power device.
[0016] Furthermore, the control parameters are PID control parameters.
[0017] To better understand and implement this invention, the following detailed description is provided in conjunction with the accompanying drawings. Attached Figure Description
[0018] Figure 1This is a schematic diagram of a dynamic resistance test circuit for high switching frequency power devices according to an embodiment of the present invention. Figure 2 This is a schematic diagram of the current changes in steps S2A and S3 of an embodiment of the present invention; Figure 3 This is a schematic diagram of the current changes in steps S2B and S3 of an embodiment of the present invention. Detailed Implementation
[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0020] In the description of this invention, it should be noted that the terms "vertical direction," "up," "down," and "horizontal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, "first," "second," "third," and "fourth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0021] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to thermally conductive connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or connections through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0022] Example 1 Please see Figure 1 This invention provides a dynamic resistance testing circuit for high switching frequency power devices.
[0023] The dynamic resistance testing circuit for high-switching-frequency power devices according to an embodiment of the present invention includes a power supply module VIN, a power module, an adapter module, and a control sampling module. The power supply module VIN and the power module are connected in series, the adapter module and the power module are connected in parallel, and the control sampling module is connected to the power module.
[0024] In some embodiments, the adapter module includes an EMI filter circuit; further, the EMI filter circuit includes a capacitor. The power module includes a first power device Q1, a second power device Q2, a third power device Q3, a fourth power device Q4, and an inductor L. In this embodiment, each power device is a third-generation semiconductor GaN or SiC power device. The power module vin is connected in series with the first power device Q1 and the second power device Q2; the third power device Q3 and the fourth power device Q4 are connected in series and then in parallel with the first power device Q1 and the second power device Q2, with all power devices arranged in the same direction; one end of the inductor L is connected between the first power device Q1 and the second power device Q2, and the other end of the inductor L is connected between the third power device Q3 and the fourth power device Q4.
[0025] Furthermore, the drain of the first power device Q1 is connected to one end of the power module vin, the source of the first power device Q1 is connected to the drain of the second power device Q2, and the source of the second power device Q2 is connected to the other end of the power module vin; the drain of the third power device Q3 is connected to one end of the power module vin, the drain of the fourth power device Q4 is connected to the source of the third power device Q3, and the source of the fourth power device Q4 is connected to the other end of the power module vin; one end of the inductor L is connected to the source of the first power device Q1 and the drain of the second power device Q2, and the other end of the inductor L is connected to the drain of the fourth power device Q4 and the source of the third power device Q3.
[0026] The control sampling module is connected to the first power device Q1, the second power device Q2, the third power device Q3, and the fourth power device Q4 respectively, and controls each power device. Furthermore, the high switching frequency power device dynamic resistance test circuit of this embodiment of the invention also includes a drive module 10, which includes several drive circuits. The control sampling module is connected to the gate of each power device through each drive circuit, and the control sampling module provides drive voltage to the power devices through the drive circuits to control each power device.
[0027] The high-switching-frequency power device dynamic resistance test circuit of this embodiment further includes a clamping module, which includes at least two clamping temperature control circuits 20. One clamping temperature control circuit 20 is connected in parallel with the second power device Q2, and the other clamping temperature control circuit 20 is connected in parallel with the fourth power device Q4. The clamping module clamps the second power device Q2 and the fourth power device Q4, providing overvoltage, overcurrent, and overheat protection.
[0028] Furthermore, the control sampling module includes an ADC port, which is connected to the second power device Q2, the fourth power device Q4, and the inductor L. This allows the control sampling module to acquire the on-state voltage drop of the second power device Q2 and the fourth power device Q4, and the current in the inductor L, thereby calculating the on-resistance of the second power device Q2 and the fourth power device Q4. Furthermore, the high-switching-frequency power device dynamic resistance test circuit of this embodiment also includes an inductor current sampling module 30, through which the control sampling module is connected to the inductor L.
[0029] In some embodiments, the clamping temperature control circuit 20 is connected to the control sampling module, and the control sampling module transmits the on-resistance monitoring information RDS(on) of the second power device Q2 and the fourth power device Q4, which is collected and calculated, to the clamping temperature control circuit 20; the clamping temperature control circuit 20 performs active clamping control based on the on-resistance monitoring information.
[0030] The present invention also provides a method for testing the dynamic resistance of high-switching-frequency power devices; the method for testing the dynamic resistance of high-switching-frequency power devices in the embodiments of the present invention uses the dynamic resistance testing circuit for high-switching-frequency power devices in the embodiments of the present invention for testing.
[0031] The dynamic resistance testing method for high switching frequency power devices according to embodiments of the present invention includes the following steps: S1: Select the operating mode of the test circuit and set the target number of cycles n (n>1) through the timer; the operating modes include hard-on / hard-off / soft-on / soft-off mode and soft-on / hard-off mode.
[0032] S2A: If it is a hard-on / hard-off or soft-on / soft-off working mode, the PWM signals of the first power device Q1 and the second power device Q2 are complementary, the PWM signals of the third power device Q3 and the fourth power device Q4 are complementary, and the duty cycle of the third power device Q3 and the fourth power device Q4 is fixed at 50%. By controlling the duty cycle of the first power device Q1, the current flowing through the inductor L is adjusted, so that the test circuit enters the operating cycle.
[0033] S2B: In soft-on / hard-off mode, the PWM signals of the first power device Q1 and the second power device Q2 are complementary, and the PWM signals of the third power device Q3 and the fourth power device Q4 are complementary. The duty cycles of the first power device Q1 and the second power device Q2 are fixed at 50%, and the duty cycles of the third power device Q3 and the fourth power device Q4 are fixed at 50%. By controlling the phase shift of the first power device Q1 and the fourth power device Q4, the current flowing through the inductor L is adjusted, so that the test circuit enters the operating cycle.
[0034] In steps S2A and S2B, the test circuit uses PID control to control the duty cycle of the first power device Q1 and the phase offset between the first power device Q1 and the fourth power device Q4.
[0035] Please see Figure 2 Furthermore, in step S2A, the operating cycle specifically includes the following steps: S21A: Turn on the first power device Q1 and the fourth power device Q4, and turn off the second power device Q2 and the third power device Q3. At this time, the current flows through the first power device Q1, the inductor L, the fourth power device Q4, and the adapter module. The third power device Q3 is soft-turned off and the fourth power device Q4 is hard-turned on. S22A: Turns on the second power device Q2 and the fourth power device Q4, and turns off the first power device Q1 and the third power device Q3. At this time, the current flows through the second power device Q2, the inductor L, and the fourth power device Q4. The second power device Q2 is soft-turned on and the first power device Q1 is hard-turned off. S23A: Turn on the second power device Q2 and the third power device Q3, and turn off the first power device Q1 and the fourth power device Q4. At this time, the current flows through the second power device Q2, the inductor L, the third power device Q3, and the adapter module. The third power device Q3 is soft-turned on and the fourth power device Q4 is hard-turned off. S24A: Turns on the first power device Q1 and the third power device Q3, and turns off the second power device Q2 and the fourth power device Q4. At this time, the current flows through the first power device Q1, the inductor L, and the third power device Q3. The second power device Q2 is soft-turned off and the first power device Q1 is hard-turned on.
[0036] Please see Figure 3 Furthermore, in step S2B, the operating cycle specifically includes the following steps: S21B: Turn on the first power device Q1 and the fourth power device Q4, and turn off the second power device Q2 and the third power device Q3. At this time, the current flows through the fourth power device Q4, the inductor, the first power device Q1, and the adapter module. The third power device Q3 is hard turned off and the fourth power device Q4 is soft turned on. At this time, the current gradually decreases. S22B: Turns on the first power device Q1 and the fourth power device Q4, and turns off the second power device Q2 and the third power device Q3. At this time, the current flows through the first power device Q1, the inductor, the fourth power device Q4, and the adapter module. There are no device switches. At this time, the current is reversed and gradually increases. S23B: Turn on the second power device Q2 and the fourth power device Q4, and turn off the first power device Q1 and the third power device Q3. At this time, the current flows through the second power device Q2, the inductor, and the fourth power device Q4. The first power device Q1 is hard turned off and the second power device Q2 is soft turned on. S24B: Turn on the second power device Q2 and the third power device Q3, and turn off the first power device Q1 and the fourth power device Q4. At this time, the current flows through the second power device Q2, the inductor, the third power device Q3, and the adapter module. The fourth power device Q4 is hard turned off and the third power device Q3 is soft turned on. At this time, the current gradually decreases. S25B: Turns on the second power device Q2 and the third power device Q3, and turns off the first power device Q1 and the fourth power device Q4. At this time, the current flows through the third power device Q3, the inductor, the second power device Q2, and the adapter module. There are no device switches. At this time, the current is reversed and gradually increases. S26B: Turns on the first power device Q1 and the third power device Q3, and turns off the second power device Q2 and the fourth power device Q4. At this time, the current flows through the third power device Q3, the inductor, and the first power device Q1. The second power device Q2 is hard turned off, and the first power device Q1 is soft turned on.
[0037] S3: After n operating cycles, the test circuit exits the operating cycle and saves the control parameters during the operating cycle, and then enters the sampling cycle; it controls the first power device Q1 and the third power device Q3 to turn off, and controls the second power device Q2 and the fourth power device Q4 to turn on. After a delay of several nanoseconds after the second power device Q2 and the fourth power device Q4 are turned on, the on-state voltage drop of the second power device Q2 and the fourth power device Q4 and the current of the inductor L are collected, and the dynamic resistance of the second power device Q2 and the fourth power device Q4 at high switching frequency is calculated.
[0038] In some embodiments, the control parameters are PID control parameters.
[0039] In this embodiment of the invention, the ADC module of the sampling module is controlled to collect the on-state voltage drop of the second power device Q2 and the fourth power device Q4, as well as the current of the inductor L.
[0040] S4: After a few microseconds, the test circuit exits the sampling cycle, reuses the control parameters saved during the running cycle to control the test circuit, re-enters the running cycle, and returns to step S2A or step S2B.
[0041] In the dynamic resistance testing method for high switching frequency power devices according to this embodiment of the invention, in step S3, since the first power device Q1 and the third power device Q3 are turned off, and the second power device Q2 and the fourth power device Q4 are turned on, the second power device Q2 and the fourth power device Q4 are conducting and consume virtually no energy, so the current in inductor L remains essentially unchanged. Furthermore, since the elapsed time is on the order of microseconds, the temperature of each power device also remains essentially unchanged. Therefore, the dynamic resistance of the second power device Q2 and the fourth power device Q4 can be measured at this time. Moreover, since the current in inductor L does not fluctuate significantly, the current will not fluctuate significantly when exiting the sampling period and re-entering the operating period.
[0042] The high-switching-frequency power device dynamic resistance testing circuit and method of this invention reduce the pressure on the clamping circuit because it does not require measuring the on-state voltage drop during each operating cycle. This allows the circuit to operate at switching frequencies of 1MHz or higher, reducing the bandwidth requirements of the clamping and conditioning circuits, effectively lowering costs and improving measurement accuracy. Furthermore, since the current in inductor L and the on-state voltage drops of the second power device Q2 and the fourth power device Q4 remain essentially constant during the sampling period, the on-state voltage drops can be measured more accurately to obtain the dynamic resistance of the second power device Q2 and the fourth power device Q4.
[0043] The embodiments described above are merely examples of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and the present invention also intends to include these modifications and variations.
Claims
1. A dynamic resistance testing circuit for high switching frequency power devices, characterized in that, include: The system comprises a power module, a power module, an adapter module, and a control sampling module; the power module and the power module are connected in series, the adapter module and the power module are connected in parallel, and the control sampling module is connected to the power module. The power module includes a first power device, a second power device, a third power device, a fourth power device, and an inductor; the power module is connected in series with the first and second power devices; the third and fourth power devices are connected in series and then in parallel with the first and second power devices, with all power devices arranged in the same direction; one end of the inductor is connected between the first and second power devices, and the other end of the inductor is connected between the third and fourth power devices; It also includes a clamping module, which includes at least two clamping temperature control circuits; one of the clamping temperature control circuits is connected in parallel with the second power device, and the other clamping temperature control circuit is connected in parallel with the fourth power device.
2. The dynamic resistance testing circuit for high switching frequency power devices according to claim 1, characterized in that: The drain of the first power device is connected to one end of the power module, the source of the first power device is connected to the drain of the second power device, and the source of the second power device is connected to the other end of the power module; the drain of the third power device is connected to one end of the power module, the drain of the fourth power device is connected to the source of the third power device, and the source of the fourth power device is connected to the other end of the power module; one end of the inductor is connected to the source of the first power device and the drain of the second power device, and the other end of the inductor is connected to the drain of the fourth power device and the source of the third power device.
3. The dynamic resistance testing circuit for high switching frequency power devices according to claim 2, characterized in that: It also includes a driving module, which includes several driving circuits; the controlled sampling module is connected to the gate of each power device through each of the driving circuits.
4. The dynamic resistance testing circuit for high switching frequency power devices according to claim 1, characterized in that: It also includes an inductor current sampling module; the control sampling module includes an ADC port; the control sampling module is connected to the second power device, the fourth power device and the inductor through the ADC port; the control sampling module is connected to the inductor through the inductor current sampling module.
5. The dynamic resistance testing circuit for high switching frequency power devices according to claim 1, characterized in that: The clamping temperature control circuit is connected to the control sampling module and receives the on-resistance monitoring information of the second power device and the fourth power device obtained by the control sampling module.
6. A method for testing the dynamic resistance of a high-switching-frequency power device, used in the dynamic resistance testing circuit for high-switching-frequency power devices as described in any one of claims 1-5, characterized in that, Includes the following steps: S1 selects the operating mode of the test circuit and sets the target number of cycles n (n>1) through the timer; the operating mode includes hard-on / hard-off / soft-on / soft-off mode and soft-on / hard-off mode. If S2A is in hard-on / soft-on / soft-off working mode, the PWM signals of the first power device and the second power device are complementary, the PWM signals of the third power device and the fourth power device are complementary, and the duty cycle of the third power device and the fourth power device is fixed at 50%. By controlling the duty cycle of the first power device, the current flowing through the inductor is adjusted, so that the test circuit enters the operating cycle. If S2B operates in soft-on / hard-off mode, the PWM signals of the first and second power devices are complementary, and the PWM signals of the third and fourth power devices are complementary. The duty cycles of the first and second power devices are fixed at 50%, and the duty cycles of the third and fourth power devices are fixed at 50%. By controlling the phase offset between the first and fourth power devices, the current flowing through the inductor is adjusted, allowing the test circuit to enter the operating cycle. After n operating cycles, the test circuit exits the operating cycle and saves the control parameters during the operating cycle. Then it enters the sampling cycle. It controls the first power device and the third power device to turn off and controls the second power device and the fourth power device to turn on. After a delay of several nanoseconds after the second power device and the fourth power device are turned on, it collects the on-state voltage drop of the second power device and the fourth power device and the current of the inductor, and calculates the dynamic resistance of the second power device and the fourth power device at high switching frequency. After a few microseconds, the test circuit exits the sampling cycle, reuses the control parameters saved during the running cycle to control the test circuit, re-enters the running cycle, and returns to step S2A or step S2B.
7. The method for testing the dynamic resistance of high-switching-frequency power devices according to claim 6, characterized in that: In step S2A, the operating cycle specifically includes the following steps: S21A turns on the first power device and the fourth power device, and turns off the second power device and the third power device. At this time, the current flows through the first power device, the inductor, the fourth power device, and the adapter module. The third power device is soft-turned off and the fourth power device is hard-turned on. S22A turns on the second and fourth power devices and turns off the first and third power devices. At this time, current flows through the second power device, the inductor, and the fourth power device. The second power device is soft-turned on and the first power device is hard-turned off. S23A turns on the second and third power devices and turns off the first and fourth power devices. At this time, the current flows through the second power device, the inductor, the third power device, and the adapter module. The third power device is soft-turned on and the fourth power device is hard-turned off. S24A turns on the first power device and the third power device, and turns off the second power device and the fourth power device. At this time, the current flows through the first power device, the inductor, and the third power device. The second power device is soft-turned off and the first power device is hard-turned on.
8. The method for testing the dynamic resistance of high-switching-frequency power devices according to claim 6, characterized in that: In step S2B, the operating cycle specifically includes the following steps: S21B turns on the first power device and the fourth power device, and turns off the second power device and the third power device. At this time, the current flows through the fourth power device, the inductor, the first power device, and the adapter module. The third power device is hard turned off and the fourth power device is soft turned on. At this time, the current gradually decreases. S22B turns on the first power device and the fourth power device, and turns off the second power device and the third power device. At this time, the current flows through the first power device, the inductor, the fourth power device, and the adapter module. There are no device switches. At this time, the current reverses and gradually increases. S23B turns on the second power device and the fourth power device, and turns off the first power device and the third power device. At this time, current flows through the second power device, the inductor and the fourth power device. The first power device is hard turned off and the second power device is soft turned on. S24B turns on the second and third power devices and turns off the first and fourth power devices. At this time, the current flows through the second power device, the inductor, the third power device, and the adapter module. The fourth power device is hard turned off and the third power device is soft turned on. At this time, the current gradually decreases. S25B turns on the second and third power devices and turns off the first and fourth power devices. At this time, the current flows through the third power device, the inductor, the second power device, and the adapter module. There are no device switches. At this time, the current reverses and gradually increases. S26B turns on the first power device and the third power device, and turns off the second power device and the fourth power device. At this time, the current flows through the third power device, the inductor, and the first power device. The second power device is hard turned off, and the first power device is soft turned on.
9. The method for testing the dynamic resistance of high-switching-frequency power devices according to claim 6, characterized in that: In steps S2A and S2B, the test circuit uses PID control to control the duty cycle of the first power device and the phase offset between the first power device and the fourth power device.
10. The method for testing the dynamic resistance of high-switching-frequency power devices according to claim 9, characterized in that: The control parameters are PID control parameters.