VCSEL structure and preparation method thereof
By introducing an AlGaAsP layer on the upper surface of the main oxide layer of the VCSEL structure, interface cracking is controlled, which solves the reliability failure problem caused by tip stress after oxide layer oxidation and improves the reliability and performance of the laser.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-24
- Publication Date
- 2026-04-07
AI Technical Summary
The tip stress generated after the oxide layer of the existing VCSEL structure is oxidized leads to reliability failure, affecting the performance and lifespan of the laser.
Phosphorus is introduced onto the surface of the main oxide layer of the VCSEL structure to form an AlGaAsP layer. By controlling the cracking at the interface between the main oxide layer and the AlGaAsP layer, stress is released in advance. The difference between the lattice constant of AlGaAsP and AlGaAs is used to introduce tensile stress to promote cracking and release thermal stress.
Effectively releasing the thermal stress generated during the formation of the oxide layer improves the reliability and performance of VCSEL lasers.
Smart Images
Figure CN121813115A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor laser technology, and in particular to a VCSEL structure and its fabrication method. Background Technology
[0002] Vertical-cavity surface-emitting lasers (VCSELs) have been widely used in optical communications, laser displays, and consumer electronics due to their small size, circular output spot, single longitudinal mode output, low threshold current, low cost, and ease of integration into large-area arrays. However, the tip stress generated after oxide layer oxidation in VCSEL structures is one of the main causes of reliability failure. This tip stress is primarily due to the structural characteristics formed during the oxide layer oxidation process, and it directly affects the laser's performance and lifespan. Summary of the Invention
[0003] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a VCSEL structure and its preparation method, which solves the problem of reliability failure caused by the tip stress generated after the oxidation of the oxide layer in the prior art VCSEL structure.
[0004] To achieve the above and other related objectives, the present invention provides a method for preparing a VCSEL structure, the method comprising:
[0005] A substrate is provided, and an N-type DBR layer, an N-type confinement layer, an active layer, a P-type confinement layer, a P-type DBR layer, and an ohmic contact layer are sequentially epitaxially formed on the substrate. The P-type DBR layer is composed of alternating AlGaAs layers with lower aluminum content and AlGaAs layers with higher aluminum content. All the AlGaAs layers with higher aluminum content sequentially include, from bottom to top, several sub-oxide layers, a main oxide layer, several sub-oxide layers, and several sub-sub-oxide layers. During the epitaxial growth of the lower aluminum content AlGaAs layers located on the upper surface of the main oxide layer, a phosphorus source is introduced to replace some of the arsenic to form an AlGaAsP layer. The Al content in the main oxide layer is higher than the Al content in the sub-oxide layers, and the Al content in the sub-oxide layers is higher than the Al content in the sub-sub-oxide layers.
[0006] The ohmic contact layer and the P-type DBR layer are etched to form a mesa structure;
[0007] The mesa structure is subjected to a wet oxidation process to cause cracking in a portion of the interface between the main oxide layer and the AlGaAsP layer. Optionally, the material of the main oxide layer is Al. x Ga 1-x As, where 0.95 < x ≤ 0.985; the material of the secondary oxide layer is Al. yGa 1-y As, where 0.9 < y ≤ 0.93; the material of the secondary oxide layer is Al. z Ga 1-z As, where 0.88 < z ≤ 0.9.
[0008] Optionally, the P-type DBR layer is formed using MOCVD or MBE processes.
[0009] Optionally, the P-type DBR layer material is carbon-doped, and the carbon doping concentration is less than 1E20 atoms / cm². 3 The carbon doping concentration of the AlGaAsP layer material is less than 1E18 atoms / cm². 3 .
[0010] Optionally, the material of the AlGaAsP layer is Al x Ga 1-x As y P 1-y , where 0.1≤x≤0.9, 0.1≤y≤0.9.
[0011] The present invention also provides a VCSEL structure, wherein the VCSEL structure comprises, from bottom to top:
[0012] A substrate and an N-type DBR layer, an N-type confinement layer, an active layer and a P-type confinement layer sequentially stacked on the substrate;
[0013] A mesa structure located on the P-type confinement layer, the mesa structure comprising, from bottom to top, a P-type DBR layer and an ohmic contact layer; wherein, the P-type DBR layer is composed of alternating AlGaAs layers with lower aluminum content and AlGaAs layers with higher aluminum content, all the AlGaAs layers with higher aluminum content comprising, from bottom to top, several sub-oxide layers, a main oxide layer, several sub-oxide layers, and several sub-sub-oxide layers, the AlGaAs layer with lower aluminum content located on the upper surface of the main oxide layer is an AlGaAsP layer; the Al content in the main oxide layer is higher than the Al content in the sub-oxide layers, the Al content in the sub-oxide layers is higher than the Al content in the sub-sub-oxide layers, and a portion of the interface between the main oxide layer and the AlGaAsP layer is cracked.
[0014] Optionally, the depth of the crack at the interface between the main oxide layer and the AlGaAsP layer is equal to the lateral oxidation depth of the secondary oxide layer.
[0015] Optionally, a buffer layer is also formed between the substrate and the N-type DBR layer.
[0016] Optionally, the material of the main oxide layer is Al. x Ga 1-xAs, where 0.95 < x ≤ 0.985; the material of the secondary oxide layer is Al. y Ga 1-y As, where 0.9 < y ≤ 0.93; the material of the secondary oxide layer is Al. z Ga 1-z As, where 0.88 < z ≤ 0.9.
[0017] Optionally, the P-type DBR layer material is carbon-doped, and the carbon doping concentration is less than 1E20 atoms / cm². 3 The carbon doping concentration of the AlGaAsP layer material is less than 1E18 atoms / cm². 3 .
[0018] Optionally, the material of the AlGaAsP layer is Al x Ga 1-x As y P 1-y , where 0.1≤x≤0.9, 0.1≤y≤0.9.
[0019] Optionally, the thickness of the AlGaAsP layer is 40nm~70nm, and the AlGaAsP layer includes a first structure, a second structure and a third structure from bottom to top. The Al content in the first structure is higher than the Al content in the second structure, and the Al content in the third structure is higher than the Al content in the second structure. The thickness of the second structure is 20nm~40nm, and the thickness of the second structure does not include the endpoint value of 40nm.
[0020] As described above, the VCSEL structure and its fabrication method of the present invention have the following beneficial effects: By introducing phosphorus into the AlGaAs layer with a lower aluminum composition on the upper surface of the main oxide layer to form an AlGaAsP layer, cracking at the interface between the main oxide layer and the AlGaAsP layer is actively controlled, and stress is released in advance, solving the problem of reliability failure caused by the tip stress generated after oxide layer oxidation in the prior art. This method utilizes the difference in lattice constant between AlGaAsP and AlGaAs, and introduces tensile stress by introducing phosphorus, so that the interface between the main oxide layer and the AlGaAsP layer exhibits a dual effect of upward pulling and downward contraction, thereby inducing cracking at the interface between the main oxide layer and the AlGaAsP layer. This epitaxial structure design allows the oxide layer to more effectively release the thermal stress generated by volume shrinkage and the difference in thermal expansion coefficients during the formation process, thereby improving the reliability and performance of the VCSEL laser. Attached Figure Description
[0021] Figure 1 The diagram shows a flow chart of the method for preparing the VCSEL structure of the present invention.
[0022] Figure 2 and Figure 3 The diagram shows the cross-sectional structure of each step in the preparation method of the VCSEL structure of the present invention.
[0023] Figure 4 The image shown is a cross-sectional morphology diagram of a portion of the interface between the main oxide layer and the AlGaAsP layer, as an example of the present invention, showing cracking.
[0024] Figure 5 The diagram shown is a cross-sectional topography of a VCSEL structure without cracks, which is an example of the prior art.
[0025] Component labeling explanation: 1 Substrate, 2 N-type DBR layer, 3 N-type confinement layer, 4 Active layer, 5 P-type confinement layer, 6 P-type DBR layer, 60 AlGaAs layer with higher aluminum content, 61 Sub-oxide layer, 62 Main oxide layer, 63 AlGaAsP layer, 64 Sub-sub-oxide layer, 65 AlGaAs layer with lower aluminum content, 7 Ohmic contact layer, 8 Mesa structure, S1~S3 steps. Detailed Implementation
[0026] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0027] Please see Figures 1 to 5 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0028] This embodiment provides a method for preparing a VCSEL structure, such as... Figure 1 As shown, the preparation method includes:
[0029] S1, a substrate is provided, and an N-type DBR layer, an N-type confinement layer, an active layer, a P-type confinement layer, a P-type DBR layer, and an ohmic contact layer are sequentially epitaxially formed on the substrate; wherein, the P-type DBR layer is composed of alternating growth of AlGaAs layers with lower aluminum content and AlGaAs layers with higher aluminum content, and all the AlGaAs layers with higher aluminum content sequentially include, from bottom to top, several sub-oxide layers, a main oxide layer, several sub-oxide layers, and several sub-sub-oxide layers; during the epitaxial growth of the AlGaAs layers with lower aluminum content located on the upper surface of the main oxide layer, a phosphorus source is introduced to replace some of the arsenic positions to form an AlGaAsP layer; the Al content in the main oxide layer is higher than the Al content in the sub-oxide layer, and the Al content in the sub-oxide layer is higher than the Al content in the sub-sub-oxide layer.
[0030] S2, etch the ohmic contact layer and the P-type DBR layer to form a mesa structure;
[0031] S3, perform wet oxidation treatment on the platform structure to cause partial cracking at the interface between the main oxide layer and the AlGaAsP layer.
[0032] The VCSEL structure fabrication method of this embodiment introduces phosphorus into an AlGaAs layer with a lower aluminum content on the upper surface of the main oxide layer to form an AlGaAsP layer. This actively controls the cracking at the interface between the main oxide layer and the AlGaAsP layer, releasing stress in advance and solving the problem of reliability failure caused by the tip stress generated after oxide layer oxidation in the prior art. This method utilizes the difference in lattice constant between AlGaAsP and AlGaAs, introducing phosphorus to introduce tensile stress, resulting in a dual effect of upward pulling and downward contraction at the interface between the main oxide layer and the AlGaAsP layer. This induces cracking at the interface, and this epitaxial structure design allows the oxide layer to more effectively release thermal stress caused by volume shrinkage and differences in thermal expansion coefficients during formation, thereby improving the reliability and performance of the VCSEL laser.
[0033] The fabrication method of the VCSEL structure in this embodiment will be described in detail below with reference to the specific accompanying drawings.
[0034] like Figure 2As shown, step S1 is performed first, providing a substrate 1, and sequentially epitaxially forming an N-type DBR layer 2, an N-type confinement layer 3, an active layer 4, a P-type confinement layer 5, a P-type DBR layer 6, and an ohmic contact layer 7 on the substrate 1; wherein, the P-type DBR layer 6 is composed of alternating growth of AlGaAs layers 65 with lower aluminum content and AlGaAs layers 60 with higher aluminum content, all of the AlGaAs layers 60 with higher aluminum content include, from bottom to top, several sub-oxide layers 61, a main oxide layer 62, several sub-oxide layers 61, and several sub-sub-oxide layers 64, and a phosphorus source is introduced during the epitaxial growth of the AlGaAs layers 65 with lower aluminum content located on the upper surface of the main oxide layer 62, so that phosphorus replaces part of the arsenic positions to form an AlGaAs P layer 63; the Al content in the main oxide layer 62 is higher than the Al content in the sub-oxide layer 61, and the Al content in the sub-oxide layer 61 is higher than the Al content in the sub-sub-oxide layer 64.
[0035] It should be noted that the terms "lower" in the AlGaAs layer 65 with the lower aluminum content and "higher" in the AlGaAs layer 60 with the higher aluminum content are defined by comparing the levels of Al content in these two layers.
[0036] As an example, the number of pairs of AlGaAs layers 65 with lower aluminum content and the secondary oxide layer 61 located below the main oxide layer 62 is 3 to 5; the number of pairs of AlGaAs layers 65 with lower aluminum content and the secondary oxide layer 61 located above the main oxide layer 62 is 5 to 9; and the number of pairs of AlGaAs layers 65 with lower aluminum content and the secondary oxide layer 64 is 11 to 15. Figure 2 and Figure 3 The images shown are for illustrative purposes only and do not constitute a limitation on the specific number of layers.
[0037] As an example, a buffer layer (not shown) is also formed between the substrate 1 and the N-type DBR layer 2.
[0038] Furthermore, the material of the main oxide layer 62 is Al. x Ga 1-x As, where 0.95 < x ≤ 0.985; the material of the secondary oxide layer 61 is Al. y Ga 1-y As, where 0.9 < y ≤ 0.93; the material of the secondary oxide layer 64 is Al. z Ga 1-z As, where 0.88 < z ≤ 0.9.
[0039] As an example, the P-type DBR layer can be formed using processes including, but not limited to, metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
[0040] As an example, the material of the AlGaAsP layer 63 is Al. x Ga 1-x As y P 1-y Where 0.1≤x≤0.9, 0.1≤y≤0.9, by precisely controlling the content of aluminum (Al) and phosphorus (P), the AlGaAsP layer 63 can effectively adjust the band gap and lattice constant of the material while maintaining the crystal quality of the material.
[0041] As an example, the AlGaAsP layer 63 has a thickness of 40nm~70nm, and the formed AlGaAsP layer 63 includes a first structure, a second structure, and a third structure from bottom to top. The Al content in the first structure is higher than the Al content in the second structure, and the Al content in the third structure is higher than the Al content in the second structure. Further, the material of the second structure is Al. x Ga 1-x As, where x is exemplary equal to 0.12, and the thickness of the second structure is, for example, 20 nm to 40 nm. Figure 3 As shown, step S2 is then performed to etch the ohmic contact layer 7 and the P-type DBR layer 6 to form the mesa structure 8.
[0042] like Figure 3 As shown, step S3 is then performed to wet-oxidize the platform structure 8 so that the interface between the main oxide layer 62 and the AlGaAsP layer 63 partially cracks.
[0043] After the wet oxidation process in step S3, the lateral oxidation depth of the oxide layer is closely related to the content of the Al component; the higher the Al component content, the deeper the lateral oxidation depth. Therefore, the lateral oxidation depth of the secondary oxide layer 64 is less than that of the secondary oxide layer 61, and the lateral oxidation depth of the secondary oxide layer 61 is less than that of the main oxide layer 62.
[0044] Specifically, the main oxide layer 62 is made of AlGaAs with a high aluminum content. After wet oxidation, the main oxide layer 62 transforms into porous amorphous alumina (Al2O3). This phase transition is accompanied by significant volume shrinkage, typically between 10% and 20%. Because Al2O3 differs significantly in its coefficient of thermal expansion from surrounding semiconductor materials such as AlGaAs, additional thermal stress is generated within the material during cooling from a high temperature (typically 400°C to 440°C) to room temperature after the wet oxidation process, due to the difference in their shrinkage rates. In this embodiment, phosphorus (P) is introduced into the AlGaAsP layer 63 to form the AlGaAsP layer. Since the lattice constant of AlGaAsP differs from that of the AlGaAs layer, the introduction of P typically introduces tensile stress into the AlGaAsP layer. At the interface between the main oxide layer 62 and the AlGaAsP layer 63, the tensile stress results in a dual effect of upward pulling and downward shrinkage. This stress difference ultimately leads to cracking at the interface, such as... Figure 4 The image shown is a cross-sectional morphology diagram of a portion of the interface between the main oxide layer 62 and the AlGaAsP layer 63, as an example. The depth of the crack at the interface between the main oxide layer 62 and the AlGaAsP layer 63 is equal to the lateral oxidation depth of the secondary oxide layer 61. Figure 5 The image shown is a cross-sectional view of the interface on the upper surface of the main oxide layer 62 in an example VCSEL structure in the prior art, where no cracks have formed. This cracking phenomenon helps to release the thermal stress generated during the wet oxidation process in step S3, thereby improving the reliability and performance of the device.
[0045] Furthermore, as an example, the P-type DBR layer 6 material is carbon (C) doped, and the carbon doping concentration is less than 1E20 atoms / cm². 3 The N DBR layer 2 is silicon doped with a doping concentration of less than 1E19 atoms / cm². 3 The carbon doping is a p-type doping, an inherent technique in VCSEL epitaxial growth, aimed at providing a high concentration of hole carriers to reduce the resistance of the p-type region. However, this introduces compressive stress, and heavy carbon doping can suppress cracking of the main oxide layer 62. Preferably, in this embodiment, the carbon doping concentration of the AlGaAsP layer 63 is further reduced, for example, by setting the carbon doping concentration of the AlGaAsP layer 63 material to less than 1E18 atoms / cm³. 3 This reduces the inhibitory effect on cracking of the main oxide layer 62, thereby facilitating cracking on the upper surface of the main oxide layer 62, releasing stress in advance, and further improving the reliability and performance of VCSEL.
[0046] This embodiment also provides a VCSEL structure, see reference. Figure 3The VCSEL structure, from bottom to top, includes:
[0047] Substrate 1 and N-type DBR layer 2, N-type confinement layer 3, active layer 4 and P-type confinement layer 5 sequentially stacked on substrate 1;
[0048] The mesa structure 8 located on the P-type confinement layer 5 includes, from bottom to top, a P-type DBR layer 6 and an ohmic contact layer 7. The P-type DBR layer 6 is composed of alternating AlGaAs layers 65 with lower aluminum content and AlGaAs layers 60 with higher aluminum content. All the higher aluminum content AlGaAs layers 60, from bottom to top, include several sub-oxide layers 61, a main oxide layer 62, several sub-oxide layers 61, and several sub-sub-oxide layers 64. The lower aluminum content AlGaAs layer 65 located on the upper surface of the main oxide layer 62 is an AlGaAsP layer 63. The Al content in the main oxide layer 62 is higher than the Al content in the sub-oxide layers 61, the Al content in the sub-oxide layers 61 is higher than the Al content in the sub-sub-oxide layers 64, and a portion of the interface between the main oxide layer 62 and the AlGaAsP layer 63 is cracked.
[0049] The VCSEL structure can be prepared using the methods described above, but it is not limited to these methods. Other suitable preparation methods are also possible, and the beneficial effects they can achieve can be found in the specific descriptions of the preparation methods, which will not be repeated here.
[0050] like Figure 4 The diagram shown is a cross-sectional morphology of a portion of the interface between the main oxide layer 62 and the AlGaAsP layer 63, as an example. The depth of the crack at the interface between the main oxide layer 62 and the AlGaAsP layer 63 is equal to the lateral oxidation depth of the secondary oxide layer 61.
[0051] As an example, a buffer layer (not shown) is also formed between the substrate 1 and the N-type DBR layer 2.
[0052] Furthermore, the material of the main oxide layer 62 is Al. x Ga 1-x As, where 0.95 < x ≤ 0.985; the material of the secondary oxide layer 61 is Al. y Ga 1-y As, where 0.9 < y ≤ 0.93; the material of the secondary oxide layer 64 is Al. z Ga 1-z As, where 0.88 < z ≤ 0.9.
[0053] As an example, the material of the AlGaAsP layer 63 is Al. x Ga 1-x Asy P 1-y , where 0.1≤x≤0.9, 0.1≤y≤0.9.
[0054] As an example, the thickness of the AlGaAsP layer 63 is, for example, 40nm~70nm, and the formed AlGaAsP layer 63 includes a first structure, a second structure, and a third structure from bottom to top. The Al content in the first structure is higher than the Al content in the second structure, and the Al content in the third structure is higher than the Al content in the second structure. Further, the material of the second structure is Al. x Ga 1-x As, where x is exemplarily equal to 0.12, the thickness of the second structure is, for example, 20 nm to 40 nm, and the thickness of the second structure does not include the endpoint value of 40 nm.
[0055] Furthermore, as a preferred example, the P-type DBR layer 6 material is carbon (C) doped, and the carbon doping concentration is less than 1E20 atoms / cm³. 3 Carbon doping is a p-type doping technique inherent in VCSEL epitaxial growth. Its purpose is to provide a high concentration of hole carriers to reduce the resistance of the p-type region, while also introducing compressive stress. Heavy carbon doping can suppress cracking of the main oxide layer 62. Preferably, in this embodiment, the carbon doping concentration of the AlGaAsP layer 63 is further reduced, for example, by setting the carbon doping concentration of the AlGaAsP layer 63 material to be less than 1E18 atoms / cm³. 3 This reduces the inhibitory effect on cracking of the main oxide layer 62, thereby facilitating cracking on the upper surface of the main oxide layer 62, releasing stress in advance, and further improving the reliability and performance of the VCSEL. In summary, the VCSEL structure and its fabrication method of the present invention, by introducing phosphorus into an AlGaAs layer with a lower aluminum composition on the upper surface of the main oxide layer to form an AlGaAsP layer, actively controls the cracking at the interface between the main oxide layer and the AlGaAsP layer, releasing stress in advance, and solving the problem of reliability failure caused by the tip stress generated after oxide layer oxidation in the prior art. This method utilizes the difference in lattice constant between AlGaAsP and AlGaAs, introducing tensile stress by introducing phosphorus, resulting in a dual effect of upward pulling and downward contraction at the interface between the main oxide layer and the AlGaAsP layer, thereby inducing cracking at the interface. This epitaxial structure design allows the oxide layer to more effectively release the thermal stress generated by volume shrinkage and the difference in thermal expansion coefficients during formation, thereby improving the reliability and performance of the VCSEL laser. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.
[0056] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
Claims
1. A method for preparing a VCSEL structure, characterized in that, The preparation method includes: A substrate is provided, and an N-type DBR layer, an N-type confinement layer, an active layer, a P-type confinement layer, a P-type DBR layer, and an ohmic contact layer are sequentially epitaxially formed on the substrate. The P-type DBR layer is composed of alternating AlGaAs layers with lower aluminum content and AlGaAs layers with higher aluminum content. All the AlGaAs layers with higher aluminum content sequentially include, from bottom to top, several sub-oxide layers, a main oxide layer, several sub-oxide layers, and several sub-sub-oxide layers. During the epitaxial growth of the lower aluminum content AlGaAs layers located on the upper surface of the main oxide layer, a phosphorus source is introduced to replace some of the arsenic to form an AlGaAsP layer. The Al content in the main oxide layer is higher than the Al content in the sub-oxide layers, and the Al content in the sub-oxide layers is higher than the Al content in the sub-sub-oxide layers. The ohmic contact layer and the P-type DBR layer are etched to form a mesa structure; The platform structure is subjected to wet oxidation treatment to cause partial cracking at the interface between the main oxide layer and the AlGaAsP layer.
2. The method for preparing the VCSEL structure according to claim 1, characterized in that: The material of the main oxide layer is Al. x Ga 1-x As, where 0.95 < x ≤ 0.985; the material of the secondary oxide layer is Al. y Ga 1-y As, where 0.9 < y ≤ 0.93; the material of the secondary oxide layer is Al. z Ga 1-z As, where 0.88 < z ≤ 0.
9.
3. The method for preparing the VCSEL structure according to claim 1, characterized in that: The P-type DBR layer is formed using MOCVD or MBE processes.
4. The method for preparing the VCSEL structure according to claim 1, characterized in that: The P-type DBR layer material is carbon-doped, and the carbon doping concentration is less than 1E20 atoms / cm². 3 The carbon doping concentration of the AlGaAsP layer material is less than 1E18 atoms / cm 3 .
5. The method for preparing the VCSEL structure according to claim 1, characterized in that: The material of the AlGaAsP layer is Al x Ga 1-x As y P 1-y , where 0.1≤x≤0.9, 0.1≤y≤0.
9.
6. A VCSEL structure, characterized in that, The VCSEL structure, from bottom to top, includes: A substrate and an N-type DBR layer, an N-type confinement layer, an active layer and a P-type confinement layer sequentially stacked on the substrate; A mesa structure located on the P-type confinement layer, the mesa structure comprising, from bottom to top, a P-type DBR layer and an ohmic contact layer; wherein, the P-type DBR layer is composed of alternating AlGaAs layers with lower aluminum content and AlGaAs layers with higher aluminum content, all the AlGaAs layers with higher aluminum content comprising, from bottom to top, several sub-oxide layers, a main oxide layer, several sub-oxide layers, and several sub-sub-oxide layers, the AlGaAs layer with lower aluminum content located on the upper surface of the main oxide layer is an AlGaAsP layer; the Al content in the main oxide layer is higher than the Al content in the sub-oxide layers, the Al content in the sub-oxide layers is higher than the Al content in the sub-sub-oxide layers, and a portion of the interface between the main oxide layer and the AlGaAsP layer is cracked.
7. The VCSEL structure according to claim 6, characterized in that: The depth of the crack at the interface between the main oxide layer and the AlGaAsP layer is equal to the lateral oxidation depth of the secondary oxide layer.
8. The VCSEL structure according to claim 6, characterized in that: A buffer layer is also formed between the substrate and the N-type DBR layer.
9. The VCSEL structure according to claim 6, characterized in that: The material of the main oxide layer is Al. x Ga 1-x As, where 0.95 < x ≤ 0.985; the material of the secondary oxide layer is Al. y Ga 1-y As, where 0.9 < y ≤ 0.93; the material of the secondary oxide layer is Al. z Ga 1-z As, where 0.88 < z ≤ 0.
9.
10. The VCSEL structure according to claim 6, characterized in that: The P-type DBR layer material is carbon-doped, and the carbon doping concentration is less than 1E20 atoms / cm². 3 The carbon doping concentration of the AlGaAsP layer material is less than 1E18 atoms / cm². 3 .
11. The VCSEL structure according to claim 6, characterized in that: The material of the AlGaAsP layer is Al x Ga 1- x As y P 1-y , where 0.1≤x≤0.9, 0.1≤y≤0.
9.
12. The VCSEL structure according to claim 6, characterized in that: The AlGaAsP layer has a thickness of 40nm to 70nm. The AlGaAsP layer includes a first structure, a second structure, and a third structure from bottom to top. The Al content in the first structure is higher than that in the second structure. The Al content in the third structure is higher than that in the second structure. The thickness of the second structure is 20nm to 40nm, and the thickness of the second structure does not include the endpoint value of 40nm.