Under-voltage protection circuit suitable for neutron radiation environment and control method thereof
By using a VDMOS-based undervoltage protection circuit, a comparator circuit constructed with NMOS transistors, Zener diodes, and resistors, combined with hysteresis control, the problem of traditional circuits being prone to failure in neutron radiation environments is solved, achieving stability and anti-interference capability, and making it suitable for undervoltage protection in neutron radiation environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-31
- Publication Date
- 2026-04-07
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Traditional comparator circuits are prone to failure in neutron radiation environments, causing undervoltage protection circuits to malfunction and become susceptible to interference and false triggering.
An undervoltage protection circuit based on domestically produced VDMOS is adopted. A comparator circuit is constructed using NMOS transistors, Zener diodes, diodes and resistors, combined with hysteresis control. Logic control is achieved by turning on and off the VDMOS device to avoid false triggering.
It achieves undervoltage protection that allows for stable operation in a neutron radiation environment, has anti-interference capabilities, a simple structure, is easy to implement, and has low cost, making it suitable for various application scenarios.
Smart Images
Figure CN121813255A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of switching power supply circuit control technology, specifically to an undervoltage protection circuit and its control method suitable for neutron radiation environments. Background Technology
[0002] Currently, in commonly used radiation-hardened DC / DC converters both domestically and internationally, undervoltage protection often employs comparator circuits, with a typical circuit structure as follows: Figure 1 As shown. The advantage of this circuit is that if no positive feedback is introduced into the comparator circuit, the trigger level will be unique. However, near this level, the comparator is particularly sensitive to interference, easily causing false triggering. Introducing positive feedback into the comparator circuit creates two different trigger levels. When the output level is required to change in the opposite direction, the input signal must undergo a certain change to achieve this; this change is V. RL With V RH The difference. Therefore, this comparator circuit with positive feedback is less prone to false triggering and has strong anti-interference capability.
[0003] However, bipolar devices are extremely sensitive to neutron radiation and will completely fail after being subjected to radiation shocks. This means that traditional comparator circuits cannot operate stably in neutron radiation environments. Therefore, for power supply systems, there is an urgent need to develop an undervoltage protection circuit that can operate normally in neutron radiation environments. Summary of the Invention
[0004] The purpose of this invention is to provide an undervoltage protection circuit and its control method suitable for neutron radiation environments. This circuit and its control method can overcome the shortcomings of the prior art. It is based on domestically produced VDMOS and has the characteristics of resisting neutron displacement radiation, simple design, easy implementation, and low cost.
[0005] To achieve the above objectives, the present invention adopts the following technical solution: An undervoltage protection circuit suitable for neutron radiation environments, the circuit includes NMOS transistors Q1 and Q2, Zener diode D1, diodes D2 and D3, and resistors R1 to R5; The anode of the Zener diode D1 is connected to the anode of the diode D2; the cathode of the diode D2 is simultaneously connected to the first terminal of the resistor R1 and the first terminal of the resistor R2; the second terminal of the resistor R2 is simultaneously connected to the first terminal of the resistor R5 and the gate of the NMOS transistor Q1; the drain of the NMOS transistor Q1 is connected to the first terminal of the resistor R3 and the gate of the NMOS transistor Q2; the second terminal of the resistor R5, the first terminal of the resistor R4, the cathode of the diode D3, and the drain of the NMOS transistor Q2 are connected; the cathode of the diode D1, the second terminal of the resistor R3, and the second terminal of the resistor R4 are connected to the power supply VCC; the second terminal of the resistor R1, the source of the NMOS transistor Q1, and the source of the NMOS transistor Q2 are connected to the reference ground GND.
[0006] Furthermore, the transistor Q1 is an enhancement-mode N-channel MOSFET.
[0007] Furthermore, the transistor Q2 is an enhancement-mode N-channel MOSFET.
[0008] Furthermore, the Zener diode D1 is a Zener diode.
[0009] The present invention also includes a method for operating the above-mentioned undervoltage protection circuit suitable for neutron radiation environments, the method comprising the following steps: S1, Circuit off state When the input voltage VI is less than the reference voltage V1, the Zener diode D1 and NMOS transistor Q1 are cut off, while NMOS transistor Q2 and diode D3 are turned on, and the subsequent circuit is turned off, thus completing the undervoltage protection trigger. When the input voltage VI is within the voltage range of V1 < VI < VA * (R2 + R5) / R5 + V1, the Zener diode D1 is turned on. Since VA does not reach the turn-on threshold voltage of the NMOS transistor Q1, the NMOS transistor Q1 remains in the off state, and the subsequent circuit remains off. S2, Circuit on state When the input voltage VI≧VA*(R2+R5) / R5+V1, NMOS transistor Q1 is fully turned on, NMOS transistor Q2 is turned off, diode D3 is cut off, and the subsequent circuit resumes normal operation. S3, Hysteresis Control By setting the resistor parameters and calculating the undervoltage turn-on voltage and undervoltage turn-off voltage based on the turn-on threshold voltage of NMOS transistor Q1, the hysteresis range is formed by the difference between the two to achieve hysteresis control.
[0010] Compared with the prior art, the advantages of the present invention are: (1) The undervoltage protection circuit used in this invention innovatively selects the existing mature VDMOS transistor to implement the undervoltage protection circuit. By controlling the VDMOS device to turn on and off, the comparison output is high or low level, thereby establishing the control loop. The logic control circuit has a simple structure and the technical path is easy to implement. Moreover, the parameters and structure of the logic control circuit can be flexibly adjusted according to the actual use, such as adjusting the resistance value, which can meet the requirements of undervoltage protection in different application scenarios.
[0011] (2) The undervoltage protection circuit of this invention uses discrete components based on VDMOS, diodes, and resistors / capacitors to build a comparator circuit. This structure is simple and has strong resistance to neutron displacement damage. VDMOS transistors, as vertically conductive double-diffused power devices, have characteristics such as high input impedance, low drive power, fast switching speed, and good thermal stability. They do not suffer from the technical problem of bipolar devices being extremely sensitive and prone to failure under neutron radiation. The undervoltage protection circuit of this invention provides a simple, easy-to-implement, and low-cost undervoltage protection solution for nuclear-hardened DC / DC converters. Attached Figure Description
[0012] Figure 1 This is a schematic diagram of a typical undervoltage protection circuit in the prior art; Figure 2 This is a schematic diagram of the undervoltage protection circuit applicable to neutron radiation environments in this invention. Detailed Implementation
[0013] The present invention will be further described below with reference to the accompanying drawings: This invention provides an undervoltage protection circuit suitable for neutron radiation environments, the circuit structure of which is as follows: Figure 2 As shown, the circuit includes two NMOS transistors Q1 and Q2, a Zener diode D1, two diodes D2 and D3, and five resistors R1 to R5. The components are connected at precise nodes to achieve undervoltage detection and protection functions.
[0014] Specifically, the anode of the Zener diode D1 is connected to the anode of the diode D2; the cathode of the diode D2 is simultaneously connected to the first terminal of the resistor R1 and the first terminal of the resistor R2, and this connection is denoted as node C; the second terminal of the resistor R2 is simultaneously connected to the first terminal of the resistor R5 and the gate of the NMOS transistor Q1, and this connection is denoted as node A; the drain of the NMOS transistor Q1 is connected to the first terminal of the resistor R3 and the gate of the NMOS transistor Q2, and this connection is denoted as node B; the second terminal of the resistor R5, the first terminal of the resistor R4, the cathode of the diode D3, and the drain of the NMOS transistor Q2 are connected, and this connection is denoted as node D; the cathode of the diode D1, the second terminal of the resistor R3, and the second terminal of the resistor R4 are connected to the power supply VCC; the second terminal of the resistor R1, the source of the NMOS transistor Q1, and the source of the NMOS transistor Q2 are connected to the reference ground GND.
[0015] As a further improvement to the above technical solution, the transistor Q1 is an enhancement-mode N-channel MOSFET.
[0016] As a further improvement to the above technical solution, the transistor Q2 is an enhancement-mode N-channel MOSFET.
[0017] As a further improvement to the above technical solution, the Zener diode D1 is a Zener diode.
[0018] Assuming the voltage across Zener diode D1 is VD1 and the voltage across diode D2 is VD2, we define V1 = VD1 + VD2, where V1 is the reference voltage for undervoltage detection in the circuit. In this embodiment, the power input voltage VCC ranges from 0-40V, the power input reference ground GND is 0V, the undervoltage protection enable voltage is set to 16V-17V, and the undervoltage protection disable voltage is set to 14V-15.5V.
[0019] The present invention also includes a control method for the above-mentioned undervoltage protection circuit suitable for neutron radiation environments, the method comprising the following steps: S1, Circuit off state When the input voltage VI is less than the reference voltage V1, Zener diode D1 and NMOS transistor Q1 are cut off, while NMOS transistor Q2 and diode D3 are turned on, and the subsequent circuit is turned off, thus triggering the undervoltage protection. When the input voltage VI is in the range of V1 < VI < VA*(R2+R5) / R5+V1, Zener diode D1 is turned on, but since VA has not reached the turn-on threshold voltage of NMOS transistor Q1, NMOS transistor Q1 remains in the cut-off state, and the subsequent circuit remains turned off.
[0020] Specifically, when the input voltage VI is less than the reference voltage V1 (V1 = VD1 + VD2), the Zener diode D1 does not reach its breakdown voltage, and the branch current flowing through Zener diode D1 and diode D2 is extremely small. Due to the voltage divider effect of resistors R2 and R5, the gate voltage of NMOS transistor Q1 cannot reach its turn-on threshold, and MOS transistor Q1 is turned off. Because MOS transistor Q1 is turned off, its drain potential is close to the power supply level VCC, making the gate potential of MOS transistor Q2 high, thus turning on MOS transistor Q2. After NMOS transistor Q2 turns on, the potential at point D is pulled down to the reference ground terminal GND. At this time, the anode potential of diode D3 is higher than the cathode potential, diode D3 turns on, and further pulls down the potential of the subsequent control circuit, ultimately turning off the subsequent control circuit and completing the undervoltage protection trigger.
[0021] The voltage across Zener diode D1 is VD1, and the voltage across diode D2 is VD2. Therefore, the reference voltage V1 = VD1 + VD2. Assume that Zener diode D1 maintains a fixed voltage VD1 of 11.3V during normal operation, and the normal forward voltage of diode D2 is VD2 = 0.7V. When the input voltage VI = 12V, due to the presence of resistor R1, the voltage across Zener diode D1 does not reach the normal operating voltage of 11.3V. The current ID flowing through this branch is very small and does not reach the gate threshold voltage of NMOS transistor Q1. Therefore, NMOS transistor Q1 is cut off, and NMOS transistor Q2 is turned on.
[0022] As the input voltage VI gradually increases and exceeds V1, the gate voltage of NMOS transistor Q1 slowly rises with the increase of the current flowing through Zener diode D1 and diode D2. The gate voltage of NMOS transistor Q1, i.e., the potential at point A, is VA = (VCC - V1) * R5 / (R2 + R5). The conduction characteristic of NMOS transistor Q1 is related to its gate voltage. When the gate voltage reaches a certain value, NMOS transistor Q1 begins to slowly turn on from the off state. VCC = VA * (R2 + R5) / R5 + V1, where VA is the gate threshold voltage of NMOS transistor Q1.
[0023] S2, Circuit on state As the power input voltage VCC continuously increases, the gate voltage of NMOS transistor Q1 reaches its gate turn-on threshold voltage, and NMOS transistor Q1 is fully turned on. After NMOS transistor Q1 is turned on, its drain level is pulled down to ground. Since this point is connected to MOS transistor Q2, the gate potential of NMOS transistor Q2 drops to a low level, and NMOS transistor Q2 is turned off. After NMOS transistor Q2 is turned off, the level VD at node D becomes high, and the anode potential of diode D3 is lower than the cathode potential, so diode D3 is cut off. This part of the protection circuit will not affect the control signal part of the normal power supply, and the subsequent circuit resumes normal operation. At this time, the potential calculation formula for node A is: VA = VCC - V1 * (R4 + R5) / (R2 + R5 + R4), ensuring that the circuit maintains a stable conduction state.
[0024] S3, Hysteresis Control By setting the resistor parameters and the turn-on threshold voltage of the NMOS transistor Q1, the undervoltage turn-on voltage and undervoltage turn-off voltage are calculated, and the difference between the two forms a hysteresis range. This avoids frequent circuit state switching caused by small fluctuations in the input voltage, thus improving stability. The turn-on / turn-off voltage can be flexibly set by adjusting the resistor or Zener diode.
[0025] To avoid frequent switching of the circuit's operating state caused by input voltage fluctuations, hysteresis control is implemented through resistor parameter configuration. Key parameters are set as follows: assuming the turn-on threshold voltage of the selected NMOS transistor Q1 is 4V, and resistors R1=4kΩ, R2=4kΩ, R5=40kΩ, and R4=4kΩ.
[0026] S31. Calculate the undervoltage trigger voltage.
[0027] Based on the node A potential formula shown below, substituting the parameters, the undervoltage turn-on voltage VCC = 16.4V is obtained when the undervoltage protection circuit switches from off to on. VA = (VCC - V1) * R5 / (R2 + R5) = 4V. When VCC reaches 16.4V, NMOS transistor Q1 is turned on and NMOS transistor Q2 is turned off, the circuit switches to the on state, and the subsequent circuit works normally; at this time, the potential of node A VA = VCC - V1 * (R4 + R5) / (R2 + R5 + R4) = 5.4V, which is higher than the turn-on threshold voltage of NMOS transistor Q1.
[0028] S32. Calculate the undervoltage cutoff point voltage.
[0029] As the input voltage VI gradually decreases, since the potential VA of the current node A is 5.4V, which is higher than the turn-on threshold voltage of the NMOS transistor Q1, the input voltage needs to be further reduced in order to make the NMOS transistor Q1 switch from the on state to the off state.
[0030] According to the node A potential formula shown below, the undervoltage break point voltage VCC=15V is calculated by substituting the parameters: VA=VCC-V1*(R4+R5) / (R2+R5+R4)=4V; When the undervoltage shutdown point voltage VCC=15V, NMOS transistor Q1 is cut off and NMOS transistor Q2 is turned on, the undervoltage protection circuit flips to the shutdown state, and the subsequent circuit is turned off.
[0031] S33. Determine the hysteresis range of the undervoltage protection circuit based on the undervoltage turn-on voltage and the undervoltage turn-off voltage, and perform hysteresis control.
[0032] The difference between the VCC undervoltage turn-on voltage of 16.4V and the undervoltage turn-off voltage of 15V is the hysteresis range of this undervoltage protection circuit. This range can effectively buffer small fluctuations in the input voltage, ensuring that the circuit will not frequently switch between the on and off states when the input voltage fluctuates, thus improving the stability of the circuit.
[0033] Compared with the prior art, the advantages of the present invention are: (1) In this embodiment, the undervoltage turn-on voltage of the undervoltage protection circuit is 16.4V and the undervoltage turn-off voltage is 15V. Different undervoltage turn-on and undervoltage turn-off levels can be set by selecting different resistance values of resistors R2, R4, and R5 and selecting different Zener diodes to adapt to diverse application scenarios.
[0034] (2) In this embodiment, a diode D2 is connected in reverse series with the Zener diode D1. This is to make the circuit have better undervoltage protection characteristics under three temperature conditions. Since the Zener diode has a voltage regulation value that drifts at high and low temperatures, the reverse series diode makes the V1 value drift smaller at high and low temperatures, and the undervoltage turn-on and turn-off values change less under three temperature conditions.
[0035] (3) The radiation-hardened comparator circuit in this embodiment has a simple structure and better radiation-hardened characteristics. It uses a VDMOS transistor as the core of the comparator, as shown in Table 1. Compared to bipolar transistors and bipolar integrated circuits, VDMOS transistors offer better resistance to neutron radiation displacement effects. Furthermore, discrete components such as Zener diodes, diodes, and resistors are used to construct the comparator circuit; all of these components possess excellent neutron resistance characteristics. This allows the undervoltage protection circuit to operate normally in a neutron radiation environment, providing an undervoltage protection solution for radiation-hardened converters.
[0036] Table 1
[0037] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.
Claims
1. An undervoltage protection circuit suitable for neutron radiation environments, characterized in that, The circuit includes NMOS transistors Q1 and Q2, Zener diode D1, diodes D2 and D3, and resistors R1 to R5. The anode of the Zener diode D1 is connected to the anode of the diode D2; the cathode of the diode D2 is simultaneously connected to the first terminal of the resistor R1 and the first terminal of the resistor R2; the second terminal of the resistor R2 is simultaneously connected to the first terminal of the resistor R5 and the gate of the NMOS transistor Q1; the drain of the NMOS transistor Q1 is connected to the first terminal of the resistor R3 and the gate of the NMOS transistor Q2; the second terminal of the resistor R5, the first terminal of the resistor R4, the cathode of the diode D3, and the drain of the NMOS transistor Q2 are connected; the cathode of the diode D1, the second terminal of the resistor R3, and the second terminal of the resistor R4 are connected to the power supply VCC; the second terminal of the resistor R1, the source of the NMOS transistor Q1, and the source of the NMOS transistor Q2 are connected to the reference ground GND.
2. The undervoltage protection circuit suitable for neutron radiation environments according to claim 1, characterized in that, The transistor Q1 is an enhancement-mode N-channel MOSFET.
3. The undervoltage protection circuit suitable for neutron radiation environments according to claim 1, characterized in that, The transistor Q2 is an enhancement-mode N-channel MOSFET.
4. The undervoltage protection circuit suitable for neutron radiation environments according to claim 1, characterized in that, The Zener diode D1 is a Zener diode.
5. The operating method of the undervoltage protection circuit suitable for neutron radiation environment according to any one of claims 1 to 4, characterized in that, The method includes the following steps: S1, Circuit off state When the input voltage VI is less than the reference voltage V1, the Zener diode D1 and NMOS transistor Q1 are cut off, while NMOS transistor Q2 and diode D3 are turned on, and the subsequent circuit is turned off, thus completing the undervoltage protection trigger. When the input voltage VI is in the range of V1<VI<VA*(R2+R5) / R5+V1, the Zener diode D1 is turned on, VA does not reach the turn-on threshold voltage of the NMOS transistor Q1, the NMOS transistor Q1 remains in the off state, and the subsequent circuit remains off. S2, Circuit on state When the input voltage VI is greater than VA*(R2+R5) / R5+V1, NMOS transistor Q1 is fully turned on, NMOS transistor Q2 is turned off, diode D3 is cut off, and the subsequent circuit resumes normal operation. S3, Hysteresis Control By setting the resistor parameters and calculating the undervoltage turn-on voltage and undervoltage turn-off voltage based on the turn-on threshold voltage of NMOS transistor Q1, the hysteresis range is formed by the difference between the two to achieve hysteresis control.