Manufacturing method of electromagnetic shielding packaging structure

Abstract

A manufacturing method of an electromagnetic shielding packaging structure comprises the following steps that a chip containing groove is formed in a carrier plate, the groove wall of the chip containing groove is metalized, and a shielding groove and a metalized groove wall are formed; pasting a temporary bonding adhesive film on the lower surface of the carrier plate; placing the chip bonding pad into the shielding groove with the surface facing upwards, and bonding and fixing the back surface on the temporary bonding adhesive film; performing plastic packaging on the carrier plate, the shielding groove and the chip embedded into the shielding groove, and removing the temporary bonding adhesive film in the plastic packaging process to form a plastic packaging body; forming an annular blind groove in the lower part of the plastic package body to the metalized groove wall, and metalizing to form a first interconnection conduction groove hole connected with the metalized groove wall; forming a metal shielding bottom layer connected with the first interconnection conduction slot hole on the lower surface of the plastic package body; performing plastic packaging on the metal shielding bottom layer; manufacturing a rewiring layer at the upper part of the first plastic package body, wherein the steps comprise drilling to a metalized groove wall and metalizing to form a first interconnection via hole for grounding; and cutting according to needs to obtain a single finished product.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of advanced packaging technology of integrated circuits, and in particular to a manufacturing method of an electromagnetic shielding structure. BACKGROUND

[0002] Shielding in electronic systems serves two main purposes: to comply with EMC regulations; and to avoid interference. The need for electromagnetic shielding in chip packaging mainly arises in scenarios where signal integrity, operational reliability or safety are of utmost importance.

[0003] The conventional electromagnetic interference shielding in the prior art has a metal shielding cover, which is installed on a PCB on which SMT (Surface Mount Technology) patches are completed, to cover the components to be shielded. The shielding cover occupies valuable PCB area in the horizontal direction and occupies the internal three-dimensional space in the vertical direction, and each section needs to reserve a solder pad and an exclusion area with a width of about 1 mm, which occupies too much space and has low shielding efficiency, and is a major obstacle to the miniaturization of devices.

[0004] In order to avoid mutual interference between various components inside and outside the module, prevent electromagnetic interference between the densely arranged internal components and external signals, and ensure stable device performance, the commonly used electromagnetic shielding in the industry is called conformal shielding and partition shielding.

[0005] The conformal shielding technology has the same shape as the original package, and a uniform metal shielding layer 20 is formed on the surface of the package by electroplating, spraying, sputtering and other processing technologies without increasing the size of the package. The conformal shielding is mainly used in SiP packaging of PA (power amplifier), WiFi / BT (Bluetooth), Memory (memory chip) and the like, to isolate the interference between the internal circuit of the package and the external system.

[0006] The partition shielding is improved from the conformal shielding technology, and can be used not only for external shielding of the package, but also for isolation between various subsystem modules inside the package. As shown in Figure 3 The process of the partition shielding is to punch through the plastic package with a laser to expose the ground copper on the package substrate, fill in conductive filler to form a shielding wall 202, and together with the conformal shielding layer 201 on the surface of the package, completely isolate each subsystem, and also realize selective shielding, shielding only the areas in need. The partition shielding divides the shielding cavity into small cavities, reduces the size of the shielding cavity, and has a resonance frequency much higher than the system noise frequency, avoiding electromagnetic resonance, so that the system is more stable.

[0007] The partition shielding is mainly used in complex SiP packaging in which AP (application processor) / BB (baseband processor), Memory, WiFi / BT, FEM (front-end module) and the like are integrated together, to isolate inside the package and avoid mutual interference between the internal subsystems.

[0008] The existing partition shielding technology needs to fill conductive silver glue in the slot and solidify, and the conductive glue is connected with the ground plane on the substrate, which has some problems in process processing difficulty and cost, including: 1. The material such as silver glue used is expensive and has high cost; 2. The filling glue, baking operation, operation cost and production cycle are increased simultaneously; 3. The control difficulty of the cavity of the filling glue is high; 4. The risk of glue cracking after solidification caused by subsequent process stress is large; 5. The laser slot processing is too much, and the operation cost is high; 6. The depth-width ratio of the laser slot is too large, and the slot processing stability and effect are poor. SUMMARY

[0009] In view of the defects of the prior art, the application provides a manufacturing method of an electromagnetic shielding packaging structure, which solves the problems of high cost and difficult process defect control of the existing partition shielding manufacturing technology.

[0010] The specific technical solutions are as follows: A manufacturing method of an electromagnetic shielding packaging structure, characterized by comprising the following steps: Opening a chip containing slot on a carrier plate, and metalizing the slot wall of the chip containing slot to form a shielding slot and a metalized slot wall; Pasting a temporary bonding film on the lower surface of the carrier plate for fixing a chip to be packaged; Placing the chip with the pad face up into the shielding slot, and bonding and fixing the back of the chip to the temporary bonding film; Plastic packaging the carrier plate, the shielding slot and the chip embedded in the shielding slot, removing the temporary bonding film during the plastic packaging process to form a first plastic packaging body; Opening a ring-shaped blind slot to the metalized slot wall at the lower part of the first plastic packaging body and metalizing to form a ring-shaped first interconnection through slot hole, wherein the first interconnection through slot hole is connected with the metalized slot wall; Forming a metal shielding bottom layer connected with the first interconnection through slot hole on the lower surface of the first plastic packaging body; Plastic packaging the metal shielding bottom layer; Manufacturing a redistribution layer on the upper part of the first plastic packaging body, wherein the step of manufacturing the redistribution layer includes drilling to the metalized slot wall and metalizing to form a first interconnection through hole, and the first interconnection through hole is used for grounding; According to the needs, a single finished product is obtained after cutting.

[0011] Further, the temporary bonding film has thixotropic plasticity, and when contacting the chip, the temporary bonding film flows and wraps the bottom edge of the chip, and after solidification, a small dam body is formed.

[0012] Further, the sidewall of the chip containing slot has an inclination angle, so that the upper opening of the chip containing slot is larger than the lower opening.

[0013] Furthermore, the tilt angle ranges from 80° to 85°.

[0014] Furthermore, the shielding groove has multiple locations, at least one of which is used to encapsulate a double-sided pad chip, the double-sided pad chip having a first pad surface and a second pad surface, and the method further includes the following steps: The double-sided pad chip and the conductor are placed in the same shielding groove and bonded to the temporary bonding film, with the first pad surface of the double-sided pad chip facing upwards. A molding substrate, a shielding groove, a double-sided pad chip embedded in the shielding groove, and a conductor are formed by removing the temporary bonding adhesive film during the molding process to form a second molding body. A redistribution layer is formed on the upper part of the second molding compound, wherein the step of forming the redistribution layer includes drilling holes to the upper surface of the conductor to form a second interconnecting via. Drill holes from the lower surface of the second molding compound to the pads on the second pad surface and the lower surface of the conductor, and metallize them to form the third interconnect via and the fourth interconnect via; An annular blind groove is opened at the lower part of the second molding body to the metallized tank wall and metallized to form an annular first interconnecting slot hole, the first interconnecting slot hole being connected to the metallized tank wall. A circuit layer is formed on the lower surface of the second molding compound, connecting the third interconnect via and the fourth interconnect via; The circuit layer is encapsulated to form an encapsulation layer. An annular blind groove is opened in the encapsulation layer to the first interconnection slot and metallized to form a second interconnection slot. The second interconnection slot is connected to the first interconnection slot. A metal shielding underlayer connected to the second interconnecting through-hole is formed on the lower surface of the molding layer; After the metal shielding base layer is encapsulated, it is cut as needed to obtain individual finished products.

[0015] Furthermore, the first interconnecting conductive slot and the second interconnecting conductive slot are processed by laser continuous drilling process, wherein the hole diameter d, hole depth h and hole spacing l of the continuous hole are related as follows: d≥2h; d≥2l.

[0016] Furthermore, the lower surface of the carrier board is covered with a second metal layer; there are multiple chip receiving slots, and the following steps are performed on at least one of the chip receiving slots: The second metal layer is etched, leaving the portion of the second metal layer covering the lower opening of the shielding groove to form a metal shielding underlayer. Place the chip with the pads facing up into the shielding groove, and fix the back side to the metal shielding base layer by adhesive bonding or welding with conductive adhesive. A molding substrate, a shielding groove, a chip embedded in the shielding groove, and a metal shielding underlayer form a third molding body; A redistribution layer is fabricated on the upper part of the third molding compound. The step of fabricating the redistribution layer includes drilling holes to the metallization trench wall and metallizing to form a first interconnect via, the first interconnect via being used for grounding. Individual finished products are obtained by cutting as needed.

[0017] Furthermore, a limiting groove is formed on the surface of the metal shielding layer facing the shielding groove. The chip is placed in the limiting groove of the metal shielding layer to limit the displacement of the chip during the bonding or welding process.

[0018] Furthermore, the bottom wall of the limiting groove is roughened.

[0019] Furthermore, the distance between the edge of the chip and the metallization trench wall is not less than 50 μm.

[0020] In summary, the electromagnetic shielding structure manufacturing method disclosed in this invention, after implementing the aforementioned multiple steps, can produce the embedded packaged electromagnetic shielding structure. The above method and structure have the following beneficial effects: This invention provides a method for manufacturing an electromagnetic shielding packaging structure, applicable to board-level embedded packaging of chips. It is suitable for electromagnetic shielding of various types of chips, including single-sided pad chips, double-sided pad chips, and chips with heat dissipation requirements on the back side. Utilizing existing embedded packaging processes, electromagnetic shielding of different types of chips is achieved separately on the same substrate, i.e., partitioned shielding, which effectively reduces mutual interference between components and improves product stability and reliability. The shielding structure provided by this invention does not increase the volume of the package, significantly reducing the area occupied by traditional shielding. This makes it possible to achieve more functions within a limited space, better meeting the increasingly diversified product design needs and enhancing the production competitiveness of chip module board-level embedded packaging technology.

[0021] To further understand the features and technical content of this invention, please refer to the following detailed description and accompanying drawings. However, these descriptions and drawings are only for illustrating the invention and are not intended to limit the scope of protection of the invention in any way. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of an existing metal shield structure; Figure 2 This is a schematic diagram of a conformal shielding structure in the prior art; Figure 3 This is a schematic diagram of an existing partitioned shielding structure; Figures 4-16 This is a process flow diagram of the manufacturing method of the electromagnetic shielding packaging structure according to the first embodiment of the present invention; Figures 17-18 This is a schematic diagram of the thixotropic plasticity of the temporary bonded adhesive film layer according to the second embodiment of the present invention; Figures 19-20 This is a schematic diagram of the chip receiving groove sidewall having an inclination angle according to the third embodiment of the present invention; Figures 21-27 This is a process flow diagram of the manufacturing method of the electromagnetic shielding packaging structure applicable to double-sided pad chips according to the fourth embodiment of the present invention; Figures 28-33 This is a process flow diagram of the manufacturing method of the electromagnetic shielding packaging structure for chips with back heat dissipation requirements according to the fifth embodiment of the present invention; Figures 34-36 This is a schematic diagram of the limiting groove in the fifth embodiment of the present invention.

[0023] In the diagram: 10 - Existing metal shielding structure; 20 - Existing conformal shielding structure; 201 - Existing zoned shielding cover; 202 - Existing conductive adhesive shielding wall. 11-First metal layer; 12-Second metal layer; 2-Carrier board; 3-Limiting groove; 31-Bottom wall; 4-Chip receiving groove; 41-Shielding groove; 42-Limiting groove; 51-Metallized groove wall; 52-First interconnect via; 53-Metallic shielding bottom layer; 54-First interconnect via; 55-Second interconnect via; 6-Chip; 6'-Double-sided pad chip; 6'a-First pad surface; 6'b-Second pad surface; 61-Conductor; 6”-Back heat dissipation chip; 7-First molding compound; 71-First circuit layer; 72-Second interconnect via; 73-Third interconnect via; 74-Fourth interconnect via; 75-Fifth interconnect via; 76-Second circuit layer; 7'-Second molding compound; 7”-Third molding compound; 8-Molding layer; 9-Temporary bonding film; 92-Dam body; Detailed Implementation

[0024] The following is in conjunction with the appendix Figures 4-36 The present invention provides a further description of the manufacturing method and structure of an electromagnetic shielding structure. Example

[0025] like Figures 4-16 The diagram illustrates a method for manufacturing an electromagnetic shielding structure according to a first embodiment of the present invention, comprising the following steps: 1. Pattern circuit fabrication: Obtain a carrier board, which includes a carrier board 2 and a first metal layer 11 covering the upper surface of the carrier board 2, and form peripheral circuits and window areas on the first metal layer 11.

[0026] The peripheral circuitry refers to the circuit wiring built around the chip, necessary to ensure its normal operation and achieve specific functions, such as the lines used to connect power supply circuits, clock circuits, signal conditioning circuits, communication interface circuits, sensor / actuator interfaces, and debugging / programming interfaces. The windowed area refers to the area exposed on the surface of the carrier substrate 2 after the first metal layer 11 is removed, used for subsequent chip placement and shielding structure construction.

[0027] II. Carrier Board Slotting and Metallization: A slot is made in the windowed area, penetrating the carrier board 2 to form a chip receiving slot 4. The slot wall of the chip receiving slot 4 is metallized to form a shielding slot 41 and a metallized slot wall 51. The metallization of the inner wall of the slot can be achieved by sputtering, copper plating, or electroplating. During the formation process, it achieves physical contact and metallurgical bonding with the metal of the top layer of the metal shield, ultimately forming a good continuous conductive structure.

[0028] 3. Die bonding and transfer: A temporary bonding film 9 is attached to the lower surface of the carrier board 2 to fix the chip 6 to be packaged; the chip 6 is placed in the shielding groove 41 with the pad side facing up, and the back side is bonded and fixed to the temporary bonding film 9.

[0029] Primary molding: includes upper molding and lower molding. Upper molding refers to the molding compound encapsulating the carrier board 2, chip receiving groove 4, metallization groove wall 51 and the portion of the chip 6 located above the temporary bonding adhesive film 9, and filling the gap between the chip 6 and the shielding groove 41 to form an insulating layer.

[0030] After the upper molding is completed, the temporary bonding film 9 is removed and the lower molding is performed. The molding compound encapsulates the carrier board 2, the chip receiving groove 4, the metallization groove wall 51 and the lower surface of the chip 6. After the lower molding is completed, the first molding body 7 is formed.

[0031] The molding process can be carried out by double-sided vacuum pressing or molding, using resin-based molding materials, such as epoxy resin, silicone resin, polyurethane resin or other resin materials, one or more of these.

[0032] IV. Fabrication of metallized vias and interconnect vias: A hole is drilled from the upper surface of the first molding compound 7 to the metallized via wall 41 and metallized to form a first interconnect via 54, which is used for grounding; A hole is drilled from the upper surface of the first molding compound 7 to the pad of the chip 6 and metallized to form a second interconnect via 72, which is used for connecting the chip 6 to the circuit layer; An annular blind groove is opened on the lower surface of the first molding body 7 to the metallized groove wall 51 and metallized to form an annular first interconnecting through slot 52, which is connected to the metallized groove wall 51.

[0033] The first interconnecting through-hole 52 is processed by laser ablation or mechanical milling continuous drilling process. Taking laser ablation as an example, the diameter of the hole drilled by laser is usually large at the opening and small at the bottom. In order to achieve good conductivity, the bottom of the hole must be continuous. In this embodiment, the relationship between the diameter d, the depth h and the distance l of the continuous hole is set as follows: d≥2h; d≥2l. After metallization filling, good continuous conductivity can be achieved.

[0034] 5. Fabrication of the metal shielding underlayer 53: Using conventional substrate or PCB processing techniques such as sputtering or copper plating, electroplating, pattern transfer, etc., a metal shielding underlayer 53 is formed on the lower surface of the primary molding body at a position relative to the shielding groove 41. The metal shielding underlayer 53 is connected to the first interconnecting through-hole 52.

[0035] The metal shielding bottom layer 53, the first interconnecting through-hole 52, and the metallized groove wall 51 together form a continuous metal shielding cover.

[0036] Plastic-encapsulated protective metal shielding base layer 53.

[0037] 7. Fabrication of redistribution layer: A first circuit layer 71 is formed on the upper surface of the first molding compound 7; after molding the first circuit layer 71, metallized vias and circuit layers are formed again; the steps of molding the layer and forming metallized vias and circuit layers are repeated until the required number of redistribution layers is obtained; the steps of fabricating redistribution layer include drilling and metallizing to form interconnect vias connected to the first interconnect via 54 for grounding.

[0038] 8. Cut as needed to obtain individual finished products. Example

[0039] like Figures 17-18 The electromagnetic shielding structure manufacturing method of the second embodiment of the present invention differs from that of embodiment 1 in that, in order to make the chip 6 bond more firmly to the temporary bonding film 9 and avoid the displacement of the chip 6 caused by the flow of molding compound in the subsequent molding process, which would cause the side of the chip 6 to come into contact with the metallization trench wall 51 and cause insulation failure, the adhesive layer 91 of the temporary bonding film 9 used in this embodiment has high viscosity and a certain thixotropic plasticity: when the chip squeezes the adhesive layer 91, the adhesive will flow and wrap around the bottom edge of the chip, forming a small dam 92, which provides additional lateral support for the chip 6 after curing and resists the impact of the flow of molding compound. Example

[0040] like Figures 19-20 The electromagnetic shielding structure manufacturing method of the third embodiment of the present invention shown differs from that of embodiment 1 in that the sidewall of the chip receiving groove 4 has an inclination angle α, such that the upper opening of the chip receiving groove is larger than the lower opening, and the inclination angle α is in the range of 80°-90°.

[0041] The chip receiving groove 4 has an angled sidewall design, which makes the metallization groove wall 41 also have an angle. The larger inlet allows the molding compound to flow more smoothly into the shielding groove 41 when it melts, avoiding the formation of voids. In addition, the molding compound preferentially flows down the sidewall under the action of surface tension, orderly filling the gap between the chip and the shielding groove 41 from bottom to top. It can also reduce the impact on the chip 6 caused by direct flow under gravity, further preventing the chip 6 from shifting or failing.

[0042] However, a larger entry point would occupy more carrier board space, which is not conducive to miniaturization of the package. Therefore, this invention limits the tilt angle α to 80°-90°, which improves the molding quality while limiting the impact on size within a certain range. Example

[0043] like Figures 21-27 The electromagnetic shielding structure manufacturing method of the fourth embodiment of the present invention shown includes a plurality of shielding slots 41, at least one of which is used to encapsulate a double-sided pad chip 6', wherein the double-sided pad chip 6' has a first pad surface 6'a and a second pad surface 6'b, and further includes the following steps: 1. Die bonding and transfer: Place the double-sided pad chip 6' and the conductor 61 into the same shielding groove 41 and bond them to the temporary bonding film 9, with the first pad surface 6'a of the double-sided pad chip 6' facing upward; 2. First molding: molding carrier 2, shielding groove 41, double-sided pad chip 6' embedded in shielding groove 41 and conductor 61, the temporary bonding film 9 is removed during molding to form a second molding body 7'; 3. Fabrication of metallized vias and interconnect vias: Drill holes from the upper surface of the second molding compound 7' to the metallized via wall 51, the first pad surface 6'a pad, and the upper surface of the conductor 61, and metallize them to form the first interconnect via 54, the second interconnect via 71, and the third interconnect via 73. The first interconnect via 54 is used for grounding, and the second interconnect via 72 and the third interconnect via 73 are used for connecting the chip 6' to the circuit layer. Drill holes from the lower surface of the second molding compound 7' to the pad of the second pad surface 6'b and the lower surface of the conductor 61 and metallize them to form the fourth interconnect via (74) and the fifth interconnect via (75). An annular blind groove is opened from the lower surface of the second molding body 7' to the metallized tank wall 51 and metallized to form an annular first interconnecting slot 52, the first interconnecting slot 52 being connected to the metallized tank wall 51. 4. Fabrication of the second circuit layer: A second circuit layer 76 is formed on the lower surface of the second molding compound 7', connecting the fourth interconnect via (74) and the fifth interconnect via (75); at this time, the pad signal of the chip 6' located on the second pad surface 6'b is led out to the upper surface of the first molding compound 7' through the fourth interconnect via (74), the fifth interconnect via (75), the conductor 61 and the third interconnect via 73 in sequence, and is located on the same side as the pad signal of the first pad surface 6'a, which facilitates the subsequent fabrication of the redistribution layer; 5. Secondary molding: The circuit layer is molded to form a molding layer 8. An annular blind groove is opened in the molding layer 8 to the first interconnection through slot 52 and metallized to form a second interconnection through slot 55. The second interconnection through slot 55 is connected to the first interconnection through slot 52. 6. Fabrication of the second interconnecting through slot: A metal shielding bottom layer 53 connected to the second interconnecting through slot 55 is formed on the lower surface of the encapsulation layer 8. At this time, the metal shielding bottom layer 53, the second interconnecting through slot 55, the first interconnecting through slot 52 and the metallized slot wall 51 together constitute a continuous metal shielding cover. Plastic-encapsulated protective metal shielding base layer 53; 7. Fabrication of the redistribution layer: A redistribution layer is fabricated on the upper part of the second molding compound 7', and a first circuit layer 71 is formed on the upper surface of the first molding compound 7'; after molding the first circuit layer 71, metallized vias and circuit layers are formed again; the steps of molding the layer and forming metallized vias and circuit layers are repeated until the required number of redistribution layers is obtained; the step of fabricating the redistribution layer includes drilling and metallizing to form interconnecting vias that are connected to the first interconnecting via 54 for grounding.

[0044] Individual finished products are obtained by cutting as needed. Example

[0045] like Figures 28-33 The electromagnetic shielding structure manufacturing method of the fifth embodiment of the present invention shown has a second metal layer 12 covering the lower surface of the carrier plate 2, and there are multiple chip receiving slots 4. The following steps are performed on at least one of the chip receiving slots 4: 1. Forming a metal shielding bottom layer: Through processes such as pattern transfer and etching, the portion of the second metal layer 12 covering the lower opening of the chip receiving groove 4 is retained to form a metal shielding bottom layer 53. II. Metallization of the Tank Wall: The inner wall surface of the chip housing tank 4 is metallized to form a shielding tank 41 and a metallized tank wall 51. The metallization of the inner wall of the tank hole can be achieved by sputtering, copper plating, or electroplating. During the formation process, it achieves physical contact and metallurgical bonding with the metal of the top layer of the metal shield, ultimately forming a good continuous conductive structure. The metallized tank wall 51 and the bottom layer of the metal shield 42 together form a closed metal shield.

[0046] 3. Die Bonding and Transfer: The back heat dissipation chip 6” is placed in the shielding groove 41 with the pad side facing up. The back side is fixed to the metal shielding bottom layer 53 by conductive adhesive bonding or welding. In this embodiment, the back heat dissipation chip 6” is a single-sided active chip. The back substrate of the back heat dissipation chip 6” is mechanically connected to the metal shielding top layer 53 to achieve position fixation and thermal management. The mechanical connection can be achieved by conductive adhesive bonding, brazing process or high-temperature sintering welding process.

[0047] IV. Molding: Using resin-based molding materials, double-sided vacuum pressing or molding process is adopted to form a third molding body 7”, including molding carrier 2, shielding groove 41, back heat dissipation chip 6” and metal shielding bottom layer 53; 5. Fabrication of metallized vias: Forming a molding compound, drilling holes on the upper surface of the third molding compound 7” to the metallization trench wall 51 and metallizing them to form a first interconnect via 54, which is used for grounding; drilling holes from the upper surface of the first molding compound 7” to the pad of the back heat sink chip 6” and metallizing them to form a second interconnect via 72, which is used for connecting the back heat sink chip 6” to the circuit layer; 6. Fabrication of the redistribution layer: A redistribution layer is fabricated on the upper part of the molding compound 7”, and a first circuit layer 71 is formed on the upper surface of the first molding compound 7”; after molding the first circuit layer 71, metallized vias and circuit layers are formed again; the steps of molding the layer and forming metallized vias and circuit layers are repeated until the required number of redistribution layers is obtained; the step of fabricating the redistribution layer includes drilling and metallizing to form interconnecting vias connected to the first interconnecting via 54 for grounding.

[0048] Individual finished products are obtained by cutting as needed.

[0049] like Figures 34-35 This embodiment also includes the following steps: Before the die bonding and transfer step, a limiting groove 42 is formed on the surface of the metal shielding bottom layer 53 facing the shielding groove 41 by laser ablation or chemical etching process, which is used to limit the positional displacement of the chip 6” during the bonding or welding process. The depth of the limiting groove 42 does not exceed the thickness of the back insulating layer of the chip 6”.

[0050] Specifically, taking conductive adhesive bonding as an example, a certain thickness of conductive adhesive is applied to the back of chip 6". During bonding, due to the fluidity of the adhesive, chip 6" will slide and displace when bonding with the metal shielding layer 53 and during the curing process. When the displacement is too large, it may cause the side of chip 6" to come into contact with the metallization groove wall 51, resulting in poor insulation. The limiting groove 42 in this solution limits the boundary of the displacement of chip 6". When chip 6" moves to the edge of the limiting groove, it will be blocked to prevent it from continuing to move towards the metallization groove wall.

[0051] Furthermore, since the metal layer is relatively smooth, in order to increase the bonding strength between the conductive adhesive and the metal shielding bottom layer 53, the bottom wall 31 of the limiting groove can be processed by laser ablation or chemical etching before bonding to form an uneven rough surface, thereby increasing the contact area between the bottom wall 31 of the limiting groove and the conductive adhesive, making the chip 6” bond more firmly.

Claims

1. A method for manufacturing an electromagnetic shielding packaging structure, characterized in that... Includes the following steps: A chip receiving slot (4) is opened on the carrier board (2), and the slot wall of the chip receiving slot (4) is metallized to form a shielding slot (41) and a metallized slot wall (51). A temporary bonding film (9) is pasted on the lower surface of the carrier board (2) to fix the chip to be packaged (6). Place the chip (6) with the pads facing up into the shielding groove (41), and then attach and fix the back side to the temporary bonding film (9); The molding process includes a molding substrate (2), a shielding groove (41), and a chip (6) embedded in the shielding groove (41). During the molding process, the temporary bonding adhesive film (9) is removed to form a first molding body (7). An annular blind groove is opened at the lower part of the first molding body (7) to the metallized tank wall (51) and metallized to form an annular first interconnecting through slot (52), which is connected to the metallized tank wall (51). A metal shielding underlayer (53) connected to the first interconnecting through-hole (52) is formed on the lower surface of the first molding compound (7); The metal shielding substrate (53) is encapsulated. A redistribution layer is fabricated on the upper part of the first molding compound (7). The step of fabricating the redistribution layer includes drilling to the metallization trench wall (51) and metallizing to form a first interconnect via (54). The first interconnect via (54) is used for grounding. Individual finished products are obtained by cutting as needed.

2. The method for manufacturing the electromagnetic shielding packaging structure as described in claim 1, characterized in that, The adhesive on the bonding surface of the temporary bonding film (9) has thixotropic plasticity. When it comes into contact with the chip (6), it flows and wraps around the bottom edge of the chip (6). After curing, it forms a micro dam (92).

3. The method for manufacturing the electromagnetic shielding packaging structure as described in claim 1, characterized in that, The sidewall of the chip receiving groove (4) has an inclination angle, so that the upper opening of the chip receiving groove is larger than the lower opening.

4. The method for manufacturing the electromagnetic shielding packaging structure as described in claim 2, characterized in that, The tilt angle ranges from 80° to 85°.

5. The method for manufacturing an electromagnetic shielding packaging structure as described in claim 1, characterized in that, The shielding groove (41) has multiple sections, at least one of which is used to encapsulate a double-sided pad chip (6'), the double-sided pad chip (6') having a first pad surface (6'a) and a second pad surface (6'b), and further includes the following steps: The double-sided pad chip (6') and the conductor (61) are placed in the same shielding groove (41) and bonded to the temporary bonding film (9), with the first pad surface (6'a) of the double-sided pad chip (6') facing upward; The molding substrate (2), shielding groove (41), double-sided pad chip (6') embedded in the shielding groove (41) and conductor (61) are formed by removing the temporary bonding adhesive film (9) during the molding process to form a second molding body (7'). A redistribution layer is formed on the upper part of the second molding compound (7'), the step of forming the redistribution layer includes drilling to the upper surface of the conductor to form a second interconnect via (72). Drill holes from the lower surface of the second molding compound (7') to the pads of the second pad surface (6'b) and the lower surface of the conductor (61) and metallize them to form the third interconnect via (73) and the fourth interconnect via (74). An annular blind groove is opened at the lower part of the second molding body (7') to the metallized tank wall (51) and metallized to form an annular first interconnecting through slot (52), the first interconnecting through slot (52) being connected to the metallized tank wall (51); A circuit layer is formed on the lower surface of the second molding compound (7'), connecting the third interconnect via (73) and the fourth interconnect via (74); The circuit layer is encapsulated to form an encapsulation layer (8). An annular blind groove is opened in the encapsulation layer (8) to the first interconnection through slot (52) and metallized to form a second interconnection through slot (55). The second interconnection through slot (55) is connected to the first interconnection through slot (52). A metal shielding underlayer (53) is formed on the lower surface of the encapsulation layer (8) and connected to the second interconnecting through-hole (55); After the metal shielding base layer (53) is encapsulated, it is cut as needed to obtain a single finished product.

6. The method for manufacturing an electromagnetic shielding packaging structure as described in any one of claims 1-5, characterized in that... The first interconnecting through slot (52) and the second interconnecting through slot (55) are processed by laser continuous drilling process. The relationship between the hole diameter (d), hole depth (h) and hole spacing (l) of the continuous hole is as follows: d≥2h; d≥2l.

7. The method for manufacturing an electromagnetic shielding packaging structure as described in claim 1, characterized in that, The lower surface of the carrier board (2) is covered with a metal layer (12); there are multiple chip receiving slots (4), and the following steps are performed on at least one of the chip receiving slots (4): The metal layer (12) is etched, and the portion of the metal layer (12) covering the lower opening of the chip receiving groove (4) is retained to form a metal shielding bottom layer (53). The wall of the chip receiving slot (4) is metallized to form a shielding slot (41) and a metallized slot wall (51), and the metallized slot wall (51) is connected to the metal shielding bottom layer (53). Place the chip (6) with the pads facing up into the shielding groove (41), and fix the back side to the metal shielding bottom layer (53) by adhesive bonding or welding. The molding substrate (2), the shielding groove (41), the chip (6) embedded in the shielding groove (41) and the metal shielding bottom layer (53) form a third molding body (7”); A redistribution layer is fabricated on the upper part of the third molding compound (7). The step of fabricating the redistribution layer includes drilling to the metallization trench wall (51) and metallizing to form a first interconnect via (54), which is used for grounding. Individual finished products are obtained by cutting as needed.

8. The method for manufacturing an electromagnetic shielding packaging structure as described in claim 7, characterized in that... It also includes the following steps: A limiting groove (3) is formed on the surface of the metal shielding bottom layer (53) facing the shielding groove (41). The chip (6") is placed in the limiting groove (3) of the metal shielding bottom layer (53) to limit the displacement of the chip (6) during the bonding or welding process.

9. The method for manufacturing an electromagnetic shielding packaging structure as described in claim 8, characterized in that... It also includes the following steps: The bottom wall (31) of the limiting groove (3) is roughened.

10. The method for manufacturing an electromagnetic shielding packaging structure as described in any one of claims 1-9, characterized in that... The distance between the edge of the chip (6,6',6") and the metallization trench wall (51) is not less than 50 μm.

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