Method and device for determining placement direction of silicon wafer, equipment and medium

Abstract

The invention provides a method, a device and equipment for determining the placement direction of a silicon wafer and a medium. The method comprises the following steps: acquiring global three-dimensional geometric data of the silicon wafer; analyzing the overall distribution characteristics of the global three-dimensional geometric data; and based on the overall distribution characteristics, establishing a geometric criterion representing the placement direction of the silicon wafer so as to determine the placement direction of the silicon wafer.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a method, apparatus, device and medium for determining the placement orientation of a silicon wafer. Background Technology

[0002] In semiconductor manufacturing processes, silicon wafers need to be placed in the process equipment according to a strictly predetermined orientation. As a high-precision substrate, the front side (usually the device manufacturing side) and the back side of the silicon wafer may have subtle but critical differences in terms of curvature, thickness distribution, surface treatment, or markings.

[0003] In actual automated production processes, if silicon wafers are accidentally placed upside down, it will lead to a series of serious problems. For example, upside-down placement will cause a systematic deviation between the geometry of the silicon wafer and the preset process model of the equipment. This deviation may lead to mismatch of process parameters, and even cause equipment calibration failure and abnormal product performance.

[0004] Currently, some detection methods relied upon in related technologies, such as traditional manual visual inspection or single-point thickness measurement, are difficult to automatically and reliably identify reverse placement problems caused by systematic shifts in global geometric features. Manual visual inspection is inefficient and unreliable; while single-point thickness measurement cannot capture the overall morphological characteristics of the silicon wafer. Therefore, if such reverse placement is not detected in time, it can easily lead to subsequent batch process defects. Summary of the Invention

[0005] This disclosure provides a method, apparatus, equipment, and medium for determining the placement orientation of silicon wafers; it can solve the technical problems of insufficient accuracy and low efficiency in the detection of the front and back sides of silicon wafers in the prior art.

[0006] The technical solution disclosed herein is implemented as follows: In a first aspect, this disclosure provides a method for determining the placement orientation of a silicon wafer, including: Obtain the global three-dimensional geometric data of the silicon wafer; Analyze the overall distribution characteristics of the global three-dimensional geometric data; and Based on the overall distribution characteristics, a geometric criterion is established to characterize the placement orientation of the silicon wafer, so as to determine the placement orientation of the silicon wafer.

[0007] Secondly, this disclosure provides an apparatus for determining the placement orientation of a silicon wafer, comprising: The acquisition module is used to acquire the global three-dimensional geometric data of the silicon wafer; The analysis module is used to analyze the overall distribution characteristics of the global three-dimensional geometric data; and The determination module is used to establish a geometric criterion characterizing the placement orientation of the silicon wafer based on the overall distribution characteristics, so as to determine the placement orientation of the silicon wafer.

[0008] Thirdly, this disclosure provides an electronic device comprising: a processor and a memory; the processor being configured to execute instructions stored in the memory to implement the method for determining the placement orientation of a silicon wafer as described in the first aspect.

[0009] Fourthly, this disclosure provides a computer storage medium storing at least one instruction, which is executed by a processor to implement the method for determining the placement orientation of a silicon wafer as described in the first aspect.

[0010] This disclosure provides a method, apparatus, device, and medium for determining the placement orientation of silicon wafers. By acquiring global three-dimensional geometric data of the silicon wafer and analyzing its overall distribution characteristics (rather than relying on single-point or local information), a geometric criterion characterizing its placement orientation is established. This method can sensitively capture systematic shifts in the global morphology (such as warpage and curvature) caused by reverse placement of the silicon wafer, thereby automatically and reliably identifying the orientation of the silicon wafer in the process flow, avoiding batch-type process defects, and significantly improving the level of automation. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of an application scenario provided in this disclosure.

[0012] Figure 2 This is a schematic diagram of an electronic device provided in this disclosure.

[0013] Figure 3 A flowchart illustrating a method for determining the placement orientation of a silicon wafer as provided in this disclosure.

[0014] Figure 4 A flowchart illustrating another method for determining the placement orientation of a silicon wafer provided in this disclosure.

[0015] Figure 5 This is a schematic diagram of a least-squares surface provided in this disclosure.

[0016] Figure 6 A flowchart illustrating yet another method for determining the placement orientation of a silicon wafer provided in this disclosure.

[0017] Figure 7 This is a schematic diagram of an apparatus for determining the placement orientation of a silicon wafer, as provided in this disclosure. Detailed Implementation

[0018] The technical solutions in this disclosure will now be clearly and completely described with reference to the accompanying drawings.

[0019] To make the objectives, technical solutions, and advantages of this disclosure clearer, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0020] In the description of this disclosure, unless otherwise stated, "multiple" means two or more. The term "and / or" describes a relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the ordinal numbers such as "first," "second," etc., used herein are only for distinguishing descriptions and do not have any limiting function in terms of order, hierarchy, or hierarchy.

[0021] Please see Figure 1 , Figure 1 This is a schematic diagram illustrating an application scenario of an embodiment of this disclosure. The scenario illustrates a semiconductor manufacturing process. In this process, a silicon wafer 12 needs to be transferred from one processing station (such as a cleaning station) to the next processing station (such as a thin film deposition apparatus 14).

[0022] Before the silicon wafer 12 enters the thin film deposition equipment 14, a device 20 for determining the placement orientation of the silicon wafer, as provided in this disclosure, is integrated into the transport path (e.g., integrated into the robotic arm 16, or as a separate detection station). The device 20 for determining the placement orientation of the silicon wafer is used to automatically and quickly detect its placement orientation (front or back) before the silicon wafer 12 enters the critical process steps.

[0023] If the device 20 for determining the placement orientation of the silicon wafer detects that the silicon wafer 12 is placed in the upright position (e.g., Figure 1 If the silicon wafer 12 is detected to be placed upside down, the device 20 for determining the wafer placement orientation will issue a signal (e.g., trigger an alarm, or directly control the robotic arm 16) to perform a corrective operation (such as flipping the wafer or stopping the process) to prevent the upside-down wafer from entering subsequent processes.

[0024] The device 20 for determining the orientation of the silicon wafer can be a standalone electronic device or a functional module of semiconductor manufacturing equipment (such as robotic arm 16 or deposition equipment 14). In a typical implementation, the function of this device can be implemented by an electronic device.

[0025] Please see Figure 2 , Figure 2This is a hardware architecture diagram of an electronic device 100 according to an embodiment of the present disclosure. The electronic device 100 can be used to implement... Figure 1 The device 20 in the process of determining the placement orientation of the silicon wafer, or performing subsequent method steps.

[0026] Electronic device 100 may include processor 110, memory 120, bus 130, and data acquisition interface 140. Processor 110 connects various parts of the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in memory 120, and by calling data stored in memory 120. Optionally, processor 110 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). Processor 110 may integrate one or more of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content displayed on the touchscreen; the NPU implements artificial intelligence (AI) functions; and the baseband chip handles wireless communication. It is understood that the baseband chip may not be integrated into the processor 110 and can be implemented as a separate chip.

[0027] Optionally, the processor 110 connects various parts within the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 120, and by calling data stored in the memory 120. Optionally, the processor 110 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 110 can integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Specifically, the CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required to be displayed on the touch screen; the NPU is used to implement Artificial Intelligence (AI) functions; and the baseband chip is used to handle wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor 110, but may be implemented using a separate chip.

[0028] The memory 120 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 120 may include a non-transitory computer-readable storage medium. The memory 120 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 120 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0029] Bus 130 is used to connect various components such as processor 110, memory 120 and data acquisition interface 140 to realize the transmission of data and control signals between them.

[0030] Reference Figure 3The data acquisition interface 140 is responsible for communicating and connecting with the external 3D data acquisition sensor 200. The 3D data acquisition sensor 200 is a physical device for acquiring global geometric data of the silicon wafer. For example, it can be a two-sided interferometer or a laser scanner, etc., which will not be described in detail in the example embodiment.

[0031] The data acquisition interface 140 is responsible for controlling the start and stop of the sensor 200, and receiving the raw data (such as point cloud data or height distribution map) collected by the sensor 200, and then providing it to the processor 110 for analysis.

[0032] In some embodiments, the electronic device 100 may also include a communication interface (e.g., for connecting to a manufacturing execution system (MES) in the factory) and a user interface (e.g., a display screen or warning light), which will not be elaborated here.

[0033] Please see Figure 3 , Figure 3 This is a flowchart illustrating a method for determining the placement orientation of a silicon wafer, provided in an embodiment of this disclosure. The method can be... Figure 2 The electronic device 100 shown executes the steps, which may specifically include steps S310 to S330.

[0034] In step S310, the global three-dimensional geometric data of the silicon wafer is acquired.

[0035] In some exemplary embodiments of this disclosure, global three-dimensional geometric data of the silicon wafer can be obtained first. "Global" means that the data covers most of the surface area of ​​the silicon wafer, not just a few points or edges. "Three-dimensional" means that the data includes spatial coordinate information, reflecting the height, warp, or curvature of the silicon wafer surface.

[0036] For example, global 3D geometric data can be 3D coordinate point cloud data obtained through laser scanning, or a full-field surface height distribution map obtained through interferometry. This global 3D geometric data is used in subsequent steps to analyze the overall morphological characteristics of the silicon wafer.

[0037] In S320, the overall distribution characteristics of global three-dimensional geometric data are analyzed.

[0038] After acquiring the global 3D geometric data, the processor 110 will perform this step: analyzing the overall distribution characteristics exhibited by the global 3D geometric data as a whole.

[0039] Overall distribution characteristics can include statistical features, such as the mean, variance, skewness, kurtosis, or spatial clustering patterns of the data points. They can also include geometric features, such as the residual distribution of data points fitted to a reference surface, or whether the data is symmetrical about a reference surface.

[0040] In S330, a geometric criterion is established based on the overall distribution characteristics to characterize the placement orientation of the silicon wafer, thereby determining the placement orientation of the silicon wafer.

[0041] In some examples disclosed herein, a clear geometric criterion can be established based on the overall distribution characteristics of S320 to determine whether the silicon wafer is inverted or reversed. For example, if the characteristic analyzed by S320 is the symmetry of the residuals, then the criterion for S330 might be to determine it as reversed when the symmetry of the residuals is broken (e.g., the sign is reversed) and the amplitude exceeds a threshold (e.g., 5nm). As another example, if the characteristic analyzed by S320 is the statistical distribution of the residuals, then the criterion for S330 might be to determine it as reversed when the proportion of outliers in the residual distribution exceeds a threshold (e.g., 30%). This allows for sensitive detection of global morphological changes caused by the reverse placement of the silicon wafer, achieving reliable automatic discrimination.

[0042] In some examples, please refer to Figure 4 The method flow of this embodiment may specifically include the following steps: In step S410, the front and back height distributions of the silicon wafer are obtained using a double-sided interferometer.

[0043] In this step, the 3D data acquisition sensor 200 is specifically a biplane interferometer. A silicon wafer (e.g., a phantom wafer) is vertically placed inside the interferometer. The interferometer uses wavelength phase-shifting technology to simultaneously or time-divisionally scan the front and back sides of the silicon wafer in a non-contact manner.

[0044] The interferometer outputs two sets of data: one is the full-field height distribution map of the front side of the silicon wafer (e.g., defined as surface A) relative to a reference plane. The other set is a full-field height distribution map of the back side (surface B) of the silicon wafer relative to a certain reference plane. .

[0045] In some examples, these two sets of data can be sampled. For instance, a sampling point can be selected every 200 μm to obtain two discrete, one-to-one corresponding front and back height datasets. These data together constitute the global three-dimensional geometry of the silicon wafer.

[0046] In step S420, the center plane of the silicon wafer is calculated based on the height distribution of the front and back sides.

[0047] The center plane represents the curved surface formed by the midpoint of the silicon wafer along its thickness direction. It most accurately reflects the global warpage of the silicon wafer itself, unaffected by surface films or local undulations. The height of the wafer's center plane can be calculated using the following formula:

[0048] in, and These are the relative heights of the front and back sides at coordinates (x, y), obtained by S410. Performing this calculation on all sampled points, the processor 110 of the electronic device 100 can obtain a dataset representing the center plane. .

[0049] In step S430, a global geometric reference plane is fitted based on the center plane.

[0050] In some examples, refer to Figure 5 This reference plane can be fitted to the dataset of the center plane obtained by S420 using the least squares method. This is generated. The fitted plane is called the least-squares plane 510.

[0051] Least square plane 510 is a plane in three-dimensional space. This minimizes the sum of the squares of the perpendicular distances 520 from all data points on the center plane to that plane. The least-squares plane 510 represents the average position and tilt of the silicon wafer's center plane. The processor 110 calculates the equation parameters (a, b, c) of the least-squares plane 510. The least-squares plane 510 is used as the global geometric reference plane.

[0052] In step S440, the vertical distance 520 between multiple sampling points on the center plane and the global geometric reference plane is calculated.

[0053] After obtaining the global geometric reference plane in S430, processor 110 will traverse multiple sampling points on the global geometric reference plane. These sampling points can be the same as the sampling points in S410, or they can be redefined sampling points, for example, selecting a sampling point every 1 mm along the center plane direction. For each sampling point... Calculate its perpendicular distance of 520 to the global geometric reference plane. This distance is also often referred to as the residual.

[0054]

[0055] If the sampling point is above the LSS, the value is positive; if it is below the LSS, the value is negative. The above calculation formula naturally satisfies this definition.

[0056] In step S450, a geometric criterion based on symmetry reversal is established, and the placement direction is determined.

[0057] Processor 110 reads a series of vertical distance 520 values ​​calculated by S440. Compare with a reference value. The reference value can be a theoretical standard value (e.g., the ideal flat silicon wafer). It should be close to 0), or the vertical distance of the first (or average of the first few) wafers identified as positive in the same batch at the same position is 520. .

[0058] In some examples, when the error of the vertical distance 520 is greater than a preset threshold, and when the sign of the vertical distance 520 value is opposite to that of the reference value, it is determined that each bit is reversed; for example, the difference from the reference value. Or, if the reference value is 0, then... If the value is greater than a preset threshold and the sign of the vertical distance 520 is opposite to that of the reference value, it is determined to be the opposite side. The preset threshold can be 5nm, 10nm, or 3nm, etc., which will not be elaborated in this example implementation.

[0059] Silicon wafers typically have a certain degree of warpage or curvature, for example, a central depression (in the positive orientation, the center...). (Negative) and the edges curl up (positive, the edges curl up) (Positive). When a silicon wafer is placed upside down, its global warp shape flips 180 degrees. The previously concave center now becomes convex (when reversed, the center...). When it becomes positive, the originally raised edge now droops (when it's reversed, the edge...). (It becomes negative). Therefore, the opposite sign is a reliable geometric feature for determining reverse placement.

[0060] By introducing the concept of a center plane, interference from silicon wafer surface roughness or film thickness inhomogeneity is eliminated. More importantly, by establishing an adaptive reference based on a global geometric reference plane and utilizing the geometric feature that the perpendicular distance of 520° has opposite signs when placed in reverse, the orientation of the silicon wafer can be accurately identified with high sensitivity and reliability.

[0061] In some exemplary embodiments of this disclosure, statistical distribution analysis can be performed on the vertical distance 520; when the distribution exhibits asymmetry or outlier clusters, and the number of outliers exceeds a preset proportion, it is determined that the silicon wafer is placed reversed. Please refer to [link to relevant documentation]. Figure 6 The method flow of this embodiment may specifically include the following steps: In step S610, three-dimensional coordinate point cloud data of the silicon wafer surface is acquired by laser scanning.

[0062] In this step, the 3D data acquisition sensor 200 is specifically a laser scanner. For example, before the silicon wafer thin-film deposition process, the laser scanner quickly scans the silicon wafer surface to acquire a large number of coordinate points, forming a three-dimensional coordinate point cloud data. To support subsequent steps of calculating the center plane, this laser scanner can be a double-sided laser scanner.

[0063] In step S620, the center plane of the silicon wafer is calculated based on global three-dimensional geometric data.

[0064] The specific details of step S620 can be found in the description of step S420, and will not be repeated here.

[0065] In step S630, a global geometric reference plane is fitted based on the center plane data.

[0066] In step S640, the vertical distances of multiple sampling points on the center plane relative to the global geometric reference plane are calculated.

[0067] The specific details of steps S620 to S640 can be found in the description of steps S420 to S640, and will not be repeated here.

[0068] In step S650, a statistical distribution analysis is performed on the vertical distance.

[0069] In some example implementations, if the silicon wafer is placed upright, its residual distribution ( The set of residuals should conform to the Gaussian distribution characteristics of the process specifications, that is, the data are symmetrically distributed around the mean. However, if the silicon wafer is placed upside down, its residual distribution will exhibit significant asymmetry because the warping direction is opposite to the process preset.

[0070] In this example implementation, processor 110 can calculate the skewness coefficient of the dataset. A skewness value close to 0 indicates symmetry (Gaussian distribution), while a skewness value with a large absolute value (e.g., >1.0 or <-1.0) indicates significant asymmetry. Optionally, processor 110 can also use boxplots or Mahalanobis distance analysis.

[0071] When placed in reverse, the systematic shift in shape causes a large number of measurement points to deviate from the global geometric reference plane, forming outlier clusters on the statistical graph.

[0072] In step S660, a geometric criterion based on statistical anomalies is established.

[0073] When the distribution of the residuals is asymmetrical (e.g., skewness coefficient > threshold) or when outlier clusters appear and the number of outliers exceeds a preset proportion, the silicon wafer is determined to be placed on the reverse side.

[0074] Processor 110 first calculates the standard deviation of the residual dataset. Then, it determines a threshold based on the three sigma principle. .

[0075] Next, processor 110 calculates the absolute value of the residuals for all sampled points. Greater than that threshold The number of points. Finally, calculate the proportion of these outliers to the total number of sampled points. .

[0076] In S670, the placement orientation of the silicon wafer is determined based on geometric criteria.

[0077] if If the value is less than a preset ratio, it is considered front-facing. If the value is greater than or equal to the preset ratio, it is judged as the reverse side.

[0078] In some examples, the preset ratio can be 30%, and it can also be customized based on the user's requirements for the accuracy of the judgment, such as 20%, 40%, etc., which will not be elaborated in this example implementation.

[0079] The method for determining the placement orientation of silicon wafers provided in this disclosure acquires global three-dimensional geometric data of the silicon wafer (rather than single-point data) and analyzes its overall distribution characteristics. This enables the automatic and reliable identification of systematic shifts in the global morphology (such as warpage and curvature) caused by reverse placement of the silicon wafer. By accurately identifying and correcting (e.g., triggering a robotic arm to flip) reversed silicon wafers before critical processes (such as thin film deposition), batch process defects caused by process parameter mismatch can be effectively avoided. By introducing the characteristics of a calculated silicon wafer center plane and fitting it to a global geometric reference plane (such as the least squares plane 510LSS), an adaptive reference plane fitting is achieved. This method is compatible with silicon wafer deformation under different process parameters. Furthermore, by analyzing the center plane, interference from uneven film thickness, surface roughness, or local defects that may exist on the front and back surfaces of the silicon wafer can be effectively eliminated, improving the robustness of the detection.

[0080] Further reference Figure 7 As shown, this example embodiment also provides a device 700 for determining the placement orientation of a silicon wafer, including an acquisition module 710, an analysis module 720, and a determination module 730. Wherein: The acquisition module 710 can be used to acquire global three-dimensional geometric data of the silicon wafer.

[0081] Analysis module 720 can be used to analyze the overall distribution characteristics of global three-dimensional geometric data; and The determination module 730 can be used to establish a geometric criterion characterizing the placement orientation of silicon wafers based on overall distribution characteristics, so as to determine the placement orientation of silicon wafers.

[0082] In some examples, the analysis module 720 can also be used to calculate the center plane of the silicon wafer based on global three-dimensional geometric data; and to fit a global geometric reference plane based on the center plane.

[0083] In some examples, the determination module 730 can also be used to calculate the vertical distance of multiple sampling points on the silicon wafer relative to the global geometric reference plane.

[0084] In some examples, the determination module 730 can also be used to compare the vertical distance values ​​of multiple sampling points with a reference value; When the error of the vertical distance value is greater than the preset threshold, and the sign of the vertical distance value is opposite to that of the reference value, the silicon wafer is determined to be placed backwards.

[0085] In some examples, the determination module 730 can also be used to perform statistical distribution analysis on vertical distances; When the distribution exhibits asymmetry or outlier clusters, and the number of outliers exceeds a preset ratio, the silicon wafer is determined to be placed on the reverse side.

[0086] In some examples, the preset proportion includes more than 30% of the measurement points.

[0087] For specific details regarding the electronic equipment provided in this disclosure, please refer to the [reference needed]. Figure 2 The descriptions herein are not intended to be redundant. Furthermore, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. A computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, a computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuitry, input unit, sensors (such as accelerometers, angular velocity sensors, light sensors, etc.), audio circuitry, WiFi module, power supply, Bluetooth module, etc., which will not be elaborated upon here.

[0088] This disclosure also provides a computer-readable storage medium storing at least one instruction, which is executed by a processor to implement the method for determining the placement orientation of a silicon wafer as described in the various embodiments above.

[0089] This disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform the method for determining the silicon wafer placement orientation to implement the various embodiments described above.

[0090] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.

[0091] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily as long as they do not conflict.

[0092] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for determining the placement orientation of a silicon wafer, characterized in that, include: Obtain the global three-dimensional geometric data of the silicon wafer; Analyze the overall distribution characteristics of the global three-dimensional geometric data; as well as Based on the overall distribution characteristics, a geometric criterion is established to characterize the placement orientation of the silicon wafer, so as to determine the placement orientation of the silicon wafer.

2. The method for determining the placement orientation of a silicon wafer according to claim 1, characterized in that, The analysis of the overall distribution characteristics of the global three-dimensional geometric data includes: Based on the global three-dimensional geometric data, the center plane of the silicon wafer is calculated; Based on the central plane, a global geometric reference plane is fitted.

3. The method for determining the placement orientation of a silicon wafer according to claim 2, characterized in that, The global geometric reference plane is the least squares surface of the central plane.

4. The method for determining the placement orientation of a silicon wafer according to claim 2 or 3, characterized in that, The establishment of a geometric criterion characterizing the placement orientation of the silicon wafer includes: Calculate the vertical distances of multiple sampling points on the silicon wafer relative to the global geometric reference plane.

5. The method for determining the placement orientation of a silicon wafer according to claim 4, characterized in that, Determining the placement orientation of the silicon wafer includes: The vertical distance values ​​of the plurality of sampling points are compared with reference values; When the error of the vertical distance value is greater than a preset threshold, and the sign of the vertical distance value is opposite to the sign of the reference value, the silicon wafer is determined to be placed backwards.

6. The method for determining the placement orientation of a silicon wafer according to claim 4, characterized in that, Determining the placement orientation of the silicon wafer includes: Perform statistical distribution analysis on the vertical distance; When the distribution exhibits asymmetry or outlier clusters, and the number of outliers exceeds a preset ratio, the silicon wafer is determined to be placed on the reverse side.

7. The method for determining the placement orientation of a silicon wafer according to claim 6, characterized in that, The preset ratio includes more than 30% of the measurement points whose absolute vertical distance is greater than a set threshold.

8. The method for determining the placement orientation of a silicon wafer according to claim 2, characterized in that, The acquisition of the global three-dimensional geometric data includes: The front and back height distributions of the silicon wafer were obtained using a double-sided interferometer. The average value of the front height distribution and the back height distribution is determined as the center plane.

9. A device for determining the placement orientation of a silicon wafer, characterized in that, include: The acquisition module is used to acquire the global three-dimensional geometric data of the silicon wafer; The analysis module is used to analyze the overall distribution characteristics of the global three-dimensional geometric data; as well as The determination module is used to establish a geometric criterion characterizing the placement orientation of the silicon wafer based on the overall distribution characteristics, so as to determine the placement orientation of the silicon wafer.

10. An electronic device, characterized in that, The electronic device includes a processor and a memory; the processor is configured to execute instructions stored in the memory to implement the method for determining the placement orientation of a silicon wafer as described in any one of claims 1 to 8.

11. A computer storage medium, characterized in that, The computer storage medium stores at least one instruction, which is executed by a processor to implement the method for determining the placement orientation of a silicon wafer as described in any one of claims 1 to 8.

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