Pulse width modulation smooth switching method of three-level converter
By obtaining the neutral point potential imbalance information in the three-level converter and dynamically adjusting the balance control degree of freedom, a smooth switching between dual-modulation waves and single-modulation waves is achieved, which solves the risk of DC half-bus overvoltage and improves the reliability of the converter.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-18
- Publication Date
- 2026-04-10
AI Technical Summary
When a three-level converter uses dual-modulation pulse width modulation technology, there is a risk of DC half-bus overvoltage. In particular, hard switching under extreme conditions may cause converter failure, and long-term operation of DMWPWM will increase losses.
By acquiring the DC-side midpoint potential imbalance information of the converter, the balance control degree of freedom is dynamically adjusted to achieve smooth switching between the first modulation strategy and the second modulation strategy. The modulation wave is controlled by the continuously changing α value, thereby suppressing the sudden change of half-bus voltage.
It effectively suppresses the sudden change in half-bus voltage caused by hard switching between dual-modulation pulse width modulation and single-modulation pulse width modulation, thus improving the reliability of the converter.
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Abstract
Description
Technical Field
[0001] This application relates to the field of power control technology, specifically to a pulse width modulation smooth switching method for a three-level converter. Background Technology
[0002] A power storage converter (PCS) is a bidirectional energy conversion device connecting a battery system and the power grid. It consists of a DC / AC bidirectional converter, a control unit, and other components. Its main functions include controlling the battery charging and discharging process, regulating grid power, and acquiring real-time battery system status information through a communication interface. The PCS is a crucial energy conversion hub connecting the energy storage battery system and the grid / load; its performance directly determines the efficiency, power quality, and reliability of the entire energy storage system. To meet increasingly demanding power levels and efficiency requirements, three-level topologies have become the preferred solution for medium- and high-power PCS. While three-level topologies offer advantages such as low device withstand voltage, high output waveform quality, and low electromagnetic interference, they also present a midpoint potential imbalance problem, particularly under extreme conditions like high-low breakdown. To address this issue, dual-modulation pulse width modulation (DMWPWM) technology is employed. Unlike conventional single-modulation pulse width modulation (SMWPWM), DMWPWM increases the number of modulation waves, enhancing the control freedom of the switching transistor's on-time. It controls the current injected into the DC capacitor's midpoint within a single switching cycle while simultaneously controlling the fundamental output voltage (achieved by ensuring equal duration of the three-phase bridge arm zero-level within a single switching cycle). This suppresses low-frequency fluctuations in the DC capacitor voltage and achieves midpoint potential balance.
[0003] Because using DMWPWM increases losses, it is not suitable for long-term operation. The method of periodically exiting DMWPWM introduces a problem: when exiting DMWPWM, the operating environment is uncertain. This uncertainty includes the fact that the extreme condition has passed when DMWPWM exits. This condition is a high-probability condition, and the probability can be increased by increasing the duration of DMWPWM. However, a long duration of DMWPWM has the disadvantage of high losses. This uncertainty also includes the fact that the extreme condition is still continuing when DMWPWM exits. This condition is a low-probability condition, but under this condition, a hard switch may cause the DC half-bus voltage to increase sharply, exceeding the device's withstand voltage before the overvoltage protection operates, causing converter failure. Summary of the Invention
[0004] This application provides a smooth switching method for pulse width modulation in a three-level converter, which solves the problem of DC half-bus overvoltage risk caused by hard switching between DMWPWM and SMWPWM modulation waves.
[0005] To address the aforementioned technical problems, this application provides a pulse width modulation smooth switching method for a three-level converter, comprising: acquiring midpoint potential imbalance information on the DC side of the converter, dynamically adjusting the balance control degree of freedom based on the midpoint potential imbalance information, and switching between a first modulation strategy and a second modulation strategy based on the balance control degree of freedom, while keeping the fundamental component of the output voltage unchanged.
[0006] Furthermore, the first modulation strategy is a dual-modulation pulse width modulation strategy capable of controlling the midpoint potential, and the second modulation strategy is a single-modulation pulse width modulation strategy.
[0007] Furthermore, for each phase, a balance control degree of freedom is set that varies continuously between 0 and 1. Based on the balance control degree of freedom, a pair of modulation waves is constructed such that the difference between the modulation waves lies within the interval between a first characteristic value representing the first modulation strategy and a second characteristic value representing the second modulation strategy.
[0008] Furthermore, the unified expression for the modulated wave of the first modulation strategy and the second modulation strategy is: ,in, This represents the processed single-phase first modulated wave. This represents the processed single-phase second modulation wave. This represents the monophase modulated wave before processing. This indicates the maximum value of the three-phase modulated wave before processing. This represents the balance control degrees of freedom, when α 0 indicates that the pulse width modulation is the first modulation strategy, when α 1 indicates that pulse width modulation is the second modulation strategy, which controls the smooth switching of the modulated wave over time by the rate at which α changes within the interval [0,1].
[0009] Furthermore, the change in α is a continuous function, a discrete point sequence.
[0010] This application also provides an energy storage converter, including a control unit configured to perform the above-described pulse width modulation smooth switching method.
[0011] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a pulse width modulation smoothing switching method.
[0012] This application provides a smooth switching method for pulse width modulation in a three-level converter, which can effectively suppress the sudden change in half-bus voltage caused by hard switching between dual-modulation pulse width modulation strategy and single-modulation pulse width modulation strategy, thereby improving the reliability of the converter. Detailed Implementation
[0013] The technical solutions in this application are described clearly and completely below. Obviously, the described embodiments are only some, not all, of the embodiments in this application. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0014] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.
[0015] The modulation wave generation principles of Single-Modulation Wavelength Pulse Width Modulation (SMWPWM) and Dual-Modulation Wavelength Pulse Width Modulation (DMWPWM) are as follows: The expression for a three-phase sinusoidal modulation wave is as follows: in, This represents the A-phase sinusoidal modulation wave. This represents the B-phase sinusoidal modulation wave. This represents a C-phase sinusoidal modulation wave, where m is the modulation index and ω is the fundamental angular frequency.
[0016] In a three-phase three-wire system, to improve the DC voltage utilization rate, a zero-sequence component uz_inj is injected into the modulation wave, and its expression is as follows: in, and These represent the maximum and minimum values of the three-phase sinusoidal modulated wave, respectively.
[0017] Three-phase SMWPWM modulation wave , , Both contain a sinusoidal modulated wave component and an injected zero-sequence component, and their expressions are as follows: Taking phase A as an example, two modulation waves of SMWPWM are constructed. This construction is unique, and its expression is: Taking phase A as an example, two modulation waves of DMWPWM are constructed. This construction is not unique; the added degree of freedom is used to control the duration of the 0 level. Here, it is manifested as the difference between the two modulation waves of each of the three phases being equal. The following is the modulation wave expression of one construction method: in for , , The maximum value.
[0018] Will and By swapping these modes, hard switching between SMWPWM and DMWPWM modulation waves can be achieved for phase A; the same applies to phases B and C. Specifically, when the half-bus voltage difference does not exceed the characteristic value Vth (e.g., 100V), SMWPWM is used; when the half-bus voltage difference exceeds the specific value Vth, DMWPWM is used; after running DMWPWM for a specific time (e.g., 2 seconds), it switches back to SMWPWM. The operating environment is uncertain when exiting DMWPWM.
[0019] This application provides a pulse width modulation smooth switching method for a three-level converter, comprising: acquiring the midpoint potential imbalance information of the DC side of the converter, dynamically adjusting the balance control degree of freedom through the midpoint potential imbalance information, and switching between a first modulation strategy and a second modulation strategy according to the balance control degree of freedom, while keeping the fundamental component of the output voltage unchanged.
[0020] In this embodiment of the invention, the first modulation strategy is a dual-modulation pulse width modulation strategy that can control the midpoint potential, and the second modulation strategy is a single-modulation pulse width modulation strategy.
[0021] For each phase, the balance control degrees of freedom are set to vary continuously between 0 and 1. Based on the balance control degrees of freedom, a pair of modulation waves are constructed such that the difference between the modulation waves lies within the interval between a first characteristic value representing the first modulation strategy and a second characteristic value representing the second modulation strategy.
[0022] The unified expression for the modulated wave of the first modulation strategy and the second modulation strategy is: ,in, This represents the processed single-phase first modulated wave. This represents the processed single-phase second modulation wave. This represents the monophase modulated wave before processing. This indicates the maximum value of the three-phase modulated wave before processing. This represents the balance control degrees of freedom, when α 0 indicates that the pulse width modulation is the first modulation strategy, i.e., the dual-modulation wave pulse width modulation strategy, when α 1 indicates that the pulse width modulation is the second modulation strategy, namely the single-modulation wave pulse width modulation strategy, which controls the smooth switching of the modulation wave over time by controlling the rate of change of α within the interval [0,1]. The sum of the two modulation waves equals The difference between the two modulated waves is equal to The difference between the modulated waves varies with the degrees of freedom of the balance control. The difference between the modulated waves is located at the first eigenvalue representing the dual-modulation pulse width modulation strategy. The second eigenvalue representing the single-modulation pulse width modulation strategy Within the interval, that is, the difference of the modulated wave is located in [ , ].
[0023] In this embodiment of the invention, the difference between the two modulated waves can be a fixed value or a value within a certain range of that fixed value.
[0024] When the system employs a dual-modulation pulse width modulation (PWM) strategy, the DC half-bus voltage difference decreases, and α approaches 1. If the abnormal operating condition still exists at this time, the DC half-bus voltage difference will further increase, and α will approach 0. The system maintains the dual-modulation pulse modulation strategy, with the voltage difference determining whether α increases or decreases, until the DC half-bus voltage difference decreases under normal operating conditions, α equals 1, and the voltage difference meets the requirements. The system then smoothly transitions from the dual-modulation pulse modulation strategy to the single-modulation pulse width modulation strategy. This effectively suppresses sudden voltage changes at the half-bus, thereby improving the reliability of the converter.
[0025] The change of α is a continuous function, a discrete point sequence (including a specific discrete point sequence and the points output after closed-loop control calculation).
[0026] This application also provides an energy storage converter, including a control unit configured to perform the above-described pulse width modulation smooth switching method.
[0027] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a pulse width modulation smoothing switching method.
[0028] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.
Claims
1. A pulse width modulation smooth switching method for a three-level converter, characterized in that, include: The system acquires the midpoint potential imbalance information of the DC side of the converter, dynamically adjusts the balance control degree of freedom based on the midpoint potential imbalance information, and switches between the first modulation strategy and the second modulation strategy according to the balance control degree of freedom to keep the fundamental component of the output voltage unchanged.
2. The pulse width modulation smooth switching method for a three-level converter according to claim 1, characterized in that, The first modulation strategy is a dual-modulation pulse width modulation strategy that can control the midpoint potential, and the second modulation strategy is a single-modulation pulse width modulation strategy.
3. The pulse width modulation smooth switching method for a three-level converter according to claim 1, characterized in that, For each phase, the balance control degrees of freedom are set to vary continuously between 0 and 1. Based on the balance control degrees of freedom, a pair of modulation waves are constructed such that the difference between the modulation waves lies within the interval between a first characteristic value representing the first modulation strategy and a second characteristic value representing the second modulation strategy.
4. The pulse width modulation smooth switching method for a three-level converter according to claim 1, characterized in that, The unified expression for the modulated wave of the first modulation strategy and the second modulation strategy is: ,in, This represents the processed single-phase first modulated wave. This represents the processed single-phase second modulation wave. This represents the monophase modulated wave before processing. This indicates the maximum value of the three-phase modulated wave before processing. This represents the balance control degrees of freedom, when α 0 indicates that the pulse width modulation is the first modulation strategy, when α 1 indicates that pulse width modulation is the second modulation strategy, which controls the smooth switching of the modulated wave over time by the rate at which α changes within the interval [0,1].
5. The pulse width modulation smooth switching method for a three-level converter according to claim 4, characterized in that, The change of α is a continuous function and a discrete point sequence.
6. An energy storage converter, comprising a control unit, characterized in that, The control unit is configured to perform the pulse width modulation smooth switching method as described in any one of claims 1-5.
7. A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the pulse width modulation smoothing switching method as described in any one of claims 1-5.