Closed-loop dead time control system and method suitable for inverter

Abstract

The invention provides a closed-loop dead time control system and method suitable for an inverter, and the method comprises the steps: detecting the power supply voltage of the inverter, and converting the power supply voltage into a first digital signal; detecting the peak value of the alternating current output by the inverter, and converting the peak value of the alternating current into a second digital signal; inputting the first digital signal and the second digital signal into a preset artificial intelligence model, and calculating to obtain the optimal dead time in the current working state; adjusting the resistance value of a digital resistor according to the optimal dead time so as to change the node voltage in the driving signal generation path; and generating two paths of complementary driving signals based on the adjusted node voltage, and outputting the driving signals to a power tube of an inverter through a driver so as to solve the problem of inaccurate dead time control.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of inverters, and particularly relates to a closed-loop dead-time control system and method suitable for inverters. BACKGROUND

[0002] As a core component of energy conversion, the inverter plays a key role in high-frequency and high-efficiency application scenarios such as wireless charging. It usually uses two complementary pulse width modulation (PWM) signals to control the power tubes in the bridge circuit. In order to avoid the simultaneous conduction of the upper and lower power tubes in the same bridge arm due to signal delay and other reasons, causing short circuit and damaging the device, a period of non-overlapping time, i.e. dead time, must be inserted between the two complementary PWM signals. The setting of the dead time is crucial to the performance of the inverter: if it is set too short, it is not enough to completely avoid the risk of bridge arm short circuit, and will cause the energy of the node parasitic capacitor to be discharged through the switch tube, causing significant switching loss and voltage overshoot; if it is set too long, it may cause the power tube body diode or channel to be reverse conducted, which will also reduce the system efficiency. Especially for inverters working under high-frequency conditions, the switching loss accounts for a significant proportion of the total loss, and the optimal dead time will dynamically change with the working conditions such as power supply voltage and load current. Therefore, it is an urgent need to realize a dead time control mechanism that can dynamically adapt to the optimal value, in order to improve the working efficiency and reliability of the inverter.

[0003] To meet this demand, some dynamic dead-time adjustment schemes have been proposed in related fields. One typical scheme is to detect the voltage of the inverter switching node at the end of the dead time to determine whether the current dead time setting is optimal. The basic principle of this scheme is: at the end of the dead time, the voltage of the switching node (such as the Vx node) is detected. If the voltage at this point is greater than zero, it means that the dead time is insufficient, and needs to be increased to allow the node parasitic capacitor to be fully discharged; on the contrary, if the voltage is less than zero, it means that the dead time is too long, causing reverse conduction, and needs to be reduced. This scheme forms a regulation loop through voltage feedback, aiming to force the dead time to approach the optimal value. Its regulation process can be briefly summarized as follows: initially set a fixed dead time, then perform voltage comparison and judgment at each switching cycle, and then fine-tune the dead time.

[0004] However, the above feedback scheme based on real-time voltage detection has inherent limitations. When the inverter operating frequency is extremely high, it is technically challenging to accurately sample the switch node voltage, and the response delay of the detection circuit itself will introduce errors, making the judgment and adjustment made in a very short time inaccurate and difficult to track high-frequency dynamic changes. Another approach is to estimate the optimal dead time by modeling the inverter system, but the parasitic parameters (such as parasitic capacitance and parasitic inductance) in the actual circuit are difficult to accurately characterize in the model, resulting in a deviation between the estimated result and the actual optimal value, limiting the control accuracy. Therefore, how to overcome the detection delay and model mismatch problem under high-frequency working conditions to achieve fast and accurate adaptive dead time control has become a technical problem to be solved. SUMMARY

[0005] The present application provides a closed-loop dead time control system and method suitable for inverters to solve the problem of inaccurate dead time control.

[0006] The first aspect of the present application provides a closed-loop dead time control system suitable for inverters, comprising: a power supply voltage detection module for real-time detection of the power supply voltage of the inverter and conversion into a first digital signal; a peak current detection module for real-time detection of the peak value of the output alternating current of the inverter and conversion into a second digital signal; a data processing and control module for receiving the first digital signal and the second digital signal, and calculating the optimal dead time required under the current working state based on a pre-set artificial intelligence model, wherein the artificial intelligence model takes the power supply voltage and the current peak value as input and the dead time as output, and is trained through a data set under simulation or actual measurement; a dead time adjustment module for adjusting the resistance value of a digital resistor according to the dead time output by the data processing and control module to change the node voltage in the generation path of the drive signal; a drive signal generation module for generating two complementary drive signals according to the adjusted node voltage and outputting to the power tube of the inverter through a driver, wherein the drive signal generation module includes a configurable phase adjustment unit and a duty cycle adjustment unit for compensating for the phase difference and duty cycle deviation introduced by the driver itself.

[0007] The closed-loop dead-time control system provided by the application realizes closed-loop regulation of the dead time by detecting the supply voltage and the peak value of the output alternating current of the inverter in real time and dynamically calculating the optimal dead time based on the trained artificial intelligence model; the system further adjusts the node voltage in the driving signal path through digital resistance and combines the configurable phase and duty cycle compensation mechanism to alleviate the signal asymmetry problem caused by the inherent characteristics of the driver, which helps to improve the efficiency of the inverter under different working conditions and reduce the output overshoot voltage, so as to solve the problem of inaccurate dead-time control.

[0008] Optionally, the supply voltage detection module includes a first analog-to-digital converter for converting the inverter supply voltage into the first digital signal to provide the current working voltage information of the inverter for subsequent processing.

[0009] Optionally, the peak current detection module includes: an inductive coil for sensing the inverter output alternating current and converting it into an alternating voltage signal; an operational amplifier for amplifying the alternating voltage signal; a peak detection circuit for detecting the peak voltage of the amplified alternating voltage signal; a second analog-to-digital converter for converting the peak voltage into the second digital signal.

[0010] The peak current detection module converts the inverter output alternating current into an alternating voltage signal through an inductive coil, amplifies it through an operational amplifier, extracts its peak voltage through a peak detection circuit, and then converts it into a second digital signal through a second analog-to-digital converter, thereby providing the current peak information reflecting the load change for subsequent processing, which helps the system to more accurately determine the current working state and adjust the dead time accordingly.

[0011] Optionally, the dead-time adjustment module includes a digital adjustable resistor, which is connected in series between the sinusoidal signal source and the fixed resistor, and adjusts the amplitude of the node voltage by changing the resistance value.

[0012] The dead-time adjustment module supports fine adjustment of the dead time by setting a digital adjustable resistor in series with the sinusoidal signal source.

[0013] Optionally, the driving signal generation module further includes: an analog switch for selecting different delay paths; at least one group of delay units composed of adjustable resistors and capacitors for adjusting the phase difference between the two driving signals; at least two hysteresis comparators for converting the sinusoidal signal into a square wave signal and adjusting the duty cycle of the square wave signal through a reference voltage.

[0014] The drive signal generation module selects different delay paths through an analog switch, adjusts the phase difference between the two drive signals by using a delay unit composed of an adjustable resistance and a capacitance, converts a sine wave signal into a square wave by using a hysteresis comparator, and adjusts the duty cycle of the square wave by adjusting a reference voltage, so as to compensate for the phase and duty cycle deviations introduced by the inherent characteristics of the driver, and make the generated drive signal more match the requirements of the inverter power tube.

[0015] Optionally, the artificial intelligence model is an artificial neural network model, which is deployed in an FPGA chip and trained by optimal dead time data measured or simulated by the inverter under different power supply voltages and different load conditions.

[0016] The artificial intelligence model adopts an artificial neural network and is deployed in an FPGA chip. The model is trained by optimal dead time data measured or simulated by the inverter under different power supply voltages and load conditions, so as to map the target dead time suitable for the current working state according to the real-time detected power supply voltage and current peak value, and improve the adaptability of the dead time setting.

[0017] Optionally, the inverter is one of a full-bridge inverter, a half-bridge inverter, a class-E inverter, or an inverter with a zero-voltage switching resonant circuit.

[0018] The system can be applied to various topological structures such as full-bridge inverters, half-bridge inverters, class-E inverters, and inverters with zero-voltage switching resonant circuits, indicating that the closed-loop dead time control method has a certain universality and can adjust the dead time in different types of inverter applications.

[0019] The second aspect of the present application provides a closed-loop dead time control method suitable for an inverter, which is applied to the closed-loop dead time control system suitable for an inverter of the first aspect. The method comprises: detecting the power supply voltage of the inverter and converting the power supply voltage into a first digital signal; detecting the peak value of the alternating current output by the inverter and converting the peak value of the alternating current into a second digital signal; inputting the first digital signal and the second digital signal into a preset artificial intelligence model to calculate the optimal dead time under the current working state, wherein the artificial intelligence model is trained by simulating or measuring the power supply voltage, the current peak value, and the dead time data under the state; adjusting the resistance value of the digital resistor according to the optimal dead time to change the node voltage in the drive signal generation path; The two complementary drive signals are generated based on the adjusted node voltage, and are output to the power tube of the inverter through the driver, wherein the phase and duty cycle of the drive signal are compensated and adjusted during the generation process to eliminate the non-ideal characteristics introduced by the driver itself.

[0020] The closed-loop dead-time control method provided in the application detects the supply voltage and output AC current peak value of the inverter in real time, inputs them into an artificial intelligence model trained by simulation or measured data, dynamically calculates the target dead-time under the current working condition, and then adjusts the digital resistance value according to the target time to change the node voltage of the drive signal generation path, and generates two complementary drive signals based on the adjusted voltage, while compensating and adjusting the phase and duty cycle of the signal during the generation process, thereby relieving the control deviation caused by the inherent non-ideal characteristics of the driver, and helping to improve the accuracy of dead-time setting and the efficiency of the inverter.

[0021] Optionally, before generating two complementary drive signals based on the adjusted node voltage, the method further comprises: Configuring the connection state of the analog switch, the resistance value of the adjustable resistance, and the reference voltage of the hysteresis comparator to make the two drive signals output by the driver meet the minimum dead-time requirement and the duty cycle matching.

[0022] Before generating two complementary drive signals based on the adjusted node voltage, the phase relationship and duty cycle of the drive signal are pre-adjusted by configuring the connection state of the analog switch, the resistance value of the adjustable resistance, and the reference voltage of the hysteresis comparator, so that the two drive signals output by the driver meet the minimum dead-time requirement and improve the degree of duty cycle matching.

[0023] Optionally, the training data of the artificial intelligence model includes the optimal dead-time of the inverter and the corresponding current peak value obtained by simulation or measurement under different supply voltages and different equivalent load conditions.

[0024] The training data of the artificial intelligence model includes the optimal dead-time of the inverter and the corresponding current peak value obtained by simulation or measurement under different supply voltages and different equivalent load conditions, so that the model can learn the mapping relationship between the working state parameters and the ideal dead-time, providing a data basis for real-time control.

[0025] Optionally, the step of generating two complementary drive signals based on the adjusted node voltage comprises: Inputting a sine wave signal to the node in series connection of the digital resistance and the fixed resistance, and changing the node voltage by adjusting the digital resistance; Isolating the influence of the node voltage on the subsequent circuit by the voltage follower; The phase difference between the two signals is adjusted by an adjustable resistance and a capacitor in a delay unit selected by an analog switch. The delayed sinusoidal signal is input into a hysteresis comparator to convert into a square wave signal, and the duty cycle is adjusted by adjusting the reference voltage. The square wave signal is input into a driver to generate a final driving signal.

[0026] The step of generating two complementary driving signals based on the adjusted node voltage includes: applying a sinusoidal signal to a node in series connection of a digital resistance and a fixed resistance, changing the node voltage by adjusting the digital resistance; isolating the influence of subsequent circuit load by using a voltage follower; selecting a delay path by an analog switch, and adjusting the phase difference between the two signals by using an adjustable resistance and a capacitor in a delay unit; converting the delayed sinusoidal signal into a square wave by a hysteresis comparator, and adjusting the duty cycle by adjusting the reference voltage; finally inputting the square wave signal into a driver to generate a final driving signal, thereby realizing comprehensive control of the waveform and phase of the driving signal.

[0027] From the above technical solutions, the application provides a closed-loop dead-time control system and method suitable for an inverter. The power supply voltage of the inverter is detected, and the power supply voltage is converted into a first digital signal. The peak value of the alternating current output by the inverter is detected, and the peak value of the alternating current is converted into a second digital signal. The first digital signal and the second digital signal are input into a preset artificial intelligence model to calculate an optimal dead-time under the current working state, wherein the artificial intelligence model is trained by simulating or actually measuring the power supply voltage, the current peak value, and the dead-time data. The resistance value of a digital resistance is adjusted according to the optimal dead-time to change the node voltage in the driving signal generation path. Two complementary driving signals are generated based on the adjusted node voltage, and are output to the power tube of the inverter through a driver. During the generation process, the phase and the duty cycle of the driving signal are compensated and adjusted to eliminate the non-ideal characteristics introduced by the driver itself, and to solve the problem of inaccurate dead-time control. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the present application, the drawings needed in the embodiments will be briefly introduced below. Obviously, other drawings can also be obtained by those skilled in the art without creative labor.

[0029] Figure 1 The structural schematic diagram of the closed-loop dead-time control system suitable for the inverter provided by the embodiments of the present application; Figure 2 The circuit structural schematic diagram of the power supply voltage detection module and the peak current detection module provided by the embodiments of the present application; Figure 3 Circuit structure schematic diagram of the dead time adjusting module and the driving signal generating module provided by the embodiments of the present application; Figure 4 Flowchart of the closed-loop dead time control method for inverters provided by the embodiments of the present application; Figure 5 Schematic diagram of the influence of the minimum dead time on the node voltage in the closed-loop dead time control method for inverters provided by the embodiments of the present application; Figure 6 Schematic diagram of the influence of the optimized dead time on the node voltage in the closed-loop dead time control method for inverters provided by the embodiments of the present application; Figure 7 Schematic diagram of the influence of the maximum dead time on the node voltage in the closed-loop dead time control method for inverters provided by the embodiments of the present application. DETAILED DESCRIPTION

[0030] The embodiments will be described in detail below with reference to the drawings. Unless otherwise indicated, the same numbers on different drawings represent the same or similar elements. The implementations described in the following embodiments are not meant to represent all implementations consistent with the present application. Rather, they are merely examples of systems and methods consistent with some aspects of the present application.

[0031] To solve the problem of inaccurate dead time control, see Figures 1-7 Some embodiments of the present application provide a closed-loop dead time control system for inverters, comprising: A power supply voltage detection module for detecting the power supply voltage of the inverter in real time and converting it into a first digital signal.

[0032] It should be understood that there are many types of inverters, and the example inverter is a full-bridge inverter, which can be powered by a power supply voltage V dd and contains a bridge arm composed of multiple power tubes (first power tube Q1, second power tube Q2, third power tube Q3, fourth power tube Q4), the first output node V sw1 of the inverter (between the first power tube Q1 and the second power tube Q2) is connected to the inductive coil L eq through a series load R s ; the second output node V sw2 of the inverter (between the third power tube Q3 and the fourth power tube Q4) is connected to the inductive coil L s through a capacitor C1 and an inductor L1 in sequence. The power supply voltage V ddThe first power transistor Q1 and the third power transistor Q3 are connected respectively; one end of the second power transistor Q2 and one end of the fourth power transistor Q4 are both grounded. The power supply voltage detection module includes a first analog-to-digital converter (ADC), which is used to convert the inverter power supply voltage V... dd And converted into the first digital signal V dd_digital .

[0033] See details Figure 1 and Figure 2 Where 1 is the inverter power supply; 2-4 are four power transistors (Q1, Q2, Q3, and Q4); 6 is the inverter reference ground; and 7 is the inverter series load R. eq ; 8 is the inverter series inductor L1; 9 is the inverter series capacitor C1; 10 is the induction coil L s ;14 is the first analog-to-digital converter.

[0034] The peak current detection module is used to detect the peak value of the inverter's output AC current in real time and convert it into a second digital signal.

[0035] In some embodiments, see Figure 2 The peak current detection module includes: Induction coil L s Used to sense the AC output current I of the inverter L And convert it into an AC voltage signal V s ; An operational amplifier (OPA) is used to process the AC voltage signal V. s Enlarge; Peak detection circuit, used to detect the amplified AC voltage signal V s Peak voltage V p ; A second analog-to-digital converter (ADC) is used to convert the peak voltage V p Converted to the second digital signal V p_digital .

[0036] See details Figure 2 , of which 11 is Figure 1 The induction coil L in s In order to utilize the law of electromagnetic induction, Figure 1 The inverter's AC current I L The induced voltage is AC voltage V s 12 is an operational amplifier; 13 is a peak detection circuit; 15 is a second analog-to-digital converter.

[0037] The peak current detection module converts the inverter output alternating current into an alternating voltage signal through an inductive coil, amplifies it through an operational amplifier, extracts its peak voltage through a peak detection circuit, and converts it into a second digital signal through a second analog-to-digital converter, thereby providing current peak information reflecting load changes for subsequent processing, which helps the system more accurately determine the current working state and adjust the dead time accordingly.

[0038] The data processing and control module is configured to receive the first digital signal and the second digital signal, and calculate the optimal dead time t d required under the current working state based on a preset artificial intelligence model. dd The artificial intelligence model takes the supply voltage V peak and the current peak I d as inputs, and takes the dead time t d as output, and is trained through a data set under simulation or actual measurement.

[0039] The dead time adjustment module is configured to adjust the resistance R D of the digital resistor according to the dead time t D output by the data processing and control module, so as to change the node voltage in the generation path of the drive signal.

[0040] In some embodiments, referring to Figure 3 , the dead time adjustment module includes a digital adjustable resistor R D connected in series between the sine wave signal source V sin1 and the fixed resistor R1, and the resistance is changed to adjust the amplitude of the node voltage.

[0041] The drive signal generation module is configured to generate two complementary drive signals according to the adjusted node voltage, and output the drive signals to the power tube of the inverter through the driver, wherein the drive signal generation module includes a configurable phase adjustment unit and a duty cycle adjustment unit, which are used to compensate for the phase difference and duty cycle deviation introduced by the driver itself.

[0042] In some embodiments, the drive signal generation module further includes: An analog switch is configured to select different delay paths.

[0043] At least one delay unit composed of an adjustable resistor and a capacitor is configured to adjust the phase difference between the two drive signals.

[0044] At least two hysteresis comparators are configured to convert the sine wave signal into a square wave signal, and adjust the duty cycle of the square wave signal through a reference voltage.

[0045] Referring to Figure 3Wherein, 16 is a digital adjustable resistor; 17 is a dead time adjustment module power supply; 18, 19, 28 are all analog adjustable resistors, represented by R A1 , R A2 , R A3 ; 20, 22, 23, 27, 31, 33, 36, 38, 41 are all fixed resistors; 21, 24, 30, 40 are dead time adjustment module reference ground; 25, 32, 37 are operational amplifiers; 26 is an analog switch; 29, 39 are fixed capacitors; 34, 35 are both driver chips, used to generate two complementary drive signals to drive the inverter.

[0046] In some embodiments, the artificial intelligence model is an artificial neural network model, deployed in an FPGA chip, and trained by optimal dead time data measured or simulated by the inverter under different power supply voltages and different load conditions.

[0047] It should be understood that the artificial neural network model is trained by a large amount of measured or simulated data, which covers the optimal dead time corresponding to the inverter under different power supply voltages (such as low voltage, medium voltage, high voltage, etc. different working conditions) and different load conditions (such as no load, light load, heavy load, etc. various load situations). Through the training of these rich and comprehensive data, the artificial neural network model can accurately learn and master the rules and characteristics of the optimal dead time of the inverter under different working conditions, and then in actual application, according to the real-time detected power supply voltage and load condition, quickly and accurately output the corresponding optimal dead time, to realize the effective control of the closed-loop dead time of the inverter. FPGA refers to field programmable gate array, which is an integrated circuit with high flexibility and programmability, and can be configured and customized according to user's needs to realize specific circuit functions. In the above embodiments, the artificial neural network model is deployed in an FPGA chip, which can fully utilize the high-speed parallel processing capability and reconfigurable characteristics of FPGA, so that the model can quickly respond and process the data of the inverter under different working conditions, thereby realizing the precise control of the closed-loop dead time.

[0048] In some embodiments, the inverter is one of a full-bridge inverter, a half-bridge inverter, a class E inverter, or an inverter with a zero-voltage switching resonant circuit.

[0049] It should be understood that the full-bridge inverter has the advantages of high output voltage, relatively low voltage stress on power switching devices, and can meet the needs of large power application scenarios; the half-bridge inverter structure is relatively simple and has low cost, and is suitable for occasions where the power requirement is not particularly high but cost control is emphasized; the class E inverter has the characteristics of high efficiency, and shows unique advantages in high-frequency application fields; and the inverter with zero-voltage switching resonant circuit realizes zero-voltage turn-on and turn-off of the switching tube through the resonant circuit, effectively reduces the switching loss, and improves the overall efficiency of the system. It should be understood that different types of inverters play their respective roles in different application scenarios, and the system can flexibly select the appropriate inverter type according to actual needs.

[0050] Part of the embodiments of the present application also provide a closed-loop dead time control method suitable for an inverter, which is applied to the closed-loop dead time control system suitable for an inverter described in the above embodiments. The method comprises: detecting the supply voltage of the inverter and converting the supply voltage into a first digital signal; detecting the peak value of the alternating current output by the inverter and converting the peak value of the alternating current into a second digital signal; inputting the first digital signal and the second digital signal into a preset artificial intelligence model to calculate the optimal dead time under the current working state, wherein the artificial intelligence model is trained by simulating or measuring the supply voltage, current peak value and dead time data under the state; adjusting the resistance value of the digital resistor according to the optimal dead time to change the node voltage in the driving signal generation path; generating two complementary driving signals based on the adjusted node voltage and outputting them to the power tube of the inverter through the driver, wherein the phase and duty cycle of the driving signal are compensated and adjusted during the generation process to eliminate the non-ideal characteristics introduced by the driver itself.

[0051] In some embodiments, before generating two complementary driving signals based on the adjusted node voltage, the method further comprises: configuring the connection state of the analog switch, the resistance value of the adjustable resistor and the reference voltage of the hysteresis comparator, so that the two driving signals output by the driver meet the minimum dead time requirement and the duty cycle matching.

[0052] It should be understood that the connection state of the analog switch is configured to accurately control the transmission path of the signal, ensure that the signal is processed in a predetermined manner, and thus ensure the accuracy and stability of the generation of the drive signal. The adjustment of the adjustable resistance value can flexibly change the resistance parameter in the circuit, and thus adjust the amplitude, current and other characteristics of the signal to meet the requirements of the drive signal in different working states. The setting of the hysteresis comparator reference voltage can make the comparator have a specific hysteresis characteristic when the input signal changes, avoid false operation caused by slight fluctuations of the signal, ensure that the two drive signals output can meet the minimum dead time requirement and duty cycle matching, and improve the reliability and performance of the inverter.

[0053] In some embodiments, the training data of the artificial intelligence model includes the optimal dead time of the inverter and the corresponding current peak value obtained by simulation or actual measurement under different power supply voltages and different equivalent load conditions.

[0054] It should be understood that the training data of the artificial intelligence model is very critical and targeted. Data is obtained under different power supply voltage conditions because the fluctuation of the power supply voltage will directly affect the working state of the inverter, and the dead time required by the inverter and the current peak value generated under different voltages will be different. Data is obtained under different equivalent load conditions because the change of the load will also affect the performance of the inverter, and different equivalent loads will make the inverter show different characteristics in output power, current, etc. Obtaining these data through simulation or actual measurement can ensure the authenticity and reliability of the data. Using the optimal dead time of the inverter and the corresponding current peak value obtained under different conditions as training data can make the artificial intelligence model better learn the operation rules of the inverter under different working conditions, so as to more accurately control and optimize the dead time of the inverter in actual application.

[0055] In some embodiments, the step of generating two complementary drive signals based on the adjusted node voltage includes: The sine wave signal is input to the node in series with the digital resistance and the fixed resistance, and the node voltage is changed by adjusting the digital resistance.

[0056] The voltage follower isolates the influence of the subsequent circuit on the node voltage.

[0057] The analog switch selects the delay path, and the adjustable resistance and the capacitor constitute a delay unit to adjust the phase difference of the two signals.

[0058] The delayed sine wave signal is input to the hysteresis comparator to convert it into a square wave signal, and the reference voltage is adjusted to adjust the duty cycle.

[0059] The square wave signal is input to the driver to generate the final drive signal.

[0060] It should be understood that the sine wave signal is input to the node in series with the digital resistor and the fixed resistor, because the digital resistor has adjustability, and by changing its resistance value, the node voltage can be accurately changed, thereby providing a suitable voltage basis for subsequent signal processing; the influence of the subsequent circuit on the node voltage is isolated by the voltage follower, because the voltage follower has the characteristics of high input impedance and low output impedance, which can effectively isolate the front and rear circuits, avoid interference of the subsequent circuit on the node voltage, and ensure the stability of the node voltage; the delay path is selected by the analog switch, because different application scenarios may require different delay effects, and the analog switch can flexibly select different delay paths according to actual needs; the phase difference of the two signals is adjusted by using the adjustable resistance and the capacitor to form an RC delay circuit, because the combination of the adjustable resistance and the capacitor can form an RC delay circuit, by adjusting the resistance value of the adjustable resistance, the RC time constant can be changed, and then the phase difference of the two signals is adjusted; the sine wave signal after delay is input into the hysteresis comparator to convert it into a square wave signal, and the duty cycle is adjusted by adjusting the reference voltage, because the hysteresis comparator has two different threshold voltages, which can convert the input sine wave signal into a square wave signal with a specific duty cycle, and adjusting the reference voltage can change the two threshold voltages, thereby adjusting the duty cycle; the square wave signal is input into the driver to generate the final driving signal, because the driver has sufficient driving ability to amplify and process the square wave signal to generate the final driving signal that can drive the inverter to work.

[0061] The working principle of the whole closed-loop dead-time control method is as follows: First, the simulation or actual measurement is needed to obtain Figure 1 The optimal dead-time t d under different working voltages V dd of the inverter and different series loads R eq , and the corresponding peak value I L of the alternating current I peak under the condition. Since I peak monotonically changes with R eq when V dd is constant, a data set can be constructed, and the data set is composed of (V dd， I peak， t d） ). After obtaining the data set, an artificial intelligence model (ANN model) is trained, wherein V dd， I peak are the inputs of the ANN model, and t d is the output of the ANN model. After the model is trained, it is deployed to the FPGA. When the inverter is working, Figure 2 the circuit shown in the figure detectsFigure 1 Inverter supply voltage V dd and peak current I peak V dd pass Figure 2 The first analog-to-digital converter converts the signal V into a digital signal. dd_digital . Figure 1 The inverter's AC current I L Through induction coil L s Induced AC voltage V s V s The peak voltage V is obtained after amplification and then passing through a peak detection circuit. p Finally, V p go through Figure 2 The second analog-to-digital converter converts the signal into a digital signal V. p_digital V dd_digital and V p_digital The data is fed into the FPGA for processing, and then the dead time t is calculated by the deployed AI model. d FPGA utilizes the calculated t d adjust Figure 3 The digital adjustable resistor R in D . Figure 3 The circuit diagram in the diagram is responsible for generating the inverter drive signal Q. 1-g， Q 2-g， Q 3-g， Q 4-g V sin1 and V sin2 yes Figure 1 Two sine waves with the same amplitude but opposite phase are generated by a 6.78MHz oscillator. This is used with V... sin1 For example, V sin1 Added to R D On R1, change R D The amplitude of the voltage at node a can be changed. To prevent the impedance of subsequent circuits from affecting node a, a voltage follower is added after node a. Node b can be connected to node c or d via analog switch S1. If b is connected to node c, it can be connected via R. A3 The delay unit formed by C2 adjusts the phase shift of V2 after V1. If b is connected to node d, it can be adjusted through R. A3 The delay unit formed by C1 adjusts the phase shift of V1 after V2. Both V1 and V2 are sinusoidal waves, which, after passing through the hysteresis comparators formed by (31, 32, 33) and (36, 37, 38), generate square wave signals V3 and V4. Finally, the square waves V3 and V4 are input to the high-side and low-side inputs of the driver, generating Q. 1-g and Q 4-gThe drive signals for the inverter. If the driver high side input and low side input are inputted two-way amplitude same, phase same square wave, due to the characteristics of the driver itself, compared to the two-way input signal, the high side output and low side output will have duty cycle change and phase difference. The duty cycle difference of two-way output drive signal can be changed by changing the hysteresis comparator V REF1 and V REF2 adjustment, the phase difference problem can be solved by configuring the connection mode of S1 and the value of R A3 , which affects the phase relationship of V3 and V4, and finally affects the phase relationship of the two-way output of the driver.

[0062] The use method of the final closed loop system is to adjust S1, R A3 , V REF1 , V REF2 so that the driver output (Q 1-g , Q 2-g ), (Q 3-g， Q 4-g ) meets the minimum dead zone requirement. After adjustment, the relationship between R D and dead zone time t d is measured, and the mapping relationship is realized by FPGA. In the process of inverter working, I peak and V dd sensor circuit measures the corresponding value, and then outputs digitized V dd_digital and V p_digital to FPGA. FPGA receives V dd_digital and V p_digital and modifies the value of digital resistance R D using CS and Data signals, so as to realize the closed loop adjustment of the dead zone time of inverter drive signal.

[0063] Figure 5 , Figure 6 , Figure 7 V Q1 , V Q2 , V Q3 , V Q4 are respectively Figure 1 the control signals of power tubes Q1, Q2, Q3 and Q4, and high level represents that the power tube is opened. V sw is Figure 1 V sw1 voltage minus V sw2 voltage. I L is Figure 1 the current of inductor L1. T d represents the dead zone time.

[0064] Figure 5 Show the minimum dead zone time to node voltage V swthe influence of the minimum dead time on the node voltage V L current to V sw2 the charging of the node parasitic capacitance to V sw1 the discharging of the node parasitic capacitance. But because t d is too small, V sw2 is not fully charged to V dd , V sw1 is not fully discharged to 0, Q2 and Q3 are turned on, and the source and drain voltages of the power tube V ds are not 0. Then at the time of turn-on, the power tube has the product of voltage and current, i.e., there is switching loss. At the same time, the energy of the V sw1 and V sw2 parasitic capacitances is discharged through Q2 and Q3, and the energy at the V sw1 and V sw2 nodes oscillates with the power loop inductance, so that a large node overshoot voltage is caused.

[0065] Figure 6 The influence of the minimum dead time on the node voltage V sw is shown. Under the condition of the minimum dead time, during the period t0-t1, the I L current charges V sw2 , the node parasitic capacitance charges V sw1 , and the node parasitic capacitance discharges. Because t d is optimal, V sw2 is fully charged to V dd , V sw1 is fully discharged to 0, Q2 and Q3 are turned on, and the source and drain voltages of the power tube V ds are 0. At the time of turn-on, the power tube has no product of voltage and current, and there is no switching loss. At the same time, the energy of the V sw1 and V sw2 parasitic capacitances is very small at the time of turn-on of the switch, so that the node overshoot voltage is small.

[0066] Figure 7 The influence of the maximum dead time on the node voltage V sw is shown. Under the condition of the maximum dead time, during the period t0-t1, the I L current charges V sw2 , the node parasitic capacitance charges V sw1 , and the node parasitic capacitance discharges. But because t d is too large, V sw2 is charged to greater than V dd , V sw1 is discharged to less than 0, Q2 and Q3 are reverse-biased, the overshoot voltage is equal to the reverse-biased voltage, and under the condition of reverse bias, the power tube also has the product of voltage and current, i.e., loss is generated.

[0067] According to the technical solutions, the application provides a closed-loop dead-time control system and method suitable for an inverter. The power supply voltage of the inverter is detected, and the power supply voltage is converted into a first digital signal. The peak value of the alternating current output by the inverter is detected, and the peak value of the alternating current is converted into a second digital signal. The first digital signal and the second digital signal are input into a preset artificial intelligence model, and the optimal dead-time under the current working state is calculated. The artificial intelligence model is trained by simulating or actually measuring the power supply voltage, the current peak value, and the dead-time data. The resistance value of a digital resistor is adjusted according to the optimal dead-time, so as to change the node voltage in the driving signal generation path. Two complementary driving signals are generated based on the adjusted node voltage, and are output to the power tube of the inverter through a driver. In the generation process, the phase and duty cycle of the driving signal are compensated and adjusted, so as to eliminate the non-ideal characteristics introduced by the driver itself, and solve the problem of inaccurate dead-time control.

[0068] The similar parts among the embodiments provided in the application can be referred to each other. The specific embodiments provided above are only some examples under the general concept of the application, and do not limit the protection scope of the application. Any other embodiments extended according to the application solutions without creative labor are within the protection scope of the application.

Claims

1. A closed loop dead time control system suitable for use with an inverter, characterized by, include: The power supply voltage detection module is used to detect the power supply voltage of the inverter in real time and convert it into a first digital signal. The peak current detection module is used to detect the peak value of the inverter's output AC current in real time and convert it into a second digital signal; The data processing and control module is used to receive the first digital signal and the second digital signal, and calculate the optimal dead time required under the current working state based on a preset artificial intelligence model, wherein the artificial intelligence model takes the power supply voltage and current peak as input, the dead time as output, and is trained by a dataset obtained through fine modeling simulation or actual measurement. The dead time adjustment module is used to adjust the resistance value of the digital resistor according to the dead time output by the data processing and control module, so as to change the node voltage in the generation path of the drive signal. The drive signal generation module is used to generate two complementary drive signals based on the adjusted node voltage and output them to the power transistor of the inverter through the driver. The drive signal generation module includes a configurable phase adjustment unit and a duty cycle adjustment unit to compensate for the phase difference and duty cycle deviation introduced by the driver itself.

2. The closed loop dead time control system suitable for use with an inverter of claim 1, wherein, The power supply voltage detection module includes: A first analog-to-digital converter is used to convert the inverter power supply voltage into the first digital signal; The peak current detection module includes: An induction coil is used to sense the AC current output by the inverter and convert it into an AC voltage signal. An operational amplifier is used to amplify the AC voltage signal; Peak detection circuit, used to detect the peak voltage of the amplified AC voltage signal; A second analog-to-digital converter is used to convert the peak voltage into the second digital signal.

3. The closed loop dead time control system suitable for use with an inverter of claim 1, wherein, The dead time adjustment module includes a digitally adjustable resistor connected in series between the sine wave signal source and a fixed resistor. The amplitude of the node voltage is adjusted by changing the resistance value.

4. The closed loop dead time control system suitable for use with an inverter of claim 1, wherein, The drive signal generation module further includes: Analog switches are used to select different delay paths; At least one set of delay units consisting of adjustable resistors and capacitors is used to adjust the phase difference between the two drive signals; At least two hysteresis comparators are used to convert a sine wave signal into a square wave signal and adjust the duty cycle of the square wave signal by means of a reference voltage.

5. The closed loop dead time control system suitable for use with an inverter of claim 1, wherein, The artificial intelligence model is an artificial neural network model, deployed in an FPGA chip, and trained using optimal dead time data measured or simulated under different power supply voltages and load conditions of the inverter.

6. The closed loop dead time control system suitable for use with an inverter of claim 1, wherein, The inverter is one of the following: a full-bridge inverter, a half-bridge inverter, a Class E inverter, or an inverter with a zero-voltage switching resonant circuit.

7. A closed loop dead time control method suitable for use in an inverter, characterized by, The method, applied to a closed-loop dead-time control system suitable for an inverter according to any one of claims 1-6, comprises: The power supply voltage of the inverter is detected and converted into a first digital signal; The peak value of the AC current output by the inverter is detected, and the peak value of the AC current is converted into a second digital signal; The first digital signal and the second digital signal are input into a preset artificial intelligence model to calculate an optimal dead time under a current working state, wherein the artificial intelligence model is trained by simulation or measured supply voltage, current peak value and dead time data under a state; The resistance value of the digital resistor is adjusted according to the optimal dead time to change the node voltage in the driving signal generation path; Based on the adjusted node voltage, two complementary driving signals are generated and output to the power tube of the inverter through the driver, wherein the phase and duty cycle of the driving signal are compensated and adjusted during the generation process to eliminate the non-ideal characteristics introduced by the driver itself.

8. The closed loop dead time control method suitable for an inverter according to claim 7, wherein, Before generating two complementary driving signals based on the adjusted node voltage, the method further comprises: The connection state of the analog switch, the resistance value of the adjustable resistor and the reference voltage of the hysteresis comparator are configured to make the two driving signals output by the driver meet the minimum dead time requirement and the duty cycle matching.

9. The closed loop dead time control method suitable for an inverter according to claim 7, wherein, The training data of the artificial intelligence model includes the optimal dead time of the inverter and the corresponding current peak value obtained by simulation or measurement under different supply voltages and different equivalent load conditions.

10. The closed loop dead time control method suitable for an inverter according to claim 7, wherein, The step of generating two complementary driving signals based on the adjusted node voltage comprises: The sine wave signal is input into the node in series with the digital resistor and the fixed resistor, and the node voltage is changed by adjusting the digital resistor; The influence of the subsequent circuit on the node voltage is isolated through the voltage follower; The phase difference of the two signals is adjusted by selecting the delay path through the analog switch and using the adjustable resistor and capacitor to constitute the delay unit; The sine wave signal after delay is input into the hysteresis comparator to convert it into a square wave signal, and the duty cycle is adjusted by adjusting the reference voltage; The square wave signal is input into the driver to generate the final driving signal.

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