Buried Notch Circuit Packaging Structure and Design Method in Single-Photon Detector Readout Module

Abstract

This invention relates to a packaging structure and design method for an embedded notch filter circuit within a single-photon detector readout module. The packaging structure includes a microwave multilayer dielectric substrate; the microwave multilayer dielectric substrate comprises multiple dielectric layers stacked along its thickness direction, with metal conductive strips at the top, bottom, and between each dielectric layer; multiple metallized vias are disposed within the microwave multilayer dielectric substrate; the metal conductive strips and metallized vias cooperate to form a distributed circuit, enabling signal transmission and circuit interconnection between the dielectric layers; an input notch filter circuit and an output notch filter circuit are embedded within the microwave multilayer dielectric substrate, both of which are interconnected by metal conductive strips and metallized vias located between the dielectric layers. Compared to traditional readout modules, this invention not only reduces the overall circuit size and manufacturing costs but also significantly improves the readout module's suppression performance for gated frequency signals and their harmonic signals.

Description

Technical Field

[0001] This invention relates to the field of quantum information technology, specifically to a buried wave circuit packaging structure and design method within a single-photon detector readout module. Background Technology

[0002] Single-photon detectors are key detection modules in systems such as quantum communication and quantum radar, with their core function being the detection of extremely weak photon signals. In gated operation mode, single-photon avalanche diodes (SPDs) are driven by a high-frequency gate signal, responding to incident photons in each gate cycle. The generated signal contains two types of signals: one is the weak avalanche signal generated during single-photon detection, which is the useful signal to be extracted; the other is the interference signal generated accompanying the gate drive. This interference signal, composed of the gate frequency and its harmonics, is much stronger than the weak avalanche signal. This interference signal significantly degrades the signal-to-interference ratio (SIR) in subsequent signal processing links, thus severely limiting the overall system performance.

[0003] The readout circuit of a single-photon detector serves two main functions: first, it amplifies useful but extremely weak avalanche signals and outputs the amplified signal to the signal detection circuit at the back end of the system for detection and analysis; second, it suppresses the large-amplitude gate frequency and its harmonic signals to prevent them from interfering with the detection of weak avalanche signals. The notch filter element in the readout circuit is the key component for interference suppression. It creates deep attenuation at the frequency corresponding to the interference signal, effectively preventing strong nonlinear distortion caused by strong interference leading to saturation of the preamplifier, thus ensuring that the entire signal processing link remains in a stable operating state.

[0004] However, in existing technologies, the readout circuit module typically employs a cascaded approach of two independent notch filter modules to suppress the gated frequency signal and harmonic signals. This design not only results in a large readout module size, hindering the miniaturization of systems such as quantum communication and quantum radar, but also increases material procurement and integration costs, thus restricting the technology's implementation and large-scale application. Summary of the Invention

[0005] The purpose of this invention is to provide a packaging structure and design method for embedding a notch filter circuit within a single-photon detector readout module. This packaging structure utilizes a distributed circuit formed by a microwave multilayer dielectric substrate to integrate the function of a single notch filter element required by the readout module through embedded embedding. Compared with traditional readout modules, it can not only reduce the number of materials, thereby reducing the overall circuit size and production costs, but also significantly improve the readout module's suppression performance of gated frequency signals and their harmonic signals. Therefore, it can be widely used in miniaturized, low-cost quantum communication systems.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] In a first aspect of the present invention, a buried notch circuit packaging structure for a single-photon detector readout module is disclosed, the packaging structure comprising a microwave multilayer dielectric substrate.

[0008] The microwave multilayer dielectric substrate includes multiple dielectric layers stacked along the thickness direction. Metal conductive strips are provided at the top, bottom, and between each dielectric layer of the microwave multilayer dielectric substrate. Multiple metallized vias are provided in the microwave multilayer dielectric substrate. The metal conductive strips and metallized vias cooperate with each other to form a distributed circuit and realize signal transmission and circuit interconnection between each dielectric layer.

[0009] The microwave multilayer dielectric substrate is internally embedded with an input notch filter circuit and an output notch filter circuit, both of which are interconnected by metal conductors and metallized vias located between each dielectric layer.

[0010] Furthermore, a semi-open cavity is provided in the middle region of the microwave multilayer dielectric substrate. This semi-open cavity is formed by removing part of the upper dielectric layer in the middle region of the microwave multilayer dielectric substrate, exposing the target interlayer metal conductor strip that was originally covered by this part of the upper dielectric layer. The bottom of the semi-open cavity is the surface metal conductor strip. The surface metal conductor strip refers to a certain interlayer metal conductor strip exposed at the bottom of the semi-open cavity after the semi-open cavity is formed on the microwave multilayer dielectric substrate. For ease of subsequent description, this metal conductor strip is defined as the surface metal conductor strip. The surface metal conductor strip is provided with an input notch output port and an output notch feed port for realizing signal interconnection between the embedded notch circuit and the functional device.

[0011] Furthermore, the input notch filter circuit and the output notch filter circuit are respectively disposed in the regions corresponding to the radio frequency input port and the radio frequency output port inside the microwave multilayer dielectric substrate, and are located outside the semi-open cavity.

[0012] Furthermore, the metal conductors are classified into top-layer metal conductors, interlayer metal conductors, and bottom-layer metal conductors according to their placement. Specifically, the top-layer metal conductor is disposed on the top of the microwave multilayer dielectric substrate, the bottom-layer metal conductor is disposed on the bottom of the microwave multilayer dielectric substrate, and the interlayer metal conductors are disposed between the dielectric layers.

[0013] Furthermore, one end of the input notch circuit is connected to the input notch output port through a corresponding interlayer metal conductor and a metallized via, and the other end is connected to the RF input port through a corresponding interlayer metal conductor and a metallized via; one end of the output notch circuit is connected to the output notch feed port through a corresponding interlayer metal conductor and a metallized via, and the other end is connected to the RF output port through a corresponding interlayer metal conductor and a metallized via.

[0014] Furthermore, both the input notch circuit and the output notch circuit adopt a 5th-order elliptical notch circuit. The main link of the 5th-order elliptical notch circuit is formed by three LC resonant units connected in series, and an LC resonant circuit is connected in parallel between the connection node of two adjacent LC resonant units and ground.

[0015] The three LC resonant units are respectively the first LC resonant unit composed of inductor L1 and capacitor C1 connected in parallel, the second LC resonant unit composed of inductor L3 and capacitor C3 connected in parallel, and the third LC resonant unit composed of inductor L5 and capacitor C5 connected in parallel; the two LC resonant circuits are respectively the first LC resonant circuit composed of inductor L2 and capacitor C2 connected in series and the second LC resonant circuit composed of inductor L4 and capacitor C4 connected in series.

[0016] Furthermore, capacitors C1, C3, and C5 are all planar capacitors, which are composed of adjacent multilayer metal conductors and interlayer dielectric layers within the microwave multilayer dielectric substrate.

[0017] Both capacitors C2 and C4 are parallel plate capacitors, which are composed of metal conductive strips in different layers of the microwave multilayer dielectric substrate and the dielectric layer between them.

[0018] The inductors L1, L3, and L5 are all planar spiral inductors, formed by a single layer of metal conductive strip inside the microwave multilayer dielectric substrate.

[0019] Both inductors L2 and L4 are multilayer spiral inductors, which are interconnected by multiple metal conductors and interlayer metallized vias within the microwave multilayer dielectric substrate.

[0020] Furthermore, the packaging structure also includes a metal ring frame fixed to the top of the microwave multilayer dielectric substrate and a cover plate fixed to the top of the metal ring frame;

[0021] The microwave multilayer dielectric substrate and the metal ring frame are connected by solder welding, and the metal ring frame and the cover plate are sealed together by parallel seam welding.

[0022] Furthermore, one end of both the input notch output port and the output notch feed port is exposed in the semi-open cavity; the exposed end of the input notch output port is used to connect to functional devices, and the exposed end of the output notch feed port is used to receive front-end signals.

[0023] Furthermore, the bottom metal conductor strip is provided with an RF input port, an RF output port, a power supply port, and a ground plane.

[0024] In a second aspect of the present invention, a design method for a buried notch circuit packaging structure within a single-photon detector readout module is disclosed, the method comprising:

[0025] Construct an interlayer interconnect structure for a microwave multilayer dielectric substrate, forming metal conductive strips and metallized vias distributed between the dielectric layers;

[0026] An input notch filter circuit and an output notch filter circuit are embedded inside a microwave multilayer dielectric substrate using interlayer metal conductors and metallized vias.

[0027] Based on the target filtering requirements, the topology and component parameters of the input notch filter circuit and the output notch filter circuit are determined.

[0028] Furthermore, the method specifically includes the following steps:

[0029] S1. Determine the overall architecture of the packaging structure: Design an integrated packaging architecture consisting of a microwave multilayer dielectric substrate, a metal ring frame, and a cover plate, and determine the connection methods between the metal ring frame and the microwave multilayer dielectric substrate, and between the metal ring frame and the cover plate.

[0030] S2. Design the structure of a microwave multilayer dielectric substrate: Determine the number of dielectric layers, the number of metal conduction strip layers and their distribution on the substrate, and open metallized vias through each dielectric layer; design a semi-open cavity in the middle region of the substrate, and the exposed metal conduction strip at the bottom of the semi-open cavity forms the surface metal conduction strip, and arrange the input notch output port and the output notch feed port on the surface metal conduction strip.

[0031] S3. Design of embedded notch circuit topology: The input notch circuit and the output notch circuit are designed using a 5th order elliptic function prototype circuit. The metal conductors and metallized vias located between each dielectric layer are used to embed and interconnect the input notch circuit and the output notch circuit inside the substrate.

[0032] S4. Determine component parameters: Based on the frequency response requirements of the input and output notch filter circuits and the dielectric parameters of the microwave multilayer dielectric substrate, determine the component parameters of the input and output notch filter circuits.

[0033] Further, in step S4, determining the component parameters includes:

[0034] The dimensional parameters of the parallel plate capacitors in the input and output notch filter circuits are determined using the capacitance calculation formula.

[0035] The structural parameters of planar spiral inductors and multilayer spiral inductors in the input and output notch circuits were determined using three-dimensional electromagnetic simulation.

[0036] The formula for calculating the capacitance is:

[0037] ;

[0038] In the formula, The vacuum permittivity is 8.854 × 10⁻⁶. -12 F / N; The relative permittivity of the medium; The area of ​​a single-layer flat plate; For the spacing between flat plates; This refers to the number of interleaved layers.

[0039] Compared with the prior art, the advantages of the present invention are:

[0040] (1) The embedded notch filter circuit packaging structure in the single-photon detector readout module of the present invention can effectively reduce the module size. In existing readout modules, two independent notch filters are required to suppress the gate frequency signal and its harmonic signals, as shown in the schematic diagram below. Figure 1 As shown, this solution occupies a large amount of circuit space. However, this invention utilizes the microwave multilayer dielectric substrate of the single-photon detector readout module itself. At the locations corresponding to the RF input and RF output ports on this substrate, the input notch filter circuit and the output notch filter circuit are simultaneously embedded and encapsulated within the substrate (its circuit schematic is shown in Figure 1). Figure 2 (As shown). This design eliminates the need for separate notch filter circuits and external packaging structures, thus saving external space and significantly reducing the overall size of the single-photon detector readout module.

[0041] (2) The embedded notch circuit packaging structure in the single-photon detector readout module of the present invention can significantly improve the suppression performance of interference signals. Existing technical solutions can only perform single-pass suppression processing on the gated frequency signal and its harmonic signals, with limited suppression effect, which is difficult to meet the high anti-interference requirements of the module. However, the present invention forms a dual suppression structure for the gated frequency signal and its harmonic interference signals by embedding notch circuits in the RF input port and RF output port of the module, respectively. Interference suppression is achieved from the two key nodes of signal input and output, which greatly enhances the suppression performance of the module for the gated frequency signal and harmonic signals and greatly improves the anti-interference capability.

[0042] (3) The embedded notch circuit packaging structure of the single-photon detector readout module described in this invention enhances the flexibility of the readout module signal suppression design. In the prior art, the suppression method for the gated frequency signal and its harmonic signals is fixed and singular, which can only achieve single-time suppression, and the design adjustment space is small, which cannot adapt to the interference suppression requirements of different scenarios. However, by embedding notch circuits in the RF input port and RF output port of this invention, two additional targeted signal suppression functions can be added. In practical applications, the input notch circuit and output notch circuit inside the module can be combined to carry out targeted notch frequency combination design, which greatly expands the freedom of signal suppression design and can flexibly adapt to the interference suppression requirements of different scenarios. Attached Figure Description

[0043] Figure 1 The circuit schematic of an existing single-photon detector readout module;

[0044] Figure 2 This is a circuit diagram of the single-photon detector readout module in this invention;

[0045] Figure 3 This is a schematic diagram of the buried notch circuit packaging structure within the single-photon detector readout module of the present invention;

[0046] Figure 4 This is a schematic diagram of the input notch filter circuit.

[0047] Figure 5 This is a schematic diagram of a microwave multilayer dielectric substrate.

[0048] Figure 6 The circuit diagram is for a 5th-order elliptic notch filter circuit.

[0049] Figure 7 The simulation results of the input notch filter circuit theoretical model are shown in the figure.

[0050] Figure 8 The image shows the results of a three-dimensional electromagnetic simulation of the input notch filter circuit. Detailed Implementation

[0051] To facilitate understanding of the present invention, a more comprehensive description will be given below with reference to specific embodiments. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of the present invention.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0053] Example 1

[0054] As quantum information technology advances towards chip-based and integrated solutions, the industry is placing higher demands on the integration and signal integrity of related devices and modules. Addressing the inherent contradiction in traditional solutions regarding the balance between size, cost, and performance, this invention provides a packaged structure for an embedded notch filter circuit within a single-photon detector readout module. This structure abandons the traditional approach of using multiple external, independent notch filters. Instead, it integrates the notch filter function through interlayer metal conductors and metallized vias in a microwave multilayer dielectric substrate, forming a distributed circuit embedded within the package structure. Furthermore, this embedded notch filter design can be applied to both the input and output ports of the readout module. This design not only reduces the number of large, independent notch filters, effectively shrinking the overall size of the readout module and lowering production costs, but also further improves the suppression of gated frequency signals or their harmonics, thereby improving the signal-to-interference ratio (SIR) when the readout module extracts avalanche signals and enhancing signal detection accuracy.

[0055] This invention discloses a buried notch circuit packaging structure within a single-photon detector readout module, such as... Figure 3 As shown, the packaging structure includes a microwave multilayer dielectric substrate 10, a metal ring frame, and a cover plate. The metal ring frame is fixed to the top of the microwave multilayer dielectric substrate 10, and the cover plate is fixed to the top of the metal ring frame, forming an integrated packaging architecture of substrate-ring frame-cover plate. Preferably, the microwave multilayer dielectric substrate 10 and the metal ring frame are fixedly connected by soldering, and the metal ring frame and the cover plate are sealed by parallel seam welding, which can effectively isolate the intrusion of external moisture, dust, and other impurities, while improving the electromagnetic shielding sealing performance of the packaging structure.

[0056] Furthermore, the microwave multilayer dielectric substrate 10 adopts a three-dimensional integrated design using a multilayer ceramic substrate, which has multiple dielectric layers stacked along the thickness direction inside, and interlayer metal conductors are provided between each dielectric layer; the top of the microwave multilayer dielectric substrate 10 has a top metal conductor and the bottom has a bottom metal conductor; each dielectric layer has a metallized via that penetrates its thickness; the interlayer metal conductors and the metallized vias cooperate with each other to form a distributed circuit and realize signal transmission and circuit interconnection between different dielectric layers.

[0057] Furthermore, the bottom metal conductor strip is provided with an RF input port, an RF output port, a power supply port, and a large ground plane.

[0058] Furthermore, a semi-open cavity is provided in the middle region of the microwave multilayer dielectric substrate, and the bottom of the semi-open cavity is a surface metal conductor strip. Specifically, the semi-open cavity is formed by removing part of the upper dielectric layer in the middle region of the microwave multilayer dielectric substrate, exposing the target interlayer metal conductor strip that was originally covered by this part of the upper dielectric layer; the exposed metal conductor strip is the surface metal conductor strip located at the bottom of the semi-open cavity. The semi-open cavity provides adaptation space for port wiring, device mounting, and device interconnection. Since the upper dielectric layer is removed from the cavity, the surface metal conductor strip is no longer covered by the dielectric layer and is directly exposed in the semi-open cavity space, becoming a surface circuit inside the cavity that can be directly used for port routing, device mounting, and device interconnection.

[0059] Furthermore, the surface metal conductor is provided with an input notch output port and an output notch feed port. The input notch output port and the output notch feed port are the transition nodes for signal interaction between the embedded notch circuit and external devices (such as amplifiers and other components), enabling signal connection and transmission between the embedded notch circuit and other functional devices (such as amplifiers) within the module.

[0060] One end of the input notch filter port is connected to the RF input port and the input notch circuit 101 through corresponding interlayer metal conductors and metallized vias inside the microwave multilayer dielectric substrate 10; the other end of the input notch filter port is exposed in a semi-open cavity for connecting to subsequent functional devices inside the module, such as the first amplifier 20. The function of the input notch filter port is to accurately extract the signal after interference suppression by the input notch circuit 101 to the subsequent amplification and processing links, while avoiding external interference to the signal during transmission.

[0061] One end of the output notch feed port is exposed in a semi-open cavity to receive the signal after front-end amplification and processing; the other end of the output notch feed port is connected to the output notch circuit 102 and the RF output port through the circuit structure inside the microwave multilayer dielectric substrate 10. The function of the output notch feed port is to feed the signal transmitted from the front-end link into the output notch circuit 102, further suppress residual gate frequency signals or harmonic interference, and finally output a useful signal with a high signal-to-interference ratio through the RF output port.

[0062] Furthermore, the microwave multilayer dielectric substrate 10 is internally embedded with an input notch circuit and an output notch circuit; both the input notch circuit 101 and the output notch circuit 102 are formed by interconnecting interlayer metal conductors and metallized vias of each dielectric layer. One end of the input notch circuit 101 is connected to the RF input port, and the other end is connected to the input notch output port. One end of the output notch circuit 102 is connected to the output notch feed port, and the other end is connected to the RF output port. Preferably, both the input notch circuit 101 and the output notch circuit 102 employ a 5th-order elliptic function filter prototype circuit design to ensure a balance between notch suppression and passband loss, thereby achieving excellent notch performance.

[0063] Furthermore, the top-layer metal conductor strip covers all areas of the top-layer dielectric layer and is welded to the metal ring frame. The metal ring frame and cover plate form a fully enclosed electromagnetic shielding cavity, which not only isolates external electromagnetic radiation from interfering with the embedded notch circuit and port signals, but also ensures the airtightness of the environment surrounding all installed components (such as amplifier chips), guaranteeing the stability and reliability of the components during long-term operation.

[0064] The above-mentioned embedded notch circuit packaging structure is used to fabricate a product such as Figure 3 The single-photon detector readout module shown includes a microwave multilayer dielectric substrate 10, a first amplifier 20, a notch filter element 30, and a second amplifier 40. The microwave multilayer dielectric substrate 10 internally houses an input notch filter circuit 101 and an output notch filter circuit 102. In this embodiment, the input signal to the single-photon detector readout module contains a weak useful signal and a relatively strong interference signal. The useful weak signal has a wide frequency range, covering DC-6GHz, while the interference signal consists of a gated 2.5GHz signal and its 5.0GHz harmonic signal. Because the gated 2.5GHz signal has a large amplitude, if directly input to the first amplifier 20, it will cause the first amplifier 20 to enter a saturated state, generating a strong nonlinear effect, which will affect the effective amplification of the useful weak signal and the subsequent detection. Therefore, the 2.5GHz gated signal needs to be specifically suppressed before the signal enters the first amplifier 20. The notch filter element 30 suppresses the 5.0 GHz harmonic frequency signal of the gated signal. Its specific type can be an LC notch filter, a dielectric notch filter, a surface acoustic wave notch filter, etc., but this embodiment does not limit it.

[0065] Furthermore, in this embodiment, the microwave multilayer dielectric substrate 10 is implemented using a multilayer HTCC ceramic substrate. For example... Figure 5As shown, the microwave multilayer dielectric substrate 10 comprises 16 dielectric layers and 17 metal strips; the 17 metal strips, from top to bottom, are a Top layer, Layers 1-15, and a Bot layer. The 17 metal strips are respectively disposed between the dielectric layers and at the top and bottom of the substrate, forming corresponding metal circuits. The metal circuits include: an RF input port Port1 located on the Bot layer, a 5th-order elliptical notch filter circuit (including an input notch filter circuit and an output notch filter circuit), and an input notch filter output port Port2 located on Layer 8. The 5th-order elliptical notch filter circuit is composed of interlayer metal strips and metallized vias.

[0066] Furthermore, in this embodiment, the input notch filter circuit 101 and the output notch filter circuit 102 are configured with the same notch filter performance, and their structures are mirror images of each other. This allows them to perform notch filtering in the 2.5GHz frequency band, thereby enhancing the suppression capability of gated signals. Simultaneously, the input notch filter circuit 101 and the output notch filter circuit 102 can also be flexibly designed with different notch filter performance according to different design requirements; this embodiment does not limit this.

[0067] Furthermore, the structure of the input notch filter circuit 101 is as follows: Figure 4 As shown, the input notch filter circuit 101 is based on... Figure 5 The diagram shows a three-dimensional integrated structure design of a microwave multilayer dielectric substrate.

[0068] Furthermore, the circuit schematic of the 5th-order elliptic notch filter circuit is as follows: Figure 6 As shown. Figure 6 As shown, the main link of this 5th-order elliptical notch filter circuit is formed by three LC resonant units connected in series, and an LC resonant circuit is connected in parallel between the connection node of two adjacent LC resonant units and ground. The three LC resonant units are the first LC resonant unit composed of inductor L1 and capacitor C1 connected in parallel, the second LC resonant unit composed of inductor L3 and capacitor C3 connected in parallel, and the third LC resonant unit composed of inductor L5 and capacitor C5 connected in parallel; the two LC resonant circuits are the first LC resonant circuit composed of inductor L2 and capacitor C2 connected in series and the second LC resonant circuit composed of inductor L4 and capacitor C4 connected in series.

[0069] Furthermore, capacitors C1, C3, and C5 are parallel plate capacitors of the same type, which are composed of metal conductive strips of Layer 8, Layer 9, and Layer 10 and the dielectric layer between them; capacitors C2 and C4 are both parallel plate capacitors composed of metal conductive strips of Layer 15 and Layer 10 and the dielectric layer between them.

[0070] Furthermore, the inductors L1, L3, and L5 are planar spiral inductors, all formed by processing Lay6 layers of metal conductive strips; the inductors L2 and L4 are multilayer spiral inductors, both composed of multilayer spiral inductors formed by Lay12~Lay15 layers of metal conductive strips and interlayer metallized through holes.

[0071] The signal transmission link of the above single-photon detector readout module is as follows:

[0072] The radio frequency (RF) input signal enters the input notch circuit 101 through the RF input port Port1 on the Bot layer of the microwave multilayer dielectric substrate 10. After the input notch circuit 101 suppresses the second harmonic 5.0GHz gate signal, it is transmitted to the first amplifier 20 through the input notch output port Port2 on the Lay8 layer of the microwave multilayer dielectric substrate 10. The signal amplified by the first amplifier 20 is suppressed by the notch filter element 30 for the 5.0GHz harmonic, and then amplified again by the second amplifier 40. It is then fed into the output notch circuit 102 through the output notch feed port. The output notch circuit 102 further suppresses the 2.5GHz gate signal, which still has a relatively high amplitude, and finally outputs a high signal-to-interference ratio useful signal from the RF output port.

[0073] Example 2

[0074] Based on the packaging structure described in Embodiment 1, this invention also discloses a design method for the buried notch circuit packaging structure within the above-mentioned single-photon detector readout module, the method comprising:

[0075] Construct an interlayer interconnect structure for a microwave multilayer dielectric substrate, forming metal conductive strips and metallized vias distributed between the dielectric layers;

[0076] An input notch filter circuit and an output notch filter circuit are embedded inside a microwave multilayer dielectric substrate using interlayer metal conductors and metallized vias.

[0077] Based on the target filtering requirements, the topology and component parameters of the input notch filter circuit and the output notch filter circuit are determined.

[0078] Furthermore, the method specifically includes the following steps:

[0079] S1. Determine the overall architecture of the packaging structure: Design an integrated packaging architecture consisting of a microwave multilayer dielectric substrate, a metal ring frame, and a cover plate, and determine the connection methods between the metal ring frame and the microwave multilayer dielectric substrate, and between the metal ring frame and the cover plate.

[0080] S2. Design the structure of a microwave multilayer dielectric substrate: Determine the number of dielectric layers, the number of metal conduction strip layers and their distribution on the substrate, and open metallized vias through each dielectric layer; design a semi-open cavity in the middle region of the substrate, and the exposed metal conduction strip at the bottom of the semi-open cavity forms the surface metal conduction strip, and arrange the input notch output port and the output notch feed port on the surface metal conduction strip.

[0081] S3. Design of embedded notch circuit topology: The input notch circuit and the output notch circuit are designed using a 5th order elliptic function prototype circuit. The metal conductors and metallized vias located between each dielectric layer are used to embed and interconnect the input notch circuit and the output notch circuit inside the substrate.

[0082] S4. Determine component parameters: Based on the frequency response requirements of the input and output notch filter circuits and the dielectric parameters of the microwave multilayer dielectric substrate, determine the component parameters of the input and output notch filter circuits.

[0083] Further, in step S4, determining the component parameters includes:

[0084] The dimensional parameters of the parallel plate capacitors in the input and output notch filter circuits are determined using the capacitance calculation formula.

[0085] The structural parameters of planar spiral inductors and multilayer spiral inductors in the input and output notch circuits were determined using three-dimensional electromagnetic simulation.

[0086] The formula for calculating the capacitance is:

[0087] ;

[0088] In the formula, The vacuum permittivity is 8.854 × 10⁻⁶. -12 F / N; The relative permittivity of the medium; The area of ​​a single-layer flat plate; For the spacing between flat plates; This refers to the number of interleaved layers.

[0089] In this embodiment, to enable the 5th-order elliptic notch filter circuit to perform notch filtering at 2.5GHz, the circuit parameters are calculated based on the 5th-order elliptic function filtering principle. Figure 6 The design values ​​for capacitors C1-C5 and inductors L1-L5 are as follows:

[0090] C1=4.44pF; C2=0.44pF; C3=2.48pF; C4=0.44pF; C5=4.44pF;

[0091] L1=0.88nH; L2=9.78nH; L3=1.58nH; L4=9.78nH; L5=0.88nH.

[0092] Substituting the above design values ​​into the ideal circuit schematic for simulation, the notch characteristics are obtained as follows: Figure 7 As shown. By Figure 7 It can be seen that in the 2.5GHz band, the transmission coefficient S(2,1) can reach -66.8dB, which can achieve good notch characteristics and effectively suppress gated interference signals in this band.

[0093] In this embodiment, the microwave multilayer dielectric substrate uses alumina ceramic material with a relative permittivity of 9.8, and the thickness of each dielectric layer of the microwave multilayer dielectric substrate is 0.1 mm. The capacitors C1-C5 are all formed by corresponding metal conducting strips and interlayer dielectrics to create parallel plate capacitors. The formula for calculating the parallel plate capacitor is:

[0094] ;

[0095] In the formula, The vacuum permittivity is 8.854 × 10⁻⁶. -12 F / N; is the relative permittivity of the dielectric; S is the area of ​​a single-layer plate; D is the plate spacing; n is the number of interdigitated layers. In this embodiment, =9.8, D is 0.1mm.

[0096] The following section describes the design of the length, width, and number of interdigitated layers of parallel-plate capacitors for capacitors C1-C5, using the aforementioned formula. The design results are shown in the table below.

[0097]

[0098] In this embodiment, the inductors in the notch filter circuit are all implemented using rectangular spiral inductors. Since the inductance of the spiral inductor is significantly affected by factors such as the shape of the metal conductor, the coupling capacitance between the conductors, and the metallized vias, it is difficult to achieve accurate analysis through calculation formulas. Therefore, three-dimensional electromagnetic simulation software is used for simulation. The simulation results for planar spiral inductors L1, L3, and L5, and stacked spiral inductors L2 and L4 are as follows:

[0099]

[0100] The above model was substituted into a three-dimensional electromagnetic simulation software for simulation, and the simulation results are as follows: Figure 8 As shown. By Figure 8 It can be seen that this structure can achieve a suppression of 56.9dB at the 5.0GHz frequency point. (Compared to...) Figure 7Compared with the theoretical circuit principle calculation results, the suppression frequency remains the same, but the suppression degree is reduced and the suppression bandwidth is widened. This is because the three-dimensional electromagnetic simulation process calculates factors that are not considered in the theoretical circuit principle, such as electromagnetic coupling and parasitic parameters, making the simulation results closer to the actual application scenario.

[0101] Compared with the prior art, the present invention has the following innovations:

[0102] (1) Traditional readout modules typically use discrete notch filters for notch filtering, which are then installed within the readout module. In contrast, this invention integrates the notch filtering function within the readout module's package structure. Utilizing the multilayer ceramic dielectric and metal stripe inherent in the package structure, a distributed notch filter circuit is directly formed, eliminating the need for discrete notch filters. This design reduces the number of notch filters in the readout module. Since notch filters are relatively large, this invention effectively reduces the size of the readout module, while also eliminating the procurement and assembly costs of discrete components, thus lowering the overall cost of the module.

[0103] (2) In traditional readout modules, a single discrete notch filter element can only suppress one interference signal (gated or harmonic signal). If both gated and harmonic signals need to be suppressed simultaneously, two discrete notch filter elements need to be placed at the same time. However, the present invention sets the same or different notch filter function circuits at the input and output ports of the readout module package structure, which provides greater design flexibility. Since two notch filter circuits can be embedded at the input and output ports at the same time, the notch filter frequencies of the two notch filter circuits can be flexibly combined and designed: when designed to be the same, the notch filter suppression capability of the gated signal or its harmonic frequency can be increased to form dual suppression and significantly improve the suppression degree; when designed to be different, the gated signal and its harmonics can be suppressed at the same time, realizing the simultaneous suppression of multiple frequency interferences by a single module without the need for additional discrete components.

[0104] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. A buried notch circuit packaging structure within a single-photon detector readout module, characterized in that, The packaging structure includes a microwave multilayer dielectric substrate; The microwave multilayer dielectric substrate includes multiple dielectric layers stacked along the thickness direction. Metal conductive strips are provided at the top, bottom, and between each dielectric layer of the microwave multilayer dielectric substrate. Multiple metallized vias are provided in the microwave multilayer dielectric substrate. The metal conductive strips and metallized vias cooperate with each other to form a distributed circuit and realize signal transmission and circuit interconnection between each dielectric layer. The microwave multilayer dielectric substrate is embedded with an input notch circuit and an output notch circuit, both of which are interconnected by metal conductors and metallized vias located between each dielectric layer. The microwave multilayer dielectric substrate has a semi-open cavity in the middle region. The semi-open cavity is formed by removing part of the upper dielectric layer in the middle region of the microwave multilayer dielectric substrate, exposing the interlayer metal conductors covered by the part of the upper dielectric layer. The bottom of the semi-open cavity is a surface metal conductor, on which an input notch output port and an output notch feed port are provided to realize the signal interconnection between the embedded notch circuit and the functional device. The input notch filter circuit and the output notch filter circuit are respectively disposed in the regions corresponding to the radio frequency input port and the radio frequency output port inside the microwave multilayer dielectric substrate, and are located outside the semi-open cavity.

2. The buried notch circuit packaging structure within the single-photon detector readout module according to claim 1, characterized in that, The metal guide strips are divided into top metal guide strips, bottom metal guide strips and interlayer metal guide strips according to their layout position. The bottom metal conductor strip is provided with an RF input port, an RF output port, a power supply port, and a ground plane.

3. The buried notch circuit packaging structure within the single-photon detector readout module according to claim 1, characterized in that, One end of the input notch circuit is connected to the input notch output port through a corresponding interlayer metal conductor and a metallized via, and the other end is connected to the RF input port through a corresponding interlayer metal conductor and a metallized via; one end of the output notch circuit is connected to the output notch feed port through a corresponding interlayer metal conductor and a metallized via, and the other end is connected to the RF output port through a corresponding interlayer metal conductor and a metallized via.

4. The buried notch circuit packaging structure within the single-photon detector readout module according to claim 1, characterized in that, Both the input and output notch circuits adopt a fifth-order elliptic function prototype notch circuit. The main link of the fifth-order notch circuit is formed by three LC resonant units connected in series, and an LC resonant circuit is connected in parallel between the connection node of two adjacent LC resonant units and ground. The three LC resonant units are respectively the first LC resonant unit composed of inductor L1 and capacitor C1 connected in parallel, the second LC resonant unit composed of inductor L3 and capacitor C3 connected in parallel, and the third LC resonant unit composed of inductor L5 and capacitor C5 connected in parallel. The two LC resonant circuits are the first LC resonant circuit, which is composed of inductor L2 and capacitor C2 connected in series, and the second LC resonant circuit, which is composed of inductor L4 and capacitor C4 connected in series.

5. The buried notch circuit packaging structure within the single-photon detector readout module according to claim 4, characterized in that, The capacitors C1, C3, and C5 are all planar capacitors, which are composed of adjacent multilayer metal conductors and interlayer dielectric layers within the microwave multilayer dielectric substrate. Both capacitors C2 and C4 are parallel plate capacitors, which are composed of metal conductive strips in different layers of the microwave multilayer dielectric substrate and the dielectric layer between them. The inductors L1, L3, and L5 are all planar spiral inductors, formed by a single layer of metal conductive strip inside the microwave multilayer dielectric substrate. Both inductors L2 and L4 are multilayer spiral inductors, which are interconnected by multiple metal conductors and interlayer metallized vias within the microwave multilayer dielectric substrate.

6. The buried notch circuit packaging structure within the single-photon detector readout module according to claim 1, characterized in that, The packaging structure also includes a metal ring frame fixed to the top of the microwave multilayer dielectric substrate and a cover plate fixed to the top of the metal ring frame. The microwave multilayer dielectric substrate and the metal ring frame are connected by solder welding, and the metal ring frame and the cover plate are sealed together by parallel seam welding.

7. The buried notch circuit packaging structure within the single-photon detector readout module according to claim 1, characterized in that, One end of both the input notch output port and the output notch feed port is exposed in the semi-open cavity; the exposed end of the input notch output port is used to connect to functional devices, and the exposed end of the output notch feed port is used to receive front-end signals.

8. A design method for a buried-wave circuit packaging structure within a single-photon detector readout module according to any one of claims 1 to 7, characterized in that, The method includes: Construct an interlayer interconnect structure for a microwave multilayer dielectric substrate, forming metal conductive strips and metallized vias distributed between the dielectric layers; An input notch filter circuit and an output notch filter circuit are embedded inside a microwave multilayer dielectric substrate using interlayer metal conductors and metallized vias. Based on the target filtering requirements, the topology and component parameters of the input notch filter circuit and the output notch filter circuit are determined.

9. The design method of the buried notch circuit packaging structure in the single-photon detector readout module according to claim 8, characterized in that, The method specifically includes the following steps: S1. Determine the overall architecture of the packaging structure: Design an integrated packaging architecture consisting of a microwave multilayer dielectric substrate, a metal ring frame, and a cover plate, and determine the connection methods between the metal ring frame and the microwave multilayer dielectric substrate, and between the metal ring frame and the cover plate. S2. Design the structure of a microwave multilayer dielectric substrate: Determine the number of dielectric layers, the number of metal conduction strip layers and their distribution on the substrate, and open multiple metallized vias through each dielectric layer; design a semi-open cavity in the middle region of the substrate, and the exposed metal conduction strip at the bottom of the semi-open cavity forms the surface metal conduction strip, and arrange the input notch output port and the output notch feed port on the surface metal conduction strip. S3. Design of embedded notch circuit topology: The input notch circuit and the output notch circuit are designed using a 5th order elliptic function prototype circuit. The metal conductors and metallized vias located between each dielectric layer are used to embed and interconnect the input notch circuit and the output notch circuit inside the substrate. S4. Determine component parameters: Based on the frequency response requirements of the input and output notch filter circuits and the dielectric parameters of the microwave multilayer dielectric substrate, determine the component parameters of the input and output notch filter circuits.

10. The design method of the buried wave circuit packaging structure in the single-photon detector readout module according to claim 9, characterized in that, In step S4, determining the component parameters includes: The dimensional parameters of the parallel plate capacitors in the input and output notch filter circuits are determined using the capacitance calculation formula. The structural parameters of planar spiral inductors and multilayer spiral inductors in the input and output notch circuits were determined using three-dimensional electromagnetic simulation. The formula for calculating the capacitance is: ； In the formula, The vacuum permittivity is 8.854 × 10⁻⁶. -12 F / N; The relative permittivity of the medium; The area of ​​a single-layer flat plate; For the spacing between flat plates; This refers to the number of interleaved layers.

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