Functional coverage rate model determination method and device, equipment, medium and product

Abstract

The invention relates to a functional coverage rate model determination method and device, equipment, a medium and a product. The method comprises the following steps: acquiring a test point description file of each to-be-tested function of the integrated circuit; extracting coverage rate model keywords corresponding to the to-be-tested functions and description information of the coverage rate model keywords from the test point description file; the description information comprises components of a verification environment in the verification tool and hierarchical information between the components; and filling the description information of the coverage rate model keyword corresponding to each to-be-tested function into a preset coverage rate model template in the verification tool to obtain a function coverage rate model corresponding to the integrated circuit. Through the preset tool in the computer equipment, the function coverage rate model can be automatically and accurately written, so that the generation efficiency of the function coverage rate model can be improved, and the verification efficiency of each function of the integrated circuit can be improved.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a method, apparatus, device, medium, and product for determining a functional coverage model. Background Technology

[0002] In the verification process of very large-scale integrated circuits (VLSI), EDA (Electronic Design Automation) vendors typically develop various verification tools and use these tools to verify the functions of the integrated circuit, obtaining functional coverage data. This functional coverage data represents the progress of each function's verification.

[0003] In related technologies, it is necessary to write a functional coverage model of each function of the integrated circuit in the verification tool before the code corresponding to the functional coverage model can be run through the verification tool to obtain the functional coverage data of each function of the integrated circuit.

[0004] However, the functional coverage model in related technologies suffers from low generation efficiency, which affects the verification efficiency of various functions of integrated circuits. Summary of the Invention

[0005] Therefore, it is necessary to provide a method, apparatus, device, medium, and product for determining a functional coverage model to address the aforementioned technical problems. This would improve the efficiency of generating the functional coverage model and thus enhance the verification efficiency of various functions of integrated circuits.

[0006] Firstly, this application provides a method for determining a functional coverage model, including:

[0007] Obtain the test point description files for each function under test of the integrated circuit;

[0008] Extract the coverage model keywords and description information of each coverage model keyword corresponding to each function under test from the test point description file; the description information includes the components of the verification environment in the verification tool and the hierarchical information between the components;

[0009] The description information of the coverage model keywords corresponding to each of the functions to be tested is filled into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit.

[0010] In one embodiment, extracting the coverage model keywords corresponding to each of the functions under test and the descriptive information of each coverage model keyword from the test point description file includes:

[0011] The test point description file is parsed to obtain the range of the coverage model keywords;

[0012] Extract the coverage model keywords corresponding to each of the functions to be tested and the descriptive information of each coverage model keyword from the range in which the coverage model keywords are located.

[0013] In one embodiment, extracting the coverage model keywords corresponding to each of the functions to be tested and the descriptive information of each coverage model keyword from the range where the coverage model keywords are located includes:

[0014] Locate the position of the coverage model keyword corresponding to each of the functions to be tested from the range of the coverage model keyword;

[0015] Based on the position of the coverage model keywords corresponding to each of the functions to be tested, and the positional relationship between the coverage model keywords and the corresponding descriptive information, the position of the descriptive information of each of the coverage model keywords is determined;

[0016] The description information of each coverage model keyword is extracted from the location of the description information of each coverage model keyword; the description information of each coverage model keyword also includes the data source type, label, description object, statistical unit, and hierarchical relationship of each component in the verification environment of each function to be tested.

[0017] In one embodiment, the method for generating the hierarchical relationship of the components in the verification environment includes:

[0018] Based on the components of the verification environment and the hierarchical information between the components, a connection relationship is established between the coverage group in the verification environment and the same coverage group under the test case component, so as to obtain the hierarchical relationship of each component in the verification environment.

[0019] In one embodiment, the method further includes:

[0020] The descriptive information of each of the coverage model keywords is checked to obtain the check results;

[0021] If the inspection result is that the inspection is passed, then the description information of the coverage model keywords corresponding to each of the functions to be tested is filled into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit.

[0022] If the check result is that the check fails, then the target information is determined from the description information of each of the coverage model keywords, the target information is modified, and the modified target information is checked until the check result is that the check passes.

[0023] In one embodiment, the step of checking the descriptive information of each of the coverage model keywords to obtain the check results includes:

[0024] Syntax validation is performed on the data source type, tags, and hierarchical relationships of the components in the verification environment in the description information of each coverage model keyword to obtain the inspection results.

[0025] In one embodiment, the step of filling the description information of the coverage model keywords corresponding to each of the functions under test into a preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit includes:

[0026] Fill in the data source type, label, description object, and statistical unit of each of the functions to be tested into the information input boxes in the coverage model template, and fill in the hierarchical relationship of each component in the verification environment into the hierarchical relationship input box in the coverage model template to obtain the function coverage model.

[0027] Secondly, this application also provides an apparatus for determining a functional coverage model, comprising:

[0028] The acquisition module is used to acquire the test point description files for each function under test of the integrated circuit;

[0029] The extraction module is used to extract coverage model keywords and descriptive information of each coverage model keyword from the test point description file; the descriptive information includes the components of the verification environment in the verification tool and the hierarchical information between the components;

[0030] The filling module is used to fill the description information of the coverage model keywords corresponding to each of the functions to be tested into the preset coverage model template in the verification tool, so as to obtain the functional coverage model corresponding to the integrated circuit.

[0031] Thirdly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the method in any of the embodiments of the first aspect described above.

[0032] Fourthly, embodiments of this application also provide a computer-readable storage medium. This computer-readable storage medium stores a computer program thereon, which, when executed by a processor, implements the steps of the method in any of the embodiments of the first aspect described above.

[0033] Fifthly, embodiments of this application also provide a computer program product. This computer program product includes a computer program that, when executed by a processor, implements the steps of the method in any of the embodiments of the first aspect described above.

[0034] The aforementioned method, apparatus, equipment, medium, and product for determining the functional coverage model involves obtaining test point description files for each function under test (DUT) of an integrated circuit; extracting coverage model keywords and their descriptive information from the test point description files; the descriptive information includes components of the verification environment in the verification tool and hierarchical information between components; and filling the descriptive information of the coverage model keywords corresponding to each DUT into a preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit. Since this embodiment can automatically extract coverage model keywords and their descriptive information from the test point description files and automatically fill the descriptive information of the coverage model keywords into a preset coverage model template in the verification tool for model generation, the functional coverage model can be automatically and accurately written using a preset tool in a computer device. This improves the generation efficiency of the functional coverage model and thus enhances the verification efficiency of each function of the integrated circuit. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a diagram illustrating the application environment of a method for determining the functional coverage model in one embodiment.

[0037] Figure 2 This is a flowchart illustrating a method for determining a functional coverage model in one embodiment;

[0038] Figure 3 This is a flowchart illustrating the extraction steps in one embodiment;

[0039] Figure 4 This is a schematic diagram illustrating the hierarchical relationship between components in an environment, as shown in one embodiment.

[0040] Figure 5 This is a flowchart illustrating the method for determining the functional coverage model in another embodiment;

[0041] Figure 6This is a flowchart illustrating the method for determining the functional coverage model in one optional embodiment.

[0042] Figure 7 This is a structural block diagram of a device for determining the functional coverage model in one embodiment. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0044] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0045] In the verification process of very large-scale integrated circuits (VLSI), EDA (Electronic Design Automation) vendors each have their own parsers for the SystemVerilog (SV) (a hardware description language standard) syntax, and typically develop various verification tools based on SV syntax. These tools are then used to verify the various functions of the integrated circuit, obtaining functional coverage data. Verification tools can be API (Application Programming Interface) tools, such as HVP (Hierarchical Verification Plan). HVP helps customers decompose test points and provides a standard language for back-annotating test point coverage data (such as functional coverage data). Functional coverage is a crucial metric for ensuring the completeness of verification; it represents the progress of each function's verification, thus measuring the completeness of software functional verification.

[0046] In related technologies, during the verification phase, functional coverage models for each function of the integrated circuit need to be manually written in the verification tool before the corresponding code can be run to obtain functional coverage data for each function of the integrated circuit. This allows for back-annotation of the functional coverage data in HVP semantics. Furthermore, these technologies typically require manually establishing the correspondence between the functional coverage model and test points before implementing the back-annotation. Therefore, when the chip verification scale is large, the workload of establishing the correspondence between the functional coverage model and test points and the back-annotation process is enormous and prone to errors, potentially resulting in functional coverage data that does not accurately reflect the verification progress. Thus, in the verification process of very large-scale integrated circuits, these technologies suffer from low efficiency, long cycles, and high error rates due to significant human intervention. In summary, the low efficiency of generating functional coverage models in these technologies affects the verification efficiency of each function of the integrated circuit.

[0047] Having described the background technology of the method for determining the functional coverage model provided in the embodiments of this application, the implementation environment involved in the method for determining the functional coverage model provided in the embodiments of this application will be briefly described below. The method for determining the functional coverage model provided in the embodiments of this application can be applied to, for example... Figure 1 The computer device shown includes a preset tool for executing any step in the method for determining the functional coverage model in the embodiments of this application. Furthermore, after obtaining the functional coverage model, the preset tool can execute the code corresponding to the functional coverage model through a verification tool to obtain functional coverage data. Optionally, the preset tool may be integrated into the verification tool, or it may be communicatively connected to the verification tool, thus allowing the preset tool to transmit functional coverage data to the verification tool.

[0048] For example, in combination Figure 1As shown, the computer device can be a terminal or a server. It includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a method for determining a functional coverage model. The display unit is used to form a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0049] Those skilled in the art will understand that Figure 1 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0050] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0051] In one embodiment, such as Figure 2 As shown, a method for determining a functional coverage model is provided, which is then applied to... Figure 1 Taking a computer device as an example, the explanation includes the following steps:

[0052] S201, Obtain the test point description file for each function under test of the integrated circuit.

[0053] The function under test (DUT) refers to the function in the integrated circuit that needs to be verified. The test point description file is a file provided by the user to the EDA vendor related to the test points; for example, the test point description file can be an XML file.

[0054] In this embodiment, the computer device can extend the application functions described for test points in the EDA vendor's documentation. Specifically, the preset tools in the computer device can predefine coverage model keywords and convert them into rules that conform to SV syntax, ensuring that the code corresponding to the subsequently generated functional coverage model complies with SV syntax rules. Furthermore, after defining the coverage model keywords, the preset tools in the computer device can select a programming language. For example, the programming language can include, but is not limited to, Python, Tcl, C, C++, and R. This selected programming language can then be used to implement the functionality of resolving the keywords. Optionally, the computer device can automatically select a default or commonly used programming language, or it can respond to a user terminal triggering a selected programming language and determine that language as the one used to implement the functionality of resolving the keywords.

[0055] Therefore, the computer device can obtain test point description files for each function under test of the integrated circuit. Optionally, the computer device can automatically identify the test point description files for each function under test of the integrated circuit from its own internal computer. Alternatively, the computer device can also receive the test point description files for each function under test of the integrated circuit sent by the user terminal in real time or at regular intervals. Of course, the specific implementation method for obtaining the test point description files is not limited in the embodiments of this application.

[0056] S202, extract the coverage model keywords and description information of each coverage model keyword corresponding to each function under test from the test point description file; the description information includes the components of the verification environment in the verification tool and the hierarchical information between the components.

[0057] In this embodiment, optionally, the computer device may first extract the coverage model keywords corresponding to each function under test from the test point description file, and then determine the descriptive information of each coverage model keyword based on the coverage model keywords. Alternatively, the computer device may simultaneously extract the coverage model keywords corresponding to each function under test and the descriptive information of each coverage model keyword from the test point description file. Alternatively, the computer device may determine the position of the coverage model keywords corresponding to each function under test from the test point description file, and extract the descriptive information of each coverage model keyword from the test point description file based on the position of each coverage model keyword. Of course, this embodiment does not limit the specific implementation method and order of extracting the coverage model keywords corresponding to each function under test and the descriptive information of each coverage model keyword.

[0058] Furthermore, the computer device can select a preset storage format and store the extracted coverage model keywords and their descriptions based on that preset storage format. The preset storage format may include, but is not limited to, json, toml, yaml, ini, etc., and this application embodiment does not limit the storage format or storage location. The descriptions of each coverage model keyword may include, but are not limited to, the components and hierarchical information between components in the verification environment of the verification tool (i.e., the hierarchical relationship between components), the data source type of each function under test, tags, description objects, statistical units, etc.

[0059] S203, fill the description information of the coverage model keywords corresponding to each function under test into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit.

[0060] In this embodiment, the computer device can pre-define a code template for the coverage model (i.e., a preset coverage model template). It should be noted that the coverage model template can be set according to actual needs, and it must conform to SV syntax and be compileable by the verification tools of EDA vendors. Therefore, the computer device can fill the description information of the coverage model keywords corresponding to each function under test into the fields to be filled in the preset coverage model template in the verification tool, thus obtaining the functional coverage model corresponding to the integrated circuit. The fields to be filled may include, but are not limited to, at least one fill box, at least one fill table, etc.

[0061] Furthermore, after obtaining the functional coverage model using a preset tool in the computer device, the corresponding code can be executed by a verification tool to perform simulation, thereby obtaining functional coverage data. For example, the HVP tool is used as an example in the embodiments of this application. Of course, the method for determining the functional coverage model in the embodiments of this application can also be applied to other verification tools. Since the implementation methods of various verification tools are similar, they will not be repeated here.

[0062] In the above method for determining the functional coverage model, a test point description file for each function under test of the integrated circuit is obtained; coverage model keywords and descriptive information for each coverage model keyword are extracted from the test point description file; the descriptive information includes the components of the verification environment in the verification tool and the hierarchical information between the components; the descriptive information of the coverage model keywords corresponding to each function under test is filled into a preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit. Since this embodiment can automatically extract the coverage model keywords and descriptive information for each function under test from the test point description file, and can automatically fill the descriptive information of each coverage model keyword into a preset coverage model template in the verification tool for model generation, the functional coverage model can be automatically and accurately written using a preset tool in a computer device. Therefore, the generation efficiency of the functional coverage model can be improved, thereby improving the verification efficiency of each function of the integrated circuit.

[0063] In one embodiment, an implementation method is provided for extracting each coverage model keyword and its descriptive information, namely, "extracting the coverage model keywords corresponding to each function under test and their descriptive information from the test point description file" in the above-mentioned S202. Figure 3 As shown, it includes:

[0064] S301, parse the test point description file to obtain the range of keywords in the coverage model.

[0065] In this embodiment of the application, for example, if the test point description file is a table, and taking the HVP tool as an example, the computer device can pre-add the attribute definition keyword "$covergroups" for the functional coverage model. Here, "$covergroups" is merely an example; this embodiment does not limit the name of the keyword, as long as it conforms to the parsing rules of the HVP tool. Therefore, after obtaining the test point description file for each function under test of the integrated circuit, the computer device can parse the test point description file to obtain the rows and columns in the table. Thus, the computer device can identify and extract all the information in the column corresponding to "$covergroups" to obtain the range of the coverage model keyword corresponding to the column of "$covergroups".

[0066] S302, extract the coverage model keywords corresponding to each function under test and the descriptive information of each coverage model keyword from the scope of the coverage model keywords.

[0067] In this embodiment, optionally, the computer device may first extract the coverage model keywords corresponding to each function under test from the range where the coverage model keywords are located, and then determine the descriptive information of each coverage model keyword based on the coverage model keywords. Alternatively, the computer device may simultaneously extract the coverage model keywords corresponding to each function under test and the descriptive information of each coverage model keyword from the range where the coverage model keywords are located. Alternatively, the computer device may determine the position of the coverage model keywords corresponding to each function under test from the range where the coverage model keywords are located, and extract the descriptive information of each coverage model keyword from the test point description file based on the position of each coverage model keyword. Of course, this embodiment does not limit the specific implementation method and order of extracting the coverage model keywords corresponding to each function under test and the descriptive information of each coverage model keyword.

[0068] In this embodiment, the test point description file can be parsed to automatically and accurately obtain the range of coverage model keywords. Therefore, from the range of coverage model keywords, the coverage model keywords corresponding to each function under test, as well as the descriptive information of each coverage model keyword, can be automatically and accurately extracted.

[0069] In one embodiment, an implementation method is provided for extracting each coverage model keyword and its descriptive information, namely, "extracting the coverage model keywords corresponding to each function under test and their descriptive information from the range where the coverage model keywords are located" in S302 above, including:

[0070] Locate the position of the coverage model keyword for each function under test within the range of coverage model keywords.

[0071] Based on the position of the coverage model keywords corresponding to each function under test, and the positional relationship between the coverage model keywords and their corresponding descriptive information, the position of the descriptive information for each coverage model keyword is determined.

[0072] Extract the description information of each coverage model keyword from the location of the description information of each coverage model keyword; the description information of each coverage model keyword also includes the data source type, label, description object, statistical unit, and hierarchical relationship of each component in the validation environment for each function to be tested.

[0073] In this embodiment of the application, as exemplarily shown in Table 1 below, Table 1 is a partial schematic diagram of the test point description file.

[0074] Table 1

[0075]

[0076] For each feature to be tested, the computer device can locate the corresponding coverage model keyword from the range of the coverage model keywords (i.e., the column corresponding to "$covergroups"). For example, the location of the coverage model keyword for feature1.1 is: the position before each ":" in the cell of the third row and fifth column of Table 1. The coverage model keywords can include, but are not limited to, source, scope, label, item, bins, etc.

[0077] Furthermore, the computer device can pre-determine the positional relationship between coverage model keywords and their corresponding descriptive information. Therefore, based on the position of the coverage model keywords corresponding to each function under test and the positional relationship between the coverage model keywords and their corresponding descriptive information, the computer device can determine the position of the descriptive information for each coverage model keyword as the position after the colon following the corresponding coverage model keyword. Then, the computer device can extract the descriptive information for each coverage model keyword from this position. For example, the description information of each coverage model keyword corresponding to feature1.1 includes: "group" after ":" of source in the third row and fifth column of the cell in Table 1, "xys_env_pkg.xys_cvgp" after ":" of scope in the same cell, "feature1_1" after ":" of label in the same cell, "xys_item.a" after ":" of item in the same cell, and "bins valid[] = {[0:5]};bins error = {[7:9]};ignore_bins= default" after ":" of bins in the same cell.

[0078] The description information for each coverage model keyword includes the data source type, tags, description objects, statistical units, and hierarchical relationships of components in the validation environment for each function under test. Specifically, computer equipment can pre-define the attributes defined in the EDA vendor's test point description document using user-defined coverage model keywords. These coverage model keywords are used to facilitate recognition by preset tools.

[0079] For example, the defined coverage model keywords and their descriptions can include, but are not limited to, at least one of the following: First, the coverage model keyword is `_source`, where `_source` describes the data source type of the function under test. For example, `_source` can take values ​​from 'group, test, Assert, AssertResult'. Second, the coverage model keyword is `_scope`, where `_scope` describes the hierarchical relationship of the current functional coverage model, i.e., the hierarchical relationship of the components in the validation environment. Third, the coverage model keyword is `_label`, where `_label` describes the label of the coverpoint defined in the SV syntax. Fourth, the coverage model keyword is `_item`, where `_item` describes the coverage description object, which can be a class member or a separate variable. Fifth, the coverage model keyword is `_bins`, where `_bins` describes the coverage bin in the SV syntax, where bin represents the smallest statistical unit of a coverpoint within a covergroup. The sixth type uses the keyword _cross for coverage modeling. The description of _cross is the corresponding 'cross' in the SV syntax, and 'cross' is the keyword used to construct cross-coverage. The seventh type uses the keyword _option for coverage modeling. The description of _option is the corresponding parameter option in the SV syntax. For example, the descriptions of different coverage model keywords can be separated by commas ",".

[0080] In one embodiment, the method for generating the hierarchical relationship of the components in the above-mentioned verification environment includes:

[0081] Based on the components of the verification environment and the hierarchical information between components, a connection relationship is established between the coverage groups in the verification environment and the same coverage groups under the test case components, thereby obtaining the hierarchical relationship between each component in the verification environment.

[0082] In this embodiment, the computer device can predefine a method to describe the hierarchical relationship ('_scope') of each component in the verification environment. For example, since understanding the hierarchical relationship of the functional coverage model in the verification environment is necessary when automatically writing the code corresponding to the functional coverage model, this embodiment can set rules specifically: requiring all functional coverage models to be instantiated under the top-level structure (uvm_test_top) of the test cases, and connecting the coverage groups corresponding to the functional coverage models to the components that actually perform coverage collection.

[0083] This can be understood as follows: computer equipment can establish connections between coverage groups in the verification environment and the same coverage groups under test case components based on the components of the verification environment and the hierarchical information between them. In this way, the hierarchical relationships between the components in the verification environment can be obtained. For example, ... Figure 4 As shown, Figure 4 This is a schematic diagram illustrating the hierarchical relationship of components in a verification environment in one embodiment. The computer device can establish a connection relationship between "coverage group (cvgp1)" and "env.uvc1.monr1.cvgp1" under the test case component, and finally obtain the hierarchical relationship of the compiled coverage model as: testcase_pkg::cvgp1.some_coverpoint. In this way, the hierarchical relationship of coverage model instances in the verification environment components can be simplified, so that the computer device can easily identify the hierarchy of each coverage model.

[0084] In this embodiment, the location of the coverage model keywords corresponding to each function under test can be automatically and accurately located from the range where the coverage model keywords are located. Therefore, based on the location of the coverage model keywords corresponding to each function under test and the positional relationship between the coverage model keywords and their corresponding descriptive information, the location of the descriptive information of each coverage model keyword can be automatically and accurately determined. Thus, the descriptive information of each coverage model keyword can be automatically and accurately extracted from the location of its descriptive information.

[0085] In one embodiment, an implementation method is provided for checking the descriptive information of each coverage model keyword, that is, after S202 above, as follows: Figure 5 As shown, the above method also includes:

[0086] S204: Check the description information of each coverage model keyword and obtain the check result. If the check result is a pass, proceed to S203; if the check result is a fail, proceed to S205.

[0087] S205, determine the target information from the description information of each coverage model keyword, modify the target information, and check the modified target information until the check result is a pass.

[0088] In this embodiment of the application, the computer device can check the descriptive information of each coverage model keyword and obtain the check result. The check method may include, but is not limited to, syntax checking, rule validation, etc., and the check result may include "check passed" or "check failed".

[0089] In one embodiment, S204 includes:

[0090] Syntax validation is performed on the data source type, tags, and hierarchical relationships of components in the validation environment of the description information of each coverage model keyword to obtain the check results.

[0091] In this embodiment, the computer device can perform syntax validation on the data source type, labels, and hierarchical relationships of components in the description information of each coverage model keyword according to preset validation rules, thereby obtaining the check results. For example, the validation rules may include, but are not limited to, at least one of the following: First, the value range of the data source type "_source" cannot exceed "group, test, Assert, AssertResult". Second, for the description information of the hierarchical relationships of components in the validation environment, "_scope", the concatenation between instances must use ".", and the string must begin with an English character and cannot contain other characters; furthermore, the description information of "_scope" cannot contain any characters other than English letters, numbers, underscores "_", and ".". Third, the description information of the label "_label" cannot begin with a number and cannot contain characters other than numbers and English letters.

[0092] In addition, it should be noted that the syntax of “_bins”, “_option”, and “_cross” in the coverage model keywords must conform to SV semantics, and the syntax of “_bins”, “_option”, and “_cross” will be checked by the validation tool later. Therefore, there is no need to use the preset tool to check the syntax of “_bins”, “_option”, and “_cross” here.

[0093] If the check result is passed, it means that the description information of each coverage model keyword meets the above verification rules. Then the computer device can execute S203, that is, fill the description information of the coverage model keywords corresponding to each function to be tested into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit.

[0094] If the check result is "check failed," it means that at least one item of the description information for each coverage model keyword does not meet the above verification rules. The computer device can then determine the target information from the description information of each coverage model keyword and output an error message on the computer device's interactive interface. The target information refers to the description information that does not meet the above verification rules; the error message includes the target information so that the user knows which description information has a syntax error. Therefore, the computer device can respond to the user terminal's modification operation on the target information, modify the target information, and check the modified target information to obtain a new check result. The computer device can then determine whether the new check result is "check passed" or "check failed," and this process repeats until the check result is "check passed," at which point S203 can be executed.

[0095] In this embodiment, the description information of each coverage model keyword can be grammatically checked, and if the check fails, the user is promptly notified of the erroneous description information. In this way, the erroneous description information can be modified or exceptions can be handled in a timely manner, thus ensuring the accuracy of the description information finally used to generate the functional coverage model.

[0096] In one embodiment, an implementation method for generating a functional coverage model is provided, namely, the above-mentioned step S203, "filling the description information of the coverage model keywords corresponding to each function under test into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit", includes:

[0097] Fill in the data source type, label, description object, and statistical unit of each function to be tested into the information input boxes in the coverage model template, and fill in the hierarchical relationship of each component in the verification environment into the hierarchical relationship input box in the coverage model template to obtain the functional coverage model.

[0098] In this embodiment, the computer device can fill in the data source type of each function under test into the information filling box corresponding to the data source type in the coverage model template, fill in the label of each function under test into the information filling box corresponding to the label in the coverage model template, fill in the description object of each function under test into the information filling box corresponding to the description object in the coverage model template, fill in the statistical unit of each function under test into the information filling box corresponding to the statistical unit in the coverage model template, and fill in the hierarchical relationship of each component in the verification environment into the hierarchical relationship filling box in the coverage model template. In this way, the functional coverage model corresponding to the integrated circuit can be obtained.

[0099] In this embodiment, the data source type, label, description object, and statistical unit of each function to be tested can be filled into the information input boxes in the coverage model template, and the hierarchical relationship of each component in the verification environment can be filled into the hierarchical relationship input box in the coverage model template. By filling in the description information of the coverage model keywords corresponding to each function to be tested, the functional coverage model can be automatically and accurately generated.

[0100] In one exemplary embodiment, such as Figure 6 As shown, a method for determining a functional coverage model is provided, which is then applied to... Figure 1 Taking a computer device as an example, the method includes the following steps:

[0101] S401, Obtain the test point description file for each function under test of the integrated circuit;

[0102] S402, parse the test point description file to obtain the range of keywords in the coverage model;

[0103] S403, locate the position of the coverage model keyword corresponding to each function under test from the range where the coverage model keyword is located;

[0104] S404, Based on the position of the coverage model keyword corresponding to each function under test and the positional relationship between the coverage model keyword and the corresponding descriptive information, determine the position of the descriptive information of each coverage model keyword;

[0105] S405, extract the description information of each coverage model keyword from the location of the description information of each coverage model keyword; the description information of each coverage model keyword also includes the data source type, label, description object, statistical unit, and hierarchical relationship of each component in the validation environment for each function under test.

[0106] S406, perform syntax validation on the data source type, tags, and hierarchical relationships of components in the description information of each coverage model keyword to obtain the check result; if the check result is passed, proceed to S407; if the check result is failed, proceed to S408.

[0107] S407, fill in the data source type, label, description object, and statistical unit of each function to be tested into the information input box in the coverage model template, and fill in the hierarchical relationship of each component in the verification environment into the hierarchical relationship input box in the coverage model template to obtain the functional coverage model.

[0108] S408: Determine the target information from the description information of each coverage model keyword, modify the target information, and check the modified target information until the check result is a pass.

[0109] In the above method for determining the functional coverage model, a test point description file for each function under test of the integrated circuit is obtained; coverage model keywords and descriptive information for each coverage model keyword are extracted from the test point description file; the descriptive information includes the components of the verification environment in the verification tool and the hierarchical information between the components; the descriptive information of the coverage model keywords corresponding to each function under test is filled into a preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit. Since this embodiment can automatically extract the coverage model keywords and descriptive information for each function under test from the test point description file, and can automatically fill the descriptive information of each coverage model keyword into a preset coverage model template in the verification tool for model generation, the functional coverage model can be automatically and accurately written using a preset tool in a computer device. Therefore, the generation efficiency of the functional coverage model can be improved, thereby improving the verification efficiency of each function of the integrated circuit.

[0110] As can be seen from the above embodiments, the embodiments of this application extend the description function of application test points based on SystemVerilog syntax, that is, define concise coverage description semantics. Based on this, a simplified coverage description semantics method based on SystemVerilog is provided. The following beneficial effects are achieved by using this method:

[0111] First, the hierarchical relationship between the components in the verification environment can be predefined, which will then standardize the naming of the verification components and improve standardization.

[0112] Secondly, when users fill in test features or test points, they can also fill in the descriptive information required for the functional coverage model. In this way, after obtaining the test point description file, the functional coverage model can be automatically generated, which can clearly show the testers' test intentions and the completeness of the test in advance. Therefore, it can expose the risks that may be missed during the review stage, and identify and fix risk issues in the early stage of verification.

[0113] Third, developing a functional coverage model in the early stages of verification not only saves the workload of manual development, but also avoids syntax or logical errors caused by manual writing by developing or writing the functional coverage model using pre-set tools.

[0114] Fourth, during the coverage collection phase, when functional coverage data is obtained through the functional coverage model, the preset tools and verification tools can automatically associate the functional coverage model with the functional coverage data obtained after simulation, associate the functional coverage model with components in the verification environment, and automatically associate the functional coverage data with coverage points (such as feature1.1). This allows for accurate and concrete determination of the verification progress of each coverage point, and further enables more precise identification of relatively weak test locations in the test features, as well as locations where additional test cases need to be added.

[0115] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0116] Based on the same inventive concept, this application also provides a device for determining the function coverage model to implement the method for determining the function coverage model described above. The solution provided by this device is similar to the solution described in the above method. Therefore, the specific limitations in one or more embodiments of the device for determining the function coverage model provided below can be found in the limitations of the method for determining the function coverage model described above, and will not be repeated here.

[0117] In one exemplary embodiment, such as Figure 7 As shown, a device for determining a functional coverage model is provided, comprising: an acquisition module 501, an extraction module 502, and a filling module 503, wherein:

[0118] The acquisition module 501 is used to acquire the test point description files of each function under test of the integrated circuit.

[0119] The extraction module 502 is used to extract the coverage model keywords corresponding to each function under test and the description information of each coverage model keyword from the test point description file; the description information includes the components of the verification environment in the verification tool and the hierarchical information between the components.

[0120] The filling module 503 is used to fill the description information of the coverage model keywords corresponding to each function under test into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit.

[0121] In one embodiment, the extraction module 502 includes:

[0122] The parsing unit is used to parse the test point description file to obtain the range of keywords in the coverage model;

[0123] The extraction unit is used to extract the coverage model keywords corresponding to each function under test and the descriptive information of each coverage model keyword from the scope of the coverage model keywords.

[0124] In one embodiment, the extraction unit is specifically used for:

[0125] Locate the position of the coverage model keyword for each function under test from the range of coverage model keywords;

[0126] Based on the position of the coverage model keywords corresponding to each function under test and the positional relationship between the coverage model keywords and the corresponding descriptive information, determine the position of the descriptive information of each coverage model keyword;

[0127] Extract the description information of each coverage model keyword from the location of the description information of each coverage model keyword; the description information of each coverage model keyword also includes the data source type, label, description object, statistical unit, and hierarchical relationship of each component in the validation environment for each function to be tested.

[0128] In one embodiment, the apparatus for determining the functional coverage model further includes:

[0129] The connection relationship establishment module is used to establish connection relationships between coverage groups in the verification environment and the same coverage groups under test case components based on the components of the verification environment and the hierarchical information between components, so as to obtain the hierarchical relationship between each component in the verification environment.

[0130] In one embodiment, the apparatus for determining the functional coverage model further includes:

[0131] The inspection module is used to inspect the descriptive information of keywords for each coverage model and obtain the inspection results;

[0132] The execution module is used to fill the description information of the coverage model keywords corresponding to each function under test into the preset coverage model template in the verification tool if the inspection result is that the inspection is passed, so as to obtain the functional coverage model corresponding to the integrated circuit.

[0133] The modification module is used to determine the target information from the description information of each coverage model keyword if the check result is that the check fails, modify the target information, and check the modified target information until the check result is that the check passes.

[0134] In one embodiment, the inspection module includes:

[0135] The checking unit is used to perform syntax verification on the data source type, tags, and hierarchical relationships of components in the verification environment of the description information of each coverage model keyword, and obtain the checking results.

[0136] In one embodiment, the filling module 503 includes:

[0137] The fill cells are used to fill in the data source type, label, description object, and statistical unit of each function under test into the information fill boxes in the coverage model template, and to fill in the hierarchical relationship of each component in the verification environment into the hierarchical relationship fill box in the coverage model template, so as to obtain the functional coverage model.

[0138] Each module in the aforementioned functional coverage model determination device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0139] In one exemplary embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 1As shown, the computer device includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When executed by the processor, the computer program implements a method for determining a functional coverage model. The display unit is used to form a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0140] Those skilled in the art will understand that Figure 1 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0141] In one exemplary embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement any one of the method steps in the various embodiments of the method for determining the functional coverage model described in the preceding embodiments.

[0142] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements any one of the method steps in the various embodiments of the method for determining the functional coverage model described in the preceding embodiments.

[0143] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements any one of the method steps in various embodiments of the method for determining the functional coverage model in the preceding embodiments.

[0144] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0145] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0146] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for determining a functional coverage model, characterized in that, The method includes: Obtain the test point description files for each function under test of the integrated circuit; Extract the coverage model keywords and description information of each coverage model keyword corresponding to each function under test from the test point description file; the description information includes the components of the verification environment in the verification tool and the hierarchical information between the components; The description information of the coverage model keywords corresponding to each of the functions to be tested is filled into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit.

2. The method according to claim 1, characterized in that, The step of extracting coverage model keywords and descriptive information for each coverage model keyword corresponding to each function under test from the test point description file includes: The test point description file is parsed to obtain the range of the coverage model keywords; Extract the coverage model keywords corresponding to each of the functions to be tested and the descriptive information of each coverage model keyword from the range in which the coverage model keywords are located.

3. The method according to claim 2, characterized in that, The step of extracting the coverage model keywords corresponding to each of the functions under test and the descriptive information of each coverage model keyword from the range in which the coverage model keywords are located includes: Locate the position of the coverage model keyword corresponding to each of the functions to be tested from the range of the coverage model keyword; Based on the position of the coverage model keywords corresponding to each of the functions to be tested, and the positional relationship between the coverage model keywords and the corresponding descriptive information, the position of the descriptive information of each of the coverage model keywords is determined; The description information of each coverage model keyword is extracted from the location of the description information of each coverage model keyword; the description information of each coverage model keyword also includes the data source type, label, description object, statistical unit, and hierarchical relationship of each component in the verification environment of each function to be tested.

4. The method according to claim 3, characterized in that, The method for generating the hierarchical relationship of each component in the verification environment includes: Based on the components of the verification environment and the hierarchical information between the components, a connection relationship is established between the coverage group in the verification environment and the same coverage group under the test case component, so as to obtain the hierarchical relationship of each component in the verification environment.

5. The method according to any one of claims 1-4, characterized in that, The method further includes: The descriptive information of each of the coverage model keywords is checked to obtain the check results; If the inspection result is that the inspection is passed, then the description information of the coverage model keywords corresponding to each of the functions to be tested is filled into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit. If the check result is that the check fails, then the target information is determined from the description information of each of the coverage model keywords, the target information is modified, and the modified target information is checked until the check result is that the check passes.

6. The method according to claim 5, characterized in that, The description information of each of the coverage model keywords is checked to obtain the check results, including: Syntax validation is performed on the data source type, tags, and hierarchical relationships of the components in the verification environment in the description information of each coverage model keyword to obtain the inspection results.

7. The method according to any one of claims 1-4, characterized in that, The step of filling the description information of the coverage model keywords corresponding to each of the functions under test into the preset coverage model template in the verification tool to obtain the functional coverage model corresponding to the integrated circuit includes: Fill in the data source type, label, description object, and statistical unit of each of the functions to be tested into the information input boxes in the coverage model template, and fill in the hierarchical relationship of each component in the verification environment into the hierarchical relationship input box in the coverage model template to obtain the function coverage model.

8. A device for determining a functional coverage model, characterized in that, The device includes: The acquisition module is used to acquire the test point description files for each function under test of the integrated circuit; The extraction module is used to extract coverage model keywords and descriptive information of each coverage model keyword from the test point description file; the descriptive information includes the components of the verification environment in the verification tool and the hierarchical information between the components; The filling module is used to fill the description information of the coverage model keywords corresponding to each of the functions to be tested into the preset coverage model template in the verification tool, so as to obtain the functional coverage model corresponding to the integrated circuit.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 7.

11. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 7.

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