High-performance miniaturized Doherty circuit

Abstract

The invention discloses a high-performance miniaturized Doherty circuit, which comprises a bridge, a carrier power amplifier circuit, an auxiliary power amplifier circuit and a synthesis network, and is characterized in that the carrier power amplifier circuit comprises a first input matching circuit, a carrier amplifier and a first output matching circuit which are connected in sequence; the auxiliary power amplifier circuit comprises a second input matching circuit, a peak amplifier and a second output matching circuit; the first output matching circuit and the second output matching circuit are connected with the synthesis network, and the bridge divides an input signal into two paths of signals and inputs the two paths of signals to the carrier power amplifier circuit and the auxiliary power amplifier circuit respectively. The invention has the characteristics of high performance, miniaturization and low cost.

Description

Technical Field

[0001] This application belongs to the field of integrated circuit technology, and in particular relates to a high-performance miniaturized Doherty circuit. Background Technology

[0002] With the rapid development of mobile communication technology, the fifth-generation mobile communication system, characterized by high-speed transmission, has placed new demands on radio frequency (RF) chips, specifically requiring high linearity, high integration, high efficiency, low cost, and multi-band, multi-mode, and multi-functionality. At this point, the core RF front-end chip becomes crucial, primarily including switches, low-noise amplifiers, and power amplifiers.

[0003] Doherty power amplifiers are key components in 5G Maxsive MIMO system base stations due to their ability to maintain high efficiency even in the high-power back-off region. However, the traditional Doherty architecture relies on quarter-wavelength microstrip lines for impedance transformation and power combining, resulting in a relatively large physical size at low frequencies, which severely restricts circuit miniaturization.

[0004] Existing miniaturization technologies have the following limitations:

[0005] Pure lumped parameter schemes, such as LC networks, can reduce size, but they face problems such as narrow bandwidth, large insertion loss, low power capacity, and insufficient harmonic suppression.

[0006] Distributed transmission line schemes rely on multiple microstrip lines connected in series, resulting in a relatively large size.

[0007] Therefore, there is a need for a Doherty power amplifier solution that can significantly reduce circuit size and simplify harmonic control networks while maintaining broadband high efficiency. Summary of the Invention

[0008] Purpose of the invention: In order to solve the problems existing in the prior art, the present invention provides a high-performance miniaturized Doherty circuit.

[0009] Technical Solution: This invention provides a high-performance miniaturized Doherty circuit, including a bridge, a carrier power amplifier circuit, an auxiliary power amplifier circuit, and a combining network. The carrier power amplifier circuit includes a first input matching circuit, a carrier amplifier, and a first output matching circuit connected in sequence. The auxiliary power amplifier circuit includes a second input matching circuit, a peak amplifier, and a second output matching circuit. The first and second output matching circuits are connected to the combining network. The bridge splits the input signal into two signals, which are respectively input to the carrier power amplifier circuit and the auxiliary power amplifier circuit.

[0010] Furthermore, the bridge divides the input signal into two signals according to a preset power distribution ratio and phase relationship.

[0011] Furthermore, the carrier amplifier is biased in Class AB or Class B mode, and the peak amplifier is biased in Class C mode. When the power of the input signal is less than the threshold value, only the carrier power amplifier circuit works; the auxiliary power amplifier circuit works when the power of the input signal reaches a certain threshold.

[0012] Furthermore, the first input matching circuit includes first to fifth phase compensation lines and first to third capacitors. One end of the first phase compensation line is connected to a bridge circuit, and the other end is connected to one end of the first capacitor and one end of the second capacitor. The other end of the first capacitor is grounded. The other end of the second capacitor is connected to one end of the third capacitor and one end of the second phase compensation line. The other end of the third capacitor is grounded. The other end of the second phase compensation line is connected to one end of the third phase compensation line. The other end of the third phase compensation line is connected to a carrier power amplifier. The first to third capacitors form a Π-type matching structure.

[0013] Furthermore, the first input matching circuit also includes a first resistor, fourth and fifth phase compensation lines, and a fourth capacitor; one end of the first resistor is connected to the connection point of the second and third phase compensation lines, the other end of the first resistor is connected to one end of the fourth phase compensation line, the other end of the fourth phase compensation line is connected to one end of the fourth capacitor and one end of the fifth phase compensation line, the other end of the fourth capacitor is grounded, and the other end of the fifth phase compensation line is connected to the power supply Vgs1.

[0014] Furthermore, the second input matching circuit includes sixth to eighth phase compensation lines, fifth and sixth capacitors, one end of the sixth phase compensation line is connected to the bridge circuit, and the other end is connected to one end of the fifth capacitor. The other end of the fifth capacitor is connected to one end of the sixth capacitor and one end of the seventh phase compensation line. The other end of the phase compensation line is connected to one end of the eighth phase compensation line, and the other end of the eighth phase compensation line is connected to the carrier amplifier.

[0015] Furthermore, the second input matching circuit also includes a second resistor, ninth and tenth phase compensation lines, and a seventh capacitor; one end of the second resistor is connected to the connection point of the seventh and eighth phase compensation lines; the other end of the second resistor is connected to one end of the ninth phase compensation line, the other end of the ninth phase compensation line is connected to one end of the seventh capacitor and one end of the tenth phase compensation line; the other end of the seventh capacitor is grounded, and the other end of the tenth phase compensation line is connected to the power supply Vgs2.

[0016] Furthermore, the first and second output matching circuits have the same structure, both including the eleventh to fifteenth phase compensation lines and the eighth to tenth capacitors;

[0017] One end of the eleventh phase compensator is connected to the corresponding amplifier, and the other end is connected to one end of the twelfth phase compensation line and one end of the fourteenth phase compensation line. The other end of the twelfth phase compensation line is connected to one end of the thirteenth phase compensation line and one end of the eighth capacitor. The other end of the eighth capacitor is grounded. One end of the thirteenth phase compensation line is connected to one end of the ninth capacitor. The other end of the ninth capacitor is connected to the combining network. The other end of the fourteenth phase compensation line is connected to one end of the tenth capacitor and one end of the fifteenth phase compensation line. The other end of the tenth capacitor is grounded. One end of the fifteenth phase compensation line is connected to the power supply VDD.

[0018] Furthermore, the synthesized network includes a peak compensation line connected to the first output matching circuit and the second output matching circuit, and a transmission line connected to the first output matching circuit and the peak compensation line.

[0019] Furthermore, the dies of both amplifiers are fabricated using a 0.25 µm GaN process, and the carrier amplifier and peak amplifier are integrated into a single device using a DFN package.

[0020] Beneficial Effects: This invention features high performance, miniaturization, and low cost. By employing GaN HEMT power devices for the 5G RF base station transmitter front-end, it exhibits excellent performance in the 2490MHz-2690MHz frequency band, simplifying base station transmitter system design, reducing system size, and lowering costs. Using GaN HEMT devices as the core amplification device provides higher power density and higher breakdown field strength than traditional LDMOS, enabling the device to achieve higher output power (50.3dBm output saturation power at 2.6GHz). The use of a parallel resonant circuit achieves output matching while suppressing harmonics, significantly reducing circuit size.

[0021] This scheme avoids using a quarter-wavelength line, instead incorporating the bias circuit TL10 into the matching process. This not only effectively shortens the bias line length but also expands the operating bandwidth due to the absence of the narrowband effect of a quarter-wavelength line. The peak power amplifier also employs the same matching scheme to further compress the circuit size, using LC-to-ground to suppress harmonics. An impedance of 150Ω is chosen at the junction point, resulting in a 50Ω impedance after junctioning. This direct matching to 50Ω avoids the need for traditional quarter-wavelength lines for impedance transformation, thereby extending the operating bandwidth of the Doherty power amplifier. Attached Figure Description

[0022] Figure 1 This is a simplified schematic diagram of this application;

[0023] Figure 2 This is a detailed schematic diagram of this application;

[0024] Figure 3 This is a physical image of the object in this application;

[0025] Figure 4 This is a gain curve of this application at frequencies of 2490MHz-2690MHz;

[0026] Figure 5 This is an efficiency curve of this application at frequencies of 2490MHz-2690MHz. Detailed Implementation

[0027] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0028] Based on the communication frequency band requirements of 5G base stations, and addressing the shortcomings of existing RF front-end transmitter modules such as large size, high cost, or low back-off efficiency, this application proposes an implementation method that uses a hybrid matching of distributed parameter circuits and lumped parameter circuits, and employs asymmetric power allocation to achieve a large back-off range, thereby achieving high efficiency at the back-off point for peak-to-average power ratio (PAPR) signals.

[0029] like Figure 1 As shown, in order to achieve miniaturization and high efficiency, this invention includes a 3dB bridge, a carrier amplifier, a peak amplifier, and a matching synthesis network, designed in conjunction with a hybrid impedance transformation network and an ultra-small bridge.

[0030] In this embodiment, the carrier amplifier and peak amplifier are integrated into a single device using a DFN package, which offers advantages such as high integration and low cost. The peak compensation line replaces the quarter-wavelength impedance transformation line, shortening the physical size of the microstrip line to the junction point and also improving the operating bandwidth to some extent.

[0031] After the signal enters through the 3dB bridge, it is split into two signals according to a 1:1 power ratio and phase relationship. The Doherty structure consists of two amplifier circuits: one called the carrier amplifier or main amplifier, and the other called the peak amplifier or auxiliary amplifier. The carrier amplifier is typically biased in Class AB or Class B, while the auxiliary amplifier is typically biased in Class C. When the amplifiers are in small-signal operation mode, only the main amplifier operates; the auxiliary amplifier only operates when the input signal power reaches a certain threshold.

[0032] The miniaturized, high-efficiency Doherty power amplifier die uses a 0.25 µm GaN process. Because GaN material offers high gain and high output power, only a few transistors are needed to achieve watt-level output power. By employing an ultra-miniature power divider device structure, its size is reduced by 70% compared to the previous generation. The amplifier uses a non-traditional Doherty structure, eliminating the traditional quarter-wavelength impedance transformation line, which expands the operating bandwidth to some extent.

[0033] The input / output matching circuit consists of a distributed parameter circuit and a lumped parameter circuit. It is connected in parallel with the lumped capacitor through a transmission line to complete the harmonic control function, which significantly reduces the number of components and circuit complexity, while reducing insertion loss and achieving a balance between miniaturization and high performance.

[0034] To address the peak-to-average power ratio (PAPR) characteristics of 5G signals, this solution employs a Doherty architecture with asymmetric power distribution. By using different power distribution ratios (1:2) for the main amplifier and auxiliary amplifier, the maximum efficiency point is adjusted to the PAPR fallback position of the actual signal. This provides a wider fallback range, ensuring the power amplifier operates at high efficiency.

[0035] Figure 2 The circuit schematic of this invention shows that the input matching circuit of the carrier amplifier M1 adopts a hybrid matching method of microstrip and capacitor. The signal passes through the phase compensation line TL22, the input matching network (C10, C9, C7, TL15, TL16), the carrier amplifier M1, and the output matching network (TL11, TL10, TL9, TL8, C5, C6, C4) to reach the combining point. The input matching network adopts a Π-type (C7, C9, C10) matching structure, which effectively reduces the circuit design size.

[0036] The input matching circuit of peak amplifier M2 adopts a hybrid matching method of microstrip and capacitor. The signal passes through phase compensation line TL21, input matching network (C13, C12, TL18, TL19), peak amplifier M2, output matching network (TL1, TL2, TL3, TL4, C2, C1, C3), and peak compensation line TL6 to reach the combining point.

[0037] This miniaturized Doherty power amplifier module uses an integrated miniaturized bridge, which reduces its size to some extent, as shown in the attached diagram. Figure 3 As shown, the board area is reduced from 45×30mm (1350mm²) of the traditional Doherty power amplifier to 32×25mm (800mm²), a 40% reduction. In the standard 5G AAU, the number of RF channels that can be integrated is further increased, improving the integration level by three times, which makes it possible for the amplifier to be used on a large scale in the RF transmission circuit of 5G base stations.

[0038] For the bias circuit of the carrier power amplifier, traditional bias circuits use a quarter-wavelength line, and the bias circuit itself does not participate in matching. This solution does not use a quarter-wavelength line; instead, the bias circuit portion TL10 (in this embodiment, the bias circuit in the carrier power amplifier circuit includes TL10 and C5) also participates in matching. This not only effectively shortens the length of the bias line but also expands the operating bandwidth due to the absence of the narrowband effect of the quarter-wavelength line. The peak power amplifier also uses the same matching scheme to further compress the circuit size, employing LC-to-ground harmonic suppression. An impedance of 150Ω is chosen at the junction point, resulting in a 50Ω impedance after junction, thus directly matching to 50Ω and avoiding the use of a traditional quarter-wavelength line for impedance transformation, thereby expanding the operating bandwidth of the Doherty power amplifier.

[0039] Inside the plastic-encapsulated device, the input matching of the carrier power amplifier die adopts an LCLCL matching structure.

[0040] Appendix Figure 4 Appendix Figure 5 As shown in the figure. The actual test results show that in the 2490MHz-2690MHz frequency band, the saturated output power is greater than 50dBm and the saturation efficiency reaches 60%; the efficiency is still greater than 63% when backed down by 8.5dB, and the gain is greater than 16dB when backed down by 8.5dB.

[0041] It should also be noted that the various specific technical features described in the above embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, the present invention will not describe the various possible combinations separately.

Claims

1. A high-performance miniaturized Doherty circuit, characterized in that, The system includes a bridge circuit, a carrier power amplifier circuit, an auxiliary power amplifier circuit, and a combining network. The carrier power amplifier circuit includes a first input matching circuit, a carrier amplifier, and a first output matching circuit connected in sequence. The auxiliary power amplifier circuit includes a second input matching circuit, a peak amplifier, and a second output matching circuit. The first and second output matching circuits are connected to the combining network. The bridge circuit splits the input signal into two signals, which are then input to the carrier power amplifier circuit and the auxiliary power amplifier circuit, respectively.

2. The high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The bridge divides the input signal into two signals according to a preset power distribution ratio and phase relationship.

3. The high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The carrier amplifier is biased in Class AB or Class B mode, and the peak amplifier is biased in Class C mode. When the power of the input signal is less than the threshold value, only the carrier power amplifier circuit works; the auxiliary power amplifier circuit works when the power of the input signal reaches a certain threshold.

4. The high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The first input matching circuit includes first to fifth phase compensation lines and first to third capacitors. One end of the first phase compensation line is connected to a bridge circuit, and the other end is connected to one end of the first capacitor and one end of the second capacitor. The other end of the first capacitor is grounded. The other end of the second capacitor is connected to one end of the third capacitor and one end of the second phase compensation line. The other end of the third capacitor is grounded. The other end of the second phase compensation line is connected to one end of the third phase compensation line. The other end of the third phase compensation line is connected to a carrier power amplifier. The first to third capacitors form a Π-type matching structure.

5. The high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The first input matching circuit further includes a first resistor, fourth and fifth phase compensation lines, and a fourth capacitor; one end of the first resistor is connected to the connection point of the second and third phase compensation lines, the other end of the first resistor is connected to one end of the fourth phase compensation line, the other end of the fourth phase compensation line is connected to one end of the fourth capacitor and one end of the fifth phase compensation line, the other end of the fourth capacitor is grounded, and the other end of the fifth phase compensation line is connected to the power supply Vgs1.

6. The high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The second input matching circuit includes sixth to eighth phase compensation lines, fifth and sixth capacitors. One end of the sixth phase compensation line is connected to the bridge circuit, and the other end is connected to one end of the fifth capacitor. The other end of the fifth capacitor is connected to one end of the sixth capacitor and one end of the seventh phase compensation line. The other end of the phase compensation line is connected to one end of the eighth phase compensation line, and the other end of the eighth phase compensation line is connected to the carrier amplifier.

7. The high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The second input matching circuit also includes a second resistor, ninth and tenth phase compensation lines, and a seventh capacitor; one end of the second resistor is connected to the connection point of the seventh phase compensation line and the eighth phase compensation line. The other end of the second resistor is connected to one end of the ninth phase compensation line, and the other end of the ninth phase compensation line is connected to one end of the seventh capacitor and one end of the tenth phase compensation line; the other end of the seventh capacitor is grounded, and the other end of the tenth phase compensation line is connected to the power supply Vgs2.

8. The high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The first and second output matching circuits have the same structure, both including the eleventh to fifteenth phase compensation lines and the eighth to tenth capacitors; One end of the eleventh phase compensator is connected to the corresponding amplifier, and the other end is connected to one end of the twelfth phase compensation line and one end of the fourteenth phase compensation line. The other end of the twelfth phase compensation line is connected to one end of the thirteenth phase compensation line and one end of the eighth capacitor. The other end of the eighth capacitor is grounded. One end of the thirteenth phase compensation line is connected to one end of the ninth capacitor. The other end of the ninth capacitor is connected to the combining network. The other end of the fourteenth phase compensation line is connected to one end of the tenth capacitor and one end of the fifteenth phase compensation line. The other end of the tenth capacitor is grounded. One end of the fifteenth phase compensation line is connected to the power supply VDD.

9. A high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The synthesized network includes a peak compensation line connected to a first output matching circuit and a second output matching circuit, and a transmission line connected to the first output matching circuit and the peak compensation line.

10. A high-performance miniaturized Doherty circuit according to claim 1, characterized in that, The two amplifier dies are fabricated using 0.25 µm GaN technology, and the carrier amplifier and peak amplifier are integrated into a single device using DFN packaging.

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