On-chip stress determination and compensation

Abstract

The invention relates to on-chip stress determination and compensation. In some examples, a circuit includes a first electrical component (204) disposed in a first region (202) of a substrate. The circuit also includes a first measurement circuit (206) disposed in the first region proximate to the first electrical component. The circuit also includes a second electrical component (210) disposed in a second region (208) of the substrate, the second region of the substrate proximate to the first region of the substrate. The circuit also includes a second measurement circuit (212) disposed in the second region proximate to the second electrical component. The circuit also includes a stress inducing device (214) disposed on the substrate over the second region.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more specifically, to on-chip stress determination and compensation. Background Technology

[0002] For example, components of a circuit that can be implemented on a semiconductor die may operate differently under varying physical or mechanical stresses. Such operational variations can be challenging for characterizing and / or correcting post-packaging of the semiconductor die. Summary of the Invention

[0003] In some examples, a circuit includes a first electrical component disposed in a first region of a substrate. The circuit also includes a first measuring circuit disposed in the first region, close to the first electrical component. The circuit further includes a second electrical component disposed in a second region of the substrate, close to the first region. The circuit also includes a second measuring circuit disposed in the second region, close to the second electrical component. The circuit further includes a stress initiating device disposed on the substrate, above the second region.

[0004] In some examples, a circuit includes a first electrical component disposed in a first region of a substrate, wherein the first region is subjected to mechanical stress applied to the first region. The circuit also includes a second electrical component disposed in a second region of the substrate, the second region of the substrate being adjacent to but outside the first region of the substrate. The circuit further includes measurement circuitry coupled to the first and second electrical components.

[0005] In some examples, a method includes disposing a first electrical component in a first region of a substrate. The method further includes disposing a second electrical component in a second region of the substrate adjacent to the first region. The method also includes configuring measurement circuitry to be coupled to at least one of the first or second electrical component. The method further includes disposing a stress initiation device on the substrate, above the first region. Attached Figure Description

[0006] Figure 1 Show block diagrams of the system based on various examples.

[0007] Figure 2 Show cross-sectional views of semiconductor dies based on various examples.

[0008] Figure 3 Schematic diagrams of stress measurement circuits based on various examples are shown.

[0009] Figure 4 Schematic diagrams of stress measurement circuits based on various examples are shown.

[0010] Figure 5 Schematic diagrams of stress measurement circuits based on various examples are shown.

[0011] Figure 6 Graphs showing signal waveforms in voltage reference circuits based on various examples.

[0012] Figure 7 Flowcharts illustrating methods for performing on-chip stress determination and / or compensation based on various examples. Detailed Implementation

[0013] Physical or mechanical stress or strain (which can be summarized as stress) can adversely affect a circuit. For example, as the stress applied to a circuit increases, the error between the circuit's nominal or expected output value and its actual output value may increase. This increase in error can be added to sources other than, for example, temperature, noise, process variations, etc. In some system implementations, this error may be tolerable. However, in other system implementations, the error may render the circuit unsuitable for use in the system. An example of such a system is a high-precision voltage reference. To mitigate these errors, various methods can be explored to measure or determine the error and compensate for or correct it. For example, measurements can be performed to determine the stress applied to the circuit, and in some examples, compensation or correction values ​​or signals can be determined to compensate for the determined stress. In some examples, the determined compensation is applied to the circuit's signal chain to compensate for the effect of stress on the circuit's output signal.

[0014] Examples in this specification include circuits with on-chip stress determination and, in some examples, stress compensation. To perform stress determination, the amount of stress applied to the circuit can be characterized based on a reference element. For example, various electrical components may have corresponding stress sensitivities. Some electrical components are more sensitive to stress than others. To determine the effect of stress on an electrical component, stress can be artificially applied to the component. For example, stress regions on the die can be created via any combination (e.g., one or more) of bonding wires, bonding pads, vias, polyamide layers, embedded copper layers, etc., to form and / or concentrate stress in a designated area of ​​the die. By including a reference element in this designated area of ​​the die, the effect of stress on the reference element can be determined or estimated. For a reference element located close to a production component (e.g., an electrical component in the signal chain of a circuit to be compensated for the stress effects), the effect of stress on the reference element can approximate how the production component will react under stress. Therefore, compensation for the production component can be determined based on the response of the reference element measured in the presence of applied stress. In some examples, the determined compensation is stored and / or provided to another component. In other examples, the compensation is applied to the signal chain of the circuit to compensate for the effects of stress on the manufacturing components.

[0015] Figure 1 This is a block diagram of example system 100. In some examples, system 100 is suitable for implementation in any device to provide a voltage reference signal (Vref). In other examples, system 100 may be suitable for implementation in an analog-to-digital converter, a digital-to-analog converter, an oscillator, etc. Taking the implementation of system 100 in a device to provide Vref as an example, voltage reference circuit 102 provides Vref to load 104. Load 104 can be any suitable circuit or device, and its range is not limited herein. In some examples, load 104 may be sensitive to changes in the value of Vref. For example, a change in Vref may affect the operation of load 104, causing the change in Vref to make load 104 unsuitable for its intended purpose. Such a change may be caused by temperature, solder displacement, long-term drift (LTD) such as that caused by stress experienced by voltage reference circuit 102, process variations, or any other source of error.

[0016] To mitigate the effects of the variation, the voltage reference circuit 102 may include one or more circuits for performing measurements and / or compensations on the variation. For example, to at least partially mitigate the effects of variations caused by stress experienced by the voltage reference circuit 102, the voltage reference circuit 102 may include one or more of a stress measurement circuit 106, a stress fine-tuning circuit 108, and / or a controller 110. In some examples, the stress measurement circuit 106 measures, estimates, or otherwise provides a signal having a value representing the stress or stress experienced by the voltage reference circuit 102. For example, the stress measurement circuit 106 may include a device under stress and a device not under stress. The device under stress may be under both the inherent stress (e.g., attributable to the manufacturing process) occurring on or on a semiconductor die where the device under stress is disposed, and the applied stress. The device not under stress may also be under the inherent stress occurring on or on a semiconductor die where the device not under stress is disposed, but may not be exposed to the applied stress. Because the inherent stress occurring on the semiconductor die is common between the two devices, the inherent stress may be ignored.

[0017] The applied stress can be artificially formed on the semiconductor die, for example, via metallization, bonding wires, vias, etc. Through these structures, the applied stress can be concentrated on the stressed device. In this way, a first region or stress region is formed below the structure causing the applied stress, the first region containing the stressed device, and a second region or non-stress region is formed containing the non-stressed device. In some examples, the stressed and non-stressed devices can each be implemented as Zener diodes, such as buried Zener diodes. In other examples, the stressed and non-stressed devices are implemented as any other suitable device, such as another form of diode, resistor, transistor (e.g., bipolar junction transistor (BJT) or field-effect transistor (FET)), or any other semiconductor device. In some examples, the Zener diodes of the stressed and non-stressed devices have characteristics within each other's threshold variance. In some examples, the stress measurement circuit 106 further includes measuring circuitry or stress gauges close to each of the stressed and non-stressed devices. For example, a first measuring circuit may be disposed in a first region, close to the device under stress, and a second measuring circuit may be disposed in a second region, close to the device not under stress. In some examples, the first and second measuring circuits are each implemented as resistors having characteristics within each other's threshold variance. The first measuring circuit measures the voltage of the device under stress in response to an input signal, and the second measuring circuit measures the voltage of the device not under stress in response to an input signal.

[0018] By determining the difference between the output signal of the first measurement circuit and the output signal of the second measurement circuit, the effect of stress on the voltage reference circuit 102 can be estimated. For example, the controller 110 may receive the output signals of the first and second measurement circuits and determine the difference between the received output signals. Based on this difference, the controller 110 may determine a fine-tuning or compensation value to compensate for the effect of stress on the voltage reference circuit 102. In some examples, the controller 110 controls the stress fine-tuning circuit 108 to compensate for the effect of stress on the voltage reference circuit 102. For example, based on the determined difference, the controller 110 controls the stress fine-tuning circuit 108 to increase or decrease the value of the signal (e.g., voltage or current) provided in the voltage reference circuit 102. In some examples, the controller 110 directly controls the stress fine-tuning circuit 108 based on the determined difference. In other examples, the controller 110 determines the control value for controlling the stress fine-tuning circuit 108 by performing a lookup in a table or other database based on the determined difference to determine a control value corresponding to the determined difference. In other examples, at least some components of the stress measurement circuit 106 and the stress fine-tuning circuit 108 can be combined such that the output signal of the combined circuit is a compensated value.

[0019] Figure 2 This is a cross-sectional view of an example semiconductor die 200. In some examples, the semiconductor die 200 includes a voltage reference circuit 102, as described above. Therefore, Figure 2 At least some components of the voltage reference circuit 102 are not shown. In one example, the semiconductor die 200 includes a first region 202 in which a first electrical component 204 and a first measurement circuit 206 are disposed. The semiconductor die 200 also includes a second region 208 in which a second electrical component 210 and a second measurement circuit 212 are disposed. In the example, a stress initiating device 214 is disposed above the first region. In various examples, the stress initiating device 214 includes one or more of bonding wires, bonding pads, vias, metallizations (e.g., polyamide layers or embedded copper layers, aluminum, etc.). The stress initiating device 214 provides artificially generated mechanical stress on the components disposed in the first region, thereby placing these components (e.g., the first electrical component 204 and the first measurement circuit 206) under stress. As described above herein, the stress causes changes in the performance of the first electrical component 204 and the first measurement circuit 206 compared to the second electrical component 210 and the second measurement circuit 212, respectively.

[0020] In some examples, the second electrical component 210 has characteristics within the threshold variance of the first electrical component 204. In this way, the first and second electrical components can be considered as replicas of each other. Similarly, the second measurement circuit 212 has characteristics within the threshold variance of the first measurement circuit 206. In this way, the first and second measurement circuits can be considered as replicas of each other. Therefore, the performance of the first electrical component 204 and the second electrical component 210 can be compared or otherwise analyzed, for example, the performance reflected in the output signal, to determine the effect of the stress provided by the stress-inducing device 214 on the first electrical component 204.

[0021] Piezoelectric sensitive components or materials can be used as stress sensors in a circuit (e.g., first component 204 and / or second component 210). In an example, a buried Zener (BZ) diode can be used to determine the effect of stress on the circuit. For example, the voltage (V) provided at the cathode of a BZ diode under stress... BZ V can be estimated using the following equation 1, where V BZ0 σ is the voltage of a stress-insensitive diode (e.g., a BZ diode not under stress, which has characteristics within the threshold variance of a BZ diode under stress and is close to the location of a BZ diode under stress), σ represents the amount of stress applied to the BZ diode, and β is the stress sensitivity of the BZ diode.

[0022] V BZ = V BZ0 (1+β*σ) (1)

[0023] By determining σ in Equation 1 above, the effect of stress on the BZ diode under stress can be determined. The compensation for this determined stress can then be determined according to Equation 2 below, where α is a resistor with resistance R. SG The stress sensitivity of the first resistor, and R SG0 The resistance of the second resistor is approximately equal to R under the condition σ = 0. SG .

[0024] R SG = R SG0 (1+ α*σ) (2)

[0025] In the example, based on Equations 1 and 2 above, the stress-constant bias current Isg can be determined to provide a stress-compensated signal. Isg is shown in Equation 3 below.

[0026] Isg = (V BZ0 * β) / (R SG0 * α) (3)

[0027] Figure 3This is a schematic diagram of an example stress measurement circuit 300. In this example, the stress measurement circuit 300 is adapted to be implemented as... Figure 1 The stress measurement circuit 106. In some examples, the stress measurement circuit 300 further includes fine-tuning or correction components, making the stress measurement circuit 300 suitable for implementation as Figure 1 The stress measurement circuit 300 comprises both an independent stress measurement circuit 106 and a stress fine-tuning circuit 108. In the example, the stress measurement circuit 300 includes a Zener diode 302, a variable resistor 303, a Zener diode 304, a resistor 305, an amplifier 306, a transistor 307, a resistor 308, a transistor 309, a current source 311, and a transistor 312. In the example architecture of the stress measurement circuit 300, a stress initiation device 310 is disposed above the Zener diode 302 and the resistor 305. Thus, the Zener diode 302 can be a device under stress, as described above. Correspondingly, the Zener diode 304 can be a device not under stress, also as described above. The Zener diode 302 has an anode coupled to a ground terminal 313 and a cathode. The Zener diode 304 has an anode coupled to a ground terminal 313 and a cathode. The variable resistor 303 has a first terminal coupled to the anode of the Zener diode 302 and a second terminal. The variable resistor 303 also has a control terminal (not shown) at which a value for controlling the resistance of the variable resistor 303 can be provided. In some examples, this value may be provided by a controller, a digital state machine, a storage device (e.g., a programmable memory), etc., and its range is not limited here. Resistor 305 has a first terminal coupled to the anode of Zener diode 304 and a second terminal. Amplifier 306 has a first input terminal (e.g., a non-inverting input terminal) coupled to the second terminal of variable resistor 303, a second input terminal (e.g., an inverting input terminal) coupled to the second terminal of resistor 305, and an output terminal. Transistor 307 has a first terminal coupled to a terminal (not shown) where a power supply voltage (VDD) is provided, a second terminal coupled to the second input terminal of amplifier 306, and a control terminal coupled to the output terminal of amplifier 306. Transistor 309 has a first terminal coupled to a terminal where VDD is provided, a second terminal, and a control terminal coupled to the output terminal of amplifier 306. Transistor 312 has a first terminal coupled to a terminal providing VDD thereon, a second terminal, and a control terminal coupled to the output terminal of amplifier 306. Resistor 308 is coupled between the second terminal of transistor 309 and ground terminal 313. Current source 311 has a first terminal coupled to a terminal providing VDD thereon, and a second terminal coupled to the first input terminal of amplifier 306.

[0028] In some examples, the second terminal of transistor 312 may be coupled to a circuit or component, such as stress trimming circuitry 108, to provide stress compensation to mitigate the effects of stress-aligned Zener diode 304 (or other components of the device including stress measurement circuitry 300), the effects of which are estimated by means of a determined effect of stress-initiating device 310 on the performance of Zener diode 302. For example, the second terminal of transistor 312 may be coupled to a signal path of a component (not shown) that will provide stress trimming to the component via a variable resistor (not shown). Istress flows through the variable resistor into the signal path of the component for which stress trimming is to be provided. The resistance value of the variable resistor is modified by a controller or other component such that the voltage drop across the variable resistor is approximately equal to the voltage shift of the voltage response of Zener diode 302 compared to the voltage response of Zener diode 304. Because the voltage shift is at least partially caused by stress induced by stress initiating device 310, the resulting voltage and current injected into the signal path of the component for which stress trimming is to be provided via the variable resistor will at least partially mitigate the effects of stress on the performance of the component for which stress trimming is to be provided.

[0029] In an example of the operation of the stress measurement circuit 300, the voltage response of Zener diode 302 differs from the voltage response of Zener diode 304 caused by stress applied to Zener diode 302 by stress initiation device 310. Amplifier 306 provides a current signal (Istress) representing the voltage difference between the voltage response of Zener diode 302 in the presence of applied stress and the voltage response of Zener diode 302 in the absence of applied stress. In some examples, Istress may indicate a compensation value for compensating for stress in voltage reference circuit 102. In another example, Istress may quantify the effect of stress applied to Zener diode 302 by stress initiation device 310 (e.g., representing the amount of stress applied to Zener diode 302 by stress initiation device 310 to which Zener diode 304 is not exposed). For example, Istress, or a signal indicating Istress, may be injected into the signal path of voltage reference circuit 102 to compensate for the effects of stress experienced by voltage reference 102. In some examples, the voltage supplied at the cathode of the Zener diode 302 can be estimated by Equation 1, as shown above, where V BZ It is the voltage of the Zener diode 302, V. BZ0 Δσ represents the voltage across Zener diode 304, Δσ represents the amount of stress applied to Zener diode 302 by stress initiation device 310, β is the stress sensitivity of Zener diode 302, and R1 is the resistance of resistor 308. The stress-current relationship of stress measurement circuit 300 can then be estimated by the following Equation 4, where the variables have the same values ​​described above for estimating the voltage supplied at the cathode of Zener diode 302.

[0030] Istress = (V BZ0 *β*Δσ) / R1 (4)

[0031] In the example, to compensate for the effect of stress on the nanodiode 302, the resistance of the variable resistor 303 can be modified until Istress equals Ibias, where Ibias is the current supplied by the current source 311. For example, the resistance of the variable resistor 303 can be modified such that the following equations (5) and (6) are true, where Rtrim is the resistance of the variable resistor 303 and Rstress is the resistance of the resistor 305.

[0032] V BZ +Ibias*Rtrim= V BZ0 +(Rstress)*Ibias (5)

[0033] V BZ - V BZ0 =Ibias*(Rstress-Rtrim) (6)

[0034] Figure 4 This is a schematic diagram of an example stress measurement circuit 400. In this example, the stress measurement circuit 400 is adapted to be implemented as... Figure 1 The stress measurement circuit 106. In the example, the stress measurement circuit 400 includes Zener diode 402, Zener diode 404, switch 406, switch 408, resistor 410, transistor 412, transistor 414, transistor 416, transistor 418, transistor 420 and resistor 422.

[0035] In the example architecture of the stress measurement circuit 400, Zener diode 402 has an anode coupled to ground terminal 424 and a cathode. Zener diode 404 has an anode coupled to ground terminal 424 and a cathode. Switch 406 has a first terminal coupled to the cathode of Zener diode 402 and a second terminal coupled to ground terminal 424. Switch 408 has a first terminal coupled to the cathode of Zener diode 404 and a second terminal coupled to ground terminal 424. Resistor 410 has a first terminal coupled to the cathode of Zener diode 404 and a second terminal. Transistor 412 has a first terminal, a second terminal coupled to the cathode of Zener diode 402, and a control terminal coupled to the first terminal of transistor 412. Transistor 414 has a first terminal, a second terminal coupled to the second terminal of resistor 410, and a control terminal coupled to the control terminal of transistor 412. Transistor 416 has a first terminal, a second terminal coupled to the first terminal of transistor 412, and a control terminal coupled to the first terminal of transistor 414. Transistor 418 has a first terminal coupled to a first terminal of transistor 416, a second terminal coupled to a first terminal of transistor 414, and a control terminal coupled to a control terminal of transistor 416. Transistor 420 has a first terminal coupled to a first terminal of transistor 416, a second terminal coupled to a first terminal of transistor 416, and a control terminal coupled to a control terminal of transistor 416. Resistor 422 is coupled between the second terminal of transistor 420 and ground terminal 424.

[0036] In the operational example of the stress measurement circuit 400, the voltage response of Zener diode 402 differs from the voltage response of Zener diode 404 caused by the stress applied to Zener diode 402 by stress initiation device 403. Because the voltage response of the Zener diode increases with increasing stress on it, the voltage response (V404) of Zener diode 402 is different. BZ402 In terms of value, it is greater than the voltage response of the Zener diode 404 (V). BZ404 Transistors 412 and 414 form a common gate structure, such that transistors 412, 414, 416, and 418 form a closed-loop amplifier with an output current replicated as Istress by transistor 420. Therefore, Istress can be estimated according to equation (4) above, where V BZ0 Δσ represents the voltage across Zener diode 404, Δσ represents the amount of stress applied to Zener diode 402 by stress initiation device 403, β is the stress sensitivity of Zener diode 402, and R1 is the resistance of resistor 410. Resistor 422 acts as a scaling factor, such that the voltage supplied at the drain of transistor 420 is approximately equal to R422 * (V). BZ -V BZ0 / R410), where R422 is the resistance of resistor 422 and R410 is the resistance of resistor 410. In the example, mismatch between transistors 412, 414, 416, 418 and / or 420 can be calibrated or compensated via the signal “MM elimination”. In some examples, switches 406, 408 can be closed to determine the value of Istress resulting from the mismatch of transistors 412, 414, 416, 418, 420 (without considering Zener diodes 402, 404 (e.g., effectively removing the effect of the Zener diodes from the stress measurement circuit 400 by grounding both the anode and cathode of Zener diodes 402, 404)). This value of Istress can be provided to a controller, digital state machine, or another component for determining and providing “MM elimination” to mitigate the effects of mismatch. Switches 406, 408 can be opened during normal operation of the stress measurement circuit 400, for example, when determining the effect of stress initiation device 403 on the performance of Zener diode 402. Switches 406 and 408 can be controlled by any suitable device, the range of which is not limited herein, such as a controller, a digital state machine, or another component that determines and provides “MM cancellation”.

[0037] Figure 5 This is a schematic diagram of an example stress measurement circuit 500. In this example, the stress measurement circuit 500 is adapted to be implemented as... Figure 1 The stress fine-tuning circuit 108 is described. In the example, the stress measurement circuit 500 includes a current source 502, a switch 504, a switch 506, a resistor 508, and a resistor 510. In the example architecture of the stress measurement circuit 500, the current source 502 has a first terminal coupled to a power supply (not shown) and a second terminal. The switch 504 has a first terminal coupled to the second terminal of the current source 502 and a second terminal. The switch 506 has a first terminal coupled to the second terminal of the current source 502 and a second terminal. Switches 504 and 506 may also each have a corresponding control terminal (not shown) coupled to any suitable component (e.g., an analog and / or digital controller, state machine, etc.) for controlling the open / closed state of switches 504 and 506. Resistor 508 is coupled between the second terminal of switch 504 and ground terminal 512. Resistor 510 is coupled between the second terminal of switch 506 and ground terminal 512.

[0038] In an example of the operation of the stress measurement circuit 500, the voltage response of resistor 508 differs from the voltage response of resistor 510 caused by the stress applied to resistor 508 by the stress initiating device 509. During a first time period, switch 504 is closed and switch 506 is open, allowing a bias current supplied by current source 502 to flow through resistor 508. Subsequently, during a second time period, switch 504 is open and switch 506 is closed, allowing a bias current supplied by current source 502 to flow through resistor 510. Switches 504 and 506 can be controlled by any suitable source (not shown), such as a controller, programmable memory, digital device, etc. In this example, the effect of the stress initiating device 509 on resistor 508 can be quantified by subtracting the voltage drop across resistor 510 from the voltage drop across resistor 508.

[0039] Figure 6 Figure 600 shows the signal waveforms in the example voltage reference circuit 102. Figure 600 includes a signal 602 representing the voltage of a device under stress and a signal 604 representing the voltage of a device not under stress, each as described above. Figure 600 also includes a signal 606 representing the difference between signals 602 and 604. For example, signal 606 may be determined at least in part based on the difference between signals 602 and 604. Signals 602 and 604 are shown with a horizontal axis representing time and a vertical axis representing voltage in volts (V). Signal 606 has a horizontal axis representing time and a vertical axis representing current in microamps (µA).

[0040] As indicated by signal 602 and as described above, in response to a device under stress being subjected to stress, the voltage response of the device under stress differs from, for example, the voltage response of a device not under stress, as indicated by signal 604. As indicated by signal 604, in response to an increase in the variance between signals 602 and 604, the value of signal 606 increases, thereby indicating a greater amount of compensation for the stress causing the variance between signals 602 and 604.

[0041] Figure 7 This is a flowchart of an example method 700 for performing on-chip stress determination and / or compensation. In the example, method 700 is performed by system 100, for example, via voltage reference circuit 102. For example, method 700 may be performed by one or more of stress measurement circuit 106, stress fine-tuning circuit 108, and / or controller 110. By performing the operation of method 700, voltage reference circuit 102 can determine or estimate the effect of stress or the effect of stress on components of voltage reference circuit 102, and determine the value of a signal for compensating for the effect of stress or the effect of stress on components of voltage reference circuit 102.

[0042] At operation 702, method 700 includes disposing a first electrical component in a first region of the substrate.

[0043] At operation 704, method 700 includes disposing a second electrical component in a second region of the substrate adjacent to the first region. The second electrical component has characteristics within the threshold variance of the first electrical component. In this way, the first and second electrical components can be considered as replicas of each other. In some examples, the first and second electrical components are buried Zener diodes. In other examples, the first and second electrical components are any other suitable components with non-zero stress sensitivity, the range of which is not limited herein.

[0044] At operation 706, method 700 includes configuring a measuring circuit to be coupled to at least one of a first electrical component or a second electrical component. In some examples, the measuring circuit is a stress gauge, such as a resistor. In some examples, the method also includes configuring a second measuring circuit proximate to a second electrical component, the second measuring circuit being coupled to the second electrical component. In such examples, the second measuring circuit has characteristics within the threshold variance of the first measuring circuit. In this way, the first measuring circuit and the second measuring circuit can be considered as replicas of each other.

[0045] At operation 708, method 700 includes disposing a stress initiating device on a substrate, above a first region. In some examples, the stress initiating device includes one or more of bonding wires, bonding pads, vias, metallizations of aluminum, polyamide layers, or embedded copper layers. In this way, the first region is a stress-bearing region in which artificial or manufactured mechanical stress is applied to a component disposed in the first region.

[0046] At operation 710, method 700 includes disposing a fine-tuning circuit on a substrate, the fine-tuning circuit being coupled to a measurement circuit. The fine-tuning circuit is any suitable circuit capable of providing current and / or voltage signals based on a determined compensation value. The compensation value can be determined to compensate for or at least partially mitigate the effects of the stress-inducing device on components disposed in the first region.

[0047] At operation 712, method 700 includes determining the effect of stress on the first electrical component. In some examples, the effect of stress on the first electrical component is determined based on a comparison of the output signals of the first and second electrical components. For example, because the first and second electrical components are replicating devices and are positioned close to each other, variations in the values ​​of the output signals of the first and second electrical components can be attributed to the effect of stress on the first electrical component. Therefore, the effect of stress can be determined by comparing the output signals of the first and second electrical components to determine the difference between the output signals of the first and second electrical components.

[0048] At operation 714, method 700 includes determining stress compensation for the first electrical component. In some examples, determining stress compensation includes indexing a lookup table or other database based on the difference determined at operation 712 to determine the stress compensation. In other examples, the difference determined at operation 712 is itself the stress compensation. In still other examples, the current source may be controlled based on the determined difference or other control values ​​determined based on the output signals of the first and / or second electrical components. The current source may provide stress compensation based on control.

[0049] At operation 716, method 700 includes applying stress compensation to a first electrical component. In some examples, applying stress compensation includes providing stress compensation to a fine-tuning circuit of other circuitry adapted to compensate for the effects of stress on the first electrical component and / or a voltage reference circuit. In some examples, the fine-tuning circuitry includes a resistor through which a current determined for stress compensation flows.

[0050] In this description, the term "coupling" may encompass a connection, communication, or signaling path that enables the functional relationship to be consistent with this description. For example, if device A generates a signal to control device B to perform an action, then: (a) in the first example, device A is coupled to device B via a direct connection; or (b) in the second example, device A is coupled to device B via an intermediate component C, provided that the intermediate component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.

[0051] A device “configured to” perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function during manufacturing by the manufacturer, and / or may be configured (or reconfigurable) by the user after manufacturing to perform the function and / or other additional or alternative functions. The configuration may be performed through firmware and / or software programming of the device, through the construction and / or layout of hardware components and the interconnection of the device, or a combination thereof.

[0052] The circuits or devices described herein as containing certain components may actually be coupled to those components to form the described circuit system or device. For example, a structure described as containing one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage and / or current sources) may actually contain only semiconductor elements within a single physical device (e.g., semiconductor dies and / or integrated circuit (IC) packages), and may be coupled to at least some passive elements and / or sources during or after manufacturing, for example, by an end user and / or a third party, to form the described structure.

[0053] While some components may be described herein as belonging to a specific process technology, these components can be substituted with components from other process technologies. The circuits described herein can be reconfigured to include replacement components to provide functionality at least partially similar to that available before the component replacement. Unless otherwise stated, components shown as resistors generally represent any one or more elements coupled in series and / or parallel to provide the impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component may alternatively be multiple resistors or capacitors coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may actually be multiple resistors or capacitors coupled in series between the same two nodes as the single resistor or capacitor.

[0054] The use of the phrase "ground voltage potential" in the foregoing description includes chassis grounding, wire grounding, floating grounding, virtual grounding, digital grounding, universal grounding, and / or any other form of grounding connection applicable to or suited to the teachings of this specification. In this specification, unless otherwise stated, "about," "approximately," or "substantially" preceding a parameter indicates a range of + / - 10% of said parameter. Modifications to the described examples are possible within the scope of the claims, and other examples are also possible.

[0055] As used herein, the terms “terminal,” “node,” “interconnect,” “pin,” and “lead” are used interchangeably. Unless specifically stated otherwise, these terms are generally used to refer to interconnections or the ends of device elements, circuit elements, integrated circuits, devices, or semiconductor components. Additionally, a voltage rail, or more simply a “rail,” may also be referred to as a voltage terminal and may generally refer to a common node or set of coupled nodes at the same potential in a circuit.

Claims

1. A circuit comprising: A first electrical component is disposed in a first region of the substrate; A first measuring circuit is disposed in the first region, close to the first electrical component; A second electrical component is disposed in a second region of the substrate, the second region of the substrate being adjacent to the first region of the substrate; A second measuring circuit is disposed in the second region, close to the second electrical component; as well as A stress initiation device is disposed on the substrate, above the second region.

2. The circuit of claim 1, wherein the stress initiation device comprises bonding pads and a plurality of through holes.

3. The circuit of claim 2, wherein the stress initiation device comprises a bonding wire coupled to the bonding pad.

4. The circuit according to claim 1, wherein the stress initiating device is not located above the first region.

5. The circuit of claim 1, wherein the second electrical component has characteristics within the threshold variance of the first electrical component, and wherein the second measurement circuit has characteristics within the threshold variance of the first measurement circuit.

6. The circuit according to claim 1, further comprising: A third electrical component is disposed in a third region of the substrate; A third measuring circuit is disposed in the third region, close to the third electrical component; A fourth electrical component is disposed in a fourth region of the substrate, the fourth region of the substrate being adjacent to the third region of the substrate; A fourth measuring circuit is disposed in the fourth region, close to the first electrical component; as well as A second stress initiating device is disposed on the substrate, above the fourth region, wherein the first and second regions of the substrate are in a first stress region, and the third and fourth regions of the substrate are in a second stress region separate from the first stress region.

7. The circuit of claim 6, wherein the first electrical component and the second electrical component are each semiconductor devices.

8. A circuit comprising: A first electrical component is disposed in a first region of a substrate, wherein the first region is subjected to mechanical stress applied to the first region; A second electrical component is disposed in a second region of the substrate, the second region of the substrate being close to but outside the first region of the substrate; as well as A measurement circuit, which is coupled to the first electrical component and the second electrical component.

9. The circuit of claim 8, wherein the first electrical component and the second electrical component are each semiconductor devices.

10. The circuit of claim 8, further comprising a variable resistor having a first terminal and a second terminal, a resistor having a first terminal and a second terminal, a current source having a first terminal and a second terminal, and an amplifier having a first input terminal and a second input terminal and having a first output terminal and a second output terminal, wherein the measurement circuit comprises a differential amplifier, the first electrical component having a first terminal coupled to a ground terminal of the circuit and a second terminal coupled to the first terminal of the variable resistor, the second terminal of the variable resistor being coupled to a first input terminal of the differential amplifier, the first terminal of the current source being coupled to a voltage supply terminal, and the second terminal of the current source being coupled to the first input terminal of the differential amplifier, the second electrical component having a first terminal coupled to the ground terminal of the circuit and a second terminal coupled to the first terminal of the resistor, the second terminal of the resistor being coupled to a second input terminal of the differential amplifier, the first input terminal of the amplifier being coupled to the output terminal of the differential amplifier, the second input terminal of the amplifier being coupled to the voltage supply terminal, and the first output terminal of the amplifier being coupled to the second input terminal of the differential amplifier.

11. The circuit of claim 10, wherein the value of the output signal provided at the second output terminal of the amplifier quantifies the effect of the stress on the first electrical component.

12. The circuit of claim 8, wherein the measurement circuit comprises: A first switch having a first terminal and a second terminal, the first terminal of the first switch being coupled to a first terminal of a first electrical component, and the second terminal of the first switch being coupled to a second terminal of the first electrical component, wherein the second terminal of the first electrical component is coupled to a ground terminal. A second switch having a first terminal and a second terminal, the first terminal of the second switch being coupled to a first terminal of the second electrical component, and the second terminal of the second switch being coupled to a second terminal of the second electrical component, wherein the second terminal of the second electrical component is coupled to the ground terminal; A resistor having a first terminal and a second terminal, wherein the second terminal of the resistor is coupled to the first terminal of the second electrical component; A first transistor has a control terminal and a first terminal and a second terminal, wherein the first terminal of the first transistor is coupled to the control terminal of the first transistor, and the second terminal of the first transistor is coupled to the first terminal of the first electrical component. A second transistor has a control terminal and a first terminal and a second terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor, and the second terminal of the second transistor is coupled to the first terminal of the resistor; A third transistor has a control terminal and a first terminal and a second terminal, wherein the control terminal of the third transistor is coupled to the first terminal of the second transistor, and the first terminal of the third transistor is coupled to the control terminal of the first transistor. A fourth transistor has a control terminal and a first terminal and a second terminal, the control terminal of the fourth transistor being coupled to the control terminal of the third transistor, the first terminal of the fourth transistor being coupled to the first terminal of the second transistor, and the second terminal of the fourth transistor being coupled to the second terminal of the third transistor. as well as A fifth transistor has a control terminal and a first terminal and a second terminal, the control terminal of the fifth transistor being coupled to the control terminal of the fourth transistor, and the second terminal of the fifth transistor being coupled to the second terminal of the fourth transistor.

13. The circuit of claim 12, wherein the value of the signal provided at the first terminal of the fifth transistor quantifies the effect of the stress on the first electrical component.

14. The circuit of claim 8, further comprising a fine-tuning circuit coupled to the measurement circuit, the first electrical component, and the second electrical component.

15. The circuit of claim 14, further comprising: A current source having a first terminal and a second terminal; A first switch having a first terminal and a second terminal, wherein the second terminal of the first switch is coupled to the second terminal of the current source; as well as A second switch has a first terminal and a second terminal, wherein the first terminal of the second switch is coupled to the second terminal of the current source. The first electrical component is a first resistor having a first terminal and a second terminal. The first terminal of the first resistor is coupled to the first terminal of the first switch, and the second terminal of the first resistor is coupled to a ground terminal. The second electrical component is a second resistor having a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the second terminal of the second switch, and the second terminal of the second resistor is coupled to the ground terminal.

16. A method comprising: The first electrical component is disposed in the first region of the substrate; The second electrical component is disposed in a second region of the substrate, adjacent to the first region; The measurement circuit is configured to be coupled to at least one of the first electrical component or the second electrical component; as well as The stress initiation device is disposed on the substrate, above the first region.

17. The method of claim 16, wherein the measuring circuit is a first measuring circuit, the first measuring circuit being positioned close to and coupled to the first electrical component, the method further comprising: The second measurement circuit is positioned close to the second electrical component, and the second measurement circuit is coupled to the second electrical component.

18. The method of claim 16, further comprising: A fine-tuning circuit is disposed on the substrate and coupled to the measurement circuit; The effect of stress on the first electrical component is determined by comparing the output signals of the first electrical component and the second electrical component. Determine the stress compensation for the first electrical component; as well as The stress compensation is applied to the first electrical component via the fine-tuning circuit.

19. The method of claim 16, wherein the first electrical component and the second electrical component are each semiconductor devices.

20. The method of claim 16, wherein the stress initiation device comprises one or more of bonding wires, bonding pads, vias, or metallizations.

Images