TSN test bed and test method for railway safety computer
By designing a TSN testbed for railway safety computers, the problem that traditional testing methods cannot meet the requirements of railway safety computers was solved. It enables effective testing of DO output, DI acquisition, dual-system redundancy structure master-slave switching and bus extended communication, thus ensuring the safety and reliability of railway safety computers.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SIGNAL & COMM RES INST OF CHINA ACAD OF RAILWAY SCI
- Filing Date
- 2025-12-23
- Publication Date
- 2026-04-21
AI Technical Summary
Traditional testing methods cannot accurately reflect the key performance and application characteristics of TSN devices in the field of railway safety computers. Existing testing equipment is expensive and poorly adaptable, and cannot meet the testing needs of railway safety computers.
Design a TSN testbed for railway safety computers, including an industrial control computer, a TSN tester, a switch quantity simulation unit, a time measurement unit, and a communication simulation unit. These units are connected to the boards of the safety computer under test to achieve data interaction. Test results are configured and analyzed using test cases, and functions such as DO output, DI acquisition, dual-redundancy structure master-slave switching, and bus extended communication are simulated and evaluated.
This enables better use of new standards and applications while reducing costs, ensuring the security and reliability of railway safety computers, ensuring safe train operation, and evaluating various functions and performance.
Smart Images

Figure CN121894022A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of rail transit technology, and in particular to a TSN testbed and testing method for railway safety computers. Background Technology
[0002] Currently, China's rail transit sector has achieved phased research results in TSN (Time-Sensitive Networking) technology. In the CR450 technology innovation project, TSN, as a new train network communication technology, was applied for the first time to the network control system of high-speed trains, and its performance was tested in a real-world environment on the Fuzhou-Xiamen line. The new generation of railway general-purpose safety computers also adopts a TSN-based solution.
[0003] Testing is a crucial means of ensuring the security and reliability of railway safety computers. Regarding the testing and verification of Time-Sensitive Ethernet (TSN) in the field of railway safety computers, traditional testing methods cannot accurately reflect the key performance characteristics of TSN devices and their application features in the railway sector. Effective testing technologies and verification methods are lacking both domestically and internationally. Currently, TSN testing equipment released by domestic and international companies (such as IXIA and Spirent) is expensive, mostly focuses on protocol conformance testing, and has poor adaptability to new standards and applications, failing to meet the testing needs of the railway safety computer field. Therefore, there is an urgent need for a TSN testbed implementation solution specifically for railway safety computers.
[0004] In view of this, the present invention is hereby proposed. Summary of the Invention
[0005] The purpose of this invention is to provide a TSN testbed and testing method for railway safety computers to meet the testing needs in the field of railway safety computers.
[0006] The objective of this invention is achieved through the following technical solution: A TSN testbed for railway safety computers, characterized in that it comprises: an industrial control computer 10, a TSN tester 20, a switch quantity simulation unit, a time measurement unit, and a communication simulation unit; wherein: The industrial control computer 10 is connected to the TSN tester 20 and the MBI board in the safety computer under test, respectively, to achieve bidirectional data interaction; the TSN tester 20 is connected to the SWITCH board and VCU board in the safety computer under test, respectively, to achieve bidirectional data interaction; the switch quantity simulation unit and the time measurement unit are both connected to the RLU board in the safety computer under test, and the time measurement unit is connected to the VCU board in the safety computer under test; the switch quantity simulation unit and the time measurement unit are both connected to the communication simulation unit, respectively, to achieve bidirectional data interaction; the communication simulation unit is connected to the MBI board in the safety computer under test, to achieve bidirectional data interaction. The security computer under test includes: VCU board, SWITCH board, DI board, DO board, MBI board and RLU board. The RLU board is connected to the DO board and DI board respectively. The VCU board, DI board, DO board and MBI board are all connected to the SWITCH board respectively. Data interaction is achieved through TSN Ethernet.
[0007] A TSN testing method for railway safety computers, implemented based on the aforementioned TSN testbed, includes: According to the test task, the host computer test software that executes the test script runs in the industrial control computer 10 and sends the test cases to the TSN tester 20. The parameters in the test cases are used to configure the TSN tester 20, the various boards, switch quantity simulation units, time measurement units and communication simulation units in the safety computer under test. The relevant data in the test cases are also used to guide the various boards, switch quantity simulation units, time measurement units and communication simulation units in the safety computer under test to work together to complete the test task. The TSN tester 20 encapsulates the test cases into TSN traffic, and stores the TSN traffic into different buffer queue groups according to the parameters in the test cases. The TSN traffic of different buffer queue groups is sent to the VCU board or SWITCH board via TSN Ethernet according to the time schedule. After receiving the relevant data, the VCU board or SWITCH board in the security computer under test completes the parameter configuration of the security computer under test. According to the content of the test task, with the assistance of one or more units among the switch quantity simulation unit, time measurement unit and communication simulation unit, the relevant tests are carried out. The test results are fed back to the industrial control computer 10 via the TSN tester 20. The host computer test software in the industrial control computer 10 analyzes whether the test results meet the expectations and outputs the test results.
[0008] As can be seen from the technical solution provided by the present invention, the proposed TSN testbed can perform various tests on the safety computer. On the one hand, it reduces costs while better utilizing new standards and applications; on the other hand, through various tests, it can ensure the safety and reliability of the railway safety computer, thereby ensuring train operation safety. This TSN testbed can effectively evaluate the functions and performance of the safety computer, such as DO output, DI acquisition, dual-redundancy structure master-slave switching, and bus extended communication. Attached Figure Description
[0009] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0010] Figure 1 This is a schematic diagram of the overall structure of a TSN testbed for railway safety computers provided in an embodiment of the present invention.
[0011] Figure 2 This is a schematic diagram of a secure computer DO output test provided in an embodiment of the present invention.
[0012] Figure 3 This is a schematic diagram of a secure computing DI acquisition test provided in an embodiment of the present invention.
[0013] Figure 4 This is a schematic diagram illustrating the primary / backup switching test of a dual-redundant structure for a secure computer provided in an embodiment of the present invention.
[0014] Figure 5 This is a schematic diagram illustrating a secure computer bus extended communication test provided in an embodiment of the present invention. Detailed Implementation
[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.
[0016] First, the following explanations are provided for the terms that may be used in this article: The terms "comprising," "including," "containing," "having," or other similar semantic descriptions should be interpreted as non-exclusive inclusion. For example, including a technical feature element (such as raw material, component, ingredient, carrier, dosage form, material, size, part, component, mechanism, device, step, process, method, reaction conditions, processing conditions, parameter, algorithm, signal, data, product or article of manufacture, etc.) should be interpreted as including not only the expressly listed technical feature element, but also other technical feature elements that are not expressly listed and are well-known in the art.
[0017] The term "composed of" excludes any technical features not expressly listed. When used in a claim, it closes the claim to exclude all technical features other than those expressly listed, except for associated conventional impurities. If the term appears only in a clause of a claim, it limits the claim to the elements expressly listed in that clause; elements recited in other clauses are not excluded from the overall claim.
[0018] Unless otherwise explicitly specified or limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this document according to the specific circumstances.
[0019] The following is a detailed description of a TSN testbed and testing method for railway safety computers provided by this invention. Contents not described in detail in the embodiments of this invention are prior art known to those skilled in the art. Where specific conditions are not specified in the embodiments of this invention, they shall be performed according to conventional conditions in the art or conditions recommended by the manufacturer. Where the manufacturers of reagents or instruments used in the embodiments of this invention are not specified, they are all conventional products that can be purchased commercially.
[0020] Example 1 This invention provides a TSN testbed for railway safety computers, used to test the safety computer under test. The safety computer under test includes: a VCU board, a SWITCH board, a DI board, a DO board, an MBI board, and an RLU board. The RLU board is connected to the DO board and the DI board, respectively. The VCU board, DI board, DO board, and MBI board are all connected to the SWITCH board, and data interaction is achieved through TSN Ethernet. Figure 1 As shown, the TSN testbed mainly includes: an industrial control computer 10, a TSN tester 20, a switch quantity simulation unit, a time measurement unit, and a communication simulation unit; wherein: The industrial control computer 10 is connected to the TSN tester 20 and the MBI board in the safety computer under test, respectively, to realize bidirectional data interaction; the TSN tester 20 is connected to the SWITCH board and VCU board in the safety computer under test, respectively, to realize bidirectional data interaction. The switch quantity simulation unit and the time measurement unit are both connected to the RLU board in the security computer under test, and the time measurement unit is connected to the VCU board in the security computer under test; the switch quantity simulation unit and the time measurement unit are both connected to the communication simulation unit to realize bidirectional data interaction; the communication simulation unit is connected to the MBI board in the security computer under test to realize bidirectional data interaction.
[0021] In this embodiment of the invention, the security computer under test includes: a security computer system 1 and a security computer system 2, the two systems having identical structures; and the switch quantity simulation unit includes: a first switch quantity simulation unit 90 and a second switch quantity simulation unit 91, the time measurement unit includes: a first time measurement unit 92 and a second time measurement unit 93, and the communication simulation unit includes: a first communication simulation unit 94 and a second communication simulation unit 95; wherein: The first switch quantity simulation unit 90 and the first time measurement unit 92 are both connected to the first RLU board 80 in the security computer 1 system. The first switch quantity simulation unit 90 and the first time measurement unit 92 are both connected to the first communication simulation unit 94. The first communication simulation unit 94 is connected to the first MBI board 70 in the security computer 1 system. The second switch quantity simulation unit 91 and the second time measurement unit 93 are both connected to the second RLU board 81 in the safety computer 2 system. The second switch quantity simulation unit 91 and the second time measurement unit 93 are both connected to the second communication simulation unit 95. The second communication simulation unit 95 is connected to the second MBI board 71 in the safety computer 2 system.
[0022] In this embodiment of the invention, the industrial control computer 10 serves as the human-machine interface window for the TSN testbed. It runs the host computer test software that executes test scripts, issues test cases, and features automated testing, graphical operation, and configurable test scripts. Parameters in the test cases configure the gating functions of each board in the TSN tester 20 and the security computer under test, the correspondence between the switch quantity simulation unit and the RLU board relay channel, the timestamp triggering method of the time measurement unit, and the port address of the communication simulation unit. The TSN tester 20 encapsulates the security computer's service simulation traffic into TSN traffic based on the test case parameters and forwards it to the SWITCH board or VCU board in the security computer under test for pre-testing purposes. The system configures parameters and provides guidance to complete relevant test tasks; the switch quantity simulation unit is used to simulate the excitation signal injected into the RLU board and to collect the drive signal output by the RLU board and transmit it to the communication simulation unit; the time measurement unit is used to record the timestamps of the drive signals output by the RLU board and VCU board, calculate the execution time of the DO output of the safety computer under test, and transmit it to the communication simulation unit; the communication simulation unit is used to simulate the data interaction between the peripheral messages of the safety platform and the MBI board in the safety computer under test through the multi-function bus; it is also used to transmit the information transmitted by the switch quantity simulation unit and the time measurement unit to the industrial control computer 10 through the MBI board, SWITCH board and TSN tester 20 of the safety computer under test.
[0023] In this embodiment of the invention, the industrial control computer 10, the TSN tester 20, and the MBI board in the safety computer under test achieve bidirectional data interaction via standard Ethernet; the TSN tester 20, the SWITCH board, and the VCU board in the safety computer under test achieve bidirectional data interaction via TSN Ethernet; the switch quantity simulation unit, the time measurement unit, and the communication simulation unit achieve bidirectional data interaction via standard Ethernet; and the communication simulation unit and the MBI board in the safety computer under test achieve bidirectional data interaction via a multi-function bus.
[0024] This invention delves into key testing technologies for Time-Sensitive Ethernet (TSN) in the field of railway safety computers, including TSN networking test schemes, board-level functional testing technologies, TSN bus testing technologies, and two-out-of-two safety redundancy device testing technologies. It develops a TSN testbed for railway safety computers, providing testing and verification methods for communication optimization and design of railway signaling systems. Figure 1 As shown, the implementation method mainly includes: an industrial control computer 10, a TSN tester 20, a first switch quantity simulation unit 90, a second switch quantity simulation unit 91, a first time measurement unit 92, a second time measurement unit 93, a first communication simulation unit 93, and a second communication simulation unit 94.
[0025] The specific structure of the security computer under test is described below. The security computer under test mainly includes two systems: Security Computer 1 and Security Computer 2. Security Computer 1 and Security Computer 2 interact via a dual-channel TSN Ethernet network. Security Computer 1 includes a first VCU board 30, a first SWITCH board 40, a first DI board 50, a first DO board 60, a first MBI board 70, and a first RLU board 80. Security Computer 2 includes a second VCU board 31, a second SWITCH board 41, a second DI board 51, a second DO board 61, a second MBI board 71, and a second RLU board 81.
[0026] Taking the security computer series 1 as an example, the first VCU board 30 includes CPU_X301, CPU_Y302, first FPGA_X303, and first FPGA_Y304 modules. CPU_X301 and first FPGA_X303 constitute the X processing branch, and CPU_Y302 and first FPGA_Y304 constitute the Y processing branch. The two processing branches in the first VCU board 30 achieve data interaction and two-out-of-two voting through the first FPGA_X303 and first FPGA_Y304 modules. The first SWITCH board 40 includes SWITCH_X401 and SWITCH_Y402 modules, which correspond to the X processing branch and Y processing branch in the two-out-of-two structure, respectively. The first DI board 50 includes a first HOST-FPGA_X501, a first HOST-FPGA_Y502, a second FPGA_X503, and a second FPGA_Y504 module. The first HOST-FPGA_X501 and the second FPGA_X503 constitute the X input acquisition branch, and the first HOST-FPGA_Y502 and the second FPGA_Y504 constitute the Y input acquisition branch. The two input acquisition branches in the first DI board realize data interaction and two-out-of-two voting through the second FPGA_X503 and the second FPGA_Y504 module. The first DO board 60 includes a second HOST-FPGA_X601, a second HOST-FPGA_Y602, a third FPGA_X603, and a third FPGA_Y604 module. The second HOST-FPGA_X601 and the third FPGA_X603 form an X output drive branch, and the second HOST-FPGA_Y602 and the third FPGA_Y604 form a Y drive branch. The two output drive branches in the first DO board achieve data interaction and two-out-of-two voting through the third FPGA_X603 and the third FPGA_Y604 module. The first MBI board 70 includes a HOST-CPU 701, a fourth FPGA_X702, and a fourth FPGA_Y703 module. The HOST-CPU 701 is simultaneously connected to the fourth FPGA_X702 and the fourth FPGA_Y703 to form two branches. The two branches in the first MBI board 70 achieve data interaction and two-out-of-two voting through the fourth FPGA_X702 and the fourth FPGA_Y703 module.
[0027] Those skilled in the art will understand that the first, second, third, and fourth terms primarily serve to distinguish between them.
[0028] Example 2
[0029] This invention provides a TSN testing method for railway safety computers. This method is mainly based on the TSN testbed provided in the aforementioned embodiments and includes: According to the test task, the host computer test software that executes the test script runs in the industrial control computer 10 and sends test cases to the TSN tester 20. On the one hand, the parameters in the test cases are used to configure the TSN tester 20, the various boards, switch quantity simulation units, time measurement units and communication simulation units in the safety computer under test. For example, it configures the gating function of the TSN tester 20 (the TSN tester 20 stores TSN traffic into the XY buffer queue group according to the gating list), the correspondence between the switch quantity simulation units and the relay channels of the RLU board, the timestamp triggering mode of the time measurement unit, the port address of the communication simulation unit, and the working tasks of each board. On the other hand, the relevant data contained in the test cases are also used to guide each board, switch quantity simulation unit, time measurement unit and communication simulation unit to work together to complete the test task.
[0030] The TSN tester 20 encapsulates the test cases into TSN traffic and stores the TSN traffic into different buffer queue groups according to the parameters in the test cases. The TSN traffic of different buffer queue groups is sent to the VCU board or SWITCH board via TSN Ethernet in sequence according to the time schedule.
[0031] After receiving the relevant data, the VCU board or SWITCH board in the security computer under test completes the parameter configuration of the security computer under test. According to the content of the test task, with the assistance of one or more units among the switch quantity simulation unit, time measurement unit and communication simulation unit, the relevant tests are carried out, and the test results are fed back to the industrial control computer 10. The host computer test software in the industrial control computer 10 analyzes whether the test results meet the expectations and outputs the test results.
[0032] See also Figure 1Taking the test security computer 1 series as an example, the host computer test software in the industrial control computer 10 executes the test case script file and sends out the test cases. The TSN tester 20 is responsible for encapsulating test cases into TSN traffic and forwarding it to the security computer. The encapsulated TSN traffic is stored in the X and Y buffer queue groups according to the gating list. The gating list here is the parameter in the test case, which is used to control the gating function of the TSN tester 20. Each of the X and Y buffer queue groups has 256 buffer queues. During the test, each buffer queue is opened or closed at regular intervals according to the gating list, and the TSN traffic in the buffer queue is sent to one or more TSN network ports at the same time, and transmitted to the first VCU board 30 or the first SWITCH board 40, and injected into the security computer 1 system. After receiving the relevant data, the VCU board or SWITCH board in the security computer 1 system performs relevant tests with the assistance of one or more units of the switch quantity simulation unit, time measurement unit and communication simulation unit, according to the content of the test task. The test results are fed back to the industrial control computer 10 by the TSN tester 20. The host computer test software in the industrial control computer 10 analyzes whether the test results meet the expectations and outputs the test results.
[0033] In this embodiment of the invention, the main test tasks include: DO output test of the security computer under test (PCD), DI acquisition test of the PCD, master / slave switching test of the dual-redundancy structure of the PCD, and bus expansion communication test of the PCD. Each test task will be described in detail below.
[0034] 1. Test the DO output of the security computer under test.
[0035] (1) Run the host computer test software on the industrial control computer 10 and send the DO output test cases to the TSN tester 20. After receiving the test case parameters, the TSN tester 20 encapsulates them into TSN traffic and stores them into different buffer queue groups according to the gating list. The TSN traffic of different buffer queue groups sends the data in the buffer queue to the VCU board or SWITCH board through TSN Ethernet in sequence according to the time schedule, thus completing the parameter configuration of the security computer under test and the time measurement unit. The relevant boards of the security computer under test and the time measurement unit execute the subsequent test process according to the configured parameters.
[0036] (2) After receiving the data, the VCU board parses the DO output instruction from it and sends a trigger signal to the time measurement unit through the IO signal. The time measurement unit collects the signal in real time and records the first timestamp. In addition, the VCU board forwards the DO output instruction to the SWITCH board through the TSN Ethernet, and the SWITCH board forwards it to the DO board. After receiving the instruction, the DO board completes the data interaction and two-out-of-two voting through the two internal branches, and then drives the RLU board to output the relay signal. The time measurement unit collects the relay signal and records the second timestamp. Based on the recorded first timestamp and second timestamp, the DO output execution time is calculated.
[0037] (3) The switch quantity simulation unit acquires the drive signal output by the RLU board through the IO signal and transmits it to the communication simulation unit. The time measurement unit obtains the execution time of the DO output and transmits it to the communication simulation unit. The communication simulation unit transmits the received information as feedback data to the MBI board through the multi-function bus, and then feeds it back to the industrial control computer 10 through the SWITCH board and TSN tester 20.
[0038] (4) The host test computer software in the industrial control computer 10 analyzes the feedback data, judges whether the DO output function meets the expectations, and finally outputs the test results.
[0039] like Figure 2 As shown, an example of testing the DO output of a security computer series 1 is provided.
[0040] The industrial control computer 10 runs the host computer test software and sends the DO output test cases to the TSN tester 20. After receiving the test case parameters, the TSN tester 20 encapsulates them into TSN traffic and stores them into two groups, X buffer queue group and Y buffer queue group, each containing 256 buffer queues, according to the gating list. Then, according to the time schedule, the TSN traffic is injected into the first VCU board 30 or the first SWITCH board 40 of the security computer 1 series through 4-channel TSN Ethernet to complete the parameter configuration of the security computer under test and the time measurement unit. The relevant boards of the security computer under test and the time measurement unit execute the subsequent test process according to the configured parameters.
[0041] Furthermore, after receiving the data, the first VCU board 30 parses the DO output instruction from it. On one hand, it sends a trigger signal generated by CPU_X301 to the first time measurement unit 92 via IO signal. The first time measurement unit 92 acquires this signal in real time and records the first timestamp. On the other hand, the first VCU board 30 forwards the DO output instruction to the first SWITCH board 40 via TSN Ethernet. After the first SWITCH board 40 processes the instruction through the internal X branch SWITCH_X401 and Y branch SWITCH_Y402, it forwards the instruction to the first DO board 60. The HOST-FPGA_X601 and FPGA_X603 inside the first DO board 60 constitute the X output drive branch, and the HOST-FPGA_Y602 and FPGA_Y604 constitute the Y output drive branch. After receiving the instruction, the two branches complete data interaction and two-out-of-two voting, and then drive the first RLU board 80 to output a relay signal. The first time measurement unit 92 acquires the relay signal and records the second timestamp. At the same time, it calculates the DO output execution time of the security computer 1 system based on the two recorded timestamps.
[0042] The first digital input simulation unit 90 acquires the drive signal output by the first RLU board 80 through the IO signal, and transmits it together with the DO output execution time obtained by the first time measurement unit 92 to the first communication simulation unit 93. The first communication simulation unit 93 transmits the above test data to the first MBI board 70 through a multi-functional bus such as MVB, RS422 or TSN Ethernet, and then feeds it back to the industrial control computer 10 through the first SWITCH board 40 and the TSN tester 20. The upper test computer software analyzes the feedback data, determines whether the DO output function meets the expectations, and finally outputs the test results.
[0043] 2. DI data acquisition test of the security computer under test.
[0044] (1) Run the host computer test software on the industrial control computer 10 and send the test cases of DI acquisition test to the TSN tester 20.
[0045] (2) After receiving the test case, the TSN tester 20 encapsulates it into TSN traffic and stores it into different buffer queue groups. The TSN traffic of different buffer queue groups sends the data in the buffer queue to the VCU board or SWITCH board through TSN Ethernet in sequence according to the time schedule, thus completing the parameter configuration of the security computer under test and the switch quantity simulation unit. The relevant boards of the security computer under test and the switch quantity simulation unit execute the subsequent test process according to the configured parameters. After the configuration is completed, the switch quantity simulation unit injects the DI excitation signal of the simulated external device into the relay channel of the RLU board through the IO signal. After receiving the excitation signal, the RLU board transmits it to the DI board.
[0046] (3) The two branches inside the DI board collect, interact and vote on the DI excitation signal transmitted by the RLU board. The voted data is transmitted to the VCU board via the TSN Ethernet through the SWITCH board. The VCU board processes the collected data and then transmits it to the communication simulation unit through the SWITCH board and MBI board. The communication simulation unit converts the DI collected data into a format that conforms to the interaction protocol and then feeds it back to the industrial control computer 10 through the MBI board, SWITCH board and TSN tester 20 in sequence. The upper test computer software in the industrial control computer 10 analyzes the feedback data, judges whether the DI acquisition function meets the expectations and outputs the test results.
[0047] like Figure 3 As shown, an example of testing the DI acquisition function of a secure computer series 1 is provided.
[0048] The industrial control computer 10 sends DI acquisition test cases through the host test computer software. After being encapsulated into test traffic conforming to the TSN protocol by the TSN tester 20, it is injected into the security computer 1 system to complete the parameter configuration between the security computer 1 system and the first switch quantity simulation unit 90. Afterwards, the first switch quantity simulation unit 90 injects the DI excitation signal of the simulated external device into the relay channel of the first RLU board 80 through the IO signal. After receiving the excitation signal, the first RLU board 80 transmits it to the first DI board 50.
[0049] The HOST-FPGA_X501 and FPGA_X503 inside the first DI board 50 form the X input acquisition branch, and the HOST-FPGA_Y502 and FPGA_Y504 form the Y input acquisition branch. The two branches acquire the DI excitation signal transmitted by the first RLU board 80 respectively. Subsequently, the first DI board 50 realizes the interaction and two-out-of-two voting of the acquired data from the two branches through the FPGA_X503 and FPGA_Y504 modules to ensure the security and accuracy of the acquired data.
[0050] After voting, the DI acquisition data is transmitted from the first SWITCH board 40 to the first VCU board 30 via TSN Ethernet. The first VCU board 30 processes the acquisition data and then transmits it to the first communication simulation unit 93 via the first SWITCH board 40 and the first MBI board 70. The first communication simulation unit 93 converts the DI acquisition data into a format that conforms to the interaction protocol and then feeds it back to the industrial control computer 10 via the MBI board, SWITCH board and TSN tester 20 in sequence. The host test computer software parses the feedback data, determines whether the DI acquisition function meets expectations and outputs the test results.
[0051] 3. Test of master-slave switching in dual-redundancy structure of the security computer under test.
[0052] In this embodiment of the invention, the master-slave switchover is mainly a process of switching from one system to another. The following description uses the example of switching from security computer system 1 to test security computer system 2 as the primary system. Figure 4 As shown.
[0053] (1) In the initial state, the security computer 1 is the master system. The first VCU board 30 inside it sends a DO output command to the first SWITCH board 40 through the TSN Ethernet. The first DO board 60 drives the first RLU board 80 to output a relay signal. At this time, the security computer 2 is the backup system. The second DO board 61 and the first DO board 60 are in an interlocked state and do not output a relay signal. The master and backup system data are synchronized only through the TSN link between the first SWITCH board 40 in the security computer 1 system and the second SWITCH board 41 in the security computer 2 system.
[0054] (2) Run the host computer test software on the industrial control computer 10 and send the test cases of the master-slave switchover test to the TSN tester 20. After receiving the test case parameters, the TSN tester 20 encapsulates the security computer service simulation traffic into TSN traffic and stores it into different buffer queue groups according to the gating list. The TSN traffic of different buffer queue groups is sent to the VCU board or SWITCH board simultaneously via TSN Ethernet according to the time schedule, thus completing the parameter configuration of the security computer under test and the time measurement unit. The relevant boards of the security computer under test and the time measurement unit execute the subsequent test process according to the configured parameters. After the configuration is completed, it indicates that the test triggers the master-slave switchover condition. The first time measurement unit 92 collects the timestamp of the first VCU board 30 in the security computer 1 system receiving the system switchover command, and records it as T1. The first VCU board 30 sends a master system fault signal to the first SWITCH board 40, which drives the master system switchover relay of the first RLU board 80 to release and release the interlock state. At the same time, the first SWITCH board 40 synchronizes the fault status to the second SWITCH board 41 through the TSN link.
[0055] (3) The backup main logic is triggered by the security computer 2 system: the second VCU board 31 in the security computer 2 system takes over the control authority and sends a system switching command to the second SWITCH board 41. The second time measurement unit 93 collects the time stamp of the backup system switching relay activated by the second VCU board 31 to the second SWITCH board 41, which is recorded as T2. The backup system switching relay activated by the second DO board 61 is driven by the second RLU board 81, which is recorded as T3, and the system switching action is completed.
[0056] Among them, the first time measurement unit 92 and the second time measurement unit 93 are both time measurement units. The first time measurement unit 92 is connected to the first RLU board 80 in the safety computer 1 system, and the second time measurement unit 93 is connected to the second RLU board 81 in the safety computer 2 system. The difference between T2 and T1 is defined as the soft handover time. The difference between T3 and T1 is defined as the hard handover time. Timestamps T1, T2 and T3 are uploaded to the industrial control computer 10. At the same time, the TSN tester 20 collects the TSN traffic delay and data synchronization status during the handover process and uploads them to the industrial control computer 10.
[0057] (4) The host computer test software in the industrial control computer 10 calculates the soft switching time using timestamps T1 and T2, calculates the hard switching time using timestamps T1 and T3, and verifies the effectiveness and real-time performance of the main and backup switching function by analyzing the soft switching time and hard switching time, and finally outputs the test results.
[0058] 4. Test the extended communication of the security computer bus under test.
[0059] (1) Run the host computer test software on the industrial control computer 10 and send data interaction test cases to the TSN tester 20.
[0060] (2) The TSN tester 20 encapsulates the test data into TSN traffic and stores it into different buffer queue groups according to the gating list. The TSN traffic of different buffer queue groups sends the data in the buffer queue to the VCU board in the security computer under test via TSN Ethernet according to the time schedule, thus completing the parameter configuration of the security computer under test and the communication simulation unit. The relevant boards and communication simulation units of the security computer under test then execute the subsequent test process according to the configured parameters.
[0061] (3) The VCU board contains two branches. After completing the data interaction and voting using a two-out-of-two redundant architecture, the voted data is transmitted to the two branches of the SWITCH board via TSN Ethernet.
[0062] (4) The two branches of the SWITCH board forward the received data through the link, transmit the data to the two branches of the MBI board according to the original queue mapping relationship, convert it into the multi-function bus format, verify and integrate the two data channels, and then send the data to the communication simulation unit through the multi-function bus.
[0063] (5) The communication simulation unit encapsulates the data according to the interaction protocol and feeds it back to the industrial control computer 10 via the MBI board, which is recorded as data packet 1. At the same time, the encapsulated data is forwarded to the VCU board via the MBI board and the SWITCH board. The VCU board then forwards it to the industrial control computer 10 via the TSN tester 20, which is recorded as data packet 2. In addition, each branch of the VCU board and the MBI board transmits the data transmission and reception status back to the TSN tester 20 via the TSN Ethernet. The TSN tester 20 counts the transmission delay and packet loss rate of each queue and uploads it to the industrial control computer 10.
[0064] (6) The host computer test software in the industrial control computer 10 analyzes data consistency, bus conversion correctness and transmission performance indicators through data packet 1 and data packet 2, as well as transmission delay and packet loss rate, to verify the functional effectiveness of the data interaction link.
[0065] like Figure 5 As shown, an example of testing the extended communication of the Security Computer 1 series bus is provided.
[0066] The industrial control computer 10 runs the host test software and sends data interaction test cases to the TSN tester 20. The TSN tester 20 encapsulates the test data into TSN traffic and stores it into two buffer queues, X and Y, each containing 256 buffer queues, according to a pre-designed gating list. Then, according to the time schedule, it injects the data into the corresponding buffer queues of CPU_X301 and CPU_Y302 on the first VCU board 30. The VCU board forwards the relevant parameters to other boards, completing the parameter configuration of the security computer under test and the communication simulation unit. The relevant boards and communication simulation unit of the security computer under test then execute the subsequent test process according to the configured parameters.
[0067] The VCU board 30 adopts a two-out-of-two redundancy architecture: CPU_X301 forwards the received TSN data to FPGA_X303, and CPU_Y302 forwards the received TSN data to FPGA_Y304; after FPGA_X303 and FPGA_304 complete data interaction and two-out-of-two voting, they transmit the voted data to SWITCH_X401 and SWITCH_Y402 of the SWITCH board 40 through the TSN Ethernet according to the corresponding queue.
[0068] The SWITCH board 40 forwards the received TSN data to the FPGA_X702 and FPGA_Y703 of the first MBI board 70 according to the original queue mapping relationship. The FPGA_X702 and FPGA_Y703 of the first MBI board 70 convert the TSN Ethernet data into a multi-function bus format and transmit it synchronously to the HOST-CPU 701. After verifying and integrating the two data streams, the HOST-CPU 701 sends the data to the first communication simulation unit 93 through the multi-function bus.
[0069] The first communication simulation unit 93 encapsulates the data according to the interaction protocol and feeds it back to the industrial control computer 10 via the MBI board, denoted as data packet 1. Simultaneously, the encapsulated data is forwarded to the VCU board via the MBI board and SWITCH board, and then forwarded to the industrial control computer 10 via the TSN tester, denoted as data packet 2. Furthermore, the redundant branches of the VCU board 30 and MBI board 70 transmit the data transmission and reception status back to the TSN tester 20 via TSN Ethernet. The TSN tester 20 then calculates the transmission delay, packet loss rate, and other indicators for each queue and uploads them to the industrial control computer 10. The host computer test software compares data packet 1 and data packet 2 to analyze data consistency, bus conversion correctness, and transmission performance indicators, verifying the functional effectiveness of the data interaction link.
[0070] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims. The information disclosed in the background section is intended only to enhance the understanding of the overall background technology of the present invention and should not be construed as an admission or implication in any way that such information constitutes prior art known to those skilled in the art.
Claims
1. A TSN testbed for railway safety computers, characterized in that, include: Industrial control computer (10), TSN tester (20), switch quantity simulation unit, time measurement unit, communication simulation unit; among which: The industrial control computer (10) is connected to the TSN tester (20) and the MBI board in the safety computer under test, respectively, to realize bidirectional data interaction; the TSN tester (20) is connected to the SWITCH board and VCU board in the safety computer under test, respectively, to realize bidirectional data interaction; the switch quantity simulation unit and the time measurement unit are both connected to the RLU board in the safety computer under test, and the time measurement unit is connected to the VCU board in the safety computer under test; the switch quantity simulation unit and the time measurement unit are both connected to the communication simulation unit, respectively, to realize bidirectional data interaction; the communication simulation unit is connected to the MBI board in the safety computer under test, to realize bidirectional data interaction. The security computer under test includes: VCU board, SWITCH board, DI board, DO board, MBI board and RLU board. The RLU board is connected to the DO board and DI board respectively. The VCU board, DI board, DO board and MBI board are all connected to the SWITCH board respectively. Data interaction is achieved through TSN Ethernet.
2. The TSN testbed for railway safety computers according to claim 1, characterized in that, The security computer under test includes: Security Computer Series 1 and Security Computer Series 2, and the two series have the same structure; Furthermore, the switching quantity simulation unit includes: a first switching quantity simulation unit (90) and a second switching quantity simulation unit (91); the time measurement unit includes: a first time measurement unit (92) and a second time measurement unit (93); and the communication simulation unit includes: a first communication simulation unit (94) and a second communication simulation unit (95); wherein: The first switch quantity simulation unit (90) and the first time measurement unit (92) are respectively connected to the first RLU board (80) in the security computer 1 system. The first switch quantity simulation unit (90) and the first time measurement unit (92) are respectively connected to the first communication simulation unit (94). The first communication simulation unit (94) is connected to the first MBI board (70) in the security computer 1 system. The second switch quantity simulation unit (91) and the second time measurement unit (93) are both connected to the second RLU board (81) in the security computer system 2. The second switch quantity simulation unit (91) and the second time measurement unit (93) are both connected to the second communication simulation unit (95). The second communication simulation unit (95) is connected to the second MBI board (71) in the security computer system 2.
3. The TSN testbed for railway safety computers according to claim 1, characterized in that, The structure of the secure computer system 1 includes: The first VCU board (30) includes CPU_X (301), CPU_Y (302), first FPGA_X (303) and first FPGA_Y (304) modules. The CPU_X (301) and first FPGA_X (303) constitute the X processing branch, and the CPU_Y (302) and first FPGA_Y (304) constitute the Y processing branch. The two processing branches in the first VCU board (30) realize data interaction and two-out-of-two voting through the first FPGA_X (303) and first FPGA_Y (304) modules. The first SWITCH board (40) includes SWITCH_X (401) and SWITCH_Y (402) modules, wherein SWITCH_X (401) and SWITCH_Y (402) correspond to the X processing branch and the Y processing branch, respectively; The first DI board (50) includes a first HOST-FPGA_X (501), a first HOST-FPGA_Y (502), a second FPGA_X (503) and a second FPGA_Y (504) module. The first HOST-FPGA_X (501) and the second FPGA_X (503) constitute the X input acquisition branch, and the first HOST-FPGA_Y (502) and the second FPGA_Y (504) constitute the Y input acquisition branch. The two input acquisition branches in the first DI board realize data interaction and two-out-of-two voting through the second FPGA_X (503) and the second FPGA_Y (504) modules. The first DO board (60) includes a second HOST-FPGA_X (601), a second HOST-FPGA_Y (602), a third FPGA_X (603) and a third FPGA_Y (604) module. The second HOST-FPGA_X (601) and the third FPGA_X (603) constitute the X output drive branch, and the second HOST-FPGA_Y (602) and the third FPGA_Y (604) constitute the Y drive branch. The two drive branches in the first DO board realize data interaction and two-out-of-two voting through the third FPGA_X (603) and the third FPGA_Y (604) module. The first MBI board (70) includes a HOST-CPU (701), a fourth FPGA_X (702) and a fourth FPGA_Y (703) module. The HOST-CPU (701) is connected to both the fourth FPGA_X (702) and the fourth FPGA_Y (703) to form two branches. The two branches in the first MBI board (70) realize data interaction and two-out-of-two voting through the fourth FPGA_X (702) and the fourth FPGA_Y (703) modules.
4. A TSN testbed for railway safety computers according to claim 1 or 2, characterized in that, The industrial control computer (10) serves as the human-machine interaction window of the TSN testbed, used to run the host computer test software that executes test scripts and issue test cases; The TSN tester (20) is used to encapsulate the security computer service simulation traffic into TSN traffic based on the test case parameters and forward it to the SWITCH board or VCU board in the security computer under test. It is used for parameter configuration before testing and to guide the completion of related test tasks. The digital input simulation unit is used to simulate the excitation signal injected into the RLU board, as well as to acquire the drive signal output by the RLU board and transmit it to the communication simulation unit. The time measurement unit is used to record the timestamps of the drive signals output by the RLU board and VCU board, calculate the execution time of the DO output of the safety computer under test, and transmit it to the communication simulation unit. The communication simulation unit is used to simulate the data interaction between the peripheral messages of the security platform and the MBI board in the security computer under test via the multi-function bus; it is also used to transmit the information transmitted by the switch quantity simulation unit and the time measurement unit to the industrial control computer (10) via the MBI board, SWITCH board and TSN tester (20) of the security computer under test.
5. A TSN testbed for railway safety computers according to claim 1, characterized in that, The industrial control computer (10), the TSN tester (20), and the MBI board in the safety computer under test achieve bidirectional data interaction through standard Ethernet; The TSN tester (20) and the SWITCH board and VCU board in the security computer under test achieve bidirectional data interaction through TSN Ethernet; The switch quantity simulation unit, time measurement unit, and communication simulation unit achieve bidirectional data interaction through standard Ethernet. The communication simulation unit and the MBI board in the security computer under test achieve bidirectional data interaction through a multi-function bus.
6. A TSN testing method for railway safety computers, characterized in that, Based on the TSN testbed according to any one of claims 1 to 5, it includes: According to the test task, the host computer test software that executes the test script is run in the industrial control computer (10) and the test cases are sent to the TSN tester (20). The parameters in the test cases are used to configure the TSN tester (20), the various boards, switch quantity simulation units, time measurement units and communication simulation units in the safety computer under test. The relevant data contained in the test cases are also used to guide the various boards, switch quantity simulation units, time measurement units and communication simulation units in the safety computer under test to work together to complete the test task. The TSN tester (20) encapsulates the test cases into TSN traffic. According to the parameters in the test cases, the TSN traffic is stored in different buffer queue groups. The TSN traffic in different buffer queue groups is sent to the VCU board or SWITCH board via TSN Ethernet in sequence according to the time schedule. After receiving the relevant data, the VCU board or SWITCH board in the security computer under test completes the parameter configuration of the security computer under test. According to the content of the test task, with the assistance of one or more units in the switch quantity simulation unit, time measurement unit and communication simulation unit, the relevant test is carried out. The test results are fed back to the industrial control computer (10) through the TSN tester (20). The host computer test software in the industrial control computer (10) analyzes whether the test results meet the expectations and outputs the test results.
7. A TSN testing method for railway safety computers according to claim 6, characterized in that, The test task includes: testing the DO output of the security computer under test, and the test procedure is as follows: The host computer test software is run on the industrial control computer (10) and the DO output test cases are sent to the TSN tester (20). After receiving the test case parameters, the TSN tester (20) encapsulates them into TSN traffic and stores them into different buffer queue groups. The TSN traffic of different buffer queue groups sends the data in the buffer queue to the VCU board or SWITCH board through TSN Ethernet in sequence according to the time schedule, thus completing the parameter configuration of the security computer under test and the time measurement unit. The relevant boards of the security computer under test and the time measurement unit execute the subsequent test process according to the configured parameters. After receiving the data, the VCU board parses the DO output command and sends a trigger signal to the time measurement unit via IO signals. The time measurement unit acquires this signal in real time and records the first timestamp. Furthermore, the VCU board forwards the DO output command to the SWITCH board via TSN Ethernet, and the SWITCH board forwards it to the DO board. After receiving the command, the DO board completes data interaction and two-out-of-two voting through two internal branches, and then drives the RLU board to output a relay signal. The time measurement unit acquires this relay signal and records the second timestamp, and calculates the DO output execution time based on the recorded first and second timestamps. The switch quantity simulation unit acquires the drive signal output by the RLU board through the IO signal and transmits it to the communication simulation unit. The time measurement unit obtains the execution time of the DO output and transmits it to the communication simulation unit. The communication simulation unit transmits the received information as feedback data to the MBI board through the multi-function bus, and then feeds it back to the industrial computer (10) through the SWITCH board and TSN tester. The host test machine software in the industrial control computer (10) analyzes the feedback data, judges whether the DO output function meets expectations, and finally outputs the test results.
8. The TSN testing method for railway safety computers according to claim 6, characterized in that, The test task includes: DI data acquisition test of the security computer under test, and the test process is as follows: Run the host computer test software on the industrial control computer (10) and send the test cases of DI acquisition test to the TSN tester (20). After receiving test cases, the TSN tester 20 encapsulates them into TSN traffic and stores them in different buffer queue groups. The TSN traffic in different buffer queue groups is sent sequentially to the VCU board or SWITCH board via TSN Ethernet according to the time schedule, completing the parameter configuration of the security computer under test and the switch simulation unit. The relevant boards of the security computer under test and the switch simulation unit execute the subsequent test process according to the configured parameters. After the configuration is completed, the switch simulation unit injects the DI excitation signal of the simulated external device into the relay channel of the RLU board through the IO signal. The RLU board receives the excitation signal and transmits it to the DI board. The two branches inside the DI board collect, interact with and vote on the DI excitation signal transmitted by the RLU board. The voted data is transmitted to the VCU board via the TSN Ethernet through the SWITCH board. The VCU board processes the collected data and then transmits it to the communication simulation unit via the SWITCH board and MBI board. The communication simulation unit converts the DI collected data into a format that conforms to the interaction protocol and then feeds it back to the industrial control computer (10) via the MBI board, SWITCH board and TSN tester (20). The upper test computer software in the industrial control computer (10) analyzes the feedback data, judges whether the DI acquisition function meets the expectations and outputs the test results.
9. A TSN testing method for railway safety computers according to claim 6, characterized in that, The test task includes: a master-slave switchover test of the dual-redundancy structure of the security computer under test; wherein the security computer under test includes: Security Computer 1 series and Security Computer 2 series, and the two series have the same structure; when the test switches from Security Computer 1 series as the master to Security Computer 2 series as the master, the test procedure is as follows: In the initial state, Security Computer 1 is the master system. Its first VCU board (30) sends a DO output command to the first SWITCH board (40) via TSN Ethernet. The first DO board (60) drives the first RLU board (80) to output a relay signal. At this time, Security Computer 2 is the backup system. The second DO board (61) is in an interlocked state with the first DO board (60) and does not output a relay signal. It only synchronizes the master and backup system data through the TSN link between the first SWITCH board (40) in Security Computer 1 and the second SWITCH board (41) in Security Computer 2. The host computer test software is run on the industrial control computer (10), and the test cases for the master-slave switchover test are sent to the TSN tester (20). After receiving the test case parameters, the TSN tester (20) encapsulates the security computer service simulation traffic into TSN traffic and stores it into different buffer queue groups. The TSN traffic of different buffer queue groups sends the data in the buffer queue to the VCU board or SWITCH board through TSN Ethernet in sequence according to the time schedule, thus completing the parameter configuration of the security computer under test and the time measurement unit. The relevant boards of the security computer under test and the time measurement unit are then used to complete the parameter configuration. The unit executes the subsequent test process according to the configured parameters; after the configuration is completed, it indicates that the test triggers the main and backup switching conditions. The first time measurement unit (92) collects the timestamp of the first VCU board (30) in the security computer 1 system receiving the system switching command, and records it as T1; the first VCU board (30) sends the main system fault signal to the first SWITCH board (40), drives the main system switching relay of the first RLU board (80) to release, and releases the interlock state; at the same time, the first SWITCH board (40) synchronizes the fault state to the second SWITCH board (41) through the TSN link. Security Computer 2 triggers standby main logic: The second VCU board (31) in Security Computer 2 takes over control authority and sends a system switching command to the second SWITCH board (41). The second time measurement unit (93) collects the time stamp of the standby system switching relay energized by the second VCU board (31) to the second SWITCH board (41), which is recorded as T2. The time stamp of the standby system switching relay energized by the second DO board (61) driving the second RLU board (81) is recorded as T3, and the system switching action is completed. Among them, the first time measurement unit (92) and the second time measurement unit (93) are both time measurement units. The first time measurement unit (92) is connected to the first RLU board (80) in the safety computer 1 system, and the second time measurement unit (93) is connected to the second RLU board (81) in the safety computer 2 system. The difference between T2 and T1 is defined as the soft switching time. The difference between T3 and T1 is defined as the hard switching time. Timestamps T1, T2 and T3 are uploaded to the industrial control computer (10). The host computer test software in the industrial control computer (10) calculates the soft switching time using timestamps T1 and T2, calculates the hard switching time using timestamps T1 and T3, and verifies the effectiveness and real-time performance of the master-slave switching function by analyzing the soft switching time and hard switching time, and finally outputs the test results.
10. A TSN testing method for railway safety computers according to claim 6, characterized in that, The test task includes: extended communication test of the security computer under test bus, and the test procedure is as follows: The host computer test software is run on the industrial control computer (10) to send data interaction test cases to the TSN tester (20); The TSN tester (20) encapsulates the test data into TSN traffic and stores it into different buffer queue groups. The TSN traffic of different buffer queue groups sends the data in the buffer queue to the VCU board in the security computer under test via TSN Ethernet according to the time schedule, thus completing the parameter configuration of the security computer under test and the communication simulation unit. The relevant boards and communication simulation units of the security computer under test then execute the subsequent test process according to the configured parameters. The VCU board contains two branches. After completing the data interaction and voting in a two-out-of-two redundant architecture, the voted data is transmitted to the two branches of the SWITCH board via TSN Ethernet. The two branches of the SWITCH board forward the received data, transmit the data to the two branches of the MBI board according to the original queue mapping relationship, convert it into the multi-function bus format, verify and integrate the two data channels, and then send the data to the communication simulation unit through the multi-function bus. The communication simulation unit encapsulates the data according to the interaction protocol and feeds it back to the industrial control computer (10) via the MBI board, which is recorded as data packet 1. At the same time, the encapsulated data is forwarded to the VCU board via the MBI board and the SWITCH board. The VCU board then forwards it to the industrial control computer 10 via the TSN tester (20), which is recorded as data packet 2. Each branch of the VCU board and the MBI board transmits the data transmission status back to the TSN tester (20) via the TSN Ethernet. The TSN tester (20) counts the transmission delay and packet loss rate of each queue and uploads it to the industrial control computer (10). The host computer test software in the industrial control computer (10) analyzes data consistency, bus conversion correctness and transmission performance indicators through data packet 1 and data packet 2, as well as transmission delay and packet loss rate, to verify the functional effectiveness of the data interaction link.