Method for improving chip exposure and large-size chip exposure method

By setting cutting lines and stretching areas on large-size chips, the problem that traditional exposure equipment cannot meet the exposure requirements of large-size chips is solved, and high-quality chip packaging and circuit continuity are achieved.

CN121900105APending Publication Date: 2026-04-21JCET MANAGEMENT CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
JCET MANAGEMENT CO LTD
Filing Date
2025-12-18
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

Traditional exposure equipment cannot meet the exposure requirements when processing large-size chips, resulting in longer production cycles and reduced pattern accuracy. Furthermore, misalignment caused by offsets in complex wiring designs may lead to circuit failures.

Method used

The large chip is divided into multiple small areas by setting cutting lines. Straight lines or polylines are selected to ensure the width of the cutting lines and the avoidance area. A stretching area is set at the splicing of sub-shapes, and a mask is used for gradual exposure.

Benefits of technology

This improves the exposure quality and packaging design accuracy of large-size chips, reduces the risk of splicing errors, and ensures chip performance and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a method for improving chip exposure and a large-size chip exposure method. When a cutting line for cutting a chip is formed, the path of the cutting line is selected as a straight line or a broken line, so that the stretching calculation of a graph is simplified; the width of the cutting line is controlled to be greater than or equal to a cutting width threshold value, so that the pattern can still keep good shape and dimensional stability after being cut and stretched; by setting the avoiding area of the cutting line, it is ensured that the cut graph can be conveniently stretched after being cut; as for the cut pattern which is cut by the cutting line to form the sub-patterns, the stretching areas are oppositely arranged at the splicing positions of the sub-patterns, the influence of exposure offset on the packaging structure is reduced, it is guaranteed that the pattern can still keep good shape and size stability after being cut and stretched, and then the accuracy and reliability of packaging design are improved.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a method for improving chip exposure and a method for exposing large-size chips. Background Technology

[0002] With the rapid development of cutting-edge technologies such as artificial intelligence, big data, and cloud computing, chip design is evolving rapidly toward high-density wiring integration. This means that by implementing more complex circuit layouts within a limited area, the computing power and energy efficiency of chips can be improved. This trend has directly led to a significant increase in chip size.

[0003] Traditional exposure machines move via stepping mechanisms, which are highly efficient when processing small-sized chips. However, they become inadequate for larger chips, failing to meet their exposure requirements. Specifically, the limited coverage area of ​​a single exposure necessitates multiple exposures, extending production cycles and introducing cumulative errors that negatively impact pattern accuracy and yield. Therefore, cutting the chip pattern and exposing it in sections has become an indispensable processing method.

[0004] In the field of consumer electronics chips, the chips we commonly see are usually quite compact, generally not exceeding 20.0 × 20.0 mm². To maximize the efficiency of the exposure equipment, these small chips are often arranged in a matrix and exposed.

[0005] However, in high-end applications such as artificial intelligence, chip sizes are often much larger, especially interposer chips, which frequently exceed 50.0 × 50.0 mm². This far exceeds the maximum stepping range of traditional exposure equipment (e.g., 44.0 × 44.0 mm² or 33.0 × 53.5 mm²). Moreover, with continuous technological advancements, we can foresee that the size of interposer chips will continue to increase.

[0006] Traditional exposure methods rely on a single exposure to cover the entire chip. When the chip size exceeds the field of view of the exposure machine, the pattern cannot be transferred completely, directly causing production to halt and becoming a core bottleneck in the manufacturing of large-size chips. Therefore, as chip sizes continue to increase, traditional exposure methods can no longer meet the demands.

[0007] Without considering purchasing new exposure equipment, the urgent problem to be solved is how to utilize the existing exposure equipment (which has a limited stepping range, such as 44.0×44.0mm² or 33.0×53.5mm²) to handle these large-size chips and ensure high-quality exposure of large-size chips.

[0008] The stepping range of existing old machines is an inherent property of the hardware design and cannot be expanded through software debugging.

[0009] The method of exposure by cutting and splicing involves dividing the large-size chip layout into multiple independent small areas according to the stepping range of the exposure machine, and then exposing each small area in turn by stepping the machine to finally splice them into a complete chip pattern. This is a current solution for exposing large-size chips using old exposure machines.

[0010] However, in practice, even after regular calibration, minor offsets are unavoidable during the operation of the exposure equipment. These minor offsets have limited impact when processing simple patterns, but the risk is significantly amplified when the chip contains complex wiring designs.

[0011] The continuity of complex trace patterns is extremely important. When complex trace patterns are cut and exposed in multiple exposure matrices, this offset can cause misalignment at the splicing points. This misalignment not only compromises the accuracy of the pattern but can also lead to serious circuit failures: at best, it can cause sudden changes in trace impedance, affecting signal transmission efficiency; at worst, it can cause adjacent traces to overlap or break. Overlapping traces can cause short circuits, and broken traces can cause open circuits, which can directly lead to chip malfunction.

[0012] Precisely setting the cutting line principle and performing special treatment on the areas involved in the cutting line to ensure the smooth progress of the large-size chip exposure process is of great significance for avoiding adverse effects such as short circuits or open circuits caused by splicing lines and ensuring the performance and reliability of the chip. Summary of the Invention

[0013] The technical problem to be solved by the present invention is to provide a method for improving chip exposure and a method for exposing large-size chips, so as to ensure the exposure quality of large-size chips.

[0014] To address the above problems, this invention provides a method for improving chip exposure, comprising: Setting the cutting line for segmenting the chip to be exposed includes: selecting the path of the cutting line as a straight line or a broken line; setting the width of the cutting line to be greater than or equal to a cutting width threshold; and setting the avoidance area of ​​the cutting line. For a cut graphic that is cut into sub-graphics by the cutting line, a stretching area is provided at the splicing point of the sub-graphics.

[0015] In some embodiments, when the path of the cutting line is a straight line, the cutting line extends in a horizontal or vertical direction.

[0016] In some embodiments, when the path of the cutting line is a broken line, each bend of the cutting line is 90°.

[0017] In some embodiments, when the path of the cutting line is a broken line, each segment of the cutting line extends in a horizontal or vertical direction.

[0018] In some embodiments, when there is a risk of the cutting line path intersecting with the diagonal line, the cutting line path is adjusted to a broken line and each bend of the cutting line is set to 90° to bypass the diagonal line.

[0019] In some embodiments, in the step of setting the cutting lines to divide the chip to be exposed, a region with low pattern density is selected as the region where the cutting lines are located.

[0020] In some embodiments, when the path of the cutting line is a broken line, the path of the cutting line is adjusted so that the bend of the cutting line avoids the cut pattern.

[0021] In some embodiments, when the path of the cutting line is a polyline, the length of each polyline segment of the cutting line is greater than the cutting length threshold.

[0022] In some embodiments, the cutting length threshold is greater than the cutting width threshold.

[0023] In some embodiments, the cutting length threshold is 1.2 to 1.5 times the cutting width threshold.

[0024] In some embodiments, the cutting width threshold is greater than twice the exposure offset of the exposure machine.

[0025] In some embodiments, the cutting width threshold is greater than 10 μm.

[0026] In some embodiments, the avoidance area includes a graphic with a size smaller than the cutting width threshold.

[0027] In some embodiments, the avoidance area includes a shape smaller than the width of the cutting line.

[0028] In some embodiments, the cut graphic is cut by the cutting line to form two sub-graphics, which are located on both sides of the cutting line respectively.

[0029] In some embodiments, the avoidance area includes an irregular shape.

[0030] In some embodiments, the irregular shape includes circles and ellipses.

[0031] In some embodiments, the avoidance area includes diagonal lines and curves.

[0032] In some embodiments, the nearest distance between the cutting line and the avoidance area is greater than or equal to the safe distance.

[0033] In some embodiments, the avoidance area includes vents and copper foil.

[0034] In some embodiments, the distance between each vent and the cutting line is greater than or equal to the safety distance.

[0035] In some embodiments, the stretching region is the stretching of the sub-graphic toward the dividing line.

[0036] In some embodiments, the cut graphic is cut by the cutting line to form two sub-graphics, and the two sub-graphics are located on both sides of the cutting line.

[0037] In some embodiments, when splicing the sub-graphics of the cut graphic, there is an overlapping area between the splicing points of the sub-graphics and the stretching areas provided opposite to each other.

[0038] In some embodiments, the shape of the stretching region is rectangular.

[0039] In some embodiments, the length of the stretching region is less than half of the cutting width threshold, and the length of the stretching region is the dimension of the stretching region along the direction perpendicular to the cutting line.

[0040] In some embodiments, the width of the stretched region is greater than half the width of the sub-graphic, the width of the stretched region is the dimension of the stretched region along the cutting line direction, and the width of the sub-graphic is the dimension of the sub-graphic along the cutting line direction.

[0041] In some embodiments, the stretching region is centrally located at the splicing point of the sub-graphics along the direction of the cutting line.

[0042] In some embodiments, an initial length and an initial width value of the stretching region are set, and the length and width values ​​of the stretching region are adjusted according to the exposure offset of the test.

[0043] In some embodiments, the stretching region is composed of a plurality of stretching sub-regions arranged in a rectangular shape.

[0044] In some embodiments, the interval between the stretchable sub-regions corresponding to the same sub-graphic is less than the width value of the stretchable sub-region, and the width value of the stretchable sub-region is the dimension of the sub-stretched region along the cutting line direction.

[0045] In some embodiments, by overlapping exposure of the relatively arranged stretching regions, the width value of the stretching merged region formed after merging the two stretching regions is close to the width value of the sub-graphic.

[0046] To address the above problems, the present invention also provides a method for exposing large-size chips, comprising: The method for improving chip exposure described above involves cutting the chip to be exposed into multiple spliced ​​chip blocks, wherein each spliced ​​chip block has a stretching area at the splicing point of the sub-patterns of the cut pattern of the chip to be exposed. A mask is made for each of the chip blocks to be exposed and its corresponding stretching area; Each of the aforementioned photomasks is placed sequentially at the position of the chip to be exposed in the corresponding splicing chip block and then exposed.

[0047] In some embodiments, the size of each spliced ​​chip block plus the size of the corresponding stretching area is less than the maximum step range of the exposure machine.

[0048] The above technical solution simplifies the stretching calculation of the pattern by selecting a straight line or a broken line as the path of the cutting line when forming the chip segmentation line; it ensures that the pattern maintains good shape and dimensional stability after cutting and stretching by controlling the width of the cutting line to be greater than or equal to the cutting width threshold; it ensures that the cut pattern can be easily stretched after cutting by setting the avoidance area of ​​the cutting line; and it sets a stretching area at the splicing point of the cut pattern to reduce the impact of exposure offset on the packaging structure, ensuring that the pattern maintains good shape and dimensional stability after cutting and stretching, thereby improving the accuracy and reliability of the packaging design.

[0049] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Techniques, methods, and apparatus known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification. Attached Figure Description

[0050] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0051] Figure 1 It is a graphic formed under ideal conditions using existing technology that employs cutting and splicing methods; Figure 2 It is a pattern formed by cutting and splicing using existing technology under exposure offset conditions; Figure 3 This is a flowchart of a method for improving chip exposure provided in the first embodiment of the present invention; Figure 4 This is an enlarged schematic diagram showing that the path of the cutting line is a straight line, as provided in the first embodiment of the present invention; Figure 5 This is an enlarged schematic diagram showing that the path of the cutting line is a straight line, as provided in the second embodiment of the present invention; Figure 6 This is an enlarged schematic diagram of the cutting line path being a broken line provided in the third embodiment of the present invention; Figure 7 This is an enlarged schematic diagram of the cutting line path being a broken line provided in the fourth embodiment of the present invention; Figure 8 This is a schematic diagram of a stretching region being set relative to each other at the splicing point of the sub-graphics, provided in the first embodiment of the present invention; Figure 9 This is a schematic diagram of a graphic formed after sub-graphics are stitched together and exposed, as provided in the first embodiment of the present invention. Figure 10 This is a schematic diagram of a graphic provided in the first embodiment of the present invention, showing one end located within the width range of the cutting line; Figure 11 This is a schematic diagram of the first stretching region provided in the first embodiment of the present invention; Figure 12 This is a schematic diagram of a stretching region being set relative to each other at the splicing point of the sub-graphics, provided in the third embodiment of the present invention; Figure 13 This is a schematic diagram of a graphic formed after sub-graphics are stitched and exposed, as provided in the third embodiment of the present invention.

[0052] Explanation of reference numerals in the attached figures: 11, 11', 21, 31, 41 — Cutting lines; 12, 32 — the cut shapes; 13 — Graphics; 131—The left end of Figure 13; 15 – First splicing chip block; 16 – Second splicing chip block; A – First sub-figure; a——First stretching region; X — the width value of the first sub-graphic A; Y—The length of the first stretching region a; Z—Width value of the first stretching region a; Ax — the axial direction of the first sub-figure A; B – Second sub-figure; b—Second stretching region; C – Third subgraph; c1—Third stretching region 1; c2—Third stretching region II; L11 — Width value of the third stretching region c1; L12 — Width value of the third stretching region c2; D – Fourth sub-figure; d1—The fourth stretching region; d2—Fourth stretching region 2; L21—Width value of the fourth stretching region d1; L22—Width value of d2 in the fourth stretching region; D1, D2 — Width values ​​of the stretched and merged area. Detailed Implementation

[0053] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0054] As described in the background section, using a stitched exposure method can be used to address the exposure issues of large-size chips.

[0055] Please refer to Figures 1-2 , Figure 1 It is a graphic formed under ideal conditions using existing technology that employs cutting and splicing methods; Figure 2 It is a graphic formed by cutting and splicing using existing technology under exposure offset conditions.

[0056] Ideally, the exposure matrices should be seamlessly stitched together to form a complete and precise pattern, such as... Figure 1 As shown, the dotted lines indicate the positions of the cutting lines, and the first sub-graphic A and the second sub-graphic B are seamlessly joined.

[0057] However, in actual operation, the exposure machine may experience slight misalignment during the exposure process, such as... Figure 2 As shown, there is a gap in the horizontal direction between the first sub-figure A and the second sub-figure B, and there is also a slight offset in the vertical direction.

[0058] When complex trace patterns are cut and exposed separately in multiple exposure matrices, this offset can cause misalignment at the stitching points, resulting in non-conductivity in the circuit. This misalignment not only reduces the accuracy of the pattern but may also lead to short circuits or open circuits, posing a serious threat to the chip's performance and reliability.

[0059] To address the aforementioned technical problems, this invention provides a method for improving chip exposure.

[0060] The method for improving chip exposure is used to cut large-size designs that exceed the capacity of the exposure equipment into multiple smaller-size parts, in order to solve the problem of mismatch between large-size designs and the exposure capacity of the exposure equipment.

[0061] Figure 3 This is a flowchart of a method for improving chip exposure provided in the first embodiment of the present invention.

[0062] like Figure 3 As shown, the method for improving chip exposure includes: Step S11: Set the cutting lines for dividing the chip to be exposed; Step S12: For the cut graphic that has been cut into sub-graphics by the cutting line, a stretching area is set at the splicing point of the sub-graphics.

[0063] In step S11, the dividing line is used to cut large-sized chips that exceed the stepping range of the exposure machine into smaller-sized parts, solving the problem of mismatch between large-sized design and exposure capability of the exposure machine. In step S12, a stretching area is set at the splicing point of the sub-patterns after cutting to compensate for the impact of exposure offset to ensure the continuity of the circuit, reduce the error and loss caused by exposure offset during the exposure process, and improve production efficiency and yield.

[0064] Regarding step S11, set the cutting lines for dividing the chip to be exposed.

[0065] In semiconductor manufacturing, dicing line design is a core step in ensuring chip packaging quality. Step S11 specifically includes: Step S111: Select the path of the cutting line as a straight line or a broken line; Step S112: Set the width of the cutting line to be greater than or equal to the cutting width threshold; Step S113: Set the avoidance area of ​​the cutting line.

[0066] Regarding step S111, the path of the cutting line is selected as a straight line or a broken line.

[0067] If a diagonal line is used as the cutting method, the edges of the cut chip pattern will simultaneously exhibit a diagonal shape, which poses a significant challenge to the critical pattern stretching process. After diagonal cutting, the stretching calculation needs to consider both the X and Y axes simultaneously. Furthermore, the precision of diagonal stretching is difficult to control; even small angle calculation errors will be amplified on large-size chips, causing the stretched area to fail to accurately cover the exposure offset range, ultimately affecting circuit continuity and product quality.

[0068] In this step, when the path of the cutting line is a straight line, the cutting line extends along the horizontal (X-axis) direction or the vertical (Y-axis) direction.

[0069] Figure 4 This is an enlarged schematic diagram showing that the path of the cutting line is a straight line, as provided in the first embodiment of the present invention.

[0070] like Figure 4 As shown, in the first embodiment, the cutting line 11 is perpendicular to the figure, and both ends of the cutting line 11 extend to the edge of the chip to be exposed, so as to cut the chip to be exposed into two parts: a first splicing chip block 15 and a second splicing chip block 16. At the same time, the cut pattern 12 is cut into a first sub-pattern A and a first sub-pattern B, while the pattern 13 is located to the right of the cutting line 11 and does not contact the cutting line 11.

[0071] Figure 5 This is an enlarged schematic diagram showing that the path of the cutting line is a straight line, as provided in the second embodiment of the present invention.

[0072] like Figure 5 As shown, in the second embodiment, the cutting line 21 is along the horizontal direction in the figure. Similarly, both ends of the cutting line 21 also extend to the edge of the chip to be exposed, cutting the chip to be exposed into upper and lower blocks. The cutting line 21 does not pass through the cut pattern. Figure 5 The cut-off graphic in the image is not marked.

[0073] When the path of the cutting line is a broken line, each bend of the cutting line is 90°.

[0074] The simplest cutting method is to use a straight line as the cutting line path. However, in specific embodiments, the routing of the graphic to be cut is more complex. When there is a risk of the diagonal routing of the graphic to be cut intersecting with the path of the cutting line, the path of the cutting line is adjusted to a broken line, and each bend of the cutting line is set to 90° to avoid the diagonal routing.

[0075] Furthermore, each segment of the cutting line extends in a horizontal or vertical direction. That is, when the path of the cutting line is a broken line, the cutting line is composed of multiple broken line segments that extend in a horizontal or vertical direction.

[0076] Figure 6 This is an enlarged schematic diagram showing that the cutting line path is a broken line according to the third embodiment of the present invention. Figure 6 As shown, the path of the cutting line 31 is a broken line, which consists of three broken line segments. Each broken angle of the cutting line 31 is 90°, and each broken line segment extends in a horizontal or vertical direction. The cut shape 32 is cut into a third sub-shape C and a fourth sub-shape D.

[0077] Figure 7 This is an enlarged schematic diagram showing that the cutting line path is a broken line according to the fourth embodiment of the present invention. Figure 7 As shown, the path of the cutting line 41 is a broken line, which consists of five broken line segments, each extending horizontally or vertically. The cutting line 41 cuts the chip to be exposed into two blocks, left and right. Figure 7 The cut-off graphic in the image is not marked.

[0078] The cutting line path is either a straight line or a broken line with a 90° angle, so that the graphic cut by the cutting line presents a regular shape. In the subsequent graphic stretching step, it can simplify the graphic stretching calculation process, reduce the risk of calculation error caused by complex paths, improve production efficiency, and also facilitate the splicing work after cutting.

[0079] Compared to diagonal or curved cuts, the cutting line is a straight line or a broken line with a 90° angle, which ensures a smoother cut surface and makes it easier to align during splicing, thereby reducing the risk of splicing errors.

[0080] In this embodiment, when the path of the cutting line is a broken line, the path of the cutting line is adjusted so that the bend of the cutting line avoids the cut pattern.

[0081] For example, such as Figure 6 As shown, the cutting line includes two horizontal segment and one vertical segment. The cut shape 32 is divided into the third sub-shape C and the fourth sub-shape D by the vertical segment of the cutting line. By avoiding the bends of the cutting line 31, the cut shape 32 is only cut by straight line segments, thus making the joint between the third sub-shape C and the fourth sub-shape D a straight line, further simplifying the calculation process of shape stretching.

[0082] This step involves setting each segment of the cutting line to extend horizontally or vertically, so that subsequent stretching of the cut graphic only needs to extend horizontally or vertically. The stretching calculation can be simplified to a single-axis dimension, greatly reducing calculation errors and ensuring stretching accuracy and graphic integrity.

[0083] Regarding step S112, the width of the cutting line is set to be greater than or equal to the cutting width threshold.

[0084] To reduce the impact of exposure offset on the packaging structure and ensure that the cut pattern maintains good shape and dimensional stability after cutting and stretching, the present invention limits the width of the cutting line when setting the dividing line.

[0085] The following description uses the first embodiment as an example. Figure 8 This is a schematic diagram of a stretching region being set relative to each other at the splicing point of the sub-graphics, according to the first embodiment of the present invention. Figure 9 This is a schematic diagram of a graphic formed after the sub-graphics are stitched together and exposed, as provided in the first embodiment of the present invention.

[0086] Please refer to the above. Figure 4 The cutting line 11 cuts the cut pattern 12 to form the first sub-pattern A and the second sub-pattern B.

[0087] refer to Figure 8 and Figure 9 A first stretching region a is set at the splicing point of the first sub-graphic A, and a second stretching region b is set at the splicing point of the second sub-graphic B.

[0088] When the size of the first sub-pattern A is smaller than the second stretched region b, or the size of the second sub-pattern B is smaller than the first sub-pattern A, the size of the pattern formed by splicing the first sub-pattern A and the second sub-pattern B (i.e., the total area of ​​A+B) may be smaller than the size of the pattern formed by overlapping the first stretched region a and the second stretched region b (i.e., the total area of ​​a+b).

[0089] Therefore, when the first sub-pattern A and the first stretched region a, and the second sub-pattern B and the second stretched region b are exposed, this mutual penetration may lead to an increase in the dimensional deviation of the packaging structure.

[0090] Even more seriously, if the infiltrated area covers adjacent sensitive lines, crosstalk between the lines can lead to a decrease in chip performance or even cause the chip to malfunction.

[0091] This step controls the width of the cutting line to be greater than or equal to the cutting width threshold and automatically avoids graphics smaller than the cutting width threshold, so that the cutting line will not cut into these sensitive small graphic areas.

[0092] Correspondingly, even if a certain degree of exposure offset occurs, the impact of the overlapping exposure area will be limited to an acceptable range, thereby ensuring the overall quality and performance of the packaging design. This reduces the impact of exposure offset on the packaging structure and ensures that the pattern can maintain good shape and dimensional stability after cutting and stretching.

[0093] The cutting width threshold is related to the exposure offset of the exposure machine and the differences in operation by the exposure machine operator. Setting the cutting width threshold can accommodate the expansion of the pattern boundary after stretching, reserve sufficient buffer space for exposure offset, prevent the stretched area from excessively penetrating into adjacent areas, ensure that the pattern maintains good shape integrity and dimensional stability after cutting and stretching, and provide a precise pattern reference for subsequent packaging.

[0094] In this embodiment, the cutting width threshold is greater than twice the exposure offset of the exposure machine.

[0095] Specifically, the cutting width threshold is greater than 10 μm. For example, in the first embodiment, the cutting width threshold is 20 μm.

[0096] Furthermore, when the path of the cutting line is a polyline, the length of each polyline segment of the cutting line is greater than the cutting length threshold. Figure 6 In this context, the length of each segment of the cutting line 31 is greater than the cutting length threshold. Figure 7 The length of each segment of the cutting line 41 is also greater than the cutting length threshold.

[0097] Wherein, the cutting length threshold is greater than the cutting width threshold.

[0098] Specifically, the cutting length threshold is 1.2 to 1.5 times the cutting width threshold. For example, in the third embodiment, the cutting length threshold is 1.5 times the cutting width threshold, and in the fourth embodiment, the cutting length threshold is 1.2 times the cutting width threshold.

[0099] Regarding step S113, the avoidance area of ​​the cutting line is set.

[0100] The avoidance area is a region containing a specific graphic. The cutting line avoids the avoidance area so that the cutting line avoids complex routing, ensuring the accuracy of the cutting process and the smooth progress of subsequent processes.

[0101] The avoidance area includes patterns smaller than the cutting width threshold. To ensure the accuracy and reliability of the packaging design, as mentioned above, in step S112, the width of the cutting line is limited to be greater than or equal to the cutting width threshold. Accordingly, the cutting line actively avoids patterns smaller than the cutting width threshold, further ensuring that the cutting line will not cut into these sensitive micro-pattern areas, reducing the complexity of setting the stretching area.

[0102] When the size of the cut shape is smaller than the width of the cutting line, the cut shape may be completely swallowed up by the cutting line, making it impossible to set a stretching area in subsequent steps. To avoid this situation, the avoidance area includes shapes with a size smaller than the width of the cutting line.

[0103] Both ends of the cut shape are located on either side of the cutting line. When one end of the cut shape is located within the cutting line, the cut shape can only form a sub-shape on one side of the cutting line, thus making it impossible to subsequently set a stretching area at the splicing point of the sub-shapes. This invention needs to avoid this scenario when setting the cutting line. Therefore, when setting the cutting line, both ends of the shape are located outside the cutting line, or the cutting line avoids the shape.

[0104] When the cutting line is a broken line, the avoidance area includes a shape that is too large to be cut by a broken line segment of the cutting line, so that the bend of the cutting line avoids the shape being cut.

[0105] The avoidance area also includes irregular shapes. Irregular shapes increase the difficulty of cutting and greatly increase the difficulty of setting up the stretching area later. By making the cutting line avoid irregular shapes, the cutting difficulty can be simplified while maintaining the integrity of the irregular shapes.

[0106] The irregular shapes include circles and ellipses.

[0107] The irregular shape includes a combination of circles or ellipses. For example, the irregular shape includes a ring structure. Therefore, in a specific embodiment, the cutting line avoids the inner and outer circles of the ring structure.

[0108] In the first embodiment, the cutting line 11 avoids all shapes except rectangles. That is, the shapes of the cut shapes are all rectangles, so that the sub-shapes formed after the cut shape is cut by the cutting line are all rectangular, simplifying the calculation of the subsequent stretching area.

[0109] When there is a risk that the cutting line will intersect with the irregular shape, the cutting line can be shifted or its path adjusted to a broken line while setting each bend of the cutting line to 90° to avoid the irregular shape.

[0110] The avoidance area also includes diagonal lines and curves. If the cutting line falls on a diagonal line or intersects with a curve, it will cause inconvenience to subsequent stretching calculations and may even lead to calculation errors, thereby affecting the overall quality and reliability of the packaging design. The diagonal lines are generally traces.

[0111] Furthermore, the avoidance area also includes shapes containing diagonal lines or curves; for example, the avoidance area also includes triangles or irregular polygons.

[0112] The closest distance between the cutting line and the avoidance area is greater than or equal to the safety distance. By setting the safety distance to reserve sufficient buffer space, the cutting offset error that may occur during the cutting process can be effectively offset; secondly, it can also form a physical protective barrier to prevent the cutting line from accidentally extending into the avoidance area, thereby avoiding damage such as scratches, thermal deformation, or material peeling to complex graphics (such as circuit traces, optical components, etc.) in the avoidance area.

[0113] In specific embodiments, the quantification of the safety distance needs to take into account material properties, cutting equipment precision and environmental factors. The optimal value is usually determined through process verification, so as to achieve dual protection of cutting efficiency and graphic integrity.

[0114] In the first embodiment, the safety distance is greater than or equal to 10 μm.

[0115] The avoidance area also includes vents and copper foil.

[0116] As a channel for gas exchange inside the chip, the integrity of the vent directly affects the heat dissipation performance and reliability after packaging. The cutting line avoids the vent to prevent affecting the overall heat dissipation capacity of the chip, thereby avoiding affecting the chip's performance and lifespan.

[0117] When the avoidance area is a vent, the distance between each vent and the cutting line is greater than or equal to the safe distance. This ensures that the function of each vent is not affected.

[0118] Copper foil, as a conductive or heat dissipation layer, can cause signal interference or increased thermal resistance if its edges are burrs or its thickness is uneven. The cutting lines avoid the copper foil to prevent affecting the chip's resistance to high-frequency radiation interference, moisture, oxidation, and heat dissipation, thereby further ensuring the chip's structural stability and functional integrity.

[0119] This application selects a region with low graphic density as the area where the cutting line is located. Firstly, the low-density region of the graphic to be cut contains fewer graphics, resulting in less geometric data to be processed during cutting. Therefore, forming the cutting line in a low-density region significantly reduces the processing burden on the cutting line, making it easier to generate smooth boundaries, reducing subsequent processing errors, and improving the quality of graphic segmentation. Secondly, high-density regions of the graphic typically contain the core functional features of the chip; selecting a low-density region as the area where the cutting line is located further preserves the integrity of the important structures in the high-density region.

[0120] By setting up appropriate avoidance zones, the interference of cutting on adjacent components can be reduced, while providing physical space for stretching operations and simplifying the processing flow.

[0121] Cutting large chips into smaller parts for exposure allows for more precise control of exposure parameters, thereby improving exposure accuracy and the quality of the final product. Setting the cutting line in step S11 ensures that the cut pattern can be easily stretched and successfully spliced.

[0122] Regarding step S12, for the cut pattern formed by the cutting line into sub-patterns, a stretching area is provided at the joint of the sub-patterns. The joint of the sub-patterns is the cut point of the sub-pattern where it is cut by the cutting line.

[0123] As described in steps S111 to S113, when setting the cutting line, an avoidance area is set to avoid some graphics, but the cutting line will still pass through some graphics. The graphics that are passed through and cut by the cutting line are the cut graphics.

[0124] After the cut pattern is cut by the cutting line, the resulting sub-patterns are located on both sides of the cutting line. Accordingly, in this step, the sub-patterns on both sides of the cutting line are provided with stretching areas at the junction with the cutting line.

[0125] The stretching region is the stretching of the sub-shape toward the dividing line. That is, the stretching direction of the stretching region is perpendicular to the direction of the cutting line.

[0126] When the exposure offset of the exposure machine is mainly in the vertical direction, the stretching area is the stretching of the sub-pattern along the vertical direction; when the exposure offset is mainly in the horizontal direction, the stretching area is the stretching of the sub-pattern along the horizontal direction.

[0127] Exposure offset in the exposure machine may exist in both the vertical and horizontal directions, but usually one direction is dominant.

[0128] Specifically, when the exposure offset of the exposure machine is mainly in the vertical direction, the exposure offset of the machine in the vertical direction is greater than the exposure offset in the horizontal direction. Correspondingly, if the cutting line is in the horizontal direction, then the stretching area is where the sub-pattern is stretched in the vertical direction. When the exposure offset is mainly in the horizontal direction, the exposure offset of the machine in the horizontal direction is greater than the exposure offset in the vertical direction. If the cutting line is in the vertical direction, then the stretching area is where the sub-pattern is stretched in the horizontal direction.

[0129] The cut shape is divided into two sub-shapes by the cutting line, and the two sub-shapes are located on both sides of the cutting line.

[0130] Figure 10 This is a schematic diagram of a graphic provided in the first embodiment of the present invention, showing one end located within the width range of the cutting line.

[0131] like Figure 10 As shown, if the cutting line path selected in the first embodiment is cutting line 11', the left end 131 of the graphic 13 is located inside the cutting line 11', and the sub-graphics formed by cutting the graphic 13 cannot be located on both sides of the cutting line 11'.

[0132] Therefore, in the first embodiment, the cutting line is moved to the left and the cutting line 11 is selected so that the graphic 13 can completely avoid the cutting line, ensuring that the cut graphic can be easily stretched and successfully spliced ​​after cutting.

[0133] When the cutting line is a broken line, the cut graphic may be divided into more than three sub-graphics, resulting in more than two offset regions. To avoid this, this application modifies the path of the cutting line so that the cut graphic is divided into only two sub-graphics.

[0134] This application compensates for the effects of exposure offset by stretching the sub-graphics at the splicing points of the cut sub-graphics to form a stretching area, thereby ensuring the conductivity of the circuit.

[0135] The shape of the stretched region matches the shape of the joint of the sub-graphics. When the joint of the sub-graphics is rectangular, the shape of the stretched region is also rectangular.

[0136] In most cases, the graphic to be cut is a wire, and setting the stretching area as a rectangle can keep the shape consistent with the shape of the graphic to be cut, thereby forming a uniform and regular graphic.

[0137] The stretching region will be described using the first embodiment as an example.

[0138] like Figure 4As shown, the shape to be cut is a horizontal conductor, the cutting line 11 is vertical, and the shape to be cut 12 is cut into the first sub-shape A and the second sub-shape B, which are located on both sides of the cutting line 11.

[0139] refer to Figure 8 and Figure 9 The exposure offset of the exposure machine causes horizontal breakage and vertical displacement in the stitched pattern when the first sub-pattern A and the second sub-pattern B are directly stitched together for exposure.

[0140] In the first embodiment, to compensate for the impact of exposure offset and ensure the continuity of the first sub-graphic A and the second sub-graphic B after stitching, a first stretching region a is provided on the right side of the first sub-graphic A, and a second stretching region b is provided on the left side of the second sub-graphic B. Both the first stretching region a and the second stretching region b are rectangular in shape.

[0141] When splicing the sub-graphics of the cut graphic, there is an overlap between the stretching areas positioned opposite each other at the splicing point. This ensures internal continuity of the area formed after the two stretching areas are merged. For example, Figure 9 As shown, the first stretching region a and the second stretching region b partially overlap after overlapping exposure.

[0142] By overlapping the exposures of the relatively set stretch regions, the width value of the merged stretch regions is made close to the width value of the sub-graphic.

[0143] like Figure 8 As shown, the first sub-pattern A and the first stretched region a, as well as the second sub-pattern B and the second stretched region b, are exposed respectively, thereby forming overlapping exposures at the cut, as shown. Figure 9 As shown, the image after exposure of the first sub-image A includes the image portion after exposure of the second stretched region b, and the image after exposure of the second sub-image B also includes the image portion after exposure of the first stretched region a. At the same time, the first stretched region a and the second stretched region b partially overlap, so that the splicing point of the first sub-image A and the second sub-image B after exposure is connected, ensuring the conductivity of the circuit.

[0144] The distance between the first sub-graphic A and the second sub-graphic B is the horizontal exposure offset, such as... Figure 9As shown between the two dotted lines, after overlapping exposure of the first stretched region a and the second stretched region b, the width D1 of the stretched merged region formed by the first stretched region a and the second stretched region b is close to the width value X of the first sub-graphic A, thereby enabling the stitched lines to be continuous.

[0145] The size of the stretching region is adjusted by the length and width values ​​of the stretching region so that the area formed by overlapping exposure of the stretching regions meets the requirements.

[0146] Figure 11 This is a schematic diagram of the first stretching region provided in the first embodiment of the present invention. The following is in conjunction with... Figure 11 Further explanation of the stretching area.

[0147] In this step, the length of the stretched region is less than half of the cutting width threshold, wherein the length of the stretched region is the dimension of the stretched region along the direction perpendicular to the cutting line.

[0148] Please refer to the above. Figure 4 The cutting line 11 is along the vertical direction in the figure, as shown. Figure 11 As shown, the position of the dotted line represents the cutting line 11, and the direction perpendicular to the cutting line is the horizontal direction in the figure. In the first embodiment, the cutting width threshold is 20 μm, so the length value Y of the first stretching region a is less than 10 μm.

[0149] The width of the stretched region is greater than half the width of the sub-graphic, wherein the width of the stretched region is the dimension of the stretched region along the cutting line direction, and the width of the sub-graphic is the dimension of the sub-graphic along the cutting line direction.

[0150] like Figure 11 As shown, the width Z of the first stretched region a is greater than half the width X of the first sub-shape A, where the width X of the first sub-shape A is... Figure 4 The line width of the graphic 12 to be cut. And, Figure 9 The width of the second stretched region b is also greater than half the width of the second sub-graphic B (i.e., Figure 4 (The line width of the graphic 12 to be cut in the image).

[0151] In some embodiments, when the width value of the sub-graphic exceeds a certain line width value, it is not required that the width value of the stretched region be less than half the width value of the sub-graphic.

[0152] For example, if a specific line width value is 100μm, then when the width value of the sub-graphic exceeds 100μm, the width value of the stretched area is not required to be greater than half the width value of the sub-graphic (more than 50μm) to ensure the continuity of the line.

[0153] Furthermore, the stretching area is centrally located at the splicing point of the sub-graphics along the direction of the cutting line.

[0154] In the first embodiment, reference Figure 11 The first stretching region a is symmetrically distributed vertically around the axis Ax of the first sub-graphic A. Figure 9 The second stretching region b is set similarly to the first stretching region a, and is distributed symmetrically along the axis of the second sub-graphic B.

[0155] Exposure offset of the exposure machine is affected by two factors: one is the fluctuation of the hardware precision of the exposure machine itself, and the other is the difference in human operation by the operator.

[0156] From the perspective of the exposure machine's hardware, even after regular calibration, the optical system (such as lens distortion and light source stability) and precision stage (such as X-axis and Y-axis movement accuracy and Z-axis focusing error) will still exhibit slight deviations due to long-term operation. For example, wear on the stage guide rails may cause deviations in the straightness of each movement; changes in ambient temperature may cause thermal expansion and contraction of machine components, thereby altering the exposure center position; and instantaneous fluctuations in light source intensity may indirectly affect the photoresist's photosensitive uniformity, indirectly amplifying the impact of offsets on the pattern. These hardware-level deviations are not fixed in direction or value, but rather exhibit random distribution characteristics, and the offset often fluctuates within a certain range.

[0157] Even more difficult to control are the individual differences in operator technique. During the wafer positioning stage before exposure, operators need to align the wafer with the machine's reference marks. This process relies on the operator's visual judgment of the reference points and manual fine-tuning—inexperienced operators may over-rely on visual observation during alignment, leading to slight deviations in the wafer placement angle. Furthermore, different operators may differ in the details of their execution of the machine calibration steps (such as the pressure applied to calibration tools and the degree of fine-tuning of calibration parameters). These subtle differences in human operation further exacerbate the uncertainty of exposure offset.

[0158] By centering the stretching areas on both sides of the dividing line at the splicing point of their respective sub-patterns along the cutting line direction, the influence of uncertain exposure offset direction can be reduced. Centering ensures that the stretching areas are not biased to one side of the cutting line direction, thus preventing gaps and circuit breaks at the splicing point caused by the stretching area's offset position being opposite to the exposure offset direction. This improves the conductivity of the circuit after splicing exposure, thereby ensuring that the pattern maintains a high degree of accuracy and continuity after splicing.

[0159] Furthermore, centering the stretching areas on both sides of the dividing line at the splicing point of their respective sub-graphics along the cutting line reduces the impact of uncertain exposure offset. If the stretching area is offset along the cutting line, a larger stretching area length is required to ensure overlap of the stretching areas with overlapping exposures; however, centering the stretching area reduces the impact range of the offset by half through symmetrical distribution, improving the flexibility of the circuit layout.

[0160] When setting the length and width values ​​of the stretching area, the initial length and width values ​​of the stretching area are usually set first, and then the size of the stretching area is adjusted according to the exposure offset of the test and the conductivity and continuity of the line after splicing exposure.

[0161] The initial length and initial width values ​​of the stretching region are also set according to the method described above, specifically including: the initial length value of the stretching region is less than half of the cutting width threshold; the initial width value of the stretching region is greater than half of the width value of the sub-graphic; the stretching region is centered at the splicing point of the sub-graphic along the cutting line direction.

[0162] In some embodiments, the stretching region is formed by arranging a plurality of rectangular stretching sub-regions, for example, by arranging two rectangular stretching sub-regions side by side.

[0163] Figure 12 This is a schematic diagram of a stretching region being set relative to each other at the splicing point of the sub-graphics, provided in the third embodiment of the present invention; Figure 13 This is a schematic diagram of a graphic formed after sub-graphics are stitched and exposed, as provided in the third embodiment of the present invention.

[0164] In the third embodiment, as Figure 6 As shown, the cutting line 31 is a broken line, and the cut pattern 32 is cut into a third sub-pattern C and a fourth sub-pattern D by the cutting line 31 in a vertical direction. The third sub-pattern C and the fourth sub-pattern D are distributed on both sides of the cutting line 31.

[0165] like Figure 12As shown, the stretching area set at the splicing point of the third sub-graphic C includes two sub-stretching areas: the third stretching area c1 and the third stretching area c2. The stretching area set opposite to the splicing point of the fourth sub-graphic D includes two sub-stretching areas: the fourth stretching area d1 and the fourth stretching area d2.

[0166] The third stretching region c1 and the third stretching region c2 are both rectangles and are arranged side by side; similarly, the fourth stretching region d1 and the fourth stretching region d2 are also rectangles and are arranged side by side.

[0167] The interval between the stretchable sub-regions corresponding to the same sub-graphic is less than the width value of the stretchable sub-region, and the width value of the stretchable sub-region is the dimension of the sub-stretched region along the cutting line direction.

[0168] Specifically, the interval between the third stretching region c1 and the third stretching region c2 is smaller than the width value L11 of the third stretching region c1 and smaller than the width value L12 of the third stretching region c2; correspondingly, the interval between the fourth stretching region d1 and the fourth stretching region d2 is smaller than the width value L21 of the fourth stretching region d1 and smaller than the width value L22 of the fourth stretching region d2.

[0169] To reduce the impact of uncertainties in the direction and amount of exposure offset and improve the conductivity of the circuit after splicing exposure, in the third embodiment, the width values ​​L11 of the third stretching region c1, L12 of the third stretching region c2, L21 of the fourth stretching region d1, and L22 of the fourth stretching region d2 are all the same.

[0170] The interval between the third stretching region c1 and the third stretching region c2 is less than one-third of the width value L11 of the third stretching region c1, and the interval between the fourth stretching region d1 and the fourth stretching region d2 is less than one-third of the width value L21 of the fourth stretching region d1.

[0171] The image formed by splicing and exposing the third sub-graphic C and the fourth sub-graphic D is as follows: Figure 13As shown, the distance between the two dotted lines is the exposure offset. The width D2 of the stretching merged area formed after the four stretching sub-regions c1, c2, d1, and d2 overlap and are exposed is more than half the width of the cut pattern 31 (i.e., the width of the third sub-pattern C or the width of the fourth sub-pattern D). This can compensate for the offset between the third sub-pattern C and the fourth sub-pattern D and improve the conductivity of the circuit after splicing exposure.

[0172] The cut graphic is cut into sub-graphics by the cutting line. The sub-graphics are distributed on both sides of the cutting line. In most cases, the stretching areas set at the splicing points of the sub-graphics on both sides have the same shape and size, which can reduce the influence of the uncertainty of the direction and amount of exposure offset.

[0173] In some embodiments, if the direction of the exposure offset of the exposure machine is relatively fixed or the amount of offset is relatively stable, then the shape or size of the stretching area set at the splicing point of the sub-patterns on both sides of the cutting line can be set differently as needed to improve the performance of the product.

[0174] The cutting line divides the cut graphic into sub-graphics. In order to ensure that the cut graphic can be easily stretched after cutting, the present invention adopts a specific cutting method to form the cutting line.

[0175] When forming the cutting lines of the segmented chip, the path of the cutting line can be selected as a straight line or a polyline. Due to their geometric characteristics, straight lines or polylines can not only reduce the computational complexity in graphic stretching, but are also suitable for scenarios where specific circuit areas need to be avoided.

[0176] By controlling the width of the cutting line to be greater than or equal to the cutting width threshold, it is ensured that the graphic can maintain good shape and dimensional stability after cutting and stretching.

[0177] By setting the avoidance area of ​​the cutting line, not only can the interference of cutting on adjacent components be reduced, but the cut pattern can also be easily stretched after cutting.

[0178] For the cut pattern that is cut into sub-patterns by the cutting line, a stretching area is set at the splicing point of the sub-patterns to reduce the impact on the packaging structure caused by the misalignment of the packaging structure due to exposure offset, and to ensure that the pattern can still maintain good shape and dimensional stability after cutting and stretching, thereby improving the accuracy and reliability of packaging design.

[0179] Based on the same inventive concept, this application also provides a method for exposing large-size chips.

[0180] The large-size chip exposure method includes: step S21, cutting the chip to be exposed into multiple spliced ​​chip blocks using the improved chip exposure method, wherein each spliced ​​chip block includes a stretching area set at the splicing point of the sub-patterns of the cut pattern; step S22, fabricating a mask for each spliced ​​chip block; and step S23, sequentially placing each mask at the target exposure position of the corresponding spliced ​​chip block and exposing it.

[0181] In this embodiment, the large-size chip is an interposer chip, and its size is often greater than 50.0×50.0mm².

[0182] Regarding step S21, the chip to be exposed is cut into multiple spliced ​​chip blocks using the method described above. Each spliced ​​chip block includes a stretching area set at the splicing point of the sub-graphics of the cut pattern.

[0183] The splicing chip blocks are divided by cutting lines.

[0184] The method for setting the cutting line includes: selecting the path of the cutting line as a straight line or a polyline; setting the width of the cutting line to be greater than or equal to a cutting width threshold; and setting the avoidance area of ​​the cutting line.

[0185] For details on the specific technical functions of the method for improving chip exposure, please refer to the relevant description above, which will not be repeated here.

[0186] The size of each of the spliced ​​chip blocks plus the size of the corresponding stretching area is less than the maximum step range of the exposure machine.

[0187] For example, in the first embodiment, the maximum stepping range of the exposure machine is 44.0 × 44.0 mm² or 33.0 × 53.5 mm², then combined with Figure 4 and Figure 8 The size of the first splicing chip block 15 plus the first stretching area A is smaller than the maximum stepping range of the exposure machine. Similarly, the size of the second splicing chip block 16 plus the second stretching area B is also smaller than the maximum stepping range of the exposure machine.

[0188] Regarding step S22, a mask is created for each of the stitched chip blocks. Step S22 creates a dedicated mask for each stitched chip block, ensuring that the mask pattern is perfectly adapted to the stitched chip block (including the stretched area), providing a graphic template for accurate exposure.

[0189] During the mask creation process, each mask is labeled with a unique identifier (such as block number and stretching area position) to facilitate quick matching of the corresponding splicing chip blocks during subsequent exposure and avoid confusion.

[0190] Regarding step S23, each of the aforementioned photomasks is placed sequentially at the target exposure position of the corresponding splicing chip block and exposed.

[0191] Step S23 further includes: (1) Precise positioning: Load the mask with the corresponding mark onto the mask stage of the exposure machine, and adjust the position of the mask through the mask alignment system so that the reference mark of the mask pattern is aligned with the reference mark of the wafer on the worktable.

[0192] (2) Mask matching: Move the mask of the splicing chip block to be exposed to the center of the exposure field of view. At this time, the pattern (including the stretching area) on the mask must correspond completely with the pattern of the target exposure position of the splicing chip block.

[0193] (3) Perform the exposure procedure.

[0194] In this process, positioning marks on the graphic are used to achieve graphic alignment, so as to ensure the positional accuracy of the mask and the wafer graphic. The positioning marks are preset matrix or cross-shaped patterns.

[0195] Multiple exposures are performed using a stepper or scanner lithography machine, and the mask position needs to be recalibrated after each exposure. If an offset is found (such as insufficient overlap in the stretched area at the splicing point), the exposure position of the next block needs to be adjusted in time to compensate for the current offset. After all blocks have been exposed, a global inspection of the splicing points of the entire chip is also required to confirm the continuity of the circuit and the integrity of the pattern, ensuring that there are no disconnections or short circuits caused by exposure offset.

[0196] The above method addresses the core issue of the mismatch between large-size designs and the exposure capabilities of exposure equipment. By dividing the large-size design, which exceeds the capacity of the exposure equipment, into multiple smaller parts, the incompatibility can be directly resolved. For complex wiring designs, segmented exposure after division allows for more precise control of exposure parameters, effectively improving exposure accuracy and ensuring the quality of the final product.

[0197] When forming the dicing lines for the segmented chip, the method for improving chip exposure used in this approach simplifies the stretching calculation of the pattern by selecting the path of the dicing line as a straight line or a broken line; by controlling the width of the dicing line to be greater than or equal to the dicing width threshold, it ensures that the pattern maintains good shape and dimensional stability after cutting and stretching; by setting the avoidance area of ​​the dicing line, it ensures that the cut pattern can be easily stretched after cutting; for the cut pattern that is cut into sub-patterns by the dicing line, a stretching area is set at the splicing point of the sub-patterns to reduce the impact of exposure offset on the packaging structure, ensuring that the pattern maintains good shape and dimensional stability after cutting and stretching, thereby improving the accuracy and reliability of the packaging design.

[0198] Meanwhile, cutting and exposure simplifies the overall process, reduces complex operating steps, and lowers the difficulty of process implementation and production costs. It also allows for precise control of the exposure area, avoiding unnecessary material loss and time waste. Furthermore, stretching the traces after cutting reduces the impact of exposure machine offset, minimizing errors and losses caused by offset, thereby improving production efficiency and product yield. It also ensures the normal operation of the circuitry after cutting, ensuring that product performance fully meets design requirements.

[0199] It should be noted that references to "an embodiment," "an embodiment," "an exemplary embodiment," "some embodiments," etc., in the specification indicate that the described embodiments may include specific features, structures, or characteristics, but each embodiment may not necessarily include that specific feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. In addition, when a specific feature, structure, or characteristic is described in connection with an embodiment, whether explicitly described or not, implementing such a feature, structure, or characteristic in conjunction with other embodiments is within the knowledge of those skilled in the art.

[0200] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion. The various embodiments in this specification are described in a related manner, and similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments.

[0201] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for improving chip exposure, characterized in that, include: Setting the cutting line for segmenting the chip to be exposed includes: selecting the path of the cutting line as a straight line or a broken line; setting the width of the cutting line to be greater than or equal to a cutting width threshold; and setting the avoidance area of ​​the cutting line. For a cut graphic that is cut into sub-graphics by the cutting line, a stretching area is provided at the splicing point of the sub-graphics.

2. The method according to claim 1, characterized in that, When the path of the cutting line is a straight line, the cutting line extends in a horizontal or vertical direction.

3. The method according to claim 1, characterized in that, When the path of the cutting line is a broken line, each bend of the cutting line is 90°.

4. The method according to claim 1, characterized in that, When there is a risk of intersection between the path of the cutting line and the diagonal line, the path of the cutting line is adjusted to a broken line, and each bend of the cutting line is set to 90° to bypass the diagonal line.

5. The method according to claim 3, characterized in that, When the path of the cutting line is a broken line, each segment of the cutting line extends in a horizontal or vertical direction.

6. The method according to claim 1, characterized in that, In the step of setting the cutting lines for dividing the chip to be exposed, a region with low pattern density is selected as the region where the cutting lines are located.

7. The method according to claim 1, characterized in that, When the path of the cutting line is a broken line, the path of the cutting line is adjusted so that the bend of the cutting line avoids the cut shape.

8. The method according to claim 1, characterized in that, When the path of the cutting line is a polyline, the length of each polyline segment of the cutting line is greater than the cutting length threshold.

9. The method according to claim 8, characterized in that, The cutting length threshold is greater than the cutting width threshold.

10. The method according to claim 9, characterized in that, The cutting length threshold is 1.2 to 1.5 times the cutting width threshold.

11. The method according to claim 1, characterized in that, The cutting width threshold is greater than twice the exposure offset of the exposure machine.

12. The method according to claim 1, characterized in that, The cutting width threshold is greater than 10 μm.

13. The method according to claim 1, characterized in that, The avoidance area includes graphics with a size smaller than the cutting width threshold.

14. The method according to claim 1, characterized in that, The avoidance area includes a shape whose size is smaller than the width of the cutting line.

15. The method according to claim 1, characterized in that, The avoidance area includes irregular shapes.

16. The method according to claim 15, characterized in that, The irregular shapes include circles and ellipses.

17. The method according to claim 1, characterized in that, The avoidance area includes diagonal lines and curves.

18. The method according to claim 1, characterized in that, The nearest distance between the cutting line and the avoidance area is greater than or equal to the safe distance.

19. The method according to claim 18, characterized in that, The avoidance area includes vents and copper foil.

20. The method according to claim 19, characterized in that, The distance between each vent and the cutting line is greater than or equal to the safety distance.

21. The method according to claim 1, characterized in that, The stretching area is the stretching of the sub-graphic towards the dividing line.

22. The method according to claim 1, characterized in that, The cut shape is divided into two sub-shapes by the cutting line, and the two sub-shapes are located on both sides of the cutting line.

23. The method according to claim 1, characterized in that, When the sub-graphics of the cut graphic are spliced ​​together, there is an overlapping area between the stretching areas set opposite to each other at the splicing point of the sub-graphics.

24. The method according to claim 1, characterized in that, The shape of the stretching region is rectangular.

25. The method according to claim 24, characterized in that, The length of the stretching region is less than half of the cutting width threshold, and the length of the stretching region is the dimension of the stretching region along the direction perpendicular to the cutting line.

26. The method according to claim 24, characterized in that, The width of the stretched region is greater than half the width of the sub-graphic. The width of the stretched region is the dimension of the stretched region along the cutting line direction, and the width of the sub-graphic is the dimension of the sub-graphic along the cutting line direction.

27. The method according to claim 24, characterized in that, The stretching area is centered along the cutting line at the junction of the sub-graphics.

28. The method according to claim 24, characterized in that, Set the initial length and initial width values ​​of the stretching region, and adjust the length and width values ​​of the stretching region according to the exposure offset of the test.

29. The method according to claim 24, characterized in that, The stretching region is composed of multiple stretching sub-regions arranged in a rectangular shape.

30. The method according to claim 29, characterized in that, The interval between the stretchable sub-regions corresponding to the same sub-graphic is less than the width value of the stretchable sub-region, and the width value of the stretchable sub-region is the dimension of the sub-stretched region along the cutting line direction.

31. The method according to claim 1, characterized in that, By overlapping the exposure of the relatively set stretching regions, the width of the merged stretching region formed by merging the two stretching regions is made close to the width of the sub-graphic.

32. A method for exposing large-size chips, characterized in that, include: The method for improving chip exposure according to any one of claims 1 to 31 is used to cut the chip to be exposed into multiple spliced ​​chip blocks, wherein the spliced ​​chip blocks include stretching areas set at the splicing points of the sub-patterns of the cut pattern; A mask is made for each of the assembled chip blocks; Each of the aforementioned photomasks is placed sequentially at the target exposure position of the corresponding splicing chip block and then exposed.

33. The method according to claim 32, characterized in that, The size of each spliced ​​chip block plus the size of the corresponding stretching area is less than the maximum stepping range of the exposure machine.