3D vertical interconnection power module manufacturing method and power module

Abstract

The invention discloses a 3D vertical interconnection power module manufacturing method and a power module, and belongs to the technical field of semiconductors, and the method comprises the steps: preparing a three-dimensional interconnection frame prefabricated body of three-dimensional interconnection according to an electrothermal simulation result; the method comprises the following steps: preprocessing a substrate, and mounting a SiC MOSFET chip on the substrate through a chip mounter to form a chip substrate mounting body; integrating the three-dimensional interconnection frame prefabricated body, the chip substrate mounting body and a PCB (Printed Circuit Board) to form a primary 3D vertical interconnection power module; and performing circuit forming and system integration on the preliminary 3D vertical interconnection power module to obtain a target 3D vertical interconnection power module. Technical effects of high-efficiency heat dissipation, improvement of reliability of the power module, improvement of independence of a current monitoring path and the like can be realized.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and specifically relates to a method for fabricating a 3D vertical interconnect power module and the power module thereof. Background Technology

[0002] As power electronic systems evolve towards higher power density, higher switching frequency, and higher reliability, power modules, as core components (especially those based on wide-bandgap semiconductors such as SiC and IGBTs), face severe challenges. Traditional power module packaging architectures and processes are gradually revealing bottlenecks in terms of heat management, electrical performance, reliability, and manufacturability, making it difficult to meet the demands of next-generation applications.

[0003] To address the aforementioned issues, this application proposes a method for fabricating a 3D vertical interconnect power module and a power module thereof. Summary of the Invention

[0004] To address the shortcomings of the prior art, this application provides a method for manufacturing a 3D vertical interconnect power module and a power module, which solves the problems of heat dissipation bottleneck, difficulty in optimizing stray parameters, insufficient electrical reliability and low system integration in the prior art.

[0005] The technical effect to be achieved in this application is accomplished through the following solution: In a first aspect, this application provides a method for fabricating a 3D vertical interconnect power module, including: Based on the electrothermal simulation results, a three-dimensional interconnection framework prefabricated body was fabricated. The substrate is pre-treated, and the SiC MOSFET chip is mounted onto the substrate using a chip mounter to form a chip substrate mount body. The three-dimensional interconnect framework prefabricated body, the chip substrate mounting body and the PCB board are integrated to form a preliminary 3D vertical interconnect power module; The preliminary 3D vertical interconnect power module is then subjected to circuit shaping and system integration to obtain the target 3D vertical interconnect power module.

[0006] In some embodiments, the step of fabricating a three-dimensional interconnect frame prefabricated structure based on electrothermal simulation results includes: Based on electromagnetic and thermal field simulation results, the geometry of the three-dimensional interconnect frame prefabrication is designed to ensure the shortest and most symmetrical power loop path, and to reserve a dedicated channel for gate drive signals. A preliminary three-dimensional interconnect framework prefabrication was obtained by processing an oxygen-free copper plate with a thickness of 1.5 mm using photolithography and etching. Using vacuum injection molding, epoxy molding compound is used to encapsulate the supporting structure and non-connection areas of the preliminary three-dimensional interconnect frame preform, exposing only the top of the copper pillars that require electrical connection and the terminal welding surface, thus obtaining the three-dimensional interconnect frame preform.

[0007] In some embodiments, the pretreatment of the substrate includes: Silver sintering paste is printed onto predetermined locations on the substrate using a dispensing device.

[0008] In some embodiments, the process after forming the chip substrate mount and before obtaining the target 3D vertical interconnect power module includes: The chip substrate mount is fed into a vacuum sintering furnace and sintered at 250°C, 10MPa, and under nitrogen protection, and held at the temperature and pressure for 5 minutes.

[0009] In some embodiments, before performing circuit shaping and system integration on the preliminary 3D vertical interconnect power module to obtain the target 3D vertical interconnect power module, the following steps are included: The preliminary 3D vertical interconnect power module is placed in a vacuum hot press; The preliminary 3D vertical interconnect power module is cured using the first process parameters, so that the bottom of the copper pillars on the three-dimensional interconnect frame preform in the preliminary 3D vertical interconnect power module is eutectic connected with the source pad and gate pad of the chip, and at the same time, the three-dimensional interconnect frame preform is bonded and cured to the PCB under high temperature and high pressure.

[0010] In some embodiments, the first process parameters are set as follows: temperature 200°C, pressure 3MPa, vacuum degree ≤10Pa, and pressure holding time 60 minutes.

[0011] In some embodiments, the step of performing circuit shaping and system integration on the preliminary 3D vertical interconnect power module to obtain the target 3D vertical interconnect power module includes: Micro-holes are drilled on the PCB board using lasers, and electroplating is used to fill the holes to achieve vertical interconnection between the PCB board's circuitry and the signal terminals of the lower frame. A complete driving circuit is formed by mounting the gate driver IC, decoupling capacitor, and resistor on the PCB using surface mount technology. The target 3D vertical interconnect power module was obtained by installing a metal casing and heat sink and conducting airtightness testing.

[0012] In some embodiments, after obtaining the target 3D vertical interconnect power module, the method further includes: Perform dual-pulse testing (DPT) and static parameter testing on the target 3D vertical interconnect power module.

[0013] Secondly, this application discloses a 3D vertical interconnect power module, which is fabricated using the steps of claims 1-8, and the 3D vertical interconnect power module comprises: Three-dimensional interconnect framework prefabrication, chip substrate mounting body and PCB board.

[0014] In some embodiments, the three-dimensional interconnect framework prefabricated body includes: Multiple copper pillars for connecting the chip source, a planar structure for connecting the DC bus and AC output terminals, and an insulating frame that supports the entire structure.

[0015] The 3D vertical interconnect power module manufacturing method and power module provided in this application embodiment take "three-dimensional wiring" as the core and "prefabricated lamination integration" as the manufacturing means to achieve the goal of "co-optimization of electrical-thermal-mechanical performance" in high-performance power module packaging, and achieve technical effects such as efficient heat dissipation, improved power module reliability and improved current monitoring path independence. Attached Figure Description

[0016] To more clearly illustrate the embodiments of this application or the existing technical solutions, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart of a method for fabricating a 3D vertical interconnect power module according to an embodiment of this application; Figure 2 This is a side view of a 3D vertical interconnect power module according to an embodiment of this application; Figure 3 This is an axial view of a 3D vertical interconnect power module according to an embodiment of this application; Figure 4 This is a top view of a 3D vertical interconnect power module according to an embodiment of this application; Figure 5 This is a cross-sectional view of a 3D vertical interconnect power module according to an embodiment of this application; Figure 6 This is an exploded view of a 3D vertical interconnect power module in one embodiment of this application; Figure 7 This is a schematic block diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] It should be noted that, unless otherwise defined, the technical or scientific terms used in one or more embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in one or more embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0020] The technical terms used in this application include “” ESL (Equivalent Series Inductance). IGBT (Insulated Gate Bipolar Transistor). SiC (Silicon Carbide); PCB (Printed Circuit Board); SMT (Surface Mount Technology); DBC (Direct Bonded Copper); AMB (Active Metal Brazing). CTE (Coefficient of Thermal Expansion).

[0021] The technical problems to be solved by this invention include: 1. Solving the problems of single heat dissipation path and uneven heat distribution: In view of the shortcomings of traditional single-sided or two-dimensional heat dissipation modes, such as low efficiency, excessive chip junction temperature and uneven temperature distribution, this invention aims to provide a structure and method for three-dimensional efficient collaborative heat dissipation, which significantly improves the heat dissipation capacity and thermal uniformity of the module to meet the needs of high power density applications.

[0022] 2. Overcoming electrical performance bottlenecks caused by large and asymmetrical stray parameters: Addressing the problems of excessive and asymmetrical parasitic inductance and resistance introduced by traditional wire bonding or planar interconnects, which lead to increased switching losses, voltage spikes and oscillations, and dynamic uneven current in parallel chips, this invention aims to achieve extremely low and highly symmetrical stray parameter distribution through three-dimensional vertical interconnect and symmetrical layout design, especially optimizing the gate circuit and power circuit to support high-frequency and high-efficiency switching operations.

[0023] 3. Improve the reliability of electrical connections and the long-term stability of modules: In response to the reliability weaknesses such as easy fatigue fracture of bonding wires and easy failure of solder joints, this invention aims to replace or partially replace traditional wire bonding with a highly reliable vertical interconnect structure (such as copper pillars through sintering or welding), reduce connection failures caused by thermomechanical stress, and enhance the working life of modules in harsh environments.

[0024] 4. Achieving high integration of drive and power, simplifying system architecture: In response to the problems of existing modules typically requiring external drive boards, having complex layouts, and being bulky, this invention aims to utilize the space provided by the three-dimensional structure to directly integrate the gate drive and protection circuits into the circuit layer above the module, achieving "chip-drive" integration, shortening the drive loop, and improving system power density and signal integrity.

[0025] 5. Achieve separation of the current path between the power circuit and the drive signal detection: Establish an independent dedicated lead layer and connection channel for the detection circuit, so that it forms a natural electromagnetic shielding isolation zone with the power conductor, avoiding drive voltage distortion (false turn-on, turn-off delay, etc.).

[0026] 6. Improved Manufacturability and Consistency: Addressing the shortcomings of traditional packaging processes, such as complex steps, high reliance on manual labor, and difficulty in ensuring consistency, this invention aims to provide a module structure more suitable for automated, high-precision manufacturing. By reducing or standardizing interconnect process steps (e.g., using batch-processable vertical interconnects), production efficiency and yield are improved, and manufacturing costs are reduced.

[0027] Therefore, the 3D vertical interconnect power module fabrication method and power module provided in this application are required.

[0028] This application can be broken down into the following four levels of synergy: 1. Three-dimensional interconnected architecture A three-dimensional spatial layout is adopted to replace the traditional two-dimensional planar wiring, and the current path is distributed in three dimensions through a precision-machined metal frame structure.

[0029] This architecture makes full use of vertical and horizontal space, significantly shortening the current path and creating the basic conditions for reducing parasitic parameters.

[0030] 2. Laminated integrated manufacturing process An innovative lamination integration process is adopted between a prefabricated interconnect framework and a PCB substrate. The pre-fabricated three-dimensional interconnect framework is used as the core component and is integrated with a multilayer circuit board in one step through a vacuum hot pressing process to form an integral package structure.

[0031] 3. Multiphysics Collaborative Design Electrical performance optimization: Physical separation of control circuit and power circuit is achieved through three-dimensional wiring to reduce signal crosstalk; symmetrical layout is adopted to ensure the consistency of parallel chip parameters.

[0032] Thermal management innovation: Utilizing the metal frame itself as a heat conduction channel to establish an efficient two-way heat dissipation path.

[0033] Structural reliability: The monolithic laminated structure reduces the number of interfaces, improving mechanical strength and temperature cycle life.

[0034] 4. System-level integration solution By integrating drive and protection circuits on the basis of a three-dimensional interconnection framework, the power devices and drive circuits are deeply integrated, which greatly improves the system integration and power density.

[0035] The various non-limiting embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0036] First, refer to Figure 1 The method for fabricating the 3D vertical interconnect power module of this application is described in detail below: In a first aspect, this application provides a method for fabricating a 3D vertical interconnect power module, including: S1: Based on the electrothermal simulation results, fabricate a three-dimensional interconnected framework prefabricated body; S2: The substrate is pre-treated, and the SiC MOSFET chip is mounted onto the substrate using a chip mounter to form a chip substrate mount body; S3: Integrate the three-dimensional interconnect frame prefabricated body, the chip substrate mounting body and the PCB board to form a preliminary 3D vertical interconnect power module; S4: Perform circuit shaping and system integration on the preliminary 3D vertical interconnect power module to obtain the target 3D vertical interconnect power module (see...). Figure 2 ).

[0037] in Figure 3 , Figure 4 as well as Figure 5 The following are shown: an axial view, a top view, and a sectional view of the 3D vertical interconnect power module of this application.

[0038] The method described in this application can achieve technical effects such as efficient heat dissipation, improved power module reliability, and enhanced independence of current monitoring paths.

[0039] For example, there can be multiple SiC MOSFET chips, such as those with a specification of 1200V / 200A, serving as the upper and lower transistors of the power module.

[0040] For example, the main body of the three-dimensional interconnect framework prefabrication is formed by precision etching of oxygen-free copper, with an overall thickness of 0.1 mm and a copper pillar diameter of 0.1 mm at key connection points. For example, the top-layer circuit board (PCB) is a multilayer PCB made of high-temperature FR-4 material, used to integrate driver chips and passive components.

[0041] In some embodiments, the step of fabricating a three-dimensional interconnect frame prefabricated structure based on electrothermal simulation results includes: Based on electromagnetic and thermal field simulation results, the geometry of the three-dimensional interconnect frame prefabrication is designed to ensure the shortest and most symmetrical power loop path, and to reserve a dedicated channel for gate drive signals. A preliminary three-dimensional interconnect framework prefabrication was obtained by processing an oxygen-free copper plate with a thickness of 15 μm using photolithography etching process, ensuring dimensional accuracy of ±15 μm.

[0042] Using vacuum injection molding, epoxy molding compound is used to encapsulate the supporting structure and non-connection areas of the preliminary three-dimensional interconnect frame preform, exposing only the top of the copper pillars that require electrical connection and the terminal welding surface, thus obtaining the three-dimensional interconnect frame preform.

[0043] For example, when the three-dimensional interconnect framework preform and the chip substrate mount are integrated, they can be aligned at the micrometer level.

[0044] In some embodiments, the pretreatment of the substrate includes: Silver sintering paste is printed onto predetermined locations on the substrate using a dispensing device.

[0045] For example, the substrate surface can be cleaned and activated before printing, wherein the substrate can be a DBC / AMB ceramic substrate.

[0046] In some embodiments, the process after forming the chip substrate mount and before obtaining the target 3D vertical interconnect power module includes: The chip substrate mount is fed into a vacuum sintering furnace and sintered at 250°C, 10MPa, and under nitrogen protection, and held at the temperature and pressure for 5 minutes.

[0047] In some embodiments, before performing circuit shaping and system integration on the preliminary 3D vertical interconnect power module to obtain the target 3D vertical interconnect power module, the following steps are included: The preliminary 3D vertical interconnect power module is placed in a vacuum hot press; The preliminary 3D vertical interconnect power module is cured using the first process parameters, so that the bottom of the copper pillars on the three-dimensional interconnect frame preform in the preliminary 3D vertical interconnect power module is eutectic connected with the source pad and gate pad of the chip, and at the same time, the three-dimensional interconnect frame preform is bonded and cured to the PCB under high temperature and high pressure.

[0048] In some embodiments, the first process parameters are set as follows: temperature 200°C, pressure 3MPa, vacuum degree ≤10Pa, and pressure holding time 60 minutes.

[0049] For example, the above process parameters can also be set to the following ranges: temperature: 180-220℃, pressure range: 2-4MPa, vacuum environment: ≤10Pa, pressure holding time: 30-90 minutes.

[0050] In some embodiments, the step of performing circuit shaping and system integration on the preliminary 3D vertical interconnect power module to obtain the target 3D vertical interconnect power module includes: Micro-holes are drilled on the PCB board using lasers, and electroplating is used to fill the holes to achieve vertical interconnection between the PCB board's circuitry and the signal terminals of the lower frame. A complete driving circuit is formed by mounting the gate driver IC, decoupling capacitor, and resistor on the PCB using surface mount technology. The target 3D vertical interconnect power module was obtained by installing a metal casing and heat sink and conducting airtightness testing.

[0051] In some embodiments, after obtaining the target 3D vertical interconnect power module, the method further includes: Perform dual-pulse testing (DPT) and static parameter testing on the target 3D vertical interconnect power module.

[0052] Secondly, this application discloses a 3D vertical interconnect power module, which is fabricated using the steps of claims 1-8, and the 3D vertical interconnect power module comprises: Three-dimensional interconnect framework prefabrication, chip substrate mounting body and PCB board.

[0053] In some embodiments, the three-dimensional interconnect framework prefabricated body includes: Multiple copper pillars for connecting the chip source, a planar structure for connecting the DC bus (P, N) and AC output terminals, and an insulating frame supporting the entire structure.

[0054] Appendix Figure 6 An exploded view of a 3D vertical interconnect power module is shown, which can be seen to include the following components: a lower ceramic substrate, an upper copper layer, a lower copper layer; a power chip, power copper pillars, signal copper pillars, embedded power layer 1 and embedded power layer 2, embedded signal layer; and a PCB.

[0055] The aforementioned 3D vertical interconnect power module can achieve all the technical effects of the 3D vertical interconnect power module manufacturing method, which will not be elaborated here.

[0056] This application achieves significant improvements in several key technical indicators through an innovative three-dimensional interconnected framework design and lamination integration process. The technical effects of this patent are explained in detail below from four dimensions: electrical performance, thermal management, reliability, and system-level efficiency, combining theoretical analysis and verifiable experimental results.

[0057] 1. Breakthrough improvement in electrical performance (1) Extremely low parasitic inductance and switching loss Mechanism of action: Three-dimensional wiring transforms the traditional planar extended current path into a compact vertical superimposed path, greatly reducing the enclosing area of ​​the power loop. By arranging the current's starting and returning paths closely side by side in space, the mutual inductance effect cancels out self-inductance, thereby significantly reducing the total loop inductance.

[0058] Expected / Comparable Data: Based on electromagnetic field simulation software analysis, the power circuit parasitic inductance of the module using this patented structure can be reduced to below 2.5 nH. Compared to traditional wire bonding modules (typically >10 nH) and copper interconnect modules (~5-10 nH), the inductance reduction can reach over 75%.

[0059] Direct benefits: As shown in the formula ΔV = L × di / dt, the sharp reduction in inductance directly means that voltage overshoot (surge voltage) during the switching process is significantly suppressed. Simulation and double-pulse test (DPT) results confirm that, under the same high-speed switching conditions (di / dt), surge voltage can be reduced by 70% to 80%. This allows the chip to operate safely and reliably closer to its rated voltage, or allows for the use of higher switching speeds to further improve efficiency.

[0060] Significantly reduced switching losses: Suppression of surge voltage and reduction of loop inductance directly reduce the voltage-current overlap region during switching, thereby significantly reducing switching losses. Simulation comparisons show that this structure can achieve up to 30% reduction in switching losses compared to the traditional copper sheet structure. This is crucial for improving the efficiency and reducing the heat dissipation burden of high-frequency SiC / Gan devices.

[0061] 2. Excellent signal integrity Mechanism of operation: This structure physically isolates the sensitive gate drive circuit from the high-interference power circuit in three-dimensional space and connects them through a dedicated low-inductance path within the prefabricated frame, which greatly reduces signal crosstalk caused by coupling capacitance and mutual inductance.

[0062] Expected results: The gate voltage waveform is clearer, ringing is effectively suppressed, and the increased switching losses or even device damage caused by mis-conduction can be avoided, laying the foundation for higher frequency and more reliable gate drive.

[0063] 3. A leap forward in thermal management capabilities (1) Highly efficient bidirectional heat dissipation and lower thermal resistance Mechanism of action: The three-dimensional interconnect prefabricated structure (copper pillars and supporting structure) not only conducts electricity but also acts as a highly efficient "heat-conducting pillar," establishing a low thermal resistance path for heat transfer from the chip to the top heat sink. This contrasts sharply with traditional modules that can only dissipate heat on one side through the bottom substrate, achieving coordinated bidirectional heat dissipation through the "bottom substrate + top frame."

[0064] Expected / Comparable Data: Thermal simulation and actual temperature measurements confirm that, under the same power consumption, the chip's junction temperature can be reduced by 15-25°C. The overall thermal resistance of the module is expected to be reduced by more than 30%.

[0065] Direct benefits: Lower junction temperature directly improves the module's current-carrying capacity. Under the same maximum junction temperature limit, the module can carry a higher rated current. Alternatively, at the same current, a lower junction temperature means longer device life and higher reliability.

[0066] (2) Excellent current carrying capacity and power density Mechanism of action: The prefabricated frame uses thickened conductors (such as thick copper), whose cross-sectional area is significantly larger than that of traditional bonding wires or thin-layer PCB traces, thereby effectively reducing the ohmic resistance of the conductor and suppressing the Joule heating effect under high current.

[0067] Expected / Comparable Data: Calculations show that when carrying a rated current of 1000A, the temperature rise of the internal interconnects in this patented structure can be controlled below 150°C, which is 40% (or more than 50°C) lower than the initial 3D wiring scheme (temperature rise can reach 250°C). This ensures the long-term reliability of the interconnect structure at high temperatures.

[0068] Direct benefits: The three-dimensional structure makes full use of vertical space, allowing for the placement of more chips or a more compact layout on the same base plate area. Compared to traditional structures, this patented technology can double the power density, or increase the current carrying capacity to 1.5 times that of traditional 3D wiring within the same size.

[0069] 4. A qualitative leap in reliability and mechanical robustness Mechanism of action: The monolithic structure formed by the lamination process eliminates multiple mechanical interfaces such as bonding lines and solder joints. The thermal fatigue resistance of rigid interconnects such as copper pillars is far superior to that of aluminum / copper bonding lines. The stress caused by CTE mismatch between materials is better distributed and absorbed through the overall structure.

[0070] Expected results: Power cycling capability (e.g., ΔTj = 100°C) is improved by an order of magnitude compared to traditional wire-bonded modules. The module's stability under mechanical vibration and shock conditions is also significantly enhanced. This structure fundamentally solves common failure modes in traditional packaging, such as wire detachment and solder fatigue.

[0071] 5. Comprehensive optimization of system-level performance and manufacturability Driver integration and system simplification: The top PCB layer provides an ideal platform for integrating gate drivers, current sensors, and passive components, forming a highly integrated system-in-package. This significantly shortens the gate loop, reduces external system connections, and lowers cost and size.

[0072] Production consistency and yield: The mass precision manufacturing and automated lamination process of prefabricated frames reduces manual intervention and complex multi-step assembly in traditional packaging, which helps to improve product consistency and production yield, meeting the needs of large-scale industrial production.

[0073] It should be noted that the methods of one or more embodiments of this application can be executed by a single device, such as a computer or server. The methods of this embodiment can also be applied in a distributed scenario, where multiple devices cooperate to complete the process. In such a distributed scenario, one of these devices may execute only one or more steps of the methods of one or more embodiments of this application, and the multiple devices will interact with each other to complete the method described.

[0074] It should be noted that the above description describes specific embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps described in the claims may be performed in a different order than that shown in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0075] Based on the same inventive concept, and corresponding to the methods of any of the above embodiments, this application also discloses an electronic device; Specifically, Figure 7 The present embodiment provides a hardware structure diagram of an electronic device using a 3D vertical interconnect power module fabrication method. The device may include: a processor 410, a memory 420, an input / output interface 430, a communication interface 440, and a bus 450. The processor 410, memory 420, input / output interface 430, and communication interface 440 are interconnected internally via the bus 450.

[0076] The processor 410 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0077] The memory 420 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 420 can store the operating system and other applications. When the technical solutions provided in the embodiments of this application are implemented by software or firmware, the relevant program code is stored in the memory 420 and is called and executed by the processor 410.

[0078] Input / output interface 430 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components in the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touch screens, microphones, various sensors, etc., and output devices may include displays, speakers, vibrators, indicator lights, etc.

[0079] The communication interface 440 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (e.g., USB, Ethernet cable, etc.) or wireless means (e.g., mobile network, WIFI, Bluetooth, etc.).

[0080] Bus 450 includes a pathway for transmitting information between various components of the device, such as processor 410, memory 420, input / output interface 430, and communication interface 440.

[0081] It should be noted that although the above-described device only shows the processor 410, memory 420, input / output interface 430, communication interface 440, and bus 450, in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the embodiments of this application, and not necessarily all the components shown in the figures.

[0082] The electronic devices described above are used to implement the corresponding 3D vertical interconnect power module manufacturing method in any of the foregoing embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0083] Based on the same inventive concept, corresponding to any of the above embodiments, one or more embodiments of this application also provide a computer-readable storage medium storing computer instructions for causing the computer to execute the 3D vertical interconnect power module fabrication method as described in any of the above embodiments.

[0084] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0085] The computer instructions stored in the storage medium of the above embodiments are used to cause the computer to execute the 3D vertical interconnect power module manufacturing method as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0086] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this application (including the claims) is limited to these examples; within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of one or more embodiments of this application as described above, which are not provided in the details for the sake of brevity.

[0087] Additionally, to simplify the description and discussion, and to avoid obscuring one or more embodiments of this application, the well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring one or more embodiments of this application, and this also takes into account the fact that the details of implementation of these block diagram apparatuses are highly dependent on the platform on which one or more embodiments of this application will be implemented (i.e., these details should be fully within the understanding of those skilled in the art). While specific details (e.g., circuits) are set forth to describe exemplary embodiments of this application, it will be apparent to those skilled in the art that one or more embodiments of this application may be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0088] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0089] One or more embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of one or more embodiments of this application should be included within the protection scope of this application.

Claims

1. A method for fabricating a 3D vertical interconnect power module, characterized in that, The method includes: Based on the electrothermal simulation results, a three-dimensional interconnection framework prefabricated body was fabricated. The substrate is pre-treated, and the SiC MOSFET chip is mounted onto the substrate using a chip mounter to form a chip substrate mount body. The three-dimensional interconnect framework prefabricated body, the chip substrate mounting body and the PCB board are integrated to form a preliminary 3D vertical interconnect power module; The preliminary 3D vertical interconnect power module is then subjected to circuit shaping and system integration to obtain the target 3D vertical interconnect power module.

2. The method for fabricating a 3D vertical interconnect power module as described in claim 1, characterized in that, The process of fabricating a three-dimensional interconnected framework prefabricated body based on electrothermal simulation results includes: Based on electromagnetic and thermal field simulation results, the geometry of the three-dimensional interconnect frame prefabrication is designed to ensure the shortest and most symmetrical power loop path, and to reserve a dedicated channel for gate drive signals. A preliminary three-dimensional interconnect framework prefabrication was obtained by processing an oxygen-free copper plate with a thickness of 1.5 mm using photolithography and etching. Using vacuum injection molding, epoxy molding compound is used to encapsulate the supporting structure and non-connection areas of the preliminary three-dimensional interconnect frame preform, exposing only the top of the copper pillars that require electrical connection and the terminal welding surface, thus obtaining the three-dimensional interconnect frame preform.

3. The method for fabricating a 3D vertical interconnect power module as described in claim 1 or 2, characterized in that, The pretreatment of the substrate includes: Silver sintering paste is printed onto predetermined locations on the substrate using a dispensing device.

4. The method for fabricating a 3D vertical interconnect power module as described in claim 1, characterized in that, After forming the chip substrate mount and before obtaining the target 3D vertical interconnect power module, the process includes: The chip substrate mount is fed into a vacuum sintering furnace and sintered at 250°C, 10MPa, and under nitrogen protection, and held at the temperature and pressure for 5 minutes.

5. The method for fabricating a 3D vertical interconnect power module as described in claim 1, characterized in that, Before performing circuit shaping and system integration on the preliminary 3D vertical interconnect power module to obtain the target 3D vertical interconnect power module, the process includes: The preliminary 3D vertical interconnect power module is placed in a vacuum hot press; The preliminary 3D vertical interconnect power module is cured using the first process parameters, so that the bottom of the copper pillars on the three-dimensional interconnect frame preform in the preliminary 3D vertical interconnect power module is eutectic connected with the source pad and gate pad of the chip, and at the same time, the three-dimensional interconnect frame preform is bonded and cured to the PCB under high temperature and high pressure.

6. The method for fabricating a 3D vertical interconnect power module as described in claim 5, characterized in that, The first process parameters are set as follows: temperature 200°C, pressure 3MPa, vacuum degree ≤10Pa, and pressure holding time 60 minutes.

7. The method for fabricating a 3D vertical interconnect power module as described in claim 1, characterized in that, The process of circuit shaping and system integration of the preliminary 3D vertical interconnect power module to obtain the target 3D vertical interconnect power module includes: Micro-holes are drilled on the PCB board using lasers, and electroplating is used to fill the holes to achieve vertical interconnection between the PCB board's circuitry and the signal terminals of the lower frame. A complete driving circuit is formed by mounting the gate driver IC, decoupling capacitor, and resistor on the PCB using surface mount technology. The target 3D vertical interconnect power module was obtained by installing a metal casing and heat sink and conducting airtightness testing.

8. The method for fabricating a 3D vertical interconnect power module as described in claim 7, characterized in that, After obtaining the target 3D vertical interconnect power module, the following is also included: Perform dual-pulse testing (DPT) and static parameter testing on the target 3D vertical interconnect power module.

9. A 3D vertical interconnect power module, characterized in that, The 3D vertical interconnect power module is fabricated using the steps of claims 1-8, and the 3D vertical interconnect power module comprises: Three-dimensional interconnect framework prefabrication, chip substrate mounting body and PCB board.

10. The 3D vertical interconnect power module as described in claim 9, characterized in that, The three-dimensional interconnection framework prefabricated body includes: Multiple copper pillars for connecting the chip source, a planar structure for connecting the DC bus and AC output terminals, and an insulating frame that supports the entire structure.

Images