Bidirectional current sensing device, current sensing system including same, and method of operating current sensing system

Abstract

A current sensing device measures a target current flowing through a target transistor connected between a first voltage terminal and a second voltage terminal. The current sensing device includes a sensing transistor circuit including first to fourth transistor circuits, and an operational amplifier connected to the sensing transistor circuit, the first to fourth transistor circuits being electrically connected to the first to fourth transistor circuits when a target current flows in a first direction from a first voltage terminal to a second voltage terminal. The first transistor circuit and the fourth transistor circuit are turned on based on the first gate voltage, the second transistor circuit and the third transistor circuit are turned off based on the second gate voltage, and the first transistor circuit and the fourth transistor circuit are turned off based on the second gate voltage when the target current flows in a second direction opposite to the first direction. And turn on the second transistor circuit and the third transistor circuit based on the first gate voltage.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0146920 filed on October 24, 2024 and Korean Patent Application No. 10-2025-0010099 filed on January 23, 2025, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to current sensing devices, and more specifically, to bidirectional current sensing devices, current sensing systems including bidirectional current sensing devices, and methods for operating current sensing systems. Background Technology

[0004] With the increasing demand for high-performance and long-life semiconductor devices, there is a need to accurately sense the current flowing in transistors in order to detect abnormal currents flowing in the transistors of semiconductor devices or to quickly control abnormal currents.

[0005] In a current sensor, a current flows in the sensing transistor in a specific ratio relative to the current flowing through the target sensing transistor. In this case, the sensing ratio is determined by the ratio of the target sensing transistor to the sensing transistor. However, when the current flowing through the target sensing transistor is measured in both directions, there is a problem that the sensing ratio is not uniform due to the switching transistor that determines the path of the sensing current, as it depends on the input voltage and temperature applied to the target sensing transistor. Summary of the Invention

[0006] Embodiments of this disclosure provide a bidirectional current sensing device, a current sensing system including the same, and a method for operating the current sensing system.

[0007] According to one aspect of this disclosure, a current sensing device for measuring a target current flowing through a target transistor connected between a first voltage terminal and a second voltage terminal is provided. The current sensing device includes: a sensing transistor circuit including a first transistor circuit, a second transistor circuit, a third transistor circuit, and a fourth transistor circuit; and an operational amplifier connected to the sensing transistor circuit, wherein the first transistor circuit is connected between the first voltage terminal and a first input terminal of the operational amplifier, wherein the second transistor circuit is connected between the first voltage terminal and a second input terminal of the operational amplifier, wherein the third transistor circuit is connected between the second voltage terminal and the first input terminal of the operational amplifier, and wherein the fourth transistor circuit is connected between the second voltage terminal and the second input terminal of the operational amplifier, wherein the first transistor circuit and the fourth transistor circuit are turned on based on a first gate voltage based on the target current flowing in a first direction from the first voltage terminal to the second voltage terminal, and the second transistor circuit and the third transistor circuit are turned off based on a second gate voltage, and wherein the first transistor circuit and the fourth transistor circuit are turned off based on a second gate voltage based on the target current flowing in a second direction opposite to the first direction, and the second transistor circuit and the third transistor circuit are turned on based on the first gate voltage.

[0008] According to one aspect of this disclosure, a current sensing system is provided for measuring a target current flowing through a target transistor connected between a first voltage terminal and a second voltage terminal. The current sensing system includes: a current sensing device comprising a sensing transistor circuit and an operational amplifier connected to the sensing transistor circuit; the sensing transistor circuit including a first transistor circuit, a second transistor circuit, a third transistor circuit, and a fourth transistor circuit; and a controller configured to control the current sensing device, wherein the first transistor circuit is connected between the first voltage terminal and a first input terminal of the operational amplifier, wherein the second transistor circuit is connected between the first voltage terminal and a second input terminal of the operational amplifier, wherein the third transistor circuit is connected between the second voltage terminal and the first input terminal of the operational amplifier, and wherein the fourth transistor circuit is connected between the first voltage terminal and a second input terminal of the operational amplifier. Between two voltage terminals and the second input terminal of the operational amplifier, and wherein the controller is further configured to: based on a target current flowing in a first direction from the first voltage terminal to the second voltage terminal, apply a first gate voltage to the first transistor circuit and the fourth transistor circuit to turn on the first transistor circuit and the fourth transistor circuit based on a first mode signal, and apply a second gate voltage to the second transistor circuit and the third transistor circuit to turn off the second transistor circuit and the third transistor circuit; and based on a target current flowing in a second direction opposite to the first direction, apply a second gate voltage to the first transistor circuit and the fourth transistor circuit based on a second mode signal to turn off the first transistor circuit and the fourth transistor circuit, and apply a first gate voltage to the second transistor circuit and the third transistor circuit to turn on the second transistor circuit and the third transistor circuit.

[0009] According to one aspect of this disclosure, a method for operating a current sensing system is provided, the current sensing system being used to measure a target current flowing through a target transistor connected between a first voltage terminal and a second voltage terminal, wherein the current sensing system includes a current sensing device, a controller controlling the current sensing device, and a processor providing a first mode signal or a second mode signal to the controller, the method comprising: determining, by the processor, whether the target current flows in a first direction from the first voltage terminal to the second voltage terminal; based on determining that the target current flows in the first direction, providing the first mode signal to the controller by the processor; and based on the first mode signal, providing a first gate voltage to a first transistor circuit and a fourth transistor circuit of the current sensing device, and providing a second gate voltage to a second transistor circuit and a third transistor circuit of the current sensing device, wherein the first transistor circuit is connected between the first voltage terminal and a first input terminal of an operational amplifier of the current sensing device, wherein the second transistor circuit is connected between the first voltage terminal and a second input terminal of the operational amplifier, wherein the third transistor circuit is connected between the second voltage terminal and the first input terminal of the operational amplifier, and wherein the fourth transistor circuit is connected between the second voltage terminal and the second input terminal of the operational amplifier. Attached Figure Description

[0010] The above and other objects and features of this disclosure will become apparent from the detailed description of embodiments thereof with reference to the accompanying drawings, in which:

[0011] Figure 1 This is a circuit diagram illustrating a current sensing device according to one or more embodiments of the present disclosure;

[0012] Figure 2 It is a manifestation Figure 1 The circuit diagram of the first transistor circuit;

[0013] Figure 3 This is a circuit diagram illustrating a current sensing device according to one or more embodiments of the present disclosure when a target current flows in a first direction;

[0014] Figure 4 This is a circuit diagram illustrating a current sensing device according to one or more embodiments of the present disclosure when a target current flows in a second direction;

[0015] Figure 5 This is a circuit diagram illustrating a current sensing device according to one or more embodiments of the present disclosure when the target current is not flowing;

[0016] Figure 6 This is a block diagram illustrating a current sensing system according to one or more embodiments of the present disclosure;

[0017] Figure 7 It is a manifestation Figure 6 The circuit diagram of the controller;

[0018] Figure 8 This is a circuit diagram illustrating a controller according to one or more embodiments of the present disclosure when a target current flows in a first direction;

[0019] Figure 9 This is a circuit diagram illustrating a controller according to one or more embodiments of the present disclosure when the target current flows in a second direction;

[0020] Figure 10 This is a circuit diagram illustrating a controller according to one or more embodiments of the present disclosure when the target current is not flowing; and

[0021] Figure 11 This shows the operation. Figure 6 A flowchart of a method for a current sensing system. Detailed Implementation

[0022] In the following, certain exemplary embodiments of this disclosure will be described in detail so that those skilled in the art can readily implement this disclosure.

[0023] Figure 1 This is a circuit diagram illustrating a current sensing device 100 according to one or more embodiments of the present disclosure. Reference Figure 1 The circuit diagram of the current sensing device 100 is shown.

[0024] The current sensing device 100 can sense the target current flowing through the target transistor TG. The current sensing device 100 can measure the magnitude of the target current flowing through the target transistor TG in a first direction. Alternatively, the current sensing device 100 can measure the magnitude of the target current flowing through the target transistor TG in the opposite direction to the first direction.

[0025] For example, the current sensing device 100 can provide an electrical signal corresponding to the amplitude of the target current being measured to a control component located inside or outside the current sensing device 100. The electrical signal corresponding to the amplitude of the target current can be an analog signal or a digital signal.

[0026] Specifically, the control component can perform current sensing or current regulation operations based on an electrical signal corresponding to the amplitude of the target current. The control component can compare the electrical signal with a threshold. The control component can sense a target current greater than a first threshold or a target current less than a second threshold, where the second threshold is less than the first threshold. The control component can control the current sensing device 100 to allow a target current within a predetermined range to flow to the target transistor TG.

[0027] The current sensing device 100 may include a target transistor TG, a sensing transistor circuit 110, an operational amplifier 120, a PMOS transistor 130, and a sensing resistor 140.

[0028] The target transistor TG has a gate to which a first gate voltage VG1 is applied, and can be connected between a first voltage terminal VN1 and a second voltage terminal VN2. The first voltage terminal VN1 can have a first voltage level, and the second voltage terminal VN2 can have a second voltage level.

[0029] Based on the difference between the first voltage level and the second voltage level, the target current can flow in either a first direction or a second direction. The first direction can refer to the direction in which the current flows from the first voltage terminal VN1 to the second voltage terminal VN2. The second direction can indicate the direction in which the current flows from the second voltage terminal VN2 to the first voltage terminal VN1.

[0030] In one or more embodiments, the target transistor TG may be an NMOS (N-type metal-oxide-semiconductor) transistor. The source of the target transistor TG may be connected to a first voltage terminal VN1, and the drain of the target transistor TG may be connected to a second voltage terminal VN2. However, embodiments of this disclosure are not limited thereto, and the target transistor TG may be a PMOS (P-type metal-oxide-semiconductor) transistor. Furthermore, the current sensing device 100 may sense the current flowing in an electrical component in which current can flow in both directions as the target current.

[0031] In one or more embodiments, a diode may be connected between the source and drain of the target transistor TG. The diode prevents reverse current.

[0032] The sensing transistor circuit 110 may include a first transistor circuit TRC1 to a fourth transistor circuit TRC4.

[0033] Each of the first transistor circuits TRC1 through TRC4 can be turned on or off depending on the applied gate voltage. Current flows between the two terminals of the turned-on transistors in the first transistor circuits TRC1 through TRC4. Current does not flow between the two terminals of the turned-off transistors in the first transistor circuits TRC1 through TRC4.

[0034] The first transistor circuit TRC1 can be connected between the first voltage terminal VN1 and the first input terminal (e.g., the non-inverting terminal) of the operational amplifier 120. When the first transistor circuit TRC1 is turned on, current can flow between the first voltage terminal VN1 and the first input terminal. Conversely, when the first transistor circuit TRC1 is turned off, current cannot flow between the first voltage terminal VN1 and the first input terminal.

[0035] The second transistor circuit TRC2 can be connected between the first voltage terminal VN1 and the second input terminal (e.g., the inverting terminal) of the operational amplifier 120. When the second transistor circuit TRC2 is turned on, current can flow between the first voltage terminal VN1 and the second input terminal. Conversely, when the second transistor circuit TRC2 is turned off, current cannot flow between the first voltage terminal VN1 and the second input terminal.

[0036] The third transistor circuit TRC3 can be connected between the second voltage terminal VN2 and the first input terminal of the operational amplifier 120. When the third transistor circuit TRC3 is turned on, current can flow between the second voltage terminal VN2 and the first input terminal. Conversely, when the third transistor circuit TRC3 is turned off, current cannot flow between the second voltage terminal VN2 and the first input terminal.

[0037] The fourth transistor circuit TRC4 can be connected between the second voltage terminal VN2 and the second input terminal of the operational amplifier 120. When the fourth transistor circuit TRC4 is turned on, current can flow between the second voltage terminal VN2 and the second input terminal. Conversely, when the fourth transistor circuit TRC4 is turned off, current cannot flow between the second voltage terminal VN2 and the second input terminal.

[0038] In one or more embodiments, each of the first transistor circuits TRC1 to the fourth transistor circuit TRC4 may be turned on based on the application of a first gate voltage or turned off based on the application of a second gate voltage.

[0039] In one or more embodiments, each of the first transistor circuits TRC1 through TRC4 may include at least one sensing transistor. For example, the first transistor circuit TRC1 may include a sensing transistor connected between a first voltage terminal VN1 and a first input terminal. As another example, the first transistor circuit TRC1 may include two or more sensing transistors, and these two or more sensing transistors may be connected in series between the first voltage terminal VN1 and the first input terminal. In this case, applying a gate voltage to each of the first transistor circuits TRC1 through TRC4 means applying a corresponding gate voltage to the gate of all sensing transistors included in each transistor circuit. Reference will be made later. Figure 2 A more detailed description of this is provided below. However, embodiments of this disclosure are not limited thereto, and examples of various circuit designs that can be represented by an equivalent transistor connected between the two terminals of the first transistor circuit TRC1 will be included. Each of the second transistor circuits TRC2 through the fourth transistor circuit TRC4 is similar to the first transistor circuit TRC1.

[0040] In one or more embodiments, each of the first transistor circuits TRC1 to the fourth transistor circuit TRC4 can be turned on when a first gate voltage VG1 is applied and can be turned off when a second gate voltage VG2 is applied. For example, the voltage level of the first gate voltage is higher than the voltage level of the second gate voltage, and the voltage level of the second gate voltage is higher than the voltage level of the ground voltage.

[0041] The first transistor circuit TRC1 and the fourth transistor circuit TRC4 can be applied with the same gate voltage. In addition, the second transistor circuit TRC2 and the third transistor circuit TRC3 can be applied with the same gate voltage, but with a different gate voltage than that applied to the first transistor circuit TRC1.

[0042] The gate voltage applied to each transistor circuit from the first transistor circuit TRC1 to the fourth transistor circuit TRC4 is determined based on the direction of the target current.

[0043] When the target current flows in the first direction, the first transistor circuit TRC1 and the fourth transistor circuit TRC4 can be subjected to a first gate voltage VG1, and the second transistor circuit TRC2 and the third transistor circuit TRC3 can be subjected to a second gate voltage VG2.

[0044] When the target current flows in the second direction, the first transistor circuit TRC1 and the fourth transistor circuit TRC4 can be subjected to a second gate voltage VG2, and the second transistor circuit TRC2 and the third transistor circuit TRC3 can be subjected to a first gate voltage VG1.

[0045] Operational amplifier 120 amplifies the difference between the voltage applied to the first input terminal and the voltage applied to the second input terminal. Operational amplifier 120 can output an output voltage through the output terminal. The first input terminal can be connected to the feedback terminal FN and can receive feedback voltage.

[0046] The PMOS transistor 130 may have a gate connected to the output terminal of the operational amplifier 120 to receive the output voltage, and may be connected between the first input terminal (or, the feedback terminal FN) and the sense resistor 140. For example, the source of the PMOS transistor 130 may be connected to the first input terminal (or the feedback terminal FN), and the drain of the PMOS transistor 130 may be connected to the sense resistor 140.

[0047] Furthermore, the voltage at the feedback terminal FN (i.e., the feedback voltage) can have almost the same voltage level as the voltage applied to the first input terminal.

[0048] The sensing resistor 140 can be connected between the drain of the PMOS transistor 130 and the ground voltage terminal.

[0049] The current sensing device 100 can measure a target current based on a sensed voltage signal across a sense resistor 140. Specifically, the current sensing device 100 can obtain a sensed voltage signal across the sense resistor 140. The current sensing device 100 can obtain the amplitude of the sensed current Isns based on the magnitude of the sense resistor 140 and the voltage amplitude of the sensed voltage signal. The sensed current Isns can refer to the current flowing from the feedback terminal FN through the PMOS transistor 130 to the sense resistor 140. The ratio of the amplitude of the target current to the amplitude of the sensed current Isns can be the same as the sensing ratio of the current sensing device 100. The sensing ratio of the current sensing device 100 can be determined by the ratio of the target resistance to the sensed resistance. The target resistance can refer to the equivalent resistance corresponding to the target transistor TG between the first voltage terminal VN1 and the second voltage terminal VN2. The sensed resistance can refer to the equivalent resistance corresponding to the conducting transistor circuit TRC between the first voltage terminal VN1 (or, the second voltage terminal VN2) and the feedback terminal FN.

[0050] In one or more embodiments, the equivalent resistance corresponding to a conducting transistor is the same as the resistance connected between the source and drain of the corresponding transistor. Specifically, the equivalent resistance can be determined by the following equation: In this context, R refers to the equivalent resistance, kp refers to the product of the hole mobility (which is a constant) and the gate oxide capacitance per unit area, W refers to the channel width, L refers to the channel length, Vgs refers to the gate-source voltage, and Vto refers to the threshold voltage.

[0051] Figure 2 It is an embodiment of one or more embodiments of this disclosure. Figure 1 The circuit diagram of the first transistor circuit, TRC1. (Refer to...) Figure 2 The circuit diagram of the first transistor circuit TRC1 is shown. Figure 1 Each transistor circuit in the second transistor circuit TRC2 to the fourth transistor circuit TRC4 can be connected to... Figure 2 The first transistor circuit TRC1 is configured similarly.

[0052] As described above, the first transistor circuit TRC1 can be a sensing transistor connected between the first voltage terminal VN1 and the feedback terminal FN, or it can be represented as a sensing transistor (i.e., it can be considered as an equivalent transistor). Hereinafter, an embodiment in which the first transistor circuit TRC1 includes two sensing transistors STR1 and STR2 connected in series between the first voltage terminal VN1 and the feedback terminal FN will be described. In this way, damage to the internal structure of the first transistor circuit TRC1 can be prevented, and stable operation can be achieved.

[0053] The first sensing transistor STR1 can be connected to the first gate terminal G1 and can be connected between the first voltage terminal VN1 and the connection terminal CN. The second sensing transistor STR2 can be connected to the first gate terminal G1 and can be connected between the connection terminal CN and the feedback terminal FN. Each of the first sensing transistor STR1 and the second sensing transistor STR2 can be subjected to the same gate voltage (e.g., the first gate voltage VG1 or the second gate voltage VG2) through the first gate terminal G1.

[0054] In one or more embodiments, each of the two sensing transistors STR1 and STR2 can be... Figure 1 The target transistor TG is a transistor of the same type. For example, both the target transistor and the two sensing transistors STR1 and STR2 can be NMOS transistors.

[0055] In one or more embodiments, a first diode D1 may be connected between the source and drain of the first sensing transistor STR1. For example, the first diode D1 may be the body diode of the first sensing transistor STR1. A second diode D2 may be connected between the source and drain of the second sensing transistor STR2. For example, the second diode D2 may be the body diode of the second sensing transistor STR2. The body diode is not an actual diode, but can refer to a structure formed during the manufacturing process that performs a function similar to a diode.

[0056] In one or more embodiments, a third diode D3 may be connected between the connection terminal CN and the first gate terminal G1. The third diode D3 may be a Zener diode. The difference between the voltage level at the connection terminal CN and the voltage level applied to the first gate terminal G1 may be maintained below a preset threshold voltage level by the third diode D3.

[0057] However, the circuit structure of the first transistor circuit TRC1 is not limited to Figure 2 It will be obvious that at least one of the first diode D1, the second diode D2, and the third diode D3 used for the stability of the first transistor circuit TRC1 can be omitted or replaced by a set of other electrical components that perform similar functions.

[0058] When a first gate voltage VG1 is applied to the first gate terminal G1 and the first sensing transistor STR1 and the second sensing transistor STR2 are turned on, current (e.g., sensing current) can flow between the first voltage terminal VN1 and the feedback terminal FN.

[0059] In the following text, we will refer to the following: Figure 3 and Figure 4 describe Figure 1 The current sensing device 100 operates according to the direction of the target current.

[0060] Figure 3 This is a circuit diagram illustrating a current sensing device according to one or more embodiments of the present disclosure when a target current flows in a first direction. Reference Figure 3 This describes the operation of the current sensing device 100 when the target current "It" flows in the first direction d1. Figure 3 The sensing transistor circuit 110, operational amplifier 120, PMOS transistor 130, and sensing resistor 140 can respectively correspond to Figure 1 The sensing transistor circuit 110, operational amplifier 120, PMOS transistor 130 and sensing resistor 140.

[0061] The first transistor circuit TRC1 and the fourth transistor circuit TRC4 are turned on by applying a first gate voltage VG1. The second transistor circuit TRC2 and the third transistor circuit TRC3 are turned off by applying a second gate voltage VG2. In this case, the off configuration or signal lines without current flow are... Figure 3 The middle part is depicted as a dashed line.

[0062] The sensed current Isns can flow through the feedback terminal FN to the sense resistor 140 via the first transistor circuit TRC1. In this case, a predetermined pull-down current can flow through the fourth transistor circuit TRC4. The pull-down current can be based on the pull-down resistor connected between the fourth transistor circuit TRC4 and the ground voltage terminal. This ensures stable operation of the conducting fourth transistor circuit TRC4.

[0063] The current sensing device 100 can measure the target current "It" based on the sensed current Isns flowing through the first transistor circuit TRC1. Specifically, the current sensing device 100 can measure the sensed current Isns based on the sensed voltage signal across the sense resistor 140. The current sensing device 100 can determine the magnitude of the target current, which depends on the ratio of the equivalent resistance of the target transistor TG to the equivalent resistance of the first transistor circuit TRC1.

[0064] Figure 4 This is a circuit diagram illustrating a current sensing device according to one or more embodiments of the present disclosure when a target current flows in a second direction. Reference Figure 4 This describes the operation of the current sensing device 100 when the target current "It" flows in the second direction d2. Figure 4 The sensing transistor circuit 110, operational amplifier 120, PMOS transistor 130, and sensing resistor 140 can respectively correspond to Figure 1 The sensing transistor circuit 110, operational amplifier 120, PMOS transistor 130 and sensing resistor 140.

[0065] The first transistor circuit TRC1 and the fourth transistor circuit TRC4 are turned off by applying the second gate voltage VG2. The second transistor circuit TRC2 and the third transistor circuit TRC3 are turned on by applying the first gate voltage VG1. In this situation, the off configuration or signal lines without current flow are... Figure 4 The middle part is depicted as a dashed line.

[0066] The sensed current Isns can flow to the sense resistor 140 via the feedback terminal FN through the third transistor circuit TRC3. In this case, a predetermined pull-down current can flow through the second transistor circuit TRC2. The pull-down current can be based on the pull-down resistor connected between the second transistor circuit TRC2 and the ground voltage terminal. This ensures stable operation of the conducting second transistor circuit TRC2.

[0067] The current sensing device 100 can measure the target current "It" based on the sensed current Isns flowing through the third transistor circuit TRC3. Specifically, the current sensing device 100 can measure the sensed current Isns based on the sensed voltage signal across the sense resistor 140. The current sensing device 100 can determine the magnitude of the target current based on the sensing ratio of the equivalent resistance of the target transistor TG to the equivalent resistance of the third transistor circuit TRC3.

[0068] The current sensing device 100 according to this disclosure can determine the path through which the sensed current Isns flows by turning on or off each of the first transistor circuits TRC1 to the fourth transistor circuit TRC4 according to the direction of the target current "It". Specifically, since no separate transistor is required to switch according to the direction of the target current "It" in the path through which the sensed current Isns flows, the current sensing device 100 according to this disclosure can maintain a sensing ratio that is less affected by temperature and input voltage amplitude.

[0069] For example, when a switching transistor exists in the path of the sensing current Isns in addition to the sensing transistor, the sensing ratio may change because the switching transistor itself may be considered part of the sensing transistor (i.e., the equivalent resistance may increase). Furthermore, if the switching transistor is of a different type than the target transistor, the sensing ratio may change due to differences in electrical characteristics caused by the different types. Additionally, changes in the voltage applied to the first voltage terminal VN1 or the second voltage terminal VN2 may cause changes in the gate-source voltage and consequently, the sensing ratio.

[0070] When the target current "It" flows in the first direction, the sensing current Isns of the current sensing device 100 according to this disclosure can flow along the first transistor circuit TRC1. Since there is no transistor for switching, the sensing ratio can be uniform depending on the ratio of the equivalent resistance of the target transistor TG and the first transistor circuit TRC1. Furthermore, since the amplitude of the gate-source voltage of the target transistor TG is the same as the amplitude of the gate-source voltage of the first transistor circuit TRC1, the sensing ratio can be uniform based on the ratio of the equivalent resistances.

[0071] Conversely, even when the target current "It" flows in the second direction, the sensing ratio can be maintained uniformly, similar to the description above.

[0072] Figure 5 This is a circuit diagram illustrating a current sensing device according to one or more embodiments of the present disclosure when the target current is not flowing. Reference Figure 5 This describes the operation of the current sensing device 100 when no current flows through the target transistor TG. Alternatively, the operation of the current sensing device 100 when it is not in operation is described. Figure 5 The sensing transistor circuit 110, operational amplifier 120, PMOS transistor 130, and sensing resistor 140 can respectively correspond to Figure 1 The sensing transistor circuit 110, operational amplifier 120, PMOS transistor 130 and sensing resistor 140.

[0073] Each transistor circuit in the first transistor circuit TRC1 to the fourth transistor circuit TRC4 can be turned off by receiving a third gate voltage VG3. The third gate voltage VG3 can be the same as the ground voltage GND. In this case, the sensing current used to measure the target current may not flow in the current sensing device 100.

[0074] Figure 6 This is a block diagram illustrating a current sensing system according to one or more embodiments of the present disclosure. Reference Figure 6 This illustrates a current sensing system 10 including a processor 11, a controller 12, and a current sensing device 100. The current sensing device 100 can correspond to... Figure 1 The current sensing device 100.

[0075] The current sensing system 10 can control the current sensing device 100 to measure the current flowing through the target transistor. The current sensing system 10 can perform current sensing operations based on the measured target current. The current sensing system 10 can sense abnormal currents based on the current sensing operations and can notify the user of the abnormal state (e.g., display the abnormal state on a display). Alternatively, when an abnormal current is sensed, the current sensing system 10 can control at least one of the voltage applied to the gate of the target transistor, the voltage applied to a first voltage terminal, and the voltage applied to a second voltage terminal, such that a current within a predetermined allowable range flows through the target transistor. However, embodiments of this disclosure are not limited thereto, and the current sensing system 10 can convert the amplitude of the measured target current into a digital value for storage, display on a display, or use in calculations.

[0076] Processor 11 can determine whether the direction of the current flowing through the target transistor is a first direction or a second direction. Based on this determination, processor 11 can provide a control signal CS to controller 12.

[0077] For example, when the direction of the current flowing in the target transistor is determined to be a first direction, the processor 11 can provide a control signal CS that allows the controller 12 to apply a first gate voltage VG1 to the first and fourth transistor circuits of the current sensing device 100, and a second gate voltage VG2 to the second and third transistor circuits. In this case, the set of these control signals CS can be referred to as the first mode signal MS1.

[0078] As another example, when the direction of the current flowing in the target transistor is determined to be a second direction, the processor 11 can provide a control signal CS that allows the controller 12 to apply a first gate voltage VG1 to the second and third transistor circuits of the current sensing device 100, and a second gate voltage VG2 to the first and fourth transistor circuits. In this case, the set of these control signals CS can be referred to as the second mode signal MS2.

[0079] Furthermore, the processor 11 can determine that current is not flowing through the target transistor of the current sensing device 100 or stop the sensing operation of the current sensing device 100. In this case, the processor 11 can provide a control signal CS to each of the first to fourth transistor circuits of the current sensing device 100, which allows the controller 12 to provide a ground voltage as a third gate voltage VG3. In this case, the set of these control signals CS can be referred to as the third mode signal MS3.

[0080] In one or more embodiments, processor 11 may be implemented by hardware, software, firmware, or any combination thereof. For example, processor 11 may be a CPU (Central Processing Unit), AP (Application Processor), GPU (Graphics Processing Unit), NPU (Neural Processing Unit), or DSP (Digital Signal Processor). For example, the target transistor sensed by current sensing device 100 may be a power transistor of a mobile device, and in this case, processor 11 may be an AP.

[0081] Processor 11 can receive a sensed current signal IS from current sensing device 100. The sensed current signal IS can be an analog signal or a digital signal corresponding to the amplitude of a target current. For example, processor 11 can also convert the sensed current signal IS, which is an analog signal, into a digital value. Processor 11 can perform current sensing operations or current regulation operations based on the sensed current signal IS. However, embodiments of this disclosure are not limited thereto, and as referenced... Figure 1 As mentioned above, current sensing operations or current regulation operations can be performed within the current sensing device 100.

[0082] The controller 12 can control the current sensing device 100 based on the control signal CS received from the processor 11. The controller 12 can provide a gate voltage to each of the first to fourth transistor circuits of the current sensing device 100. For example, the controller 12 can provide a first gate voltage VG1, a second gate voltage VG2, and a third gate voltage VG3 to the current sensing device 100.

[0083] For example, controller 12 can control current sensing device 100 based on first mode signal MS1, causing the sensed current to flow to the first transistor circuit. In this case, current sensing device 100 can be as described in reference... Figure 3 As described. Controller 12 can control the current sensing device 100 based on the second mode signal MS2, causing the sensed current to flow to the third transistor circuit. In this case, the current sensing device 100 can operate as described in the reference. Figure 4 Operate as described. Controller 12 can control the current sensing device 100 based on the third mode signal MS3, so that the sensed current does not flow. In this case, the current sensing device 100 can operate as described in the reference. Figure 5 Operate as described.

[0084] In the following text, see references Figure 7 A circuit diagram is described for a controller 12 implemented as a circuit, at least in part according to one or more embodiments of the present disclosure, and references are made to... Figures 8 to 10 Describe the operation of controller 12 based on each of the mode signals MS1 to MS3. (About...) Figure 6 The controller 12 outputs the gate control voltage. Figures 7 to 10 This illustrates receiving the gate voltage from controller 12. Figure 6 Current sensing device 100. Figures 7 to 10 The effect of controller 12 on current sensing device 100 is shown.

[0085] Figure 7 It is a manifestation Figure 6 The circuit diagram of controller 12. (Refer to...) Figure 7 The circuit diagram of controller 12 is shown.

[0086] The controller 12 may include a third voltage terminal VN3 connected to the first gate terminal G1 of the first transistor circuit and the fourth gate terminal G4 of the fourth transistor circuit of the current sensing device. Specifically, the voltage level of the third voltage terminal VN3 may be provided to the first gate terminal G1 and the fourth gate terminal G4 using pads or pins, etc. Furthermore, the controller 12 may include a fourth voltage terminal VN4 connected to the second gate terminal G2 of the second transistor circuit and the third gate terminal G3 of the third transistor circuit of the current sensing device. Specifically, the voltage level of the fourth voltage terminal VN4 may be provided to the second gate terminal G2 and the third gate terminal G3 using pads or pins, etc.

[0087] For example, controller 12 can form a current mirror between the third voltage terminal VN3 and the first power supply voltage terminal VDN1 to which the first gate voltage VG1 is applied, to raise the voltage level of the third voltage terminal VN3 to the voltage level of the first gate voltage VG1. (See later...) Figure 8 A more detailed description follows. The controller 12 can form a path through a third voltage terminal between the second power supply voltage terminal VDN2, where the second gate voltage VG2 is applied, and the ground voltage terminal, thereby raising the voltage level of the third voltage terminal VN3 to the voltage level of the second gate voltage VG2. Reference will be made later. Figure 9 A more detailed description follows. The voltage level of the fourth voltage terminal VN4 also rises to the voltage level of the first gate voltage VG1 or the voltage level of the second gate voltage VG2 in a similar manner to that of the third voltage terminal VN3, and will be referred to later. Figure 8 and Figure 9 Describe it in more detail.

[0088] The controller 12 may include a current source CRS, a first PMOS transistor PM1 to a fifth PMOS transistor PM5, a first transistor TR1 to a fourth transistor TR4, a first resistor R1, and a second resistor R2.

[0089] The first PMOS transistor PM1 has a gate connected to the mirror terminal MN and can be connected between the first power supply voltage terminal VDN1 and the current source CRS.

[0090] The current source CRS can be connected between the drain of the first PMOS transistor PM1 and the third power supply voltage terminal VDN3.

[0091] The first transistor TR1 has a gate that receives the first control signal CS1 and can be connected between the mirror terminal MN and the gate of the second PMOS transistor PM2.

[0092] The second PMOS transistor PM2 has a gate connected to the first transistor TR1 and can be connected between the first power supply voltage terminal VDN1 and the fourth voltage terminal VN4.

[0093] The second transistor TR2 has a gate that receives the second control signal CS2 and can be connected between the mirror terminal MN and the gate of the third PMOS transistor PM3.

[0094] The third PMOS transistor PM3 has a gate connected to the second transistor TR2 and can be connected between the first power supply voltage terminal VDN1 and the third voltage terminal VN3.

[0095] The fourth PMOS transistor PM4 has a gate that receives the third control signal CS3 and can be connected between the second power supply voltage terminal VDN2 and the fourth voltage terminal VN4.

[0096] In one or more embodiments, a fourth diode D4 may be connected between the fourth PMOS transistor PM4 and the second power supply voltage terminal VDN2. The current direction from the second power supply voltage terminal VDN2 to the fourth PMOS transistor PM4 may be maintained by the fourth diode D4.

[0097] The fifth PMOS transistor PM5 has a gate that receives the fourth control signal CS4 and can be connected between the second power supply voltage terminal VDN2 and the third voltage terminal VN3.

[0098] In one or more embodiments, a fifth diode D5 may be connected between a fifth PMOS transistor PM5 and a second power supply voltage terminal VDN2. The current direction from the second power supply voltage terminal VDN2 to the fifth PMOS transistor PM5 may be maintained by the fifth diode D5.

[0099] The first resistor R1 can be connected between the fourth voltage terminal VN4 and all terminals except the gate of the third transistor TR3. The third transistor TR3 has a gate that receives the fifth control signal CS5 and can be connected between the first resistor R1 and the ground voltage terminal.

[0100] The second resistor R2 can be connected between the third voltage terminal VN3 and all terminals except the gate of the fourth transistor TR4. The fourth transistor TR4 has a gate that receives the sixth control signal CS6 and can be connected between the second resistor R2 and the ground voltage terminal.

[0101] Figure 8 This is a circuit diagram illustrating a controller 12 according to one or more embodiments of the present disclosure when a target current flows in a first direction. Reference Figure 8The controller 12 is described, wherein a first gate voltage VG1 is applied to a third voltage terminal VN3 based on a first mode signal, and a second gate voltage VG2 is applied to a fourth voltage terminal VN4. Figure 8 Each component can correspond to Figure 7 Components that have the same reference numerals in the accompanying drawings.

[0102] Based on the first mode signal received from the processor, the second transistor TR2 can be turned on by the second control signal CS2, the fifth PMOS transistor PM5 can be turned off by the fourth control signal CS4, and the fourth transistor TR4 can be turned off by the sixth control signal CS6.

[0103] For example, a first PMOS transistor PM1 and a third PMOS transistor PM3 can form a current mirror with gates connected to each other via mirror terminals MN. A mirror current with a uniform ratio relative to a reference current flowing in the current source CRS can flow through the third PMOS transistor PM3. In this case, the uniform ratio can be determined by the ratio of the size of the first PMOS transistor PM1 to the size of the third PMOS transistor PM3. In this case, the voltage level of the third voltage terminal VN3 can be the same as the voltage level of the first gate voltage VG1. Therefore, the first gate voltage VG1 can be applied to the first gate terminal G1 and the fourth gate terminal G4.

[0104] Furthermore, based on the first mode signal received from the processor, the first transistor TR1 can be turned off by the first control signal CS1, the fourth PMOS transistor PM4 can be turned on by the third control signal CS3, and the third transistor TR3 can be turned on by the fifth control signal CS5.

[0105] For example, since a path is formed from the second power supply voltage terminal VDN2 through the fourth voltage terminal VN4 to the ground voltage terminal, the voltage level of the fourth voltage terminal VN4 can be the same as the voltage level of the second gate voltage VG2. Therefore, the second gate voltage VG2 can be applied to the second gate terminal G2 and the third gate terminal G3.

[0106] Figure 9 This is a circuit diagram illustrating a controller 12 according to one or more embodiments of the present disclosure when a target current flows in a second direction. Reference Figure 9 The controller 12 is described, wherein a second gate voltage VG2 is applied to a third voltage terminal VN3 based on a second mode signal, and a first gate voltage VG1 is applied to a fourth voltage terminal VN4. Figure 9 Each component can correspond to Figure 7 Components that have the same reference numerals in the accompanying drawings.

[0107] Based on the second mode signal received from the processor, the second transistor TR2 can be turned off by the second control signal CS2, the fifth PMOS transistor PM5 can be turned on by the fourth control signal CS4, and the fourth transistor TR4 can be turned on by the sixth control signal CS6.

[0108] For example, since a path is formed from the second power supply voltage terminal VDN2 through the third voltage terminal VN3 to the ground voltage terminal, the voltage level of the third voltage terminal VN3 can be the same as the voltage level of the second gate voltage VG2. Therefore, the second gate voltage VG2 can be applied to the first gate terminal G1 and the fourth gate terminal G4.

[0109] Furthermore, based on the second mode signal received from the processor, the first transistor TR1 can be turned on by the first control signal CS1, the fourth PMOS transistor PM4 can be turned off by the third control signal CS3, and the third transistor TR3 can be turned off by the fifth control signal CS5.

[0110] For example, a first PMOS transistor PM1 and a second PMOS transistor PM2 can form a current mirror with gates connected to each other via mirror terminals MN. A mirror current with a uniform ratio relative to the reference current flowing in the current source CRS can flow through the second PMOS transistor PM2. In this case, the uniform ratio can be determined by the ratio of the size of the first PMOS transistor PM1 to the size of the second PMOS transistor PM2. In this case, the voltage level of the fourth voltage terminal VN4 can be the same as the voltage level of the first gate voltage VG1. Therefore, the first gate voltage VG1 can be applied to the second gate terminal G2 and the third gate terminal G3.

[0111] Figure 10 This is a circuit diagram illustrating a controller 12 when the target current is not flowing, according to one or more embodiments of the present disclosure. Reference Figure 10 The operation of the controller 12, which allows the current sensing device 100 to stop operating, is described.

[0112] Based on the third mode signal received from the processor, the second transistor TR2 can be turned off by the second control signal CS2, the fifth PMOS transistor PM5 can be turned off by the fourth control signal CS4, and the fourth transistor TR4 can be turned on by the sixth control signal CS6.

[0113] For example, since a path is formed between the third voltage terminal VN3 and the ground voltage terminal and no current flows, the voltage level of the third voltage terminal VN3 can be the same as the voltage level of the ground voltage. Therefore, the ground voltage can be applied to the first gate terminal G1 and the fourth gate terminal G4.

[0114] Furthermore, based on the third mode signal received from the processor, the first transistor TR1 can be turned off by the first control signal CS1, the fourth PMOS transistor PM4 can be turned off by the third control signal CS3, and the third transistor TR3 can be turned on by the fifth control signal CS5.

[0115] For example, since a path is formed between the fourth voltage terminal VN4 and the ground voltage terminal and no current flows, the voltage level of the fourth voltage terminal VN4 can be the same as the voltage level of the ground voltage. Therefore, the ground voltage can be applied to the second gate terminal G2 and the third gate terminal G3.

[0116] Figure 11 This shows the operation. Figure 6 A flowchart of a method for a current sensing system 10. (See reference...) Figure 11 The operation method of the current sensing system 10 is described.

[0117] In operation S110, the current sensing system 10 can determine whether the direction of the target current flowing through the target transistor is a first direction or a second direction. When the direction of the target current is the first direction, operation S120 can be executed; conversely, when the direction of the target current is the second direction, operation S125 can be executed.

[0118] In operation S120, the current sensing system 10 may provide a first mode signal to the controller in response to determining that the direction of the target current is a first direction.

[0119] In operation S130, the current sensing system 10 can provide a first gate voltage VG1 to each of the first transistor circuit and the fourth transistor circuit of the current sensing device using a controller based on the control signal of the first mode signal, and can provide a second gate voltage VG2 to each of the second transistor circuit and the third transistor circuit.

[0120] In this case, the first to fourth transistor circuits can respectively correspond to Figure 1 The first transistor circuit TRC1 to the fourth transistor circuit TRC4.

[0121] In operation S125, the current sensing system 10 may provide a second mode signal to the controller in response to determining that the direction of the target current is a second direction.

[0122] In one or more embodiments, operations S110, S120, and S125 may be executed by a processor of the current sensing system 10. However, embodiments of this disclosure are not limited thereto, and may be executed by logic blocks within the current sensing system 10 instead of a processor.

[0123] In operation S135, the current sensing system 10 can provide a first gate voltage VG1 to each of the second transistor circuit and the third transistor circuit of the current sensing device using a controller based on the control signal of the second mode signal, and can provide a second gate voltage VG2 to each of the first transistor circuit and the fourth transistor circuit.

[0124] In operation S140, the current sensing system 10 can use the current sensing device to measure the target current based on the sensed voltage signal across the sense resistor of the current sensing device.

[0125] In one or more embodiments, a first input terminal of the operational amplifier of the current sensing device is connected to a feedback terminal to receive a feedback voltage, and the current sensing device may include a PMOS transistor having a gate connected to an output terminal of the operational amplifier and a source connected to the feedback terminal. A sensing resistor may be connected between the drain of the PMOS transistor and a ground voltage terminal.

[0126] In one or more embodiments, when the target current flows in a first direction, the current flowing through the first transistor circuit can flow as a first sensing current to the sensing resistor. The first sensing current has a uniform sensing ratio relative to the target current.

[0127] In one or more embodiments, when the target current flows in the second direction, the current flowing through the third transistor circuit can flow as a second sensing current to the sensing resistor. The second sensing current has a uniform sensing ratio relative to the target current.

[0128] In one or more embodiments, the current sensing system can be implemented via a processor (e.g., Figure 6 The processor 11) determines whether the current sensing device is operating and whether the direction of the target current is a first direction or a second direction. For example, when the current does not flow through the target transistor, it can be determined that the current sensing device is not operating.

[0129] In one or more embodiments, operation S140 may further include determining by a current sensing device that no current flows through the target transistor, and in response to determining that no target current flows, providing a ground voltage to the first transistor circuit through the fourth transistor circuit by a controller.

[0130] In one or more embodiments, operation S140 may further include determining that the current sensing device is not operating, and in response to determining that the current sensing device is not operating, providing a ground voltage to the first transistor circuit to the fourth transistor circuit by the controller.

[0131] According to embodiments of the present disclosure, a bidirectional current sensing device, a current sensing system including the same, and a method for operating the current sensing system are provided.

[0132] Furthermore, since multiple sensing transistors are turned on or off to determine the path of the sensing current, which depends on the direction of the current flowing through the transistor that is the target of current sensing, there is no need to provide a separate switching transistor on the sensing current path. Therefore, a bidirectional current sensing device with improved accuracy is provided by maintaining a uniform sensing ratio even when the input voltage and temperature applied to the target transistor change.

[0133] The above description describes detailed embodiments for carrying out this disclosure. Embodiments that are simply modified or easily modified in design may be included in this disclosure and the above embodiments. Furthermore, techniques that are easily modified and implemented using the above embodiments may be included in this disclosure. Therefore, the scope of this disclosure should not be limited to the above embodiments and should be defined not only by the claims described later but also by claims equivalent to those of this disclosure.

Claims

1. A current sensing device for measuring a target current flowing through a target transistor connected between a first voltage terminal and a second voltage terminal, the current sensing device comprising: The sensing transistor circuit includes a first transistor circuit, a second transistor circuit, a third transistor circuit, and a fourth transistor circuit; and An operational amplifier is connected to the sensing transistor circuit. The first transistor circuit is connected between the first voltage terminal and the first input terminal of the operational amplifier. The second transistor circuit is connected between the first voltage terminal and the second input terminal of the operational amplifier. The third transistor circuit is connected between the second voltage terminal and the first input terminal of the operational amplifier. The fourth transistor circuit is connected between the second voltage terminal and the second input terminal of the operational amplifier. Wherein, based on the target current flowing in a first direction from the first voltage terminal to the second voltage terminal, the first transistor circuit and the fourth transistor circuit are turned on based on a first gate voltage, and the second transistor circuit and the third transistor circuit are turned off based on a second gate voltage, and Wherein, based on the target current flowing in a second direction opposite to the first direction, the first transistor circuit and the fourth transistor circuit are turned off based on the second gate voltage, and the second transistor circuit and the third transistor circuit are turned on based on the first gate voltage.

2. The current sensing device according to claim 1, wherein, Based on the target current flowing in the first direction, the target current is measured based on a first sensed current flowing through the first transistor circuit, and Wherein, the target current flows in the second direction, and the target current is measured based on the second sensing current flowing through the third transistor circuit.

3. The current sensing device according to claim 1, wherein, The first input terminal of the operational amplifier is connected to the feedback terminal to receive the feedback voltage, and The current sensing device further includes: A P-channel metal-oxide-semiconductor (PMOS) transistor has a gate for receiving the output voltage of the operational amplifier and a source connected to the feedback terminal; and A sensing resistor is connected between the drain of the PMOS transistor and the ground voltage terminal, and The current sensing device is configured to measure the target current based on the sensed voltage signal across the sensing resistor.

4. The current sensing device according to claim 3, wherein, The current sensing device is further configured to obtain a sensed current based on the sense resistor and the sensed voltage signal, and The ratio of the sensed current to the target current is called the sensing ratio.

5. The current sensing device according to claim 1, wherein, The second gate voltage is greater than the ground voltage level, and Wherein, the first gate voltage is greater than the second gate voltage.

6. The current sensing device according to claim 1, wherein, When the current sensing device is not in operation, the ground voltage is applied as a gate voltage to each of the first transistor circuit, the second transistor circuit, the third transistor circuit, and the fourth transistor circuit.

7. The current sensing device according to claim 1, wherein, The first magnitude of the first gate voltage is the same as the second magnitude of the voltage applied to the gate of the target transistor.

8. The current sensing device according to claim 1, wherein, Each of the first transistor circuit, the second transistor circuit, the third transistor circuit, and the fourth transistor circuit includes at least one sensing transistor, and Wherein, the at least one sensing transistor and the target transistor are of the same transistor type.

9. The current sensing device according to claim 8, wherein, Each of the at least one sensing transistor is an N-channel metal-oxide-semiconductor (NMOS) transistor, and The target transistor is a second NMOS transistor.

10. The current sensing device according to claim 1, wherein, Each of the first transistor circuit, the second transistor circuit, the third transistor circuit, and the fourth transistor circuit includes two NMOS transistors connected in series.

11. A current sensing system for measuring the target current flowing through a target transistor connected between a first voltage terminal and a second voltage terminal, comprising: A current sensing device includes a sensing transistor circuit and an operational amplifier connected to the sensing transistor circuit, the sensing transistor circuit including a first transistor circuit, a second transistor circuit, a third transistor circuit and a fourth transistor circuit; and The controller is configured to control the current sensing device, and The first transistor circuit is connected between the first voltage terminal and the first input terminal of the operational amplifier. The second transistor circuit is connected between the first voltage terminal and the second input terminal of the operational amplifier. The third transistor circuit is connected between the second voltage terminal and the first input terminal of the operational amplifier. The fourth transistor circuit is connected between the second voltage terminal and the second input terminal of the operational amplifier, and The controller is further configured as follows: Based on the target current flowing in a first direction from the first voltage terminal to the second voltage terminal, and based on a first mode signal, a first gate voltage is applied to the first transistor circuit and the fourth transistor circuit to turn on the first transistor circuit and the fourth transistor circuit, and a second gate voltage is applied to the second transistor circuit and the third transistor circuit to turn off the second transistor circuit and the third transistor circuit. Based on the target current flowing in a second direction opposite to the first direction, and based on the second mode signal, the second gate voltage is applied to the first transistor circuit and the fourth transistor circuit to turn off the first transistor circuit and the fourth transistor circuit, and the first gate voltage is applied to the second transistor circuit and the third transistor circuit to turn on the second transistor circuit and the third transistor circuit.

12. The current sensing system according to claim 11, wherein, The controller is also configured to, based on a third mode signal, apply a ground voltage to each of the first transistor circuit, the second transistor circuit, the third transistor circuit, and the fourth transistor circuit, based on the current sensing device not operating, to turn off the first transistor circuit, the second transistor circuit, the third transistor circuit, and the fourth transistor circuit.

13. The current sensing system according to claim 12, further comprising: The processor is configured to provide the first mode signal, the second mode signal, and the third mode signal to the controller, and The processor is further configured as follows: Based on the target current flowing in the first direction, the first mode signal is provided to the controller. Based on the target current flowing in the second direction, the second mode signal is provided to the controller, and The third mode signal is provided to the controller based on the fact that the current sensing device is not operating.

14. The current sensing system according to claim 11, wherein, The controller includes: A third voltage terminal is connected to the first gate terminal of the first transistor circuit and the fourth gate terminal of the fourth transistor circuit; and The fourth voltage terminal is connected to the second gate terminal of the second transistor circuit and the third gate terminal of the third transistor circuit, and The controller is further configured to form a current mirror between a first power supply voltage terminal to which the first gate voltage is applied and the third voltage terminal, based on the first mode signal, to raise the third voltage terminal to the first gate voltage, and to form a path through the fourth voltage terminal between a second power supply voltage terminal to which the second gate voltage is applied and a ground voltage terminal, to raise the fourth voltage terminal to the second gate voltage.

15. The current sensing system according to claim 11, wherein, The controller includes: A third voltage terminal is connected to the first gate terminal of the first transistor circuit and the fourth gate terminal of the fourth transistor circuit; and The fourth voltage terminal is connected to the second gate terminal of the second transistor circuit and the third gate terminal of the third transistor circuit, and The controller is further configured to form a current mirror between a first power supply voltage terminal to which the first gate voltage is applied and the fourth voltage terminal, based on the second mode signal, to raise the fourth voltage terminal to the first gate voltage, and to form a path through the third voltage terminal between a second power supply voltage terminal to which the second gate voltage is applied and a ground voltage terminal, to raise the third voltage terminal to the second gate voltage.

16. A method of operating a current sensing system, the current sensing system being used to measure a target current flowing through a target transistor connected between a first voltage terminal and a second voltage terminal, wherein, The current sensing system includes a current sensing device, a controller for controlling the current sensing device, and a processor for providing a first mode signal or a second mode signal to the controller. The method includes: The processor determines whether the target current flows in a first direction from the first voltage terminal to the second voltage terminal; Based on determining that the target current flows in the first direction, the processor provides the first mode signal to the controller; and Based on the first mode signal, the controller provides a first gate voltage to the first and fourth transistor circuits of the current sensing device, and a second gate voltage to the second and third transistor circuits of the current sensing device. The first transistor circuit is connected between the first voltage terminal and the first input terminal of the operational amplifier of the current sensing device. The second transistor circuit is connected between the first voltage terminal and the second input terminal of the operational amplifier. The third transistor circuit is connected between the second voltage terminal and the first input terminal of the operational amplifier, and The fourth transistor circuit is connected between the second voltage terminal and the second input terminal of the operational amplifier.

17. The method of claim 16, further comprising: The target current is measured by the current sensing device based on a first sensing current flowing through the first transistor circuit.

18. The method according to claim 17, wherein, The current sensing device further includes a sensing resistor through which the first sensing current flows, and The measurement of the target current based on the first sensed current flowing through the first transistor circuit includes: A sensed voltage signal is obtained at both ends of the sense resistor; The first amplitude of the first sensed current is obtained based on the sensed resistor and the sensed voltage signal; and The second amplitude of the target current is obtained based on the first amplitude of the first sensed current and the sensing ratio of the current sensing device.

19. The method of claim 16, further comprising: The processor determines whether the target current flows in a second direction opposite to the first direction; In response to determining that the target current flows in the second direction, the processor provides the second mode signal to the controller; as well as Based on the second mode signal, the controller provides the second gate voltage to the first transistor circuit and the fourth transistor circuit of the current sensing device, and provides the first gate voltage to the second transistor circuit and the third transistor circuit of the current sensing device.

20. The method of claim 19, further comprising: The target current is measured by the current sensing device based on the second sensing current flowing through the third transistor circuit.

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