Strain slow-release Ge / Si / SiGe heterostructure and growth method thereof
By constructing a strain-releasing Ge/Si/SiGe heterostructure on a Ge substrate, controlling the mismatch strain release path and terminating dislocations, the problem of high-quality growth of SiGe epitaxial layers on Ge substrates is solved, providing a high-performance virtual substrate. This lays the foundation for high-quality epitaxial growth of III–V compound semiconductor materials and is suitable for device fabrication of short-wavelength red semiconductor lasers.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIAN UNIV OF TECH
- Filing Date
- 2026-01-28
- Publication Date
- 2026-05-01
AI Technical Summary
Existing technologies make it difficult to achieve high-quality growth of SiGe epitaxial layers on Ge substrates, especially in the epitaxial growth of tensile strain III–V materials. The substrate structure has insufficient ability to control the mismatch strain, resulting in severe dislocation propagation and affecting device performance.
A strain-release Ge/Si/SiGe heterostructure growth method is adopted. By growing a nanoscale Si buffer layer and a SiGe epitaxial layer on a Ge substrate, the mismatch strain release path is controlled, so that dislocations are released in advance in the Si buffer layer and terminated at the Si/SiGe interface, forming a low-defect SiGe epitaxial layer.
This method enables the growth of high-quality SiGe epitaxial layers on Ge substrates, reduces defect density, and provides a high-performance virtual substrate structure suitable for high-quality epitaxial growth of subsequent III-V compound semiconductor materials, especially for the fabrication of short-wavelength red semiconductor lasers.
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Abstract
Description
Strain-release Ge / Si / SiGe heterostructures and their growth methods Technical Field
[0001] This invention belongs to the field of semiconductor material structure design and heteroepitaxial growth technology, specifically relating to strain-released Ge / Si / SiGe heterostructures, and also to a method for growing strain-released Ge / Si / SiGe heterostructures. Background Technology
[0002] With the increasing demand for short-wavelength red semiconductor lasers in fields such as displays, precision machining, biomedicine, and optoelectronic integration, higher requirements are being placed on the quality of epitaxial material structures to achieve device performance. Constructing high-quality virtual substrate structures suitable for the epitaxial growth of III-V materials has become an important research direction in the field of semiconductor materials and devices, in order to achieve heterogeneous integration between III-V compound semiconductor materials and IV-type substrate materials.
[0003] Among numerous group IV materials, Ge is considered an ideal substrate material for achieving heterogeneous integration of group III–V and group IV materials due to its lattice constant being closer to that of many group III–V compound semiconductors. However, achieving high-quality epitaxial growth of group III–V materials on Ge substrates, especially tensile strained III–V materials, places more stringent demands on the strain control capability and defect suppression level of the substrate structure. Compared to traditional compressive strained III–V epitaxial systems on Si or Ge substrates, the epitaxial growth of tensile strained III–V materials on Ge substrates is more prone to inducing strain concentration and dislocation propagation, leading to a decrease in the crystal quality of the epitaxial layer and severely limiting the improvement of device performance.
[0004] Current research and processing techniques on SiGe epitaxial materials are mainly based on Si substrate systems. When epitaxially growing SiGe materials on Si substrates, methods such as gradient SiGe buffer layers, thick buffer layers, or multilayer composite buffer structures (such as superlattice buffer layers) are commonly used to gradually release the lattice mismatch strain between Si and SiGe, thereby suppressing the generation and propagation of dislocations. These buffer structures can improve the crystal quality of SiGe epitaxial layers to a certain extent and have been widely used in Si-based SiGe material systems.
[0005] Previous studies have shown that by introducing a low-temperature grown Si buffer layer on a Si substrate and reasonably controlling its thickness, the intercalation dislocation density in SiGe thin films can be effectively reduced, thereby improving the overall crystal quality of the epitaxial layer. Furthermore, the strain relaxation behavior of Ge-rich SiGe thin films grown on Si(001) substrates has a significant impact on the crystal quality of the epitaxial layer, further illustrating the crucial role of buffer layer structure design in Si-based SiGe epitaxial technology. These research findings constitute an important technical foundation for the design of Si-based SiGe buffer structures and have been widely applied in the epitaxial material fabrication of traditional semiconductor devices. However, due to the greater lattice mismatch between Ge and Si, directly introducing the aforementioned buffer structure on a Ge substrate often requires more complex process conditions or a larger structural thickness. This not only increases the difficulty and cost of epitaxial growth but also hinders the compactness and integration of device structures, making it difficult to directly meet the practical requirements for high-quality SiGe epitaxial growth on Ge substrates.
[0006] Against this backdrop, existing technologies struggle to simultaneously meet the demands of high-quality SiGe epitaxial growth on Ge substrates and subsequent epitaxial integration of III-V compound semiconductors. Particularly in applications involving the epitaxial growth of tensile strained III-V materials, the substrate structure requires enhanced strain control and higher defect suppression levels to pre-release mismatch strain and effectively prevent dislocation propagation into the upper epitaxial structure. Based on these technical requirements, it is necessary to propose a Ge / Si / SiGe heterostructure and its epitaxial growth method. This method should ensure structural compactness while effectively controlling the mismatch strain release path and dislocation evolution behavior. This would provide a stable and reliable virtual substrate structure for the high-quality epitaxial growth of III-V compound semiconductor materials on Ge substrates and meet the application requirements of short-wavelength red semiconductor lasers for high-performance epitaxial materials. Summary of the Invention
[0007] The purpose of this invention is to provide a method for growing strain-released Ge / Si / SiGe heterostructures, which solves the problem of high-quality growth of SiGe epitaxial layers on Ge substrates in the prior art.
[0008] Another objective of this invention is to provide a strain-sustaining Ge / Si / SiGe heterostructure.
[0009] The technical solution adopted in this invention is a method for growing strain-slow-release Ge / Si / SiGe heterostructures, which is implemented according to the following steps:
[0010] Step S1: Ge substrate surface treatment and activation; Step S2: Si buffer layer epitaxially grown on the Ge substrate using LPCVD; Step S3: SiGe epitaxial layer grown on the Si buffer layer using LPCVD; Step S4: After the SiGe epitaxial layer growth is completed, the temperature is lowered in a hydrogen atmosphere, then switched to a nitrogen atmosphere, and naturally cooled to room temperature to form a strain-released Ge / Si / SiGe heterostructure.
[0011] The present invention is further characterized in that, in step S1, specifically: a Ge single crystal substrate is selected as the epitaxial growth substrate, and the Ge single crystal substrate is treated with hydrofluoric acid solution, followed by deionized water cleaning, acetone ultrasonic cleaning, and deionized water ultrasonic cleaning in sequence; the treated Ge single crystal substrate is loaded into the LPCVD reaction chamber, heated to 400°C and held for 5 min under a nitrogen atmosphere, and then heated to 700°C and held for 10 min; then the atmosphere is switched to hydrogen, and the Ge substrate is activated for 5 min to obtain a clean Ge substrate surface suitable for epitaxial growth.
[0012] In step S2, the temperature of the reaction chamber is set to 600-650℃, silane is used as the Si precursor gas, hydrogen is used as the carrier gas, and deposition is carried out under the condition of 5000Pa pressure in the reaction chamber. The growth time is 10s, and a nanoscale Si buffer layer with a thickness of 5-12nm is obtained.
[0013] In step S3, the temperature of the reaction chamber is raised to 650°C, germane gas is introduced, followed by silane after a 1-second delay, and hydrogen is used as the carrier gas. Co-deposition is carried out under the condition of a reaction chamber pressure of 5000 Pa. The growth time of the SiGe epitaxial layer is 30-40 min, and the SiGe epitaxial layer is obtained.
[0014] The thickness of the SiGe epitaxial layer is 180-200 nm. The molar fraction of Ge in the SiGe epitaxial layer is 0.2-0.9.
[0015] Another technical solution adopted in this invention is a strain-released Ge / Si / SiGe heterostructure, which consists of a Ge substrate, a Si buffer layer, and a SiGe epitaxial layer from bottom to top; the thickness of the Si buffer layer is 5-12 nm; and the thickness of the SiGe epitaxial layer is 180-200 nm.
[0016] The beneficial effects of the present invention are: 1) By constructing a strain-released Ge / Si / SiGe heterostructure, the present invention achieves effective control over the strain release path of the Ge / Si interface mismatch, so that dislocations are pre-released in the Si buffer layer and terminated at the Si / SiGe interface, thereby significantly reducing the defect density in the SiGe epitaxial layer.
[0017] 2) The Si buffer layer used in this invention has a nanometer-level thickness, which avoids the structural complexity and process difficulty brought about by traditional thick buffer layers or gradient buffer structures, and is conducive to the compactness and integration of epitaxial structures.
[0018] 3) This invention can obtain a SiGe epitaxial layer structure with stable crystal quality in a wide range of Ge composition, demonstrating good process adaptability and controllability.
[0019] 4) The strain-released Ge / Si / SiGe heterostructure constructed in this invention can serve as a high-quality virtual substrate structure for subsequent III-V compound semiconductor materials on Ge substrates. It is particularly suitable for the epitaxial growth of tensile strain III-V materials with higher requirements for substrate strain control and defect suppression, providing a reliable epitaxial material basis for the fabrication of high-performance devices for short-wavelength red semiconductor lasers. Attached Figure Description
[0020] Figure 1 is a schematic diagram of the strain-released Ge / Si / SiGe heterostructure for short-wavelength red semiconductor lasers according to the present invention; Figure 2 is a schematic diagram of the molecular dynamics simulation results of the strain-released Ge / Si / SiGe heterostructure; Figure 3 is a cross-sectional TEM characterization result of the strain-released Ge / Si / SiGe heterostructure.
[0021] In the figure: 1. Ge substrate; 2. Si buffer layer; 3. SiGe epitaxial layer. Detailed Implementation
[0022] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.
[0023] Example 1: The strain-release Ge / Si / SiGe heterostructure of the present invention is shown in Figure 1. From bottom to top, it consists of a Ge substrate 1, a Si buffer layer 2, and a SiGe epitaxial layer 3. The thickness of the Si buffer layer is 5-12 nm, preferably 6-11.5 nm. The thickness of the SiGe epitaxial layer is 180-200 nm. The molar fraction of Ge in the SiGe epitaxial layer is 0.2-0.9, preferably 0.4-0.7.
[0024] Example 2 The method for growing the strain-released Ge / Si / SiGe heterostructure of the present invention is implemented according to the following steps: Step S1: Ge substrate surface treatment and activation; Ge(001) single crystal substrate is selected as epitaxial growth substrate, and the Ge single crystal substrate is treated with a 2% hydrofluoric acid solution to remove the natural oxide layer. Then, it is sequentially cleaned with deionized water, ultrasonically cleaned with acetone for 10 min, and ultrasonically cleaned with deionized water for 15 min to remove surface contaminants.
[0025] The treated Ge single crystal substrate was loaded into an LPCVD reaction chamber and heated to 400℃ under a nitrogen atmosphere for 5 min, followed by heating to 700℃ and holding for 10 min to remove residual H2O, O, and C impurities. Then, a hydrogen atmosphere (200 sccm, reaction chamber pressure 5000 Pa) was switched to activate the Ge substrate for 5 min to obtain a clean Ge substrate surface suitable for epitaxial growth. Step S2: A Si buffer layer was epitaxially grown on the Ge substrate using low-pressure chemical vapor deposition (LPCVD). The reaction chamber temperature was set to 600-650℃ (preferably 610-630℃), and silane (Si2H6) was used as the Si precursor gas (source flow rate: 5 sccm, push flow rate: 100 sccm, inject flow rate: 105 sccm). A Si buffer layer with a thickness of 5-12 nm (preferably 6-11.5 nm) is deposited using hydrogen as the carrier gas at a reaction chamber pressure of 5000 Pa for 10 s, yielding a nanoscale Si buffer layer. This Si buffer layer acts as a strain-releasing layer, controlling the release location of Ge / Si interface mismatch strain, thus confining dislocations induced by the Ge / Si interface primarily within the Si buffer layer. Step S3: An SiGe epitaxial layer is grown on the Si buffer layer using LPCVD. The reaction chamber temperature is raised to 650 °C, and germanane (GeH4) gas (10 sccm) is first introduced, followed by silane (Si2H6) after a 1 s delay (source flow rate: 5 sccm, push flow rate: 100 sccm). Hydrogen is used as the carrier gas, and co-deposition is performed at a reaction chamber pressure of 5000 Pa. The flow rate is adjusted to maintain the molar fraction of Ge in the SiGe epitaxial layer at 0.2-0.9, preferably 0.4-0.7. Within the Ge composition range, the SiGe epitaxial layer maintains the cubic diamond crystal structure and no through dislocations induced by the Si / SiGe interface appear.
[0026] The growth time of the SiGe epitaxial layer was set to 30-40 min to obtain a SiGe epitaxial layer with a thickness of 180-200 nm.
[0027] Step S4: After the SiGe epitaxial layer is grown, the temperature is lowered to 350℃ in a hydrogen atmosphere (cooling rate is 1℃ / s), and then switched to a nitrogen atmosphere and naturally cooled to room temperature to complete the in-situ annealing and cooling process, forming a strain-released Ge / Si / SiGe heterostructure.
[0028] By synergistically controlling the growth temperature and thickness of the Si buffer layer, the strain caused by the lattice mismatch at the Ge / Si interface is pre-released in the Si buffer layer, and the dislocations are directionally terminated at the Si / SiGe interface, thereby suppressing the propagation of dislocations to the upper SiGe epitaxial layer.
[0029] Under the above process and parameter conditions, the Si buffer layer acts as a strain relief layer, which effectively relieves the strain of the Ge / Si interface mismatch within the layer and enables the dislocation to be pre-terminated at the Si / SiGe interface. This results in the formation of a region with low defects or even no through dislocations in the SiGe epitaxial layer, providing a virtual substrate structure for the high-quality epitaxial growth of III-V compound semiconductor materials on the Ge substrate.
[0030] Example 3 Epitaxial growth method of strain-released Ge / Si / SiGe heterostructure for short-wavelength red semiconductor laser (Ge molar fraction is 0.4) S1: Ge substrate surface treatment and activation Ge(001) single crystal substrate was selected as the epitaxial growth substrate. The Ge substrate was treated with a 2% hydrofluoric acid solution to remove the natural oxide layer. Then, it was cleaned with deionized water, ultrasonically cleaned with acetone for 10 min and ultrasonically cleaned with deionized water for 15 min in sequence to remove surface contaminants.
[0031] The treated Ge substrate was loaded into the LPCVD reaction chamber and heated to 400°C and held for 5 min under a nitrogen atmosphere. Then, the temperature was further increased to 700°C and held for 10 min to remove residual H2O, O and C impurities. After that, the atmosphere was switched to hydrogen (200 sccm, reaction chamber pressure of 5000 Pa) to activate the Ge substrate for 5 min to obtain a clean Ge surface suitable for epitaxial growth.
[0032] S2: Epitaxial growth of Si buffer layer: On the surface of the Ge substrate after step S1, a Si buffer layer is epitaxially grown using the LPCVD method.
[0033] The reaction chamber temperature was set to 620℃, and silane (Si2H6) was used as the Si precursor gas (source flow rate: 5 sccm, push flow rate: 100 sccm, inject flow rate: 105 sccm). Hydrogen was used as the carrier gas, and deposition was carried out under the condition of 5000 Pa pressure in the reaction chamber. The growth time was 10 s, and a nanoscale Si buffer layer with a thickness of 6 nm was obtained.
[0034] The Si buffer layer, acting as a strain-relieving layer, is used to regulate the release location of the Ge / Si interface mismatch strain, so that the dislocations induced by the Ge / Si interface are mainly confined within the Si buffer layer.
[0035] S3: Growth of the SiGe epitaxial layer (Ge=0.4): An LPCVD method was used to continue epitaxial growth of the Si buffer layer on top of the Si layer. The reaction chamber temperature was raised to 650℃. First, germanane (GeH4) gas (10 sccm) was introduced, followed by silane (Si2H6) after a 1-second delay (source flow rate: 5 sccm, push flow rate: 100 sccm), with hydrogen as the carrier gas. Co-deposition was carried out at a reaction chamber pressure of 5000 Pa. Simultaneously, an injector channel was introduced, and the injector flow rate was adjusted to achieve a Ge molar fraction of 0.4 in the SiGe epitaxial layer.
[0036] The growth time of the SiGe epitaxial layer was set to 40 min, and a SiGe epitaxial layer with a thickness of 200 nm was obtained.
[0037] S4: Annealing treatment After the SiGe epitaxial layer growth is completed, the temperature is lowered to 350℃ in a hydrogen atmosphere (cooling rate is 1℃ / s), and then switched to a nitrogen atmosphere and naturally cooled to room temperature to complete the in-situ annealing and cooling process.
[0038] Through the above steps, a strain-releasing Ge / Si / SiGe heterostructure with a Ge mole fraction of 0.4 can be obtained, in which the mismatch strain is mainly relieved within the Si buffer layer, and the dislocations are pre-terminated at the Si / SiGe interface, thus providing a stable virtual substrate structure for the subsequent high-quality epitaxial growth of III-V compound semiconductor materials on the Ge substrate.
[0039] Example 4 describes an epitaxial growth method for strain-releasing Ge / Si / SiGe heterostructures for short-wavelength red semiconductor lasers. Specifically, a strain-releasing Ge / Si / SiGe heterostructure is prepared on a Ge(001) substrate using low-pressure chemical vapor deposition (LPCVD). To obtain a SiGe epitaxial layer with a Ge molar fraction of 0.7 and to enhance the strain-releasing capability, the growth time of the Si buffer layer is set to 20s (thickness of 10nm). At the same time, the molar fraction of Ge in the SiGe epitaxial layer is set to 0.7 by adjusting the injection flow rate. The epitaxial growth process includes the following steps: S1: Ge substrate surface treatment and activation. A Ge(001) single crystal substrate is selected as the epitaxial growth substrate. The Ge substrate is treated with a 2% hydrofluoric acid solution to remove the natural oxide layer. Subsequently, it is cleaned with deionized water, ultrasonically cleaned with acetone for 10min, and ultrasonically cleaned with deionized water for 15min to remove surface contaminants.
[0040] The treated Ge substrate was loaded into the LPCVD reaction chamber and heated to 400°C and held for 5 min under a nitrogen atmosphere. Then, the temperature was further increased to 700°C and held for 10 min to remove residual H2O, O and C impurities. After that, the atmosphere was switched to hydrogen (200 sccm, reaction chamber pressure 5000 Pa) to activate the Ge substrate for 5 min to obtain a clean Ge surface suitable for epitaxial growth.
[0041] S2: The Si buffer layer is epitaxially grown on the surface of the Ge substrate after step S1 using the LPCVD method.
[0042] The reaction chamber temperature was set to 620℃, and silane (Si2H6) was used as the Si precursor gas (source flow rate: 5 sccm, push flow rate: 100 sccm, inject flow rate: 105 sccm). Hydrogen was used as the carrier gas, and deposition was carried out under a reaction chamber pressure of 5000 Pa for 20 s to obtain a nanoscale Si buffer layer with a thickness of 10 nm.
[0043] The Si buffer layer is used to enhance the ability to slow down the release of strain due to Ge / Si interface mismatch, so as to meet the epitaxial growth requirements under greater strain conditions.
[0044] S3: Growth of the SiGe epitaxial layer (Ge=0.7): An LPCVD method was used to continue epitaxial growth of the Si buffer layer on top of the Si layer. The reaction chamber temperature was raised to 650℃. First, germanane (GeH4) gas was introduced (10 sccm), followed by silane (Si2H6) after a 1-second delay (source flow rate: 5 sccm, push flow rate: 100 sccm), with hydrogen as the carrier gas. Co-deposition was carried out at a reaction chamber pressure of 5000 Pa. Simultaneously, an injector channel was introduced, and the molar fraction of Ge in the SiGe epitaxial layer was adjusted to 0.7 by regulating the injector flow rate.
[0045] The growth time of the SiGe epitaxial layer was set to 35 min, and a SiGe epitaxial layer with a thickness of 180 nm was obtained.
[0046] S4: Annealing treatment After the SiGe epitaxial layer growth is completed, the temperature is lowered to 350℃ in a hydrogen atmosphere (the cooling rate is about 1℃ / s), and then switched to a nitrogen atmosphere and naturally cooled to room temperature to complete the in-situ annealing and cooling process.
[0047] Through the above steps, a strain-controlled Ge / Si / SiGe heterostructure with a Ge mole fraction of 0.7 can be obtained. Compared with Example 1, this example can still achieve pre-termination of dislocations at the Si / SiGe interface under larger mismatch strain conditions, further verifying the effectiveness of the Si buffer layer in enhancing strain control and suppressing dislocation propagation.
[0048] Example 5: Verification of the Defect Suppression Effect of the Strain-Release Ge / Si / SiGe Heterostructure. This example is used to verify and illustrate the effect of the strain-release Ge / Si / SiGe heterostructure constructed in this invention in suppressing the propagation of mismatched dislocations. Specifically, it includes molecular dynamics simulation analysis and transmission electron microscopy (TEM) characterization results of the experimental materials.
[0049] (1) Molecular dynamics simulation verification: A Ge / Si / SiGe heterostructure model was constructed using molecular dynamics methods. A nanoscale Si buffer layer and a SiGe epitaxial layer were sequentially introduced on the Ge substrate to simulate the strain release and dislocation evolution behavior caused by Ge / Si lattice mismatch during epitaxial growth.
[0050] As shown in Figure 2, the simulation results show that the dislocations induced by the mismatch strain at the Ge / Si interface are mainly distributed inside the Si buffer layer and terminate at the Si / SiGe interface. The upper SiGe epitaxial layer maintains a relatively complete crystal structure, and no obvious through dislocations were observed.
[0051] (2) TEM characterization and verification Based on the above structural design, Ge / Si / SiGe heterostructure samples were prepared by epitaxial growth process, and their cross-sectional structure was characterized and analyzed by transmission electron microscopy (TEM).
[0052] As shown in Figure 3, TEM results show that dislocations are mainly concentrated in the Ge / Si interface and the Si buffer layer region, while no obvious through dislocation propagation phenomenon was observed in the SiGe epitaxial layer. The upper SiGe layer exhibits a continuous and complete crystal structure.
[0053] (3) Verification results show that, combined with molecular dynamics simulation results and TEM experimental characterization results, it can be confirmed that after introducing a nanoscale Si buffer layer between the Ge substrate and the SiGe epitaxial layer, the mismatch strain is mainly released in the Si buffer layer, and the dislocation is terminated at the Si / SiGe interface, thereby suppressing the extension of dislocations to the upper SiGe epitaxial structure.
[0054] The above results indicate that the strain-released Ge / Si / SiGe heterostructure of the present invention can effectively reduce the defect density in the upper SiGe epitaxial layer and improve its crystal quality.
[0055] Example 6: The method of the present invention sequentially epitaxially grows a Si buffer layer and a SiGe epitaxial layer on a Ge substrate. By synergistically controlling the deposition temperature and thickness of the Si buffer layer, a strain-releasing Ge / Si / SiGe heterostructure is constructed. This allows the strain caused by lattice mismatch at the Ge / Si interface to be pre-released within the Si buffer layer, and promotes the directional termination of dislocations at the Si / SiGe interface, thereby effectively blocking the propagation path of dislocations to the SiGe epitaxial layer. In this method, the deposition temperature of the Si buffer layer is controlled at 600-650℃, and the thickness is controlled at 5-12nm. Within this process window, the location of the mismatch strain release can be precisely shifted forward, allowing the strain to be mainly released in the Si buffer layer, thereby forming a low-defect or even dislocation-free region in the SiGe epitaxial layer. The strain-released Ge / Si / SiGe heterostructure constructed in this invention can serve as a high-quality virtual substrate for subsequent epitaxial growth of III–V compound semiconductors, providing a stable epitaxial basis for achieving low-defect integration of III–V materials on IV substrates, thereby providing an innovative epitaxial growth scheme for the fabrication of high-performance devices for short-wavelength red semiconductor lasers.
Claims
1. A strain-controlled Ge / Si / SiGe heterostructure, characterized in that, From bottom to top, the structure consists of a Ge substrate, a Si buffer layer, and a SiGe epitaxial layer; the thickness of the Si buffer layer is 5-12 nm; and the thickness of the SiGe epitaxial layer is 180-200 nm.
2. A method for growing strain-released Ge / Si / SiGe heterostructures, characterized in that, Specifically, the following steps are performed: Step S1: Ge substrate surface treatment and activation; Step S2: Si buffer layer is epitaxially grown on the Ge substrate using LPCVD; Step S3: SiGe epitaxial layer is grown on the Si buffer layer using LPCVD; Step S4: After the SiGe epitaxial layer growth is completed, the temperature is lowered in a hydrogen atmosphere, then switched to a nitrogen atmosphere, and naturally cooled to room temperature to form a strain-released Ge / Si / SiGe heterostructure.
3. The method for growing strain-released Ge / Si / SiGe heterostructures as described in claim 2, characterized in that, In step S1, specifically: a Ge single crystal substrate is selected as the epitaxial growth substrate, and the Ge single crystal substrate is treated with hydrofluoric acid solution, followed by deionized water cleaning, acetone ultrasonic cleaning, and deionized water ultrasonic cleaning in sequence; the treated Ge single crystal substrate is loaded into the LPCVD reaction chamber, heated to 400°C and held for 5 min under a nitrogen atmosphere, and then heated to 700°C and held for 10 min; then the atmosphere is switched to hydrogen, and the Ge substrate is activated for 5 min to obtain a clean Ge substrate surface suitable for epitaxial growth.
4. The method for growing strain-released Ge / Si / SiGe heterostructures as described in claim 2, characterized in that, In step S2, the temperature of the reaction chamber is set to 600-650℃, silane is used as the Si precursor gas, hydrogen is used as the carrier gas, and deposition is carried out under the condition of 5000Pa pressure in the reaction chamber. The growth time is 10s to obtain a nanoscale Si buffer layer.
5. The method for growing strain-released Ge / Si / SiGe heterostructures as described in claim 4, characterized in that, The thickness of the Si buffer layer is 5-12 nm.
6. The method for growing strain-released Ge / Si / SiGe heterostructures as described in claim 2, characterized in that, In step S3, the temperature of the reaction chamber is raised to 650°C, germane gas is introduced, followed by silane after a 1-second delay, and hydrogen is used as the carrier gas. Co-deposition is carried out under the condition of a reaction chamber pressure of 5000 Pa. The growth time of the SiGe epitaxial layer is 30-40 min, and the SiGe epitaxial layer is obtained.
7. The method for growing strain-released Ge / Si / SiGe heterostructures as described in claim 6, characterized in that, The thickness of the SiGe epitaxial layer is 180-200 nm.
8. The method for growing strain-released Ge / Si / SiGe heterostructures as described in claim 6, characterized in that, The molar fraction of Ge in the SiGe epitaxial layer is 0.2-0.9.