Mainboard assembly stress simulation modeling method, electronic equipment and program product

Abstract

The invention provides a mainboard assembly stress simulation modeling method, electronic equipment and a program product, which can be used in the technical field of simulation modeling. The method comprises the steps of selecting a target component of a mainboard three-dimensional model in response to a component selection operation of a user; wherein the target component comprises a mainboard, a chip and a bonding pad silk-screen line; chip soldering tin is determined based on the bonding pad silk-screen lines, grid division is carried out on the chip soldering tin, and chip soldering tin grids are obtained; performing grid division on the mainboard to obtain a mainboard grid; determining a chip main body of the chip based on the soldering tin thickness of the chip soldering tin, and performing grid division on the chip main body to obtain a chip grid; and based on the constraint relationship among the target components, establishing a binding connection relationship among the grids of the target components, and obtaining a stress simulation model. According to the method, the accuracy and modeling efficiency of stress simulation modeling of the mainboard assembly are remarkably improved.

Description

Technical Field

[0001] This application relates to the field of simulation modeling technology, and in particular to a motherboard component stress simulation modeling method, electronic equipment and program products. Background Technology

[0002] In the field of electronic equipment manufacturing, chips are the core components of motherboards, and the reliability of the soldering between chips and motherboards directly determines the long-term operational reliability of electronic equipment. To prevent damage or cracks in the solder between chips and motherboards due to multiple complex loads such as temperature cycling, mechanical vibration, and thermal shock, which could lead to chip desoldering failure, accurately identifying the risk of chip desoldering and optimizing design and processes in advance has become a core requirement for ensuring product reliability in the field of electronic equipment manufacturing.

[0003] To predict and mitigate such risks, the industry commonly employs stress simulation methods. This involves establishing a stress simulation model of the motherboard assembly to calculate stress and strain data in the chip solder area, thereby assessing the risk of chip desoldering and guiding the structural optimization of the motherboard assembly. An accurate motherboard assembly stress simulation model is fundamental to ensuring accurate stress analysis results in the chip solder area.

[0004] However, the current stress simulation modeling process for motherboard components is cumbersome and has low accuracy, making it impossible to accurately obtain precise stress data of the solder area of ​​the chip on the motherboard. This results in insufficient accuracy of the simulation data, making it difficult to determine the correct optimization direction for the motherboard or process, and ultimately leading to a significant increase in the time and manpower costs of the project during the research and development process. Summary of the Invention

[0005] This application provides a motherboard component stress simulation modeling method, electronic device, and program product to solve the technical problems of cumbersome operation and low accuracy in the existing motherboard component stress simulation model construction process.

[0006] According to the first aspect disclosed in this application, this application provides a method for stress simulation modeling of motherboard components, the method comprising:

[0007] In response to the user's component selection operation, the target component of the motherboard 3D model is selected; wherein, the target component includes the motherboard, chips, and solder pad silkscreen lines;

[0008] The chip solder is determined based on the silkscreen lines of the pads, and the chip solder is divided into a grid to obtain the chip solder grid.

[0009] The motherboard is divided into grids to obtain the motherboard grid;

[0010] The chip body is determined based on the solder thickness of the chip solder, and the chip body is divided into a grid to obtain the chip grid;

[0011] Based on the constraint relationships between various target components, the binding connection relationships between the meshes of various target components are established to obtain the stress simulation model.

[0012] In one feasible implementation, the method further includes:

[0013] Extract the motherboard mid-surface of the motherboard;

[0014] Based on the normal vector of the motherboard's mid-surface, a local coordinate system is established with the motherboard's mid-surface as the reference.

[0015] Based on the coordinate parameters of the chip solder in the local coordinate system, a solder geometry matching the chip solder is constructed;

[0016] The motherboard is divided into sections based on the solder geometry to determine the chip solder areas on the motherboard.

[0017] In one feasible implementation, the target component further includes other components, such as resistive elements, capacitive elements, inductive elements, or connectors. Before establishing the binding connection relationship between the meshes of each target component based on the constraint relationship between the various target components to obtain the stress simulation model, the method further includes:

[0018] Obtain the coordinate parameters of the other components in the local coordinate system;

[0019] The other components are meshed based on the coordinate parameters to obtain the mesh of the other components.

[0020] In one feasible implementation, the target component further includes a shielding cover, and the method further includes:

[0021] Extract the thickness of the shielding cover;

[0022] The shielding cover is divided into a grid based on the thickness of the shielding cover to obtain the shielding cover grid.

[0023] Based on the relative position of the shielding cover and the motherboard, determine the shielding cover solder corresponding to the shielding cover;

[0024] The solder of the shielding cover is divided into a grid to obtain the solder grid of the shielding cover.

[0025] In one feasible implementation, the motherboard is meshed to obtain a motherboard mesh, including:

[0026] Extract the motherboard thickness;

[0027] The motherboard is divided into grids based on its thickness to obtain the motherboard grid.

[0028] In one feasible implementation, determining the chip body based on the solder thickness of the chip solder includes:

[0029] The bottom of the chip is cut based on the solder thickness to determine the chip body.

[0030] In one feasible implementation, the chip body is meshed to obtain a chip mesh, including:

[0031] Extract the chip thickness of the chip body;

[0032] The chip body is divided into grids based on the chip thickness to obtain the chip grid.

[0033] In one feasible implementation, the motherboard 3D model is obtained based on the following method:

[0034] Obtain the structural drawings of the motherboard assembly;

[0035] Based on the geometric parameters in the structural drawings, a 3D model of the motherboard is generated.

[0036] According to a second aspect disclosed in this application, this application provides a motherboard component stress simulation modeling apparatus, the apparatus comprising:

[0037] The component selection module is used to select target components of the motherboard 3D model in response to the user's component selection operation; wherein, the target components include the motherboard, chips, and solder pad silkscreen lines;

[0038] The meshing module is used to determine the chip solder based on the solder pad silkscreen lines, and to perform meshing on the chip solder to obtain a chip solder mesh; and to perform meshing on the motherboard to obtain a motherboard mesh; and to determine the chip body of the chip based on the solder thickness of the chip solder, and to perform meshing on the chip body to obtain a chip mesh.

[0039] The binding connection module is used to establish binding connection relationships between the meshes of various target components based on the constraint relationships between them, thereby obtaining a stress simulation model.

[0040] According to a third aspect disclosed in this application, this application provides an electronic device, including a processor and a memory communicatively connected to the processor;

[0041] The memory stores computer-executed instructions;

[0042] The processor executes computer execution instructions stored in the memory to implement the method described in any one of the first aspects.

[0043] According to the fourth aspect disclosed in this application, this application provides a computer-readable storage medium storing computer-executable instructions, which, when executed, are used to implement the method described in any one of the first aspects.

[0044] According to the fifth aspect disclosed in this application, this application provides a computer program product, including a computer program, which, when executed, is used to implement the method described in any one of the first aspects.

[0045] Compared with the prior art, this application has the following beneficial effects:

[0046] This application provides a motherboard component stress simulation modeling method, electronic device, and program product. By meshing selected target components on the motherboard's 3D model, it achieves precise avoidance of the motherboard mesh from the chip solder mesh and the chip mesh from the chip solder, ensuring the accuracy of the meshing of each component on the motherboard component. This improves the modeling accuracy of the motherboard component stress simulation model, allowing for more accurate stress simulation results. Furthermore, it automates the binding of component meshes based on the constraint relationships between components, significantly simplifying the modeling process and improving modeling efficiency. It also avoids human error, ensuring that the connection relationships of all components are consistent with the actual design, further enhancing the modeling accuracy of the stress simulation model. Attached Figure Description

[0047] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0048] Figure 1 A flowchart illustrating a motherboard component stress simulation modeling method provided in this application embodiment;

[0049] Figure 2 A flowchart illustrating another motherboard component stress simulation modeling method provided in this application embodiment;

[0050] Figure 3 A schematic diagram of a three-dimensional model of a motherboard provided in an embodiment of this application;

[0051] Figure 4 A schematic diagram of a user interface provided in an embodiment of this application;

[0052] Figure 5 A partial schematic diagram of a stress simulation model provided in an embodiment of this application;

[0053] Figure 6 A schematic diagram of a motherboard component stress simulation modeling device provided in this application embodiment;

[0054] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0055] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0056] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0057] In the field of electronic equipment manufacturing, chips are the core components of motherboards, and the reliability of the soldering between the chip and the motherboard directly determines the long-term operational reliability of the electronic equipment. During actual production, transportation, and use, the solder between the chip and the motherboard must withstand multiple complex loads, including temperature cycling, mechanical vibration, and thermal shock. These loads can easily cause damage or cracks in the solder, ultimately leading to chip detachment and failure. Chip detachment not only increases product rework rates and production costs but can also cause serious consequences such as equipment downtime. Therefore, accurately identifying chip detachment risks and optimizing design and processes in advance have become core requirements for ensuring product reliability in the electronic equipment manufacturing industry.

[0058] To predict and mitigate such risks, the industry commonly employs stress simulation methods. This involves establishing a stress simulation model of the motherboard assembly to calculate stress and strain data in the chip solder area, thereby assessing the risk of chip desoldering and guiding the structural optimization of the motherboard assembly. Therefore, accurate stress analysis results in the chip solder area are crucial for ensuring the reliability of chip desoldering risk assessments, while an accurate motherboard assembly stress simulation model is the foundation for obtaining accurate stress analysis results in the chip solder area.

[0059] In the process of constructing stress simulation models, mesh generation, by discretizing the continuous solution domain into finite elements, provides an accurate numerical basis for stress simulation modeling of motherboard components and is a key step in achieving accurate simulation and engineering analysis of stress distribution in motherboard components. However, in existing technologies, meshing of motherboard components suffers from problems such as mesh interference and misalignment. The generated chip mesh interferes with the chip solder mesh, requiring manual adjustment; furthermore, the positional distribution of the motherboard mesh does not correspond to the chip solder mesh, specifically, the obtained motherboard mesh area is significantly larger than the actual area, leading to inaccurate stress data calculations based on this mesh, which in turn affects the reliability of subsequent desoldering risk assessment results.

[0060] Therefore, due to the cumbersome and inaccurate operation of current motherboard component stress simulation modeling, it is impossible to accurately obtain precise stress data of the solder area of ​​the chip on the motherboard. This results in insufficient accuracy of the simulation data, making it difficult to determine the correct optimization direction for the motherboard or process. Ultimately, this leads to a significant increase in the time and manpower costs of the project during the research and development process.

[0061] To address the aforementioned technical issues, this application proposes a motherboard component stress simulation modeling method, electronic device, and program product. By achieving precise avoidance between meshes, the accuracy of mesh generation for each component on the motherboard component is ensured, thereby improving the accuracy of motherboard component stress simulation modeling. Furthermore, based on the constraint relationships between components, automated binding of component meshes is achieved, significantly simplifying the modeling process and improving modeling efficiency.

[0062] The following detailed description, through specific embodiments, illustrates the technical solutions of the motherboard component stress simulation modeling method, electronic device, and program product provided in this application. It should be noted that the following embodiments may exist independently or in combination; for identical or similar content, further description will not be repeated in different embodiments.

[0063] Figure 1 This is a flowchart illustrating a motherboard component stress simulation modeling method provided in an embodiment of this application. (See attached diagram.) Figure 1 In some embodiments, the process of this motherboard component stress simulation modeling method includes the following steps:

[0064] S101, in response to the user's component selection operation, selects the target components of the motherboard 3D model; wherein, the target components include the motherboard, chips and solder pad silkscreen lines.

[0065] Specifically, based on the user's component selection operation, the corresponding target component on the motherboard 3D model is determined, and the target component is selected and identified, which facilitates the subsequent meshing operation of each target component.

[0066] For details, please refer to the motherboard 3D model. Figure 3 As shown. The 3D model of the motherboard includes the motherboard 301, chip 302, other components 303, shielding cover 304, etc.

[0067] Specifically, a corresponding user interface is generated to facilitate user selection of components. For example, see [link to user interface]. Figure 4 As shown, the user interface includes multiple component selection controls, such as selecting the motherboard, selecting chips, selecting solder pad silkscreen lines, etc. After clicking the component selection control, the user can click the corresponding component in the motherboard 3D model to select and mark the component.

[0068] The user interface can be integrated into existing finite element analysis software as a secondary development module, enabling component selection and mesh generation within the finite element analysis software.

[0069] For example, when a user clicks to select the motherboard control, and then clicks the corresponding model part in the motherboard 3D model, that model part will be selected and marked as the motherboard.

[0070] In addition, the user interface can be set with an automatic grid division control. When the user clicks the automatic grid division control, the following grid division operation will be executed automatically.

[0071] S102, determine the chip solder based on the pad silkscreen lines, and perform mesh division on the chip solder to obtain the chip solder mesh.

[0072] Since the motherboard's 3D model does not include solid modeling of the chip solder, it's impossible to select the chip solder using component selection. To facilitate chip soldering, the motherboard assembly uses solder pads as the soldering area for the chip. The solder pad silkscreen lines are ink lines printed on the PCB surface to mark the position and extent of the solder pads. Their function is to clearly define the chip's mounting boundaries and orientation, providing a precise physical positioning reference for chip soldering, thereby determining the chip's soldering area. Therefore, the chip solder mesh is obtained by dividing the area corresponding to the solder pad silkscreen lines on the motherboard and combining this with the actual solder thickness of the chip solder during the motherboard assembly manufacturing process.

[0073] S103 performs mesh division on the motherboard to obtain the motherboard mesh.

[0074] If the motherboard has already been selected in the 3D model of the motherboard, then the motherboard can be directly meshed to obtain the motherboard mesh.

[0075] S104, determine the chip body based on the solder thickness of the chip solder, and perform mesh division on the chip body to obtain the chip mesh.

[0076] In actual motherboard assembly structures, chips are connected to the motherboard via solder, resulting in a layer of solder between them. However, in 3D motherboard models, the geometry of the chip solder is not rendered. Therefore, the chips in the 3D motherboard model are fitted to the motherboard without leaving any space for solder height. This leads to a discrepancy between the chip height in the model and its actual height. If the chip in the 3D motherboard model is directly used for meshing, it will not only affect the accuracy of the chip mesh but also cause interference between the chip mesh and the chip solder mesh.

[0077] Therefore, by segmenting the chip into regions and removing the excess solder thickness, and then meshing the chip, the accuracy of the chip meshing is improved, and the interference between the chip mesh and the solder mesh is avoided, thereby improving the accuracy of motherboard component stress simulation modeling.

[0078] S105: Based on the constraint relationships between various target components, establish the binding connection relationships between the meshes of various target components to obtain the stress simulation model.

[0079] The goal of constructing the stress simulation model is to transform the physical structure of the motherboard components into a computable finite element model. Establishing the binding connection relationship between the meshes of the motherboard components based on the constraint relationship of the motherboard components can restore the essence of the physical connection of the motherboard components and solve the problem of the model being disconnected from the actual structure. The various components of the motherboard components (motherboard, chip, solder, etc.) do not exist in isolation, but are formed by rigid or flexible connections through welding, pasting, etc.

[0080] Before establishing binding connections, the meshes of each component in the stress simulation model are discrete and independent. Under stress, these meshes may slip, separate, or penetrate each other, making it impossible to simulate the actual physical fixation relationship of the motherboard assembly. Binding connections, through constraint mapping, allow the meshes of different components to form a mechanical community, accurately reproducing the physical connection characteristics between components on the motherboard assembly. This transforms the finite element model from a discrete collection of components into a complete physical system, realizing a complete mechanical chain for stress simulation and avoiding simulation logic breaks caused by mesh discretization.

[0081] Optionally, before establishing the binding connections between the meshes of each target component, the meshes of all target components can be matched with the motherboard components.

[0082] Among them, zero-matching is used for the unification of geometric reference at the mesh level. Through coordinate system alignment or geometric matching, the mesh model of each target component is positioned in space under the reference coordinate system of the motherboard, so that the relative position of the chip, solder and motherboard is consistent with the design, and the mesh of each target component is completely attached to the motherboard in spatial position (without penetration or gap).

[0083] In this embodiment, by meshing the selected target components on the motherboard's 3D model, precise avoidance of the motherboard mesh from the chip solder mesh and the chip mesh from the chip solder mesh is achieved. This ensures the accuracy of the meshing of each component on the motherboard assembly, thereby improving the modeling accuracy of the motherboard assembly stress simulation model. This allows for more accurate stress simulation results of the motherboard assembly based on the stress simulation model. Furthermore, automated binding of component meshes is achieved based on the constraint relationships between components, significantly simplifying the modeling process and improving modeling efficiency. Simultaneously, it avoids human error, ensuring that the connection relationships of all components are consistent with the actual design, further improving the modeling accuracy of the stress simulation model.

[0084] exist Figure 1 Based on the embodiments shown, the following is combined with Figure 2 The technical solution of the above-mentioned motherboard component stress simulation modeling method will be further introduced.

[0085] Figure 2 A flowchart illustrating another motherboard component stress simulation modeling method provided in this application embodiment is shown below. Figure 2 In some embodiments, the process of this motherboard component stress simulation modeling method includes the following steps:

[0086] S201, Obtain the structural drawings of the motherboard components.

[0087] Among these methods, the structural drawings of the motherboard components are obtained through the user's drawing upload operation.

[0088] S202 generates a 3D model of the motherboard based on the geometric parameters in the structural drawings.

[0089] Specifically, the geometric parameters of the motherboard components are obtained through the structural drawings of the motherboard components, and a three-dimensional model of the motherboard components is constructed based on the geometric parameters.

[0090] Specifically, the construction of the motherboard's 3D model can be achieved by using 3D modeling software. This includes software such as SolidWorks, AutoCAD, UG, Pro / E, and CATIA.

[0091] S203, in response to the user's component selection operation, selects the target component of the motherboard 3D model; wherein, the target component includes the motherboard, chip, solder pad silkscreen lines, shielding cover or other components.

[0092] Specifically, other components include resistors, capacitors, inductors, or connectors.

[0093] S204 determines the chip solder based on the pad silkscreen lines and performs mesh division on the chip solder to obtain the chip solder mesh.

[0094] S205, extract the motherboard mid-surface.

[0095] The motherboard mid-plane refers to a plane symmetrical to the top and bottom surfaces of the motherboard, that is, a plane equidistant from the top and bottom surfaces along the thickness direction of the motherboard. The motherboard mid-plane more accurately reflects the geometric planar structure of the motherboard.

[0096] S206, based on the normal vector of the motherboard's mid-surface, establishes a local coordinate system with the motherboard's mid-surface as the reference.

[0097] The normal vector directly defines the Z-axis direction of the local coordinate system, ensuring that the coordinate system is perpendicular to the motherboard's mid-surface, thus making the direction of the local coordinate system clear.

[0098] S207, based on the coordinate parameters of the chip solder in the local coordinate system, constructs a solder geometry that matches the chip solder.

[0099] Specifically, the position information of the chip solder is converted into coordinate parameters in a local coordinate system, and the solder geometry matching the chip solder is constructed based on the coordinate parameters to accurately define the geometry and size of the chip solder.

[0100] S208 divides the motherboard into sections based on solder geometry to determine the chip solder areas on the motherboard.

[0101] Specifically, based on the coordinate parameters of the motherboard's mid-surface and the solder geometry, the area on the motherboard's mid-surface corresponding to the solder geometry is divided, and the area on the motherboard corresponding to the solder geometry is the chip solder area on the motherboard.

[0102] The chip solder area is identified here because the purpose of motherboard stress simulation modeling is to determine the risk of chip desoldering. The stress analysis focuses on the chip, the chip solder, and the chip solder area on the motherboard. Therefore, identifying the chip solder area allows for more accurate acquisition of motherboard stress simulation data for that area during subsequent stress simulation.

[0103] S209, extract the motherboard thickness.

[0104] Specifically, the thickness information of the motherboard is obtained based on the dimensional parameters of the motherboard's 3D model.

[0105] S210 divides the motherboard into grids based on the motherboard thickness to obtain the motherboard grid.

[0106] In stress simulation models, thickness determines the quality of mesh topology generation and computational accuracy. For thin-plate structures like motherboard components, thickness directly dictates mesh dimension selection and affects the capture of stress gradients along the thickness direction. Therefore, meshing based on the motherboard's thickness parameters ensures a reasonable mesh distribution along the thickness direction, thereby guaranteeing the accuracy of stress simulation results.

[0107] S211, the bottom of the chip is cut based on the solder thickness to determine the chip body.

[0108] In this process, the bottom part of the chip structure is divided according to the pre-set solder thickness to determine the main structure of the chip and ensure the accuracy of subsequent chip grid division.

[0109] S212, extract the chip thickness of the chip body.

[0110] S213, the chip body is divided into grids based on the chip thickness to obtain the chip grid.

[0111] S214, obtain the coordinate parameters of other components in the local coordinate system.

[0112] Among them, the coordinate data of other components in the local coordinate system are determined based on their positions.

[0113] S215, based on coordinate parameters, mesh other components to obtain the mesh of other components.

[0114] Specifically, the positions of other components are accurately determined by coordinate parameters and meshed to ensure the accuracy of the meshing of other components.

[0115] S216, Extract the shield thickness of the shield.

[0116] S217, The shield is divided into meshes based on the thickness of the shield to obtain the shield mesh.

[0117] S218, based on the relative position of the shielding cover and the motherboard, determines the corresponding shielding cover solder.

[0118] S219, perform mesh division on the shielding solder to obtain the shielding solder mesh.

[0119] The shielding cover is connected to the motherboard via solder. While the 3D model of the motherboard assembly does not include the geometric model of the shielding cover solder, it is known that the solder area of ​​the shielding cover corresponds to its shape. Therefore, the shielding cover solder can be determined based on the relative position of the shielding cover and the motherboard, combined with the thickness of the shielding cover solder during the actual manufacturing process of the motherboard assembly. The shielding cover solder can then be meshed to obtain the shielding cover solder mesh.

[0120] S220 establishes the binding connection relationship between the meshes of each target component based on the constraint relationship between each target component, and obtains the stress simulation model.

[0121] In this embodiment, core components such as the motherboard, chips, solder, resistors, capacitors, inductors, shielding, and connectors can be meshed to achieve comprehensive coverage of the motherboard components, significantly improving the accuracy of stress simulation modeling. Furthermore, the fully automated process of geometry processing, mesh generation, and connection construction—requiring only initial component selection by the user—solves the industry pain points of excessive manual intervention, low efficiency, and susceptibility to errors in complex motherboard component simulation modeling. It achieves end-to-end automation from component selection to model output, greatly improving modeling efficiency and convenience, and ensuring the consistency and reliability of model quality.

[0122] Specifically, after completing the stress simulation modeling, the partial model of the motherboard component stress simulation model can be found in [reference needed]. Figure 5 As shown, it includes motherboard grid 501, other component grid 502, chip solder grid 503, etc.

[0123] Figure 6 This is a schematic diagram of the structure of a motherboard component stress simulation modeling device provided in an embodiment of this application. (See attached diagram.) Figure 6 The motherboard component stress simulation modeling device includes various functional modules for implementing the aforementioned motherboard component stress simulation modeling method. Any functional module can be implemented by software and / or hardware.

[0124] In some embodiments, the motherboard component stress simulation modeling device 600 includes a component selection module 601, a mesh generation module 602, and a binding and connection module 603. Wherein:

[0125] The component selection module 601 is used to select target components of the motherboard 3D model in response to the user's component selection operation; wherein, the target components include the motherboard, chips and solder pad silkscreen lines;

[0126] The meshing module 602 is used to determine the chip solder based on the pad silkscreen lines and to mesh the chip solder to obtain a chip solder mesh; and to mesh the motherboard to obtain a motherboard mesh; and to determine the chip body based on the solder thickness of the chip solder and to mesh the chip body to obtain a chip mesh.

[0127] The binding connection module 603 is used to establish binding connection relationships between meshes of various target components based on the constraint relationships between them, thereby obtaining a stress simulation model.

[0128] In one feasible implementation, the device further includes a region extraction module 604, which is specifically used for:

[0129] Extract the motherboard's mid-surface;

[0130] Based on the normal vector of the motherboard's mid-surface, a local coordinate system is established with the motherboard's mid-surface as the reference.

[0131] Based on the coordinate parameters of the chip solder in the local coordinate system, a solder geometry that matches the chip solder is constructed.

[0132] The motherboard is divided into sections based on solder geometry to determine the solder areas for the chips on the motherboard.

[0133] In one feasible implementation, the target component also includes other components, such as resistive elements, capacitive elements, inductive elements, or connectors. Before establishing the binding connection relationship between the meshes of each target component based on the constraint relationship between the various target components to obtain the stress simulation model, the mesh generation module 602 is specifically used for:

[0134] Extract the coordinate parameters of other components in the local coordinate system;

[0135] Mesh other components are generated based on coordinate parameters to obtain the mesh of other components.

[0136] In one feasible implementation, the target component further includes a shield, and the meshing module 602 is specifically used for:

[0137] Extract the thickness of the shielding cover;

[0138] The shielding cover is meshed based on its thickness to obtain the shielding cover mesh.

[0139] Based on the relative position of the shielding cover and the motherboard, determine the corresponding shielding cover solder.

[0140] The solder of the shielding cover is divided into a grid to obtain the solder grid of the shielding cover.

[0141] In one feasible implementation, the mesh generation module 602 is specifically used for:

[0142] Extract the motherboard thickness;

[0143] The motherboard is divided into grids based on its thickness to obtain the motherboard grid.

[0144] In one feasible implementation, determining the chip body based on the chip solder thickness includes:

[0145] The bottom of the chip is cut based on the solder thickness to determine the main body of the chip.

[0146] In one feasible implementation, the mesh generation module 602 is specifically used for:

[0147] Extract the chip thickness of the chip body;

[0148] The chip body is divided into grids based on the chip thickness to obtain the chip grid.

[0149] In one feasible implementation, the device 600 further includes a model building module 605, which is specifically used for:

[0150] Obtain the structural drawings of the motherboard components;

[0151] A 3D model of the motherboard is generated based on the geometric parameters in the structural drawings.

[0152] The motherboard component stress simulation modeling device 600 provided in this application embodiment is used to execute the technical solution provided in the aforementioned motherboard component stress simulation modeling method embodiment. Its implementation principle and technical effect are similar to those in the aforementioned method embodiment, and will not be repeated here.

[0153] It should be noted that the division of the various modules in the above device is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. Furthermore, these modules can be implemented entirely in software via processing element calls, entirely in hardware, or partially in software calls via processing elements and partially in hardware. For example, the component selection module 601 can be a separate processing element, or it can be integrated into a chip in the above device. Alternatively, it can be stored as program code in the memory of the above device, and its function can be called and executed by a processing element of the device. The implementation of other modules is similar. Moreover, these modules can be fully or partially integrated together, or they can be implemented independently. The processing element here can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each of the above modules can be completed through integrated logic circuits in the hardware of the processor element or through software instructions.

[0154] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. (See attached diagram.) Figure 7 The electronic device 700 includes a processor 701 and a memory 02 communicatively connected to the processor 701;

[0155] Memory 702 stores instructions executed by the computer;

[0156] The processor 701 executes computer execution instructions stored in the memory 702 to implement the technical solution of the aforementioned motherboard component stress simulation modeling method.

[0157] In the aforementioned electronic device 700, the memory 702 and the processor 701 are electrically connected directly or indirectly to achieve data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses or signal lines, such as bus connections. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be classified as address buses, data buses, control buses, etc., but this does not mean that there is only one bus or one type of bus. The memory 702 stores computer execution instructions that implement the aforementioned motherboard component stress simulation modeling method, including at least one software function module that can be stored in the memory 702 in the form of software or firmware. The processor 701 executes various functional applications and data processing by running the software program and module stored in the memory 702.

[0158] The memory 702 includes at least one type of readable storage medium, not limited to Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), etc. The memory 702 stores programs, and the processor 701 executes the programs after receiving execution instructions. Furthermore, the software programs and modules within the memory 702 may also include an operating system, which may include various software components and / or drivers for managing system tasks (e.g., memory management, storage device control, power management, etc.) and can communicate with various hardware or software components to provide an operating environment for other software components.

[0159] Processor 701 can be an integrated circuit chip with signal processing capabilities. The aforementioned processor 701 can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), etc. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor, or processor 701 can be any conventional processor.

[0160] The electronic device 700 is used to execute the technical solution provided in the aforementioned motherboard component stress simulation modeling method embodiment. Its implementation principle and technical effect are similar to those in the aforementioned method embodiment, and will not be repeated here.

[0161] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed, are used to implement the technical solution of the aforementioned motherboard component stress simulation modeling method.

[0162] The aforementioned computer-readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The computer-readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0163] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Alternatively, the readable storage medium can be an integral part of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the control unit of a motherboard component stress simulation modeling apparatus.

[0164] This application also provides a computer program product, including a computer program, which, when executed, is used to implement the technical solution of the aforementioned motherboard component stress simulation modeling method.

[0165] In the above embodiments, those skilled in the art will understand that the above method embodiments can be implemented entirely or partially by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer grid, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless grid, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).

[0166] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.

[0167] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the embodiments disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the appended claims.

[0168] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A method for stress simulation modeling of motherboard components, characterized in that, The method includes: In response to the user's component selection operation, the target component of the motherboard 3D model is selected; wherein, the target component includes the motherboard, chips, and solder pad silkscreen lines; The chip solder is determined based on the silkscreen lines of the pads, and the chip solder is divided into a grid to obtain the chip solder grid. The motherboard is divided into grids to obtain the motherboard grid; The chip body is determined based on the solder thickness of the chip solder, and the chip body is divided into a grid to obtain the chip grid. Based on the constraint relationships between various target components, the binding connection relationships between the meshes of various target components are established to obtain the stress simulation model.

2. The method according to claim 1, characterized in that, The method further includes: Extract the motherboard mid-surface of the motherboard; Based on the normal vector of the motherboard's mid-surface, a local coordinate system is established with the motherboard's mid-surface as the reference. Based on the coordinate parameters of the chip solder in the local coordinate system, a solder geometry matching the chip solder is constructed; The motherboard is divided into sections based on the solder geometry to determine the chip solder areas on the motherboard.

3. The method according to claim 2, characterized in that, The target component also includes other components, such as resistive elements, capacitive elements, inductive elements, or connectors. Before establishing the binding connection relationship between the meshes of each target component based on the constraint relationship between the various target components to obtain the stress simulation model, the method further includes: Obtain the coordinate parameters of the other components in the local coordinate system; The other components are meshed based on the coordinate parameters to obtain the mesh of the other components.

4. The method according to claim 3, characterized in that, The target component further includes a shielding cover, and the method further includes: Extract the thickness of the shielding cover; The shielding cover is divided into a grid based on the thickness of the shielding cover to obtain the shielding cover grid. Based on the relative position of the shielding cover and the motherboard, determine the shielding cover solder corresponding to the shielding cover; The solder of the shielding cover is divided into a grid to obtain the solder grid of the shielding cover.

5. The method according to any one of claims 1-4, characterized in that, The motherboard is meshed to obtain a motherboard mesh, including: Extract the motherboard thickness; The motherboard is divided into grids based on its thickness to obtain the motherboard grid.

6. The method according to any one of claims 1-4, characterized in that, Determining the chip body based on the solder thickness of the chip solder includes: The bottom of the chip is cut based on the solder thickness to determine the chip body.

7. The method according to any one of claims 1-4, characterized in that, The chip body is divided into a mesh to obtain a chip mesh, including: Extract the chip thickness of the chip body; The chip body is divided into grids based on the chip thickness to obtain the chip grid.

8. The method according to any one of claims 1-4, characterized in that, The motherboard 3D model was obtained based on the following method: Obtain the structural drawings of the motherboard assembly; Based on the geometric parameters in the structural drawings, a 3D model of the motherboard is generated.

9. An electronic device, characterized in that, Includes a processor and a memory communicatively connected to the processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory to implement the method as described in any one of claims 1 to 8.

10. A computer program product, characterized in that, Includes a computer program, which, when executed, is used to implement the method as described in any one of claims 1 to 7.

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