Method and system for transmitting parallel blocks with different lengths

Abstract

The invention discloses a transmission method and system for parallel blocks with different lengths, and relates to the communication and data transmission technology, and the method comprises the steps: at a sender, sending a coming packet of a data source to a sending sub-cache of a pairing channel in a matched manner according to the packet length through a sending selection router; disassembling the overrun packet into a data packet which can be borne by a block transmission channel by using an unpacker, and sending the disassembled data packet to a selection router; caching the outgoing data packet of each channel by using the sending cache; the block transmission channels are arranged in parallel, extract incoming packets from the dynamic sending cache and send the incoming packets out in parallel; at a receiver, a receiving cache receives and caches the data packet of each block transmission channel; and the receiving router sends the data packet in the receiving cache to a data destination according to a specified packet taking strategy. According to the method, the strong bearing capacity of multiple channels can be exerted, the situation that equal-scale incoming packets are jammed in a single optimal matching channel is relieved, and the throughput rate is increased.

Description

Technical Field

[0001] This application relates to the fields of communication and data transmission technology, and in particular to a method and system for transmitting parallel blocks of different lengths. Background Technology

[0002] Currently, block transmission commonly used in the communications field, such as USB, GPRS, PCIe, and 5G channel block transmission, all suffer from the problem of overhead caused by the mismatch between packet length and transmission block size (e.g., matching the block transmission size by splitting and reassembling packets; or frequently cutting the transmission length by reconfiguring), resulting in reduced transmission efficiency.

[0003] Block transfer has advantages. Compared to the "on-demand" transmission of single bytes, block transfer, which transmits packets of fixed length in blocks, is more efficient because it reduces the overhead of the channel protocol per byte. However, this efficiency advantage only occurs when the packet length matches the block size. If the packet length differs significantly from the block size, either additional packet disassembly and reassembly operations (to match the block transfer size) or reconfiguration of the block transfer controller (to match the block size with the packet length) are required before transmission, resulting in decreased efficiency—the extra operations are time-consuming and labor-intensive.

[0004] The reason for this is that block transfer is designed for efficient transmission of large volumes of data at uniform scale. For data points with frequently changing packet sizes and widely and uniformly distributed packet lengths (such as backbone nodes), the mismatch between packet length and block size causes additional overhead, making block transfer inefficient. This limits the application of block transfer in these scenarios. However, many devices supporting block transfer have already been deployed to these locations, and disabling the block transfer channel would significantly reduce the scalability of these devices. For example, to optimize communication, data needs to be encoded and decoded before transmission at backbone nodes. If the node devices only have the block transfer channel idle, the question arises: can this block transfer channel be used to add external encoding / decoding devices to the node devices to achieve functional expansion? This is because the mismatch between packet length and block size is likely to occur frequently. Summary of the Invention

[0005] This application provides a method and system for transmitting parallel blocks of different lengths. It addresses the efficiency degradation caused by frequent switching of packet splitting, reassembly, or block length in scenarios involving uniformly distributed mixed-size packets. It leverages the strong carrying capacity of multiple channels, alleviates congestion of equal-sized packets on a single optimal matching channel, and improves throughput.

[0006] This application provides a method for transmitting parallel blocks of different lengths, applied to a transceiver system consisting of a sender and a receiver. The sender includes a send selection router, a depacketizer, a send buffer, and a block transmission channel. The receiver includes a receive router, an aggregator, a receive buffer, and a block receive channel. The transmission method includes: On the sender side, the incoming packets from the data source are sent to the send sub-buffer of the paired channel by matching the packet length through the send selection router; Using a packet splitter, the oversized packet is broken down into data packets that the transmission channel can carry, and the broken data packets are sent to the selected router; The aforementioned send buffer is used to cache outgoing data packets from each channel; The block transmission channel is configured in parallel, extracting packets from the dynamic send buffer and sending them out in parallel. On the receiving side, the receive buffer receives and buffers data packets from each transmission channel; The receiving router sends the data packets in its receive buffer to the data destination according to the specified packet retrieval policy.

[0007] This application embodiment also provides a transmission system for parallel blocks of different lengths, including a transceiver system composed of a sender and a receiver. The sender includes a send selection router, a depacketizer, a send buffer, and a block transmission channel. The receiver includes a receive router, an aggregator, a receive buffer, and a block receive channel. The sender and receiver cooperate to execute the steps of the transmission method for parallel blocks of different lengths as described above.

[0008] This application's embodiments address the efficiency degradation caused by frequent switching of packet splitting, reassembly, or block length in uniformly distributed mixed-size packet transmission scenarios. It leverages the strong carrying capacity of multiple channels, alleviates congestion of equal-sized packets on a single optimal matching channel, and improves throughput.

[0009] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0010] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings: Figure 1 This is a schematic diagram of the architecture of the transmission method for parallel blocks of different lengths in an embodiment of this application; Figure 2 This is a schematic diagram of the transceiver routing process for the transmission method of parallel blocks of different lengths according to an embodiment of this application. Figure 3 This is a schematic diagram of the block transmission structure after the prediction and orchestration functions of the transmission method for parallel blocks of different lengths in this application embodiment. Figure 4 This is a schematic diagram of the block transmission process after the prediction and orchestration functions of the transmission method for parallel blocks of different lengths in this application embodiment. Figure 5 This is a block-pass buffer illustration of the transmission method for parallel blocks of different lengths in an embodiment of this application; Figure 6 This is a single-channel embodiment of the transmission method for parallel blocks of different lengths according to the embodiments of this application; Figure 7 This is a multi-channel embodiment of the transmission method for parallel blocks of different lengths according to the present application. Figure 8 This is a schematic diagram of the transceiver aggregator processing flow for the transmission method of parallel blocks of different lengths according to an embodiment of this application. Figure 9 This is a schematic diagram of the sender-receiver buffer processing flow for the transmission method of parallel blocks of different lengths according to an embodiment of this application. Figure 10 This is a schematic diagram of the parallel block transmission process for the transmission method of parallel blocks of different lengths in an embodiment of this application; Figure 11 This is a schematic diagram of the transmission architecture of an embodiment of the transmission method for parallel blocks of different lengths in this application. Figure 12 This is a schematic diagram of the transmission architecture of Embodiment 2 of the transmission method for parallel blocks of different lengths in this application. Detailed Implementation

[0011] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0012] To address the efficiency degradation caused by frequent switching of packet lengths during uniformly distributed packet transmission scenarios, this application provides a method for transmitting parallel blocks of different lengths. This method is applied to a transceiver system consisting of a sender and a receiver, each comprising four parts: a selection router, a packet de-packet / aggregator, a buffer, and a block transmission channel. Specifically, the sender includes a sending selection router, a packet de-packetizer, a sending buffer, and a block transmission channel; the receiver includes a receiving router, an aggregator, a receiving buffer, and a block receiving channel. In a specific example, such as… Figure 1 As shown, the sending buffer includes oversized packet buffer, oversized packet buffer, large packet buffer, and small packet buffer, etc. Multiple buffers of each type can be configured as needed, and the number of each type of buffer can be adjusted according to actual requirements. The corresponding receiving buffer has a similar configuration, which will not be elaborated here. Figure 2 As shown, the transmission method described in this application embodiment includes: On the sender side, the sending selection router sends the incoming packets from the data source to the sending sub-buffer of the paired channel according to the packet length. For example, large packets are sent to the large packet buffer, and very large packets are sent to the very large packet buffer.

[0013] Using a packet splitter, the overloaded packet is broken down into data packets that the transmission channel can carry, and the split data packets are sent to the selected router.

[0014] The aforementioned send buffer is used to cache outgoing data packets from each channel; Block transmission channels, configured in parallel, extract packets from the dynamic send buffer and send them out in parallel, such as... Figure 1 The block transmission channels shown are parallel and are divided into extra-large block sending controllers, large block sending controllers, and small block sending controllers according to the size of the packets. Data packets of various sizes are sent through the corresponding controllers, and the corresponding channels are large packet data channels, small packet sending channels, etc., which are not listed here.

[0015] At the receiving end, the receiver buffers and caches data packets from each transmission channel. The receiving router sends the data packets in its receive buffer to the data destination according to the specified packet retrieval policy.

[0016] This application addresses the transmission scenario of mixed large and small packets with uniform distribution. The method described in this application solves the efficiency reduction problem caused by frequent switching of packet splitting, reassembly, or block length. It leverages the strong carrying capacity of multiple channels, alleviates the congestion of packets of equal size on a single best-matching channel, and improves throughput.

[0017] In some embodiments of this application, such as Figure 2 As shown, the process also includes, at the sender, the following steps are performed by the router selection process: Receive packets from the data source; Data packets are categorized by size and sent to the transmit buffer, for example... Figure 1 Large packets are sent to the large packet cache, and extra-large packets are sent to the extra-large packet cache.

[0018] If the data packets to be transmitted include oversized packets, the packet splitter's split packets are received, and the split packets are forwarded to the oversized packet buffer, which belongs to the sending buffer.

[0019] Based on the status information of the sending buffer and the receiving channel, determine whether to disassemble / assemble packets and then send them using an idle channel.

[0020] This application is as follows Figure 3As shown, it further includes a configuration module, an identification module, a recording module, a prediction algorithm, and a queuing algorithm (collectively referred to as the "prediction and orchestration function module"), such as... Figure 1 As shown in (a)), the configuration module is responsible for generating the objective function of the prediction algorithm. In some embodiments of this application, such as Figure 4 As shown, it also includes: The identification module is responsible for identifying the type of incoming packets from the data source, assigning them to various weighted classification items, and transmitting the identification results to the recording module and the prediction algorithm. The identification of the incoming packet type determines the corresponding weight based on pre-configured type weights, which are divided into three dimensions: by payload packet size / length, by Quality of Service (QoS), and by business / content importance. The determined weights are tiered weights for each dimension. In a specific example, weight values ​​can be manually entered, including business type weights / content weights, time sensitivity weights, and throughput weights for each type of raw information. The configuration module supports phased configuration, allowing for fine-grained configuration of user-emphasized weights for short-term, medium-term, and long-term stages at the same time.

[0021] Based on the type results and weights of the records for a specified duration, a prediction algorithm is matched according to the current time. The prediction algorithm includes independent short-term prediction algorithm, medium-term prediction algorithm, and long-term prediction algorithm. The prediction result of the incoming packet is determined using a matching prediction algorithm. After obtaining the step weights for each dimension, the incoming packet and its weights are transmitted to the recording module and the prediction algorithm.

[0022] The recording module is responsible for recording the recognition results and time over a period of time, which is then selectively read by the prediction algorithm. The recording module is connected to a clock to obtain the current time. It records recent short-term and medium-short-term records in chronological order. If storage space is sufficient, the recording module can also record medium- to long-term records.

[0023] The prediction algorithm is responsible for predicting the recent packet arrival status of various packet types, such as periodicity and concentration, as the prediction result, and strengthening the prediction of certain important packet types based on the objective function. The prediction algorithm obtains historical packet arrival information from the recording module. It is also connected to a clock to obtain the current time. There can be one or more prediction algorithms. When storage and computing resources are abundant, the prediction algorithm can be divided into multiple independent algorithms based on the length of the prediction period, such as short-term, medium-term, and long-term algorithms.

[0024] The queuing algorithm is responsible for orchestrating incoming packets and placing them into a buffer, preparing for efficient block transfer. In some embodiments of this application, such as... Figure 5 As shown, it also includes: Based on the predicted results of incoming packets and the corresponding objective function (i.e., the objective function generated by the configuration module), the importance ranking of incoming packets is determined, and priority slots are reserved according to the importance ranking of incoming packets. Finally, the current incoming packet is placed in the optimal slot, thereby avoiding future bandwidth impact on the bus and clearing obstacles for critical transmissions.

[0025] Based on the reserved priority slots, and following the strategy in the matching method library, incoming packets are placed in the optimal slots. For time-sensitive small packets, an additional dedicated thread is added to spin-polulate the block transfer controller or DMA completion status register to reduce latency. In a specific example, this dedicated thread has a timeout window; after the spin-polling times out, the queuing algorithm will routinely orchestrate the packets to balance system efficiency and low latency. In particular, for multi-core systems, a dedicated core can even replace the dedicated thread to handle the spin-polling of extremely time-sensitive small packets.

[0026] This application provides an example of a block transfer method with prediction and orchestration functions, corresponding to a single-channel USB block transfer embodiment. This embodiment, for example... Figure 6 The diagram shows three parts on each side: a host and a slave. The host side consists of a processor with prediction and queuing algorithms, a block transfer buffer, and a USB host controller. The slave side (taking a codec as an example) consists of a USB slave controller, a DMA, and an engine with a coprocessor. On the host side, the processor is responsible for predicting and arranging incoming packets, and storing them according to packet characteristics at different addresses in the block transfer buffer (e.g., ...). Figure 5 As shown in the diagram, the USB host controller retrieves and transmits data according to the set block size. On the slave side, the coprocessor hands the decompiled packets to the engine for encoding and decoding, and then encapsulates the results according to the set block size and transmits them back to the host side in the original block format.

[0027] This application also proposes a block transfer method with prediction and orchestration functions, which can also correspond to this embodiment of multi-channel USB block transfer. Compared to the single-channel example, the block transfer buffer, USB host controller, USB slave controller, and DMA in this embodiment are all multi-channel (see appendix). Figure 7 Compared to the single-channel example, on the host side, the processor in this embodiment directly orchestrates the multi-channel block transfer buffer, directly matching incoming packets to the optimal block transfer buffer of the corresponding block size. Compared to the single-channel example, on the slave side, this embodiment eliminates the need for a coprocessor to de-orchestrate and encapsulate the results; the engine directly encodes and decodes, as shown in the attached diagram. Figure 7 As shown.

[0028] This application's method orchestrates incoming packets, improving block transfer efficiency at a macro level. By transforming the system from passive to active, it addresses the issue of bus resource contention in block transfer at a higher paradigm level. It transforms disordered competition into orderly collaboration, enabling various packet types to share bus resources interleaved along the timeline. Under the constraints of unchanged hardware and original architecture, non-intrusive software optimization introduces order and intelligence into the shared (bus) resource access problem, maximizing the performance potential of the existing block transfer hardware architecture.

[0029] In some embodiments of this application, such as Figure 8 As shown, the unpacker performs the following processing: Check if the over-limit package cache is empty. If it is not empty, retrieve the over-limit package and complete the disassembly. The disassembled package is sent to the router selected for sending.

[0030] In some embodiments of this application, such as Figure 9 As shown, the sending buffer is a dynamic buffer, and the sending buffer is specifically used for: Buffer outgoing data packets for retrieval by the block transport channel; Report cache status information and request the system to dynamically adjust the sending cache.

[0031] In some embodiments of this application, such as Figure 10 As shown, the block transmission channel is specifically used for: Select and pre-set the number of parallel channels according to the application scenario, where: For fine-grained scenarios with uniform packet size distribution, or for scenarios with stringent requirements for transmission performance of each block size, a first number of parallel block transmission channels are pre-configured. For scenarios with less stringent requirements, a second number of parallel block transmission channels are pre-configured, and the size of idle channel blocks is dynamically configured to adapt to real-time changes in the packet situation, wherein the first number is greater than the second number. Report the channel status information of the block transmission channel.

[0032] In some embodiments of this application, the receiving party specifically includes: The received data packets are buffered in the receive buffer using the receiver's parallel block receive channel, and the receive buffer is a dynamic buffer; The receiving buffer is used to buffer incoming packets from each receiving channel, allowing the receiving router to retrieve packets at any time. The buffer status information is also reported, and the receiving buffer is requested from the system to dynamically adjust the receiving buffer.

[0033] In some embodiments of this application, the aggregator specifically performs: Check if there are any disassembled packets in the large packet cache. If so, retrieve the disassembled packets and perform packet aggregation. The aggregated data packets are sent to the receiving router.

[0034] In some embodiments of this application, the receiving router specifically performs the following: Retrieve the received data packets from the receive buffer and send them to the data destination; Based on the feedback on cache status, determine and adjust the packet retrieval strategy.

[0035] This application provides implementation examples of methods for transmitting parallel blocks of different lengths. This example corresponds to the USB block transmission implementation. This implementation consists of three parts each for the sender and receiver (see attached diagram). Figure 11 As shown in the diagram. The sender consists of processor 1, USB host controller 1, and USB host controller 2; the receiver consists of processor 2, USB slave controller 1, and USB slave controller 2. The processor is responsible for matching incoming packets with the corresponding controllers—small packets are sent through controller 1, and large packets are sent through controller 2; extra-large packets are first broken down into larger packets before being sent by controller 2, and upon receiving the broken-down packets, the processor is responsible for reassembling and restoring the packets.

[0036] This application presents implementation examples of a method for transmitting parallel blocks of different lengths. This example corresponds to the embodiment of adaptive adjustment of the block transmission length. This embodiment consists of three parts each for the sender and receiver (see appendix). Figure 12 As shown. The sender consists of processor 1 and its controllers 1 and 2; the receiver consists of processor 2 and its controllers 1 and 2. The processor is responsible for matching incoming packets with their corresponding controllers, and also for adjusting the controller block transmission size, such as... Figure 12 As shown, when the load transmitted by controller 2 is frequently small, such as when controller 2, which transmits large packets, only transmits medium packets for a long time, the processor sends a block length switching command to the receiver. Both the sender and receiver simultaneously reduce the block length of controller 2 to best match the transmission of medium packets and achieve the highest efficiency.

[0037] The method of this application solves the problem of inefficient block transmission caused by the mismatch between packet length and block size, and avoids the extra overhead caused by packet splitting / reassembly. The method of this application can avoid the channel overhead and latency overhead caused by frequent switching of block length configuration. When the matching channel is congested, parallel balanced transmission can be achieved by additional packet splitting and reassembly operations or adjusting the block length of idle channels, thereby alleviating congestion.

[0038] Compared to single-channel block transmission, the method of this application is flexible, adaptive, and more efficient, especially in block transmission of heavily loaded nodes with uniformly distributed large and small packets.

[0039] This application also proposes a transmission system for parallel blocks of different lengths, including a transceiver system composed of a sender and a receiver. The sender includes a send selection router, a depacketizer, a send buffer, and a block transmission channel. The receiver includes a receive router, an aggregator, a receive buffer, and a block receive channel. The sender and receiver cooperate to execute the steps of the transmission method for parallel blocks of different lengths as described above.

[0040] It should be noted that, in the embodiments of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0041] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0042] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0043] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims. All of these forms are within the protection scope of this application.

Claims

1. A method for transmitting parallel blocks of different lengths, characterized in that, This is applied to a transceiver system consisting of a sender and a receiver. The sender includes a send selection router, a packet unpacker, a send buffer, and a block transmission channel. The receiver includes a receive router, an aggregator, a receive buffer, and a block receive channel. The transmission method includes: On the sender side, the incoming packets from the data source are sent to the send sub-buffer of the paired channel by matching the packet length through the send selection router; Using a packet splitter, the oversized packet is broken down into data packets that the transmission channel can carry, and the broken data packets are sent to the selected router; The aforementioned send buffer is used to cache outgoing data packets from each channel; The block transmission channel is configured in parallel, extracting packets from the dynamic send buffer and sending them out in parallel. On the receiving side, the receive buffer receives and buffers data packets from each transmission channel; The receiving router sends the data packets in its receive buffer to the data destination according to the specified packet retrieval policy.

2. The method for transmitting parallel blocks of different lengths as described in claim 1, characterized in that, This also includes the following processing performed by the sender via the router selection process: Receive packets from the data source; The received data packets are categorized by size and sent to the transmit buffer. If the data packets to be transmitted include oversized packets, the packet disassembly packet from the packet disassembler is received, and the disassembled packet is forwarded to the oversized packet buffer, which belongs to the sending buffer; as well as, Based on the status information of the sending buffer and the receiving channel, determine whether to disassemble / assemble packets and then send them using an idle channel.

3. The method for transmitting parallel blocks of different lengths as described in claim 2, characterized in that, Also includes: Identify the type of incoming packets from the data source and determine the corresponding weights based on the pre-configured type weights. The type weights are divided into the following three dimensions: by payload packet size / length, by quality of service (QoS), and by business / content importance. The determined weights are step-by-step weights for each dimension. Based on the type results and weights of the records for a specified duration, a prediction algorithm is matched according to the current time. The prediction algorithm includes independent short-term prediction algorithm, medium-term prediction algorithm, and long-term prediction algorithm. The prediction result of the package is determined by using a matching prediction algorithm.

4. The method for transmitting parallel blocks of different lengths as described in claim 3, characterized in that, Also includes: Based on the prediction results of the incoming packets and the corresponding objective function, the importance ranking of the incoming packets is determined. Prioritize empty slots based on the importance of incoming packages; Based on the reserved priority slots, and according to the strategy in the matching method library, the future packet is placed in the optimal slot. For time-sensitive small packets, an additional dedicated thread is added to spin-polulate the block transfer controller or DMA completion status register to reduce the latency of time-sensitive small packets.

5. The method for transmitting parallel blocks of different lengths as described in claim 2, characterized in that, The unpacker performs the following processing: Check if the over-limit package cache is empty. If it is not empty, retrieve the over-limit package and complete the disassembly. Send the disassembled package to the router selected by sending; The sending cache is a dynamic cache, and the sending cache is specifically used for: Buffer outgoing data packets for retrieval by the block transport channel; Report cache status information and request the system to dynamically adjust the sending cache.

6. The method for transmitting parallel blocks of different lengths as described in claim 2, characterized in that, The block transmission channel is specifically used for: Select and pre-set the number of parallel channels according to the application scenario, where: For fine-grained scenarios with uniform packet size distribution, or for scenarios with stringent requirements for transmission performance of each block size, a first number of parallel block transmission channels are pre-configured. For scenarios with less stringent requirements, a second number of parallel block transmission channels are pre-configured, and the size of idle channel blocks is dynamically configured to adapt to real-time changes in the packet situation, wherein the first number is greater than the second number. Report the channel status information of the block transmission channel.

7. The method for transmitting parallel blocks of different lengths as described in claim 4, characterized in that, The recipient specifically also includes: The received data packets are buffered in the receive buffer using the receiver's parallel block receive channel, and the receive buffer is a dynamic buffer; The receiving buffer is used to buffer incoming packets from each receiving channel, allowing the receiving router to retrieve packets at any time. The buffer status information is also reported, and the receiving buffer is requested from the system to dynamically adjust the receiving buffer.

8. The method for transmitting parallel blocks of different lengths as described in claim 7, characterized in that, The aggregator specifically performs the following: Check if there are any disassembled packets in the large packet cache. If so, retrieve the disassembled packets and perform packet aggregation. The aggregated data packets are sent to the receiving router.

9. The method for transmitting parallel blocks of different lengths as described in claim 8, characterized in that, The receiving router specifically performs the following: Retrieve the received data packets from the receive buffer and send them to the data destination; Based on the feedback on cache status, determine and adjust the packet retrieval strategy.

10. A transmission system for parallel blocks of different lengths, characterized in that, A transceiver system comprising a sender and a receiver, wherein the sender includes a send selection router, a depacker, a send buffer, and a block transmission channel, and the receiver includes a receive router, an aggregator, a receive buffer, and a block receive channel, wherein the sender and the receiver cooperate to perform the steps of the method for transmitting parallel blocks of different lengths as described in any one of claims 1-9.

Images