Semiconductor device including micro-LED structure

Abstract

The proposed solution relates to a semiconductor device (30) comprising an epitaxial wafer (10) and a plurality of InGaN wafers (100), each InGaN wafer being monolithically grown on the epitaxial wafer and configured with a top c-plane surface. An upper mask layer (200) is provided with a mask aperture (220) over the InGaN wafer, wherein the mask aperture has a width less than the top c-plane surface. Comprising a quantum well (QW) layer (242) is grown on a top c-plane surface in one of the mask apertures. The solution also relates to a micro LED device (500) comprising such a semiconductor device, and to a method for manufacturing such a semiconductor device.

Description

Technical Field

[0001] This technology relates to the field of semiconductor devices, specifically microLEDs (microlight-emitting diodes) used in display and lighting applications. The field focuses on improving the efficiency, performance, and manufacturing processes of microLEDs. The proposed solutions particularly relate to semiconductor devices configured to achieve controlled emission wavelengths and methods for their fabrication. Background Technology

[0002] MicroLEDs have emerged as a promising technology for high-resolution displays in various applications, such as augmented reality (AR), virtual reality (VR), mixed reality (MR), smartwatches, and head-up displays (HUDs). These applications require small pixel sizes (typically below 10 μm) to achieve high resolution and compact form factors. Compared to competing technologies such as liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs), the use of microLEDs offers several advantages, including higher brightness, longer lifespan, and lower power consumption.

[0003] However, several challenges exist associated with the fabrication and performance of microLEDs with small pixel sizes. A significant issue is the sharp decline in external quantum efficiency as pixel size decreases. This efficiency loss is primarily due to the increased impact of sidewall damage caused by dry etching. Therefore, developing highly efficient microLEDs with pixel sizes smaller than 10 μm remains a challenge. Another issue is red-emitting microLEDs, where both nitride and AlInGaP microLEDs are unsatisfactory in terms of either efficiency or brightness.

[0004] Another challenge in fabricating microLEDs is assembling red, green, and blue (RGB) pixels for high-resolution displays. Currently, these three colors are fabricated on separate wafers using epitaxial methods, and the pixels need to be picked up from these wafers and placed onto the display's backplane / driving circuitry to create an array of RGB pixels. Various techniques exist to achieve this, but many are not yet technically mature. To date, no pick-and-place method has been successfully used in production to assemble displays with pixel sizes smaller than 10 μm.

[0005] For small displays (such as AR / VR / MR, smartwatches, etc.), LED chips can be directly integrated into Si CMOS active driver circuits. This still requires assembling all three colors into RGB pixels. For pixel sizes larger than 10 μm, this can be achieved through several methods, including pick-and-place methods, mechanical stacking of all three color sources on top of each other, or multi-junction epitaxial layers connected during epitaxy, such as tunnel junctions. However, these methods are not suitable for pixel sizes smaller than 10 μm.

[0006] Several approaches have been proposed to address these challenges, such as directly growing red, green, and blue LEDs on the same epitaxial wafer (i.e., a semiconductor wafer with a common growth layer), which avoids pick-and-place mass transfer and, alternatively, allows for single-step wafer bonding to attach the LEDs to a CMOS chip. However, a technique remains lacking to achieve RGB epitaxial wafers with pixel sizes below 10 μm and even smaller than 1 μm, where external quantum efficiency is in the double-digit range for all three colors, and where controlled emission wavelengths are obtained. Summary of the Invention

[0007] The proposed solutions relate to devices and methods as outlined in the independent claims. Additional aspects and features are summarized below and set forth in at least part of the dependent claims.

[0008] According to a first aspect of this disclosure, a semiconductor device is provided. The semiconductor device includes an epitaxial wafer and a plurality of InGaN platelets, each InGaN platelet being monolithically grown on the epitaxial wafer and configured with a top c-plane surface. An upper mask layer has mask apertures disposed above the InGaN platelets, wherein the width of the mask apertures is smaller than the top c-plane surface. A plurality of microLED structures are included, wherein each microLED structure includes a quantum well (QW) layer, and each microLED structure is grown on the top c-plane surface of one of the mask apertures.

[0009] According to a second aspect, a microLED device is provided, comprising a semiconductor device according to the first aspect and a driver circuit. The driver circuit is connected to a corresponding top portion of each microLED structure via a p-contact and to the substrate side of an epitaxial wafer via an n-contact, for generating light emission from the corresponding microLED structure.

[0010] According to a third aspect, a method for manufacturing a semiconductor device is provided, comprising: InGaN wafers are formed monolithically grown on an epitaxial wafer, wherein each InGaN wafer has a top c-plane surface; A mask layer is disposed on the truncated InGaN wafer; A mask aperture is formed in an upper mask above the top c-plane surface, wherein the width of the aperture is smaller than the width of the top c-plane surface; and MicroLED structures, including QW layers, are grown from each mask aperture.

[0011] Therefore, the proposed solution is based on the fabrication of InGaN wafers for forming microLEDs, wherein the microLEDs are grown on the InGaN wafers. Specifically, by applying an upper mask layer with apertures on the InGaN wafers, microLEDs can be formed monolithically from the upper c-plane of the InGaN wafers.

[0012] The proposed solution is particularly suitable for fabricating semiconductor devices comprising a large number of microLEDs on a surface, such as for display technologies, and allows for the fabrication of semiconductor devices comprising a large number of microLEDs via monolithic growth. This is significantly more efficient than pick-and-place techniques in which microLEDs are formed individually.

[0013] Furthermore, even when microLEDs are grown on a common epitaxial wafer, achieving consistent quality across the entire surface of the numerous wafers supporting the microLED fabrication through polishing or other types of material removal processes is often challenging. Besides the risk of damage, this can lead to undesirable variations in wafer height. In the case of pyramidal wafers (i.e., those with sloping side facets), the dimensions of the exposed c-plane of the wafer can vary. This can result in growth differences between wafers (even under the same growth conditions). Consequently, the emission wavelength may vary.

[0014] With the proposed solution, microLEDs can be grown in a common process using a selected configuration of the mask aperture, which does not require the removal of InGaN material between fabrications of microLEDs with different emission wavelength configurations. Instead, the aperture width of the mask aperture is configured to facilitate the growth of microLED structures with selected emission wavelengths.

[0015] The proposed solution represents several advancements over existing technologies due to the use of InGaN wafers, which act as pseudo-substrates with optimal In composition. This combination allows for wavelength-tunable patterning of the microLED structure, reducing strain in the LED structure and improving efficiency. Attached Figure Description

[0016] Figure 1 Three epitaxially grown semiconductor devices in the form of hexagonal InGaN pyramids are schematically shown, based on which various embodiments of the proposed solution can be obtained.

[0017] Figures 2A to 2E Examples of the various steps in the process flow for fabricating microLED structures on epitaxial wafers according to the proposed solution are illustrated schematically.

[0018] Figure 3AThe schematic illustration shows an example semiconductor device based on the proposed solution, in which microLED structures with different emission wavelengths are grown on different InGaN wafers on the same epitaxial wafer.

[0019] Figure 3B The diagram schematically illustrates another example of a semiconductor device based on the proposed solution, in which microLED structures with different emission wavelengths are grown on a common InGaN wafer on an epitaxial wafer.

[0020] Figure 4A Schematic illustration of the corresponding Figure 3A A cross-sectional view of the aperture configuration on the InGaN wafer used to grow an example microLED structure.

[0021] Figure 4B Schematic illustration of the corresponding Figure 3B A cross-sectional view of the aperture configuration on the InGaN wafer used to grow an example microLED structure.

[0022] Figure 5A It shows a reference-based Figure 3A The described embodiment is a top view of an example arrangement of contacts for attachment to a semiconductor device in a driver circuit.

[0023] Figure 5B A side view illustrating a contact to a semiconductor device according to an example is shown schematically.

[0024] Figure 5C A semiconductor device according to an example is schematically shown, wherein the semiconductor device is connected to a driver circuit for generating RGB light emission.

[0025] Figure 5D schematically shown Figure 5C An alternative to the example, where the growth layer is replaced by a deposited transparent conductive layer.

[0026] Figure 6A It shows a reference-based Figure 3B The described embodiment is a top view of an example arrangement of contacts for attachment to a semiconductor device in a driver circuit.

[0027] Figure 6B A side view illustrating a contact to a semiconductor device according to an example is shown schematically.

[0028] Figure 6C A semiconductor device according to an example is schematically shown, wherein the semiconductor device is connected to a driver circuit for generating RGB light emission.

[0029] Figure 6Dschematically shown Figure 6C An alternative to the example, where the growth layer is replaced by a deposited transparent conductive layer.

[0030] Figure 7 A hexagonal InGaN RGB wafer array design according to one embodiment is illustrated schematically.

[0031] Figure 8A It shows the basis Figure 7 The first example of the RGB pixels of the pattern.

[0032] Figure 8B It shows the basis Figure 7 The second example of the pattern's RGB pixels.

[0033] Figure 9 It shows the basis Figure 8A An example of a display's exemplary pixel array layout. Detailed Implementation

[0034] The specific embodiments described below provide information and examples of the disclosed technology with sufficient detail to enable those skilled in the art to practice this disclosure.

[0035] Ternary InGaN alloys are widely used as active layers (or quantum wells) in nitride LEDs and laser diodes. The thickness of InGaN active layers is typically no more than 3 nm, primarily to confine the effects of the quantum confinement Stark effect (QCSE), which reduces the spatial overlap between the electron and hole wave functions in the quantum well. Another reason is that the crystal quality of InGaN can deteriorate rapidly when the layer is grown thicker, partly due to the large miscibility gap between GaN and InN, but mainly due to the strain effects of growth on a mismatched substrate. However, thick and relaxed InGaN films are highly desirable for use as substrates in nitride optoelectronic devices where high indium content InGaN active layers are required.

[0036] Figure 1 The figure illustrates three epitaxially grown semiconductor structures in the form of hexagonal InGaN pyramids, which can be used as the basis for various embodiments of the proposed solution. The figure shows a semiconductor structure that can be fabricated and used as a starting structure for fabricating InGaN wafers according to the proposed solution. For example, a sapphire or Si substrate 1 is provided with one or more layers of c-oriented GaN as growth layers 2, such as (0001) oriented GaN films. For example, SiN... xA mask layer 3 is formed on top of the GaN layer. Holes (or openings / apertures) 4 are provided in the mask layer. Holes 4 can be fabricated using various types of photolithography (e.g., EBL, nanoimprint lithography, DUV lithography, etc.). Holes 4 can be very narrow, for example, having diameters of 20-200 nm, 50-150 nm, or 60-100 nm. Optionally, seed growth of a Group III nitride material (e.g., GaN) can be performed. In a subsequent step, hexagonal InGaN pyramids 5 are epitaxially grown from the growth layer (optionally from the seed) over the holes. During this growth, gallium and indium materials diffuse primarily from the SiN mask surface to the holes, without any nucleation on the mask surface. In this way, the growth of InGaN pyramids with indium content up to 20% has been achieved, as determined by photoluminescence (PL) measurements. The growth of InGaN pyramids can be performed by selective doping, resulting in negatively doped n-InGaN pyramids 5. The information related to WO2020187986A1 (which is incorporated herein by reference) is disclosed. Figure 1 Various examples and aspects related to the prefabrication of structures.

[0037] Hexagonal InGaN pyramids with diagonal substrate dimensions of several hundred nanometers (e.g., >400 nm) can be used. These pyramids have {101̅1} lateral facets (s-planes) and occasionally small, flat (0001) top facets (c-planes). Each pyramid is a homogeneous InGaN semiconductor structure. InGaN pyramids can be fabricated from InGaN (n-InGaN) with an indium concentration of approximately 10% or 8-12%.

[0038] The prefabrication step, epitaxially growing from the mask aperture, results in no or virtually no dislocations in the InGaN pyramids. As a result, emission inhomogeneities caused by dislocations between pixels (individual semiconductor devices) are avoided. This clearly contributes to achieving high quantum efficiencies, such as exceeding 10%. Furthermore, very thin (e.g., less than 1 µm) GaN buffer / growth layers can be used, leading to very low wafer warpage. This provides the benefit of high-yield processing. In alternative embodiments, the growth layer may not be GaN, but rather Si.

[0039] The proposed solution is based on creating InGaN wafers configured for the further growth of microLEDs, each configured to emit one of red, green, and blue light. In some embodiments, each such InGaN wafer is fabricated from an array of substantially identical InGaN pyramids by simultaneous growth from corresponding mask apertures in an epitaxial process.

[0040] According to some examples, InGaN wafers are arranged / grown on a carrier in a first triangular pattern, wherein each InGaN wafer has six adjacent InGaN wafers at equal distances. This achieves uniformity in the growth of the InGaN pyramids, upon which the InGaN wafers are formed. In such embodiments, RGB triples can be defined, for example, as straight lines, or as... Figure 8A and Figure 8B The diagram shows a triangular arrangement. In other examples, InGaN wafers are arranged in square or rectangular patterns. In such embodiments, RGB triples can be defined, for example, as straight lines or L-shapes.

[0041] The use of epitaxially grown InGaN pyramids, from small holes to a common growth layer, provides the advantages of high crystal quality and high production efficiency for InGaN sheets.

[0042] The proposed solution includes a method for fabricating a semiconductor device comprising microLED structures configured for red, green, and blue (RGB) emission on the same carrier. Each microLED structure is grown on an InGaN wafer, which is grown on a common semiconductor substrate (also referred to herein as an epitaxial wafer). Therefore, each InGaN wafer is configured to host one or more microLED structures, which can be connected to driver circuitry.

[0043] Figures 2A-2E The figures present various stages of a first example of a process flow for manufacturing a semiconductor device 20 according to the proposed solution, the semiconductor device 20 comprising multiple microLED structures on the same epitaxial wafer 10. For simplicity, these figures show only a single microLED structure 240. Reference will be made below. Figure 3A and Figure 3B Further features and examples related to semiconductor devices comprising multiple microLED structures (e.g., microLED structures for emitting red, green, and blue light) on the same epitaxial wafer 10 are discussed. However, it should be noted that semiconductor devices comprising multiple microLED structures may include microLED structures configured only for the same emission wavelength, or microLED structures configured for two, three, or more than three different wavelengths.

[0044] This process includes, or has successfully included, the epitaxial growth of InGaN pyramids 5 through mask openings 4 of epitaxial wafer 10, in which InGaN pyramids 5 are obtained. Figure 2A The InGaN pyramid can have a specific indium content configuration, such as 8-12%, for example 10%. This can correspond to... Figure 1In this context, it can be noted that the epitaxial wafer 10 (or carrier) may include at least a mask layer 3, while the underlying growth layer 2 used to grow the InGaN pyramid through the mask holes may be removed or thinned after the semiconductor device is completed.

[0045] refer to Figure 2B The process may involve truncating the InGaN pyramid 5 to form a truncated InGaN pyramid 100, i.e., an InGaN wafer 100. In the context of the proposed solution, truncation can be achieved using one or more of various types of processes for material removal or re-deposition to obtain the truncated pyramid shape. Truncation involves material removal, such as by etching back, annealing, or polishing (e.g., chemical mechanical polishing (CMP)). After truncation, the top c-plane surface 110 of the InGaN wafer 100 is formed at a specific height above the carrier, for example, above the top surface of the mask layer 3. In some examples, this involves truncating all pyramids to leave a corresponding base layer with a common height (e.g., 20-500 nm or 80-120 nm) above the top surface of the carrier (of the mask layer 3). The InGaN wafers 100 should ideally be identical, and each InGaN wafer 100 may have a diameter of 150 nm to 2 µm or 500-1000 nm (point-to-point of its hexagonal coverage area). The lateral distance between InGaN wafers is determined by the spacing between the mask apertures 4 and the length of time they have been grown, and the figures provided herein are illustrative and not to scale. Alternatively, additional InGaN growth, either a surface layer or a buffer layer, can subsequently be performed on the corresponding InGaN wafer 100, acting as a repair layer to provide surface improvement to the upper c-plane surface prior to QW growth, and optionally also removing any curved dome shapes resulting from polishing. In other examples, see reference to... Figure 2E As described, the buffer layer growth is performed only on a limited, masked portion of the exposed c-plane of the InGaN wafer.

[0046] Figure 2C The process steps are shown, in which an upper mask layer 200 has been disposed on the epitaxial wafer 10, thereby covering the InGaN wafer 100. The upper mask layer 200 can be made of materials such as SiO2. x SiN x or AlO x An inert mask material is formed. The upper mask layer can have a thickness of approximately 30 nm, or in the range of 5-200 nm. In some examples, a filler material 210 can be provided to fill the spaces between the InGaN wafers 100 before the upper mask layer is formed. In some examples, the filler material 210 can be... Figure 2A This stage has been provided (and also exists) Figure 2B(in the middle), therefore undergoes the same truncation steps as the InGaN material of pyramid 5.

[0047] Figure 2D The diagram illustrates the formation of a mask aperture 220 in an upper mask layer 200. In some examples, this can be performed by photolithography. This process may include spin-coating photoresist over the upper mask layer 200, exposing the photoresist in a photolithography machine to form an exposure pattern corresponding to a desired aperture configuration, removing the exposed / unexposed photoresist (depending on the process), etching holes through the upper mask layer 200 where the photoresist has been removed, and removing any remaining photoresist. The result is that the upper mask layer 200 is provided with apertures 220 formed on the top c-plane surface 110 of the InGaN wafer 100, wherein the width of the mask aperture 220 is smaller than the top c-plane surface.

[0048] Figure 2E A semiconductor device 20 is shown after the growth of a microLED structure 240. The microLED structure 240 is grown on a top c-plane surface 110 in a mask aperture 220 and includes a QW layer 242. The growth of the microLED structure 240 can be performed in an MOCVD chamber. The QW layer 242 may include an n-type InGaN buffer, an InGaN QW, a GaN, InGaN, or AlGaN electron blocking layer, and a p-InGaN layer. The microLED structure 240 may also include an InGaN surface layer or buffer layer 241, which is first grown on the c-plane surface 110 in the mask aperture 220. This layer 241 may partially act as a repair layer to provide surface improvement of the upper c-plane surface prior to QW growth and optionally also remove any curved dome shapes resulting from polishing. The microLED structure 240 may also include a top InGaN layer 243 grown on the QW layer 242.

[0049] Due to the nature of the facets that define the hexagonal lamellar crystals, the growth rate on the side facets (s-plane) is lower than the growth rate on the top c-plane, meaning the growth is anisotropic. This implies that aperture 220 will define the lateral dimensions of the QW layer. For the exemplary growth conditions, the difference in growth rates between the top c-plane and the s-plane is approximately 30:1.

[0050] Main reference Figure 2D and Figure 2EAperture 220 defines the surface area for further growth on the corresponding InGaN lamella 100. In this context, it should be noted that the size of the exposed portion of the c-plane of the InGaN lamella 110 will affect further growth. Aperture 220 can be considered as a collection site for material falling on the aperture surface and the surface of the upper mask layer 200, which is located between this aperture and the next adjacent aperture (material falling between apertures will diffuse / move to the nearby aperture). If the distance between apertures remains the same, but the apertures become smaller, more material will be collected per “aperture area.” This will result in a higher growth rate and thus more growth in smaller apertures. This also results in a higher In composition. For smaller apertures, emission from the QW will be more red-biased due to the higher In composition and because the QW layer will be thicker, resulting in lower carrier quantization energies and therefore longer wavelengths compared to larger apertures.

[0051] If in such Figure 2B When a QW layer is grown on the structure shown, the surface area of ​​the c-plane 110 of the corresponding InGaN wafer 100 will be determined by the height of the truncated pyramid / cone due to the tilted shape of the side facets. However, controlling the height of the InGaN wafer 100 is very challenging when it is determined by truncation (i.e., by material removal, such as by CMP). For example, it is difficult to obtain a controlled and consistent height for multiple InGaN wafers across a 6-inch (150,000,000 nm) epitaxial wafer 10. This is further complicated by the fact that the epitaxial wafer 10 is typically not perfectly flat but can have an inherent bend of several 1,000 nm. This bend cannot be fully compensated for during truncation, making it difficult to control the height with the desired precision. As a result, the emission wavelengths from the corresponding microLEDs will differ by one-tenth of a nanometer, which is insufficient for many applications and is clearly detectable by the human eye.

[0052] In contrast, and according to the proposed solution, a more controlled growth region for QW growth is obtained where the exposed portion of the c-plane surface region 110 of the corresponding InGaN wafer 100 is determined by the aperture 220. As controlled in the photolithography step, the aperture size (width) can be achieved with high precision and a low-size distribution. As a result, lower variation in emission wavelength is achieved among the multiple microLEDs grown on the region of the epitaxial wafer 10. Tests conducted by the inventors show that the average emission wavelength distribution among the microLED structures 240 grown on different wafers 100 is less than 5 nm.

[0053] refer to Figure 3A and Figure 3BTwo different embodiments of a semiconductor device comprising multiple microLED structures configured to emit different wavelengths will now be described by way of example.

[0054] Figure 3A An example embodiment of the semiconductor device 30 is shown, wherein a single mask aperture is configured on each InGaN wafer, and a single microLED is configured on each InGaN wafer. The figure shows InGaN templates 101, 102, and 103 configured by growth from the same growth layer. The InGaN wafers are substantially identical, but their respective heights and therefore the dimensions of their respective top c-plane surfaces may differ due to material removal used to form the truncated pyramidal shape. Mask apertures 221, 222, and 223 are formed in an upper mask layer above the respective InGaN wafers 101, 102, and 103. Specifically, mask apertures 221, 222, and 223 are configured with different widths to facilitate the growth of microLED structures 320, 240, and 250 with different emission wavelengths. The resulting emission wavelength decreases as the aperture width increases. In other words, the aperture width is related to the emission wavelength of the respective microLED structure in the order of red-green-blue. By appropriately designing the aperture width, microLED structures for red (R) 250, green (G) 240, and blue (B) 230 emission are configured on each InGaN wafer. Specifically, by carefully designing the mask aperture, all microLED structures 230, 240, and 250 can be grown in a common epitaxial process. This provides an efficient manufacturing process. The emission color is configured based on the aperture width, which is controlled by aperture formation during the photolithography step, and thereafter, the QW layer is grown under the same growth conditions for all microLED structures. It can also be noted that the corresponding microLED structures 230, 240, and 250 include an InGaN buffer layer (see [link to InGaN wafer]). Figure 2E In the case of 241), the indium concentration of the buffer layer can also vary depending on the pore width.

[0055] Figure 4A As shown in Figure 3A A cross-sectional view of the upper mask layer 200 in an example configuration of the proposed solution is shown. As seen herein, the c-plane surfaces (dashed lines) of the lower InGaN lamellae 101, 102, 103, which can be used for further epitaxial growth of the microLED structure, are limited by the configured apertures 221, 222, 223. The top c-plane surfaces of the corresponding InGaN lamellae have hexagonal coverage areas. In various examples, the corresponding mask apertures 221, 222, 223 have substantially circular coverage areas, although other shapes are possible. Differences in aperture width are also visible, which facilitate the growth of microLED structures with different emission wavelengths.

[0056] Figure 3B An example of a second embodiment of the semiconductor device 31 is shown, wherein multiple mask apertures are configured on each InGaN wafer, with only one InGaN wafer 105 shown in the figures. Thus, multiple microLED structures 230, 240, 250 are configured on each InGaN wafer, formed by epitaxial growth in a common process. Specifically, in some examples, corresponding microLED structures for red (R) 250, green (G) 240, and blue (B) 230 emission are configured on each InGaN wafer 105.

[0057] In such an embodiment, with Figure 3A Compared to the previous embodiments, larger InGaN wafers 105 can be formed. For example, it can be configured with a height of 100-3000 nm and a diameter of 2-8 µm.

[0058] Figure 3B Another advantage of this embodiment is that any resulting curved dome shape on the upper surface of the InGaN wafer 105 caused by truncation may not be as prominent in the corresponding aperture. This may require less buffer layer growth.

[0059] Figure 4B It shows according to Figure 3B A cross-sectional view of the upper mask layer 200 in an example configuration of the proposed solution is shown. As seen herein, the c-plane surface (dashed line) of the lower InGaN wafer 105, which can be used for further epitaxial growth of the microLED structure, is limited by the configured apertures 221, 222, and 223. The top c-plane surface of the corresponding InGaN wafer has a hexagonal coverage area. In various examples, the corresponding mask apertures 221, 222, and 223 have a substantially circular coverage area, which may be advantageous in photolithography processes, although other shapes are possible. Differences in aperture width are also visible, which facilitates the growth of microLED structures with different emission wavelengths.

[0060] While examples of typical RGB microLED structures are provided herein, it should be noted that in other embodiments, the microLED structures can be grown for other purposes, such as IR or UV emission. These can be configured separately from RGB or in combination with RGB microLED structures. They can be further configured to correspond to... Figure 3A On separate InGaN wafers, or configured on such Figure 3B On the common InGaN wafer.

[0061] In various examples, each microLED structure has a truncated pyramid shape terminating in the surface of the c-plane connector. This provides a proper connection to the driver circuitry. The microLED configured to emit the longest wavelength (i.e., the microLED grown in the smallest aperture) will grow the fastest. The aperture width and growth conditions can therefore be configured such that the microLED grown in the smallest aperture does not grow into a complete pyramid.

[0062] Figures 5A-5D and Figures 6A-6D The contacts of semiconductor devices 50, 60 are schematically shown according to various examples of the proposed solution. Figures 5A-5D The embodiments are based on reference Figure 3A The illustrated embodiment, while Figures 6A-6D The embodiments are based on reference Figure 3B An illustrative embodiment. Regarding the corresponding features of interest, in Figures 5A-5D and Figures 6A-6D The same reference numerals are used throughout. Where reference numerals are not included, refer to details highlighted in other figures.

[0063] Figure 5A and Figure 5B An example of a semiconductor device 50 according to the proposed solution is schematically shown, which is based on a reference. Figure 3A The illustrated embodiments, and Figure 5C and Figure 5D An example of a microLED device 500 is shown, wherein the semiconductor device 50 is connected to a driver circuit.

[0064] Figure 5A A top view shows an example of a triangular arrangement of RGB microLED structures, where n-contacts are centrally configured within the triangular pixel arrangement. Alternatively, the n-contacts can be separately connected to the respective microLEDs.

[0065] Figure 5B A semiconductor device 50 according to an example of the proposed solution is schematically illustrated. As described and illustrated herein, the semiconductor device 50 includes an epitaxial wafer 10 and a plurality of InGaN wafers 100, each InGaN wafer monolithically grown on the epitaxial wafer and having a top c-plane surface. An upper mask layer 200 having a mask aperture 220 is disposed on the InGaN wafer, wherein the width of the mask aperture is smaller than the top c-plane surface. A plurality of microLED structures, including a QW layer, are grown on the top c-plane surface of one of the mask apertures. In this example, one microLED is grown on each InGaN wafer. In the figures, the growth layer 2 is still retained, but this layer may be peeled off or thinned before or after contact.

[0066] A contact spacer layer 51 may be applied over the microLED structure, wherein p-contacts 52B, 52G, 52R to the respective InGaN wafers protrude through the contact spacer layer 51 and are bonded to the respective top c-plane surface of the microLED structure. The contact spacer layer 51 is a dielectric layer that allows leads (not shown) to be applied to the p-contacts over the surface of the microLED device. n-contacts 53 (or individual contacts) for pixel groups are formed to extend from the substrate-side surface of the InGaN wafers to the top side of the semiconductor structure 50 to facilitate the connection of driver circuitry. According to the example shown, the n-contacts 53 may be metallic connections.

[0067] Figure 5C and Figure 5D The schematic diagram illustrates the basis. Figure 5B An example of a microLED device 500 is provided, which includes a semiconductor device 50 according to the proposed solution. The accompanying figure illustrates the attachment and connection of the semiconductor device 50 to a driver circuit 54. Each microLED structure has a top c-plane surface of the driver circuit 54 that can be connected by means of corresponding connectors 52R, 52G, 52B for generating light emission.

[0068] Here, the driver circuit 54 is illustrated by a Si CMOS driver circuit. In some examples, a thin-film active transistor driver may be used instead or additionally. Although Figure 5A The top image suggests triangular groupings of RGB pixels with a central n-point contact, but for simplicity, the bottom image shows a linear representation. Either is possible.

[0069] When the microLED device 500 is configured to emit light through the substrate side of the InGaN wafer, the p-contacts 52B, 52G, and 52R connected to the upper c-plane of the corresponding microLED structure can be reflective to increase light output.

[0070] Remove the base substrate 1 (see Figure 1 As described, the original growth layer 2 can be further thinned or peeled off. Figure 5C In the example shown, at least a portion of the growth layer 2 is retained (possibly after thinning) to serve as a lead for connecting the n-connector to the substrate side of the corresponding InGaN wafer.

[0071] Figure 5D It shows Figure 5C An alternative to the example is shown. Here, growth layer 2 and growth mask 3 are completely removed. A transparent connector layer 55, such as transparent conductive oxide (TCO), is deposited onto the substrate surface of semiconductor device 50, thereby acting as a lead for connecting n-connectors to the substrate side of the corresponding InGaN wafer.

[0072] Therefore, the epitaxial wafer 10 of the microLED device 500 includes an InGaN wafer and a transparent conductive layer, which may include a mask layer 3 and a portion of the growth layer 2 or a transparent oxide layer.

[0073] Figure 6A and Figure 6B Another example of a semiconductor device 60 based on the proposed solution is illustrated schematically, which is based on a reference. Figure 3B In the illustrated embodiment, more than one microLED structure is configured on a common InGaN wafer, while Figure 6C and Figure 6D An example of a microLED device 600 is shown, in which the semiconductor device 60 is connected to a driver circuit.

[0074] Figure 6A A top view shows an example of a triangular arrangement of RGB microLED structures, where n-contacts are centrally configured within the triangular pixel arrangement. Alternatively, the n-contacts can be separately connected to the respective microLEDs.

[0075] Figure 6B A semiconductor device 60, based on an example of the proposed solution, is schematically shown, which is based on a reference. Figure 3B The illustrated embodiment. As described and illustrated herein, semiconductor device 60 includes an epitaxial wafer 10 and a plurality of InGaN wafers 100, each InGaN wafer being monolithically grown on the epitaxial wafer and configured with a truncated pyramidal shape having a top c-plane surface. An upper mask layer 200 having a mask aperture 220 is disposed on the InGaN wafer, wherein the width of the mask aperture is smaller than the top c-plane surface. A plurality of microLED structures, including a QW layer, are grown on the top c-plane surface of one of the mask apertures. In this example, three apertures are configured in the upper mask layer above each InGaN wafer. In the figures, the growth layer 2 is still retained, but this layer may be peeled off or thinned before or after contact.

[0076] A contact spacer layer 51 may be applied over the microLED structure, wherein p-contacts 52B, 52G, 52R to the respective InGaN wafers protrude through the contact spacer layer 51 and are bonded to the respective top c-plane surface of the microLED structure. The contact spacer layer 51 is a dielectric layer that allows leads (not shown) to be applied to the p-contacts over the surface of the microLED device. n-contacts 53 (or individual contacts) for pixel groups are formed to extend from the substrate-side surface of the InGaN wafers to the top side of the semiconductor structure 60 to facilitate the connection of driver circuitry. According to the example shown, the n-contacts 53 may be metallic connections.

[0077] Figure 6C and Figure 6D The schematic diagram illustrates the basis. Figure 6B An example of a microLED device 600 is provided, which includes a semiconductor device 60 according to the proposed solution. The accompanying drawing illustrates the attachment and connection of the semiconductor device 60 to a driver circuit 54. Each microLED structure has a top c-plane surface of the driver circuit 54 that can be connected by means of corresponding connectors 52R, 52G, 52B for generating light emission.

[0078] Here, the driver circuit 54 is illustrated by a Si CMOS driver circuit. In some examples, a thin-film active transistor driver may be used instead or additionally. Although Figure 6A The top image suggests triangular groupings of RGB pixels with a central n-point contact, but for simplicity, the bottom image shows a linear representation. Either is possible.

[0079] When the microLED device 600 is configured to emit light through the substrate side of the InGaN wafer, the p-contacts 52B, 52G, and 52R connected to the upper c-plane of the corresponding microLED structure can be reflective to increase light output.

[0080] Remove the base substrate 1 (see Figure 1 As described, the original growth layer 2 can be further thinned or peeled off.

[0081] exist Figure 6C In the example shown, at least a portion of the growth layer 2 is retained (possibly after thinning) to serve as a lead for connecting the n-connector to the substrate side of the corresponding InGaN wafer.

[0082] Figure 6D It shows Figure 6C An alternative to the example is shown here, where growth layer 2 is completely removed and growth mask 3 is also removed. A transparent connector layer 55, such as TCO, is deposited onto the substrate surface of semiconductor device 60, thereby acting as a lead for connecting n-connectors to the substrate side of the corresponding InGaN wafer.

[0083] Therefore, the epitaxial wafer 10 of the microLED device 600 includes an InGaN wafer and a transparent conductive layer, which may include a mask layer 3 and a portion of the growth layer 2 or a transparent oxide layer.

[0084] Figure 7 Examples of microLED RGB array designs based on the proposed solution are shown. Epitaxial growth outside the aperture of a triangular arrangement in the upper mask layer 200 results in very uniform growth conditions, leading to well-controlled composition, where each microLED structure has six adjacent microLED structures at a common distance.

[0085] As indicated in the attached diagram, a hexagonal array is configured for each color. The hexagonal pattern provides the same distance / spacing between all InGaN wafers prepared for the same emission wavelength. This is beneficial for growth uniformity. Specifically, by maintaining triangular symmetry (and center-to-center spacing) for the red, green, and blue wafer LEDs, the color purity and uniformity across the wafer for each LED color are very high. This arrangement is particularly suitable for reference. Figure 3A The described embodiments use an example where there is a one-to-one relationship between the InGaN wafer and the microLED structure.

[0086] Figure 8A An example of a pixel group configuration is shown, where triplets of RGB microLED structures are combined into a single pixel group, capable of achieving any color in the visible spectrum. In this example, a triangular pixel group is configured.

[0087] As an example, Figure 8B An alternative arrangement of triplets of RGB microLED structures in a pixel group is shown, capable of achieving any color in the visible spectrum. In this example, a linear combination is configured.

[0088] Figure 9 Examples of several pixel RGB groups are shown, each pixel RGB group including according to Figure 8A The example triplet. The pixel array layout illustrates the arrangement of microLED structures used for red, green, and blue light emission in display applications.

[0089] The above embodiments provide examples of solutions for the proposed semiconductor devices for microLEDs and their fabrication methods. The disclosed technology minimizes defects in crystal formation and improves the external quantum efficiency of microLEDs with pixel sizes less than 10 μm. It also provides a solution for minimizing emission wavelength variations between microLED structures epitaxially grown on the same wafer, aiming to transmit light of the same wavelength. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this disclosure. Various modifications and adjustments can be made by those skilled in the art without departing from the scope of this disclosure as set forth in the appended claims.

[0090] Based on the above description of the proposed solutions and their examples and embodiments, various other related features and examples are outlined below.

[0091] Growing InGaN pyramids through the mask openings 4 of the epitaxial wafer 10 enables the formation of InGaN wafers 100 with specific shapes and configurations. This controlled growth process contributes to the overall quality and performance of the resulting microLEDs because it allows for the formation of InGaN wafers with minimal defects and optimized external quantum efficiency.

[0092] The growth mask 3 configured for growing InGaN pyramids is preferably a dielectric material, such as AlO. x SiN x TiN. For example... Figures 9-1 As shown in Figure 2, the holes 4 passing through the opening of the dielectric growth mask are preferably arranged in a triangular lattice, wherein the hole size is in the range of 20-200 nm and they are spaced apart by 0.5-10 μm.

[0093] The grown InGaN pyramid 5 is preferably grown as n-type InGaN. The n-type InGaN pyramid can be, for example, doped with Si to 1-5 × 10⁻⁵. 18 cm -3 The level.

[0094] According to some examples, InGaN pyramids 5 of the same composition are grown simultaneously as n-type InGaN pyramids with a specific indium concentration, wherein the pyramids are later processed to obtain individual InGaN wafers.

[0095] According to other examples, for blue LEDs, GaN or InGaN pyramids with an indium content of less than 5% (wavelength <380 nm) can be used. For green LEDs, InGaN pyramids with an indium content of approximately 10% (wavelength 420-430 nm) are preferred, and for red LEDs, an indium content of 18%-20% (wavelength 480-500 nm) is preferred. Different indium contents / concentrations can be obtained by growing InGaN pyramids in separate processes.

[0096] The microLED structure includes a QW layer (also called an active layer), which itself may include one or more QWs, such as 3-5 QWs. Each QW layer can be approximately 2-3 nm thick. The composition (i.e., indium concentration) of blue, green, and red LEDs is approximately 10-15%, 25-27%, and 35-40%, respectively. When combining blue, green, and red LEDs on the same epitaxial wafer, an electron blocking layer (EBL) of AlGaN with an Al content of 10-25% and a thickness of 10-25 nm can be used. When fabricating only green or red LEDs, an EBL of AlGaN (Al content less than 10%), GaN, or InGaN (In content less than that of n-type and p-type InGaN layers) can be used.

[0097] The p-type InGaN top layer is further grown on the QW layer of the microLED structure. For blue LEDs, the p-layer can be a p-GaN with a thickness of 100-200 nm or a p-InGaN containing only a few percent (<10% or <5%) of In. For green and red LEDs, p-InGaN with indium contents of 10% and 18%, respectively, can be used. The p-type doping uses, for example, at least higher than 1 × 10⁻⁶. 19 cm -3 This can be achieved using horizontal Mg. Rapid thermal annealing can be used to activate Mg doping.

[0098] exist Figure 5B and Figure 6B The contact spacer layer 51 seen in the image can be a polymer. Preferably, it is such as PECVD SiO2. x The dielectric spacer layer should be used in conjunction with CMP to expose the top c-plane of the p-InGaN layer. In PECVD SiO x Before growth, a thin layer of ALD Al2O3 can be deposited first to facilitate the deposition of SiO2 by PECVD. x It initially protects the surface from plasma damage and also serves as a surface passivation agent for lamellar surfaces.

[0099] Preferably, such as Figure 8B and Figure 9 As shown in Figure B, n-type contacts to the base of the InGaN wafer and p-type InGaN contacts can be fabricated on the wafer side of the epitaxial wafer 10, allowing for convenient integration with driver circuits, such as CMOS driver chips. In this case, the flat c-plane top surface of the microLED structure provides a suitable surface for the bonding of the p-contacts.

[0100] In summary, the method for fabricating semiconductor devices for microLEDs described herein provides a robust and efficient approach to creating high-quality microLEDs with minimized crystal formation defects and improved external quantum efficiency. The various steps and optional features of this method facilitate the formation of microLED structures with precise control over their shape, configuration, and emission properties, thereby ensuring optimal performance of the resulting microLEDs across a wide range of applications.

[0101] The proposed solution offers significant advantages over existing technologies. In state-of-the-art LED growth, LEDs of a single color (blue, green, or red) can be fabricated on a single wafer (or in a single growth run). To create a full-color microLED display, mass transfer is required to transfer the subpixels of the R, G, and B microLEDs. This is a very challenging step, especially impractical for microLEDs smaller than 10 μm. In contrast, the proposed solution provides RGB subpixels on the same wafer in a single growth step. Thus, each complete RGB pixel, containing three R / G / B subpixels, can be directly integrated into the driving circuitry, eliminating the need for mass transfer. This enables monolithic integration of RGB wafer-level microLEDs via epitaxy, such as metal-organic chemical vapor deposition (MOCVD).

Claims

1. A semiconductor device (30), comprising: Epitaxial wafer (10); Multiple InGaN wafers (100), each InGaN wafer is monolithically grown on an epitaxial wafer and configured with a top c-plane surface (110). An upper mask layer (200) having a mask aperture (220) on top of an InGaN wafer, wherein the width of the mask aperture is smaller than the top c-plane surface; Multiple microLED structures (240) including a quantum well QW layer (242), wherein each microLED structure is grown on the top c-plane surface in one of the mask apertures.

2. The semiconductor device according to claim 1, wherein each microLED structure further comprises a top InGaN layer (243) grown on the corresponding QW layer.

3. The semiconductor device according to claim 1 or 2, wherein a single mask aperture is disposed on each InGaN wafer, and a single microLED is disposed on each InGaN wafer.

4. The semiconductor device according to any of the preceding claims, wherein a plurality of mask apertures (221, 222, 223) are disposed over each InGaN wafer, and wherein a plurality of microLED structures (230, 240, 250) are disposed on each InGaN wafer.

5. The semiconductor device of claim 4, wherein three mask apertures are disposed above each InGaN wafer, and respective microLED structures for red, green and blue emission are disposed on each InGaN wafer.

6. The semiconductor device according to any of the preceding claims, wherein the aperture width is related to the emission wavelength from the corresponding microLED structure.

7. The semiconductor device according to any of the preceding claims, wherein the aperture is configured to have increasing widths in the order of red-green-blue for different emission wavelengths of the respective microLED structure.

8. The semiconductor device according to any of the preceding claims, wherein each microLED structure includes an InGaN surface layer (241) grown in a mask aperture above the top c-plane, wherein the QW layer is grown on the InGaN surface layer.

9. The semiconductor device of claim 8, wherein the indium concentration of the InGaN surface layer decreases with increasing aperture width.

10. The semiconductor device according to any of the preceding claims, wherein the epitaxial wafer includes a lower mask layer having a mask opening in which a grown InGaN wafer is disposed.

11. The semiconductor device according to any of the preceding claims, wherein the top c-plane surface has a hexagonal coverage area.

12. The semiconductor device according to any of the preceding claims, wherein the mask aperture has a substantially circular coverage area.

13. The semiconductor device according to any of the preceding claims, wherein each microLED structure has a truncated pyramid shape terminating in the surface of a c-plane connector.

14. A microLED device (500), comprising: The semiconductor device according to any of the preceding claims; and A driver circuit (54), which is connected to the corresponding top portion of each microLED structure via a p-contact and to the substrate side of the epitaxial wafer via an n-contact, is used to generate light emission from the corresponding microLED structure.

15. The microLED device of claim 14, wherein the driver circuit is connected via individual p-contacts to a plurality of microLED structures configured on the same InGaN wafer.

16. A method for fabricating a semiconductor structure, comprising: InGaN wafers are formed monolithically grown on an epitaxial wafer, wherein each InGaN wafer has a top c-plane surface; A mask layer is disposed on the InGaN wafer; A mask aperture is formed in an upper mask above the top c-plane surface, wherein the width of the aperture is smaller than the width of the top c-plane surface; and MicroLED structures, including quantum well (QW) layers, are grown from each mask aperture.

17. The method of claim 16, further comprising: The corresponding InGaN layer of the microLED structure is grown on the corresponding QW layer.

18. The method of claim 16 or 17, wherein forming InGaN wafers comprises: InGaN pyramids are epitaxially grown by growing through mask openings in the lower mask layer on the epitaxial wafer. and The InGaN pyramid is truncated to form a c-plane top surface.

19. The method according to any one of claims 16-18, wherein forming the mask aperture includes forming apertures with different widths, wherein the growth configuration of the QW layer is configured with microLED structures having different emission wavelengths.

20. The method according to any one of claims 16-19, further comprising: An InGaN surface layer is grown in a mask aperture above the top c-plane, wherein a QW layer is grown on the InGaN surface layer.

21. The method of claim 20, wherein the InGaN surface layer has an indium concentration that decreases as the width of the pore increases.

22. The method according to any one of claims 16-21, wherein forming the mask aperture comprises forming a single mask aperture on each InGaN wafer, wherein a single microLED structure is disposed on each InGaN wafer.

23. The method according to any one of claims 16-21, wherein forming the mask aperture includes forming a plurality of mask apertures on each InGaN wafer, wherein a plurality of microLED structures are disposed on each InGaN wafer.

24. The method according to any one of claims 16-21, wherein forming the mask aperture comprises forming three mask apertures with different widths on each InGaN wafer, wherein the growth of the QW layer on each InGaN wafer forms three microLED structures having red, green and blue emission wavelengths, respectively.

25. The method according to any one of claims 16 to 24, wherein the growth of the QW layer on the InGaN wafer is performed in a conventional epitaxial process for forming microLED structures with different emission wavelengths.

26. The method according to any one of claims 16 to 25, wherein each microLED structure is grown into a truncated pyramid shape terminating in the surface of the c-plane connector.

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