Target position positioning method and TEM sample preparation method
By forming marks within a set distance range on the chip and etching away the overlay, and combining this with chip layout to locate the target position, the problems of positioning damage and low grinding efficiency in existing technologies are solved, and precise TEM sample preparation is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI INTEGRATED CIRCUIT EQUIPMENT & MATERIALS INDUSTRY INNOVATION CENTER CO LTD
- Filing Date
- 2024-11-13
- Publication Date
- 2026-05-15
AI Technical Summary
Existing technologies may damage samples when locating covered target locations due to high-voltage observation, and grinding methods are inefficient and difficult to accurately locate and prepare TEM samples.
By forming marks within a set distance range on the chip, removing the overlay layer using etching, and combining this with chip layout to locate the target position, a TEM sample is prepared.
It enables precise positioning and preparation of TEM samples without damaging the samples, avoiding the risks of high voltage effects and excessive grinding.
Smart Images
Figure CN122042333A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a method for locating a target position and a method for preparing TEM samples. Background Technology
[0002] In the semiconductor field, failure analysis of chip structures is often performed by preparing transmission electron microscopy (TEM) samples. When preparing TEM samples, the target location must first be identified. However, direct location is difficult when the target location is covered. If the sample pattern is clear, the target location can be directly located based on the chip layout. However, if the sample pattern is unclear or covered, such as in a chip that has not been polished after aluminum or tungsten deposition, direct location is difficult. Existing location methods include: 1. When the cover layer at the target location is relatively shallow, observation under an electron beam with a higher voltage can locate the target location; 2. When the cover layer at the target location is relatively thick, high voltage is difficult to penetrate, and in this case, grinding is often used to remove the cover layer.
[0003] However, existing positioning solutions have the following problems:
[0004] (1) High voltage observation is used. If the target position is deep from the sample surface, the high voltage will be difficult to penetrate. Moreover, high voltage irradiation may have an adverse effect on the sample, such as damaging the film layer that is not resistant to electron beam irradiation.
[0005] (2) The disadvantage of using grinding to remove the coating is that it is difficult to control the grinding rate, there is a risk of over-grinding, and the grinding takes a long time and is less efficient. Summary of the Invention
[0006] The purpose of this invention is to provide a method for locating a target position and a method for preparing TEM samples, so as to solve one or more problems in the prior art.
[0007] To solve the above-mentioned technical problems, the present invention provides a target location positioning method, comprising:
[0008] Extract the chip containing the target location;
[0009] A first marker is selected based on the chip layout. The distance between the first marker and the target position is within a set distance range. A second marker is formed on the chip to locate the position of the first marker using the second marker.
[0010] The overlay on the first mark is etched away to expose the first mark;
[0011] Based on the actual location of the exposed first marker and the chip layout, the target location is determined; and,
[0012] TEM samples are prepared based on the positioning results of the target location.
[0013] Optionally, in the target location positioning method, the set distance range is greater than 20 μm and less than 100 μm, and the size of the cover layer etched away is 5 × 5 μm to 15 × 15 μm.
[0014] Optionally, in the target location positioning method, the position of the first marker is located by at least two spaced-apart second markers.
[0015] Optionally, in the target location positioning method, each of the second marks has an extension length, and the intersection of the extensions of all the second marks is the position of the first mark.
[0016] Optionally, in the target location positioning method, the first mark is obtained by laser marking.
[0017] Optionally, in the target location positioning method, a second mark is formed on the side of the first mark that is away from the target location.
[0018] Optionally, in the target location positioning method, the steps of determining the location area of the target location, selecting the first marker, and forming the second marker are performed under an optical microscope.
[0019] Optionally, in the target location method, the covering layer on the first mark is removed by a focused ion beam or a plasma focused ion beam.
[0020] To solve the same problem, the present invention also provides another target location positioning method, comprising:
[0021] Extract the chip containing the target location;
[0022] Select a third marker near the target location;
[0023] The overlay on the third mark is etched away to expose the third mark;
[0024] The target location is determined based on the shape and arrangement rules of the exposed third mark.
[0025] Furthermore, the present invention also provides a method for preparing a TEM sample, comprising:
[0026] The target location is located using the method described in the preceding item; and,
[0027] TEM samples are prepared based on the positioning results of the target location.
[0028] In summary, the target location positioning method and TEM sample preparation method provided by this invention locate the target location based on the actual position of the exposed markers near the target location and the chip layout, or based on the shape and arrangement rules of the exposed markers near the target location. This allows for the preparation of TEM samples even when the target location is covered, and the sample is not affected by high voltage, nor does it incur the risk of excessive grinding of the target location. Attached Figure Description
[0029] Figure 1 This is a flowchart illustrating the target location positioning method provided in Embodiment 1 of the present invention;
[0030] Figure 2 This is a schematic diagram of the initial positioning of the target location under OM in Embodiment 1 of the present invention;
[0031] Figure 3 This is a schematic diagram illustrating the use of a second marker to locate a first marker in Embodiment 1 of the present invention;
[0032] Figure 4 This is a flowchart illustrating the target location positioning method provided in Embodiment 2 of the present invention;
[0033] The labels in the attached figures are explained as follows:
[0034] 100 - Target location; 200 - First marker; 300 - Second marker. Detailed Implementation
[0035] To make the objectives, advantages, and features of this invention clearer, the invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clearly illustrate the objectives of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and sometimes use different scales. It should also be understood that, unless specifically stated or indicated, the terms "first," "second," "third," etc., in the specification are only used to distinguish the various components, elements, steps, etc., in the specification, and are not used to indicate the logical or sequential relationships between the various components, elements, steps, etc.
[0036] Example 1
[0037] like Figure 1 As shown, this embodiment provides a target location positioning method, including the following steps:
[0038] S11, splitting the chip containing the target location;
[0039] S12, a first mark is selected according to the chip layout, the distance between the first mark and the target position is within a set distance range, and a second mark is formed on the chip to locate the position of the first mark through the second mark;
[0040] S13, etch away the cover layer on the first mark to expose the first mark;
[0041] S14, based on the actual position of the exposed first marker and the chip layout, locate the target position.
[0042] The target location positioning method provided in this embodiment can be used to prepare TEM samples even when the target location is covered, and the sample will not be affected by high voltage, nor will it bear the risk of excessive grinding of the target location.
[0043] The following provides a more detailed description of each of the above steps.
[0044] First, step S11 is executed to extract the chip containing the target location.
[0045] Any suitable method can be used for splitting, including but not limited to laser cutting, blade cutting, etc. For example... Figure 2 As shown, the location of the target position 100 can be initially determined under optical equipment such as an optical microscope (OM) in conjunction with chip layout, and then the chip containing the target position can be removed.
[0046] Understandably, under an optical micromicroscope, such as Figure 2 As shown, although the chip pattern is not completely clear, the different pattern areas of the chip can be roughly distinguished. Combined with the chip layout, the approximate location of the target position 100 can be determined.
[0047] When preparing TEM samples, the target location must first be accurately located. Although only the approximate area of the target location can be known through observation with an optical microscope, step S1 narrows down the range for locating the target location.
[0048] Next, step S12 is executed to initially select the first marker based on the chip layout.
[0049] The chip layout reflects the positional relationship between various patterns on the chip, and the first mark is a pattern structure extracted from the chip. Since the location area of the target position has been roughly determined in step S11, the approximate location area of the selected first mark on the chip can be determined based on the approximate location area of the target position and the positional relationship between the selected first mark and the target position.
[0050] After the approximate location area of the first mark is determined, the position of the first mark is located using the second mark; that is, the position of the first mark can be confirmed based on the position of the second mark.
[0051] Optionally, the second mark can be formed by laser marking. To avoid damaging the target area during laser marking, preferably, the second mark is formed on the side of the first mark away from the target location. In other embodiments, other methods can also be used to form the second mark, such as marking with a marker pen, as long as the second mark is easily identifiable.
[0052] Further preferably, the position of the first mark is located by at least two spaced-apart second marks. Optionally, each second mark has an extension length, and the intersection of the extensions of all the second marks is the position of the first mark. For example, as Figure 3 As shown, two spaced-apart second marks 300 are used to locate the position of the first mark 200. The target position 100 is at the lower right corner of the first mark 200, with one second mark 300 located to the left of the first mark 200 and the other second mark 300 located directly above the first mark 200. The intersection of the extension lines of the two second marks 300 is the position of the first mark 200. In this embodiment, the second mark 300 is exemplified as being elongated. In other embodiments, the second mark 300 may also be in other shapes, such as ellipse or rhombus, as long as the different second marks 300 intersect at a fixed position.
[0053] Similarly, the steps of confirming the approximate location area of the first mark 200 and forming the second mark 300 in step S12 can be performed under optical equipment such as an optical microscope.
[0054] Next, step S13 is performed to etch away the overlay on the first mark 200 to expose the first mark 200.
[0055] In the prior art, the electron beam (E-beam) imaging of a scanning electron microscope (SEM), a focused ion beam (FIB) tool, or a plasma focused ion beam (PFIB) tool is used to locate the target position. However, when a covering layer is formed on the chip surface, the target position cannot be observed under the SEM tool, the FIB tool, or the PFIB tool. Similarly, the first mark cannot be observed either. Therefore, in this embodiment, only the ion beam (I-beam) of the FIB (provided by the FIB tool) or the PFIB (provided by the PFIB tool) is used to remove the covering layer on the first mark, and the FIB tool or the PFIB tool is not used to observe the target position. Generally, the working visual field range of the FIB tool or the PFIB tool is limited. If the distance between the first mark and the target position is too large, the first mark and the target position cannot fall into the working visual field range of the FIB tool or the PFIB tool at the same time. If the distance between the first mark and the target position is too small, there may be a risk of etching the target position when etching the covering layer on the first mark to expose the first mark in the subsequent process. <
[0060] Table 1
[0061] Etching parameters Etching gas Ion beam current Ion beam voltage Etching time 1 none 10pA~15nA 25KV~30KV 1 min ~ 5 min 2 have 10pA~15nA 25KV~30KV 1 min ~ 5 min
[0062] By rationally designing the ion beam current, voltage, and etching time, the etching efficiency can be guaranteed without over-etching the target location due to excessively fast etching rate.
[0063] The main difference between the two etching parameters mentioned above lies in whether or not an etching gas is used. Different etching gases can selectively etch different materials or reduce the etching rate, resulting in a more uniform etched surface. For example, XeF2 can accelerate the etching of Si and SiO2, while etching metallic materials is slower. Specifically, one or more of the following etching gases can be selected: XeF2, C2H2F3NO, I2, and MgSO4·7H2O.
[0064] Furthermore, the size of the cover layer removed by etching, ranging from 5×5μm to 15×15μm, can also be set as an etching parameter on the FIB or PFIB machine.
[0065] Then, step S14 is executed, and the target position can be accurately located based on the actual position of the exposed first mark and the positional relationship between the first mark and the target position on the chip layout.
[0066] As can be seen from the above description of each step, when the target location is covered and cannot be directly and accurately located, the method for preparing a TEM sample provided in this embodiment obtains the precise location of the target location by using the positions of other precisely locatable patterns on the chip (the first mark mentioned above) and the positional relationship between these patterns and the target location on the chip layout. Since the etching of the cover layer only targets the cover layer above the first mark, damage to the target location can be avoided. Furthermore, this embodiment also provides a method for preparing a TEM sample, which includes:
[0067] The target location is located using the target localization method provided in this embodiment; and,
[0068] Prepare a TEM sample based on the positioning results of the target location in step S14.
[0069] TEM samples can be prepared using conventional methods for preparing TEM samples. As an example, the method for preparing TEM samples may include the following steps:
[0070] Apply a protective layer to the target location to protect it.
[0071] The target location area is etched to prepare a thin film sample with a thickness of approximately 1–2 μm;
[0072] A thin film sample is attached to a copper mesh and then thinned to below 100 nm to obtain a TEM sample.
[0073]
Example 2
[0074] like Figure 4 As shown, this embodiment provides a target location positioning method, including the following steps:
[0075] S21, split the chip containing the target location;
[0076] S22, Select a third marker near the target location;
[0077] S23, etch away the overlay on the third mark to expose the third mark;
[0078] S24, locate the target position according to the shape arrangement rules of the exposed third mark.
[0079] Unlike Embodiment 1, the method provided in this embodiment is applicable to chips with graphic structures arranged according to certain shape rules, which can be used as the third mark. In this case, the target position can be located simply by following the formation and arrangement rules of the third mark.
[0080] For example, if the current layer of a sample is a metal layer and the via layers below it are arranged according to certain rules, if you want to observe the morphology and size of the vias at the target location in the lower layer, you can etch the area of the sample near the target location to expose the vias arranged according to the rules. Then, according to the via arrangement rules, you can locate the vias at the target location.
[0081] Furthermore, this embodiment also provides a method for preparing a TEM sample, the method comprising:
[0082] The target location is located using the target localization method provided in this embodiment; and,
[0083] Prepare a TEM sample based on the positioning results of the target location in step S24.
[0084] Similarly, by using the positioning method and the method for preparing TEM samples provided in this embodiment, it is possible to prepare TEM samples even when the target position is covered, and the sample will not be affected by high voltage, nor will it bear the risk of excessive grinding of the target position.
[0085] It should be noted that, in describing this embodiment, only the differences between this embodiment and Embodiment 1 are described. The specific operation methods of each step in this embodiment are the same as or similar to those in Embodiment 1. Therefore, the specific operation methods of each step can be found in Embodiment 1, and will not be repeated here.
[0086] In summary, the method for preparing TEM samples provided by the embodiments of the present invention locates the target position based on the actual position of the exposed markers near the target position and the chip layout, or based on the shape and arrangement rules of the exposed markers near the target position. This allows for the preparation of TEM samples even when the target position is covered, and the sample is not affected by high voltage, nor does it incur the risk of excessive grinding of the target position.
[0087] Furthermore, it should be understood that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the technical solutions of the present invention based on the disclosed technical content, or equivalent embodiments with equivalent changes, without departing from the scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the present invention shall still fall within the scope of protection of the present invention.
Claims
1. A method for locating a target, characterized in that, include: Extract the chip containing the target location; A first marker is selected based on the chip layout. The distance between the first marker and the target position is within a set distance range. A second marker is formed on the chip to locate the position of the first marker using the second marker. The overlay on the first mark is etched away to expose the first mark; as well as, Based on the actual location of the exposed first marker and the chip layout, the target location is located.
2. The target location positioning method as described in claim 1, characterized in that, The set distance range is greater than 20μm and less than 100μm, and the size of the cover layer removed by etching is 5×5μm to 15×15μm.
3. The target location positioning method as described in claim 1, characterized in that, The position of the first mark is located by at least two spaced-apart second marks.
4. The target location positioning method as described in claim 3, characterized in that, Each of the second marks has an extension length, and the intersection of the extensions of all the second marks is the position of the first mark.
5. The target location positioning method as described in claim 1, characterized in that, The first mark is obtained by laser marking.
6. The target location positioning method as described in claim 5, characterized in that, The second mark is formed on the side of the first mark that is furthest from the target location.
7. The target location positioning method as described in claim 1, characterized in that, The steps of determining the location region of the target position, selecting the first mark, and forming the second mark are performed under an optical microscope.
8. The target location positioning method as described in claim 1, characterized in that, The coating layer on the first mark is removed by a focused ion beam or a plasma focused ion beam.
9. A method for locating a target position, characterized in that, include: Extract the chip containing the target location; Select a third marker near the target location; The overlay on the third mark is etched away to expose the third mark; the target position is located according to the shape and arrangement rules of the exposed third mark.
10. A method for preparing a TEM sample, characterized in that, include: The target location is located using the method described in any one of claims 1 to 9; and a TEM sample is prepared based on the location result of the target location.