Printed circuit board
By forming multiple cavities in the glass layer and embedding various electronic components, the warping problem caused by the increase in the number of wiring layers and the increase in the main body size of the printed circuit board is solved, realizing high design freedom and signal reliability, which is suitable for server CPUs or AI accelerators.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SAMSUNG ELECTRO MECHANICS CO LTD
- Filing Date
- 2025-07-04
- Publication Date
- 2026-05-22
AI Technical Summary
As semiconductors become more high-performance and miniaturized, printed circuit boards are prone to warping. Existing technologies struggle to effectively address the warping issues caused by the increased number of wiring layers and larger overall dimensions.
Multiple cavities of various depths and shapes are formed in the glass layer, electronic components of various sizes are embedded, and the components are fixed and signals are transmitted by filling and connecting vias with insulating material.
It increases the design freedom of printed circuit boards, shortens signal paths, reduces power loss, and enhances the reliability of signal noise, making it suitable for server CPUs or AI accelerators.
Smart Images

Figure CN122073775A_ABST
Abstract
Description
[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0163323, filed on November 15, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field
[0002] This disclosure relates to a printed circuit board. Background Technology
[0003] To meet the trends of increasing performance and miniaturization in semiconductors, the requirements for miniaturization and high density of printed circuit boards (PCBs) have become more stringent. For example, manufacturing high-end products such as server boards requires increasing the number of wiring layers and the overall size of the PCB. However, with the increase in the number of wiring layers and the increase in size, PCBs may become prone to warping. To address this issue, the use of glass cores has been considered. Summary of the Invention
[0004] One aspect of this disclosure is that a plurality of cavities having various depths and / or shapes are formed in the glass layer to suitably arrange and embed various types of components having various sizes in the plurality of cavities.
[0005] For example, a printed circuit board according to an example embodiment may include: a glass layer having a first surface and a second surface opposite to each other; a first cavity extending through a region between the first surface and the second surface of the glass layer; a second cavity extending through a portion of the glass layer from the first surface; a first electronic component disposed in the first cavity; and a second electronic component disposed in the second cavity.
[0006] For example, a printed circuit board according to an example embodiment may include: a glass layer having a first surface and a second surface opposite to each other; a first cavity extending through a portion of the glass layer from the first surface; a second cavity extending through another portion of the glass layer from the first surface, connected to the first cavity, and having a different depth than the first cavity; a first component disposed in the first cavity; and a second component disposed in the second cavity and having a different thickness than the first component.
[0007] For example, a printed circuit board according to an example embodiment may include: a glass layer having a first surface and a second surface opposite to each other and disposed within a through portion of a frame; a first cavity penetrating the glass layer; an electronic component disposed in the first cavity; and a first insulating layer filling at least a portion of the first cavity and covering at least a portion of the electronic component, wherein the space between the frame and the glass layer is filled with the first insulating layer or a separate filler.
[0008] As one of the various effects of this disclosure, a printed circuit board can be provided in which various types and sizes of devices can be embedded in the glass layer, and the printed circuit board can provide a high degree of design freedom. Attached Figure Description
[0009] The above and other aspects, features, and advantages of this disclosure will be more clearly understood through the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 It is a block diagram that schematically illustrates an example of an electronic device system; Figure 2 This is a schematic cross-sectional view illustrating an example of a printed circuit board; and Figure 3 It is along the printed circuit board Figure 2 A schematic plan view of the line A-A' in the diagram. Detailed Implementation
[0010] The present disclosure will be described below with reference to the accompanying drawings. In the drawings, the shape and size of the elements may be enlarged or reduced for clarity.
[0011] Figure 1 This is a block diagram that schematically illustrates an example of an electronic device system.
[0012] Reference Figure 1 The electronic device 1000 houses a motherboard 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the motherboard 1010. These components are also connected to other electronic components, which will be described below, via various signal lines 1090.
[0013] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM) or flash memory); application processor chips, such as central processing units (e.g., central processing units (CPUs)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these and may also include other types of chip-related components. Furthermore, chip-related components 1020 may be combined with each other. Chip-related components 1020 may be in the form of a package including the aforementioned chips or electronic components.
[0014] Network-related components 1030 may include components that are compatible with or operate according to protocols or standards such as: Wi-Fi (such as the Institute of Electrical and Electronics Engineers (IEEE) 802.11 series), WiMAX (such as the IEEE 802.16 series), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, GSM+, EDGE+, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, and 5G protocols, as well as any other wireless or wired standards or protocols specified herein. However, network-related component 1030 is not limited to this, and may also include components that are compatible with or operate according to other wireless or wired standards or protocols. Furthermore, network-related component 1030 may be integrated into chip-related component 1020.
[0015] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCCs), etc. However, other components 1040 are not limited to these and may also include passive components in the form of surface-mount components for various other purposes. Furthermore, other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.
[0016] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the motherboard 1010 or not physically and / or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, and a battery 1080. However, these other electronic components are not limited to these and may also include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), optical disc (CD) drives, digital versatile optical disc (DVD) drives, etc. In addition, depending on the type of electronic device 1000, it may include other electronic components for various purposes.
[0017] Electronic device 1000 can be a smartphone, personal digital assistant, digital video camera, digital camera, network system, computer, monitor, tablet PC, laptop PC, netbook PC, television, video game console, smartwatch, automotive component, etc. However, electronic device 1000 is not limited to these and can be any other electronic device capable of processing data.
[0018] Figure 2 This is a schematic cross-sectional view of an example of a printed circuit board.
[0019] Figure 3 It is along the printed circuit board Figure 2 A schematic plan view of the line A-A' in the diagram.
[0020] Reference Figure 2 and Figure 3According to an example embodiment, a printed circuit board 100 may include: a glass layer 111 having a first surface S1 and a second surface S2 opposite to each other; a first cavity H penetrating the region between the first surface S1 and the second surface S2 of the glass layer 111; a second cavity C penetrating a portion of the glass layer 111 from the first surface S1; a first electronic component 141 disposed in the first cavity H; and a second electronic component 145 disposed in the second cavity C. The first cavity H may be a through cavity, and the second cavity C may be a blind cavity. The second cavity C may have multiple cavity regions. For example, the second cavity C may include a first cavity C1 and a second cavity C2 with different depths. The first cavity C1 and the second cavity C2 may be integrally connected to each other to form the second cavity C. The first electronic component 141 may be thicker than the second electronic component 145. The second electronic component 145 may include a first component 142 and a second component 143, which are respectively disposed in the first cavity C1 and the second cavity C2 and have different thicknesses. The first electronic component 141 and the second electronic component 145 may include different types of electronic components. Furthermore, the first component 142 and the second component 143 may also include different types of electronic components. Here, different types of electronic components can include not only cases where the electronic components themselves have different functions (e.g., capacitors and inductors, respectively), but also cases where even if the functions are substantially the same, specific performance characteristics differ (e.g., capacitors have different capacitances). In addition, the aforementioned electronic components can be active components and / or passive components. For example, electronic components can be silicon bridges, silicon capacitors, and / or integrated passive devices (IPDs), but this disclosure is not limited thereto. As an example, the first electronic component 141 may include an IPD, the first component 142 may include a silicon bridge, and the second component 143 may include a silicon capacitor.
[0021] Additionally, if desired, the printed circuit board 100 according to the example embodiment may further include an insulating material 112, which fills at least a portion of each of the first cavity H and the second cavity C, which includes the first cavity C1 and the second cavity C2, and covers at least a portion of each of the first electronic component 141 and the second electronic component 145, which includes the first component 142 and the second component 143. Additionally, if desired, the printed circuit board 100 may further include a first connection via 131, a second connection via 132, and a third connection via 133. The first connection via 131 penetrates a portion of the insulating material 112 and connects to the first electronic component 141; the second connection via 132 penetrates another portion of the insulating material 112 and connects to the first component 142; and the third connection via 133 penetrates yet another portion of the insulating material 112 and connects to the second component 143. The first electronic component 141 may be disposed in the first cavity H with its front side facing upwards and may have an electrode connected to the first connection via 131 on its front side. The first component 142 can be attached to the bottom surface of the first cavity C1 with the front side facing up via the first adhesive film 151, and can have an electrode connected to the second connection via 132 on the front side. The second component 143 can be attached to the bottom surface of the second cavity C2 with the front side facing up via the second adhesive film 152, and can have an electrode connected to the third connection via 133 on the front side.
[0022] In this way, in the printed circuit board 100 according to the example embodiment, multiple cavities H and C having various depths and / or shapes can be formed in the glass layer 111. Various types of electronic components 141, 142, and 143 of various sizes can be suitably disposed in and embedded within the multiple cavities H and C. In this case, by realizing cavities H and C that are not limited by size, the range of embedded electronic components 141, 142, and 143 that can be used can be expanded, and design freedom can be increased. Furthermore, the upper insulation distances of the different embedded electronic components 141, 142, and 143 can be designed to be substantially the same. In this case, the dimensions of the connection vias 131, 132, and 133 formed in the insulating material 112 can be substantially the same, and the signal transmission paths can be substantially uniform. Additionally, a design where the interconnections between electronic components 141, 142, and 143 are shortened is also feasible, in which case high reliability against signal noise, etc., is expected. Furthermore, the signal path between the electronic components 141, 142, and 143 embedded in the printed circuit board 100 and the semiconductor chip mounted on the printed circuit board 100 can be reduced, and power loss can be reduced, which can be advantageous for high-speed signal transmission. In this case, the printed circuit board 100 can be easily applied to server CPUs or AI accelerators. In addition, the first cavity H and the second cavity C, as well as the first cavity C1 and the second cavity C2 of the second cavity C, can be easily achieved in the glass layer 111 by adjusting the conditions of the laser process and / or the conditions of the etching process (such as etching concentration and time).
[0023] In this respect, as a non-limiting example, the second cavity C2 may be deeper than the first cavity C1, and the second component 143 disposed in the second cavity C2 may be thicker than the first component 142 disposed in the first cavity C1. Therefore, the second connection via 132 and the third connection via 133 may have substantially the same thickness t. If desired, the first connection via 131 may also have substantially the same thickness t as each of the second connection via 132 and the third connection via 133. Furthermore, in terms of size and arrangement, the first electronic component 141 may include an integrated passive device (IPD), the first component 142 may include a silicon bridge, and the second component 143 may include a silicon capacitor, but this disclosure is not limited thereto.
[0024] Furthermore, in the first cavity H, at least a portion of the wall surface may have an uneven portion U. This ensures adhesion to the insulating material 112. For example, the roughness of the uneven portion U may be greater than the roughness of the first surface S1 and / or the second surface S2 of the glass layer 111. Additionally, the second cavity C (more specifically, each of the first cavity C1 and the second cavity C2) may have a rounded shape at the corners of its bottom surface and may have a structure forming a ramp along a length and / or width less than or equal to 50 μm from each wall surface. Therefore, the insulating material 112 can fill the second cavity C (more specifically, each of the first cavity C1 and the second cavity C2) with almost no voids. Furthermore, the bottom surface of the second cavity C (more specifically, each of the first cavity C1 and the second cavity C2) may have a uniform average roughness (Ra) of about 1 μm to 2 μm. This strengthens adhesion to the first adhesive film 151 and the second adhesive film 152, and the first component 142 and the second component 143 can be secured by minimizing tilt. As a result, the performance of each of the first electronic component 141 and the second electronic component 145, which includes the first component 142 and the second component 143, can be maintained, thereby improving the reliability of the printed circuit board 100.
[0025] If desired, the printed circuit board 100 according to the example embodiment may further include a metal member 155, which extends from the second surface S2 of the glass layer 111 through both the glass layer 111 and the second adhesive film 152 and is connected to the back side of the second component 143 in the region where the glass layer 111 overlaps with the second cavity C2 in a planar plane. For example, when the second component 143 requires heat dissipation, a metal member 155 of this form may be formed to improve heat dissipation. However, this disclosure is not limited thereto, and if desired, additional metal members similar to the metal member 155 may be included, extending from the second surface S2 of the glass layer 111 through both the glass layer 111 and the first adhesive film 151 and being connected to the back side of the first component 142 in the region where the glass layer 111 overlaps with the first cavity C1 in a planar plane. Furthermore, if desired, the metal member 155 or other metal members may also be used for electrical connection purposes, etc., in addition to the heat dissipation purposes described above.
[0026] If needed, the printed circuit board 100 according to the example embodiment may further include: a first wiring layer 121 disposed on a first surface S1 of a glass layer 111, at least a portion of the first wiring layer 121 disposed on an insulating material 112, and the first wiring layer 121 being connected to a first connection via 131, a second connection via 132, and a third connection via 133, respectively; a first insulating layer 113 disposed on the first surface S1 of the glass layer 111, and covering at least a portion of each of the glass layer 111 and the insulating material 112, as well as at least a portion of the first wiring layer 121; a second wiring layer 122 disposed on the first insulating layer 113; and / or a first via layer 136 disposed within the first insulating layer 113, and connecting at least a portion of each of the first wiring layer 121 and the second wiring layer 122 to each other. For example, a stacked layer may be formed on the first surface S1 of the glass layer 111. In this case, one or more semiconductor chips may be mounted on the stacked layer and electrically connected to a first electronic component 141 and a second electronic component 145, respectively. For example, the printed circuit board 100 may include a glass layer 111 as a core layer and may be used as a packaging substrate or at least a single-sided stacked intermediate substrate.
[0027] Additionally, if necessary, the printed circuit board 100 according to the example embodiment may further include: a third wiring layer 123 disposed on the second surface S2 of the glass layer 111; a second insulating layer 114 disposed on the second surface S2 of the glass layer 111 and covering at least a portion of each of the glass layer 111 and the insulating material 112, as well as at least a portion of the third wiring layer 123; a fourth wiring layer 124 disposed on the second insulating layer 114; a second via layer 137 disposed within the second insulating layer 114 and connecting at least a portion of each of the third wiring layer 123 and the fourth wiring layer 124 to each other; and / or a through via 135 penetrating the region between the first surface S1 and the second surface S2 of the glass layer 111 and connecting at least a portion of each of the first wiring layer 121 and the third wiring layer 123 to each other. A metal member 155 may be attached to at least a portion of the third wiring layer 123. For example, a stacked layer may also be formed on the second surface S2 of the glass layer 111. For example, the printed circuit board 100 may include a glass layer 111 as a core layer, and may be a packaging substrate or a double-sided stacked intermediate substrate.
[0028] The printed circuit board 100 according to the example embodiment may also include a frame with a through-hole, in which case a glass layer 111 may be disposed within the through-hole of the frame. Additionally, the space between the frame and the glass layer 111 may be filled with one or more of a first insulating layer 113 and a second insulating layer 114, or may be filled with a separate filler. The frame may comprise a material with excellent rigidity, and may include, for example, a copper-clad laminate (CCL) or a bare CCL, but this disclosure is not limited thereto. For example, the frame may comprise other organic materials with excellent rigidity, and may comprise other types of inorganic materials with excellent rigidity. The frame may be used as a fixture during the manufacturing process, thus allowing the manufacturing process to be performed at the panel level via the frame. Furthermore, the frame may be retained in the final unit after division, which may facilitate warpage control.
[0029] In the following, the components of a printed circuit board 100 according to an exemplary embodiment will be described in more detail with reference to the accompanying drawings.
[0030] Glass layer 111 may comprise glass (an amorphous solid). The glass may include, for example, pure silica (approximately 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, this disclosure is not limited thereto, and alternative glass materials such as fluorine glass, phosphate glass, chalcogenide glass, etc., may also be used. Furthermore, other additives may be included to form a glass with specific physical properties. These additives may include magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, antimony, and carbonates (such as calcium carbonate (e.g., limestone) and sodium carbonate (e.g., soda ash)) and / or oxides of these elements and other elements. Furthermore, glass layer 111 may be distinguished from organic insulating materials (such as copper-clad laminates (CCL), prepreg (PPG)) that include glass fibers (such as glass fabrics, for example, glass cloth). Glass layer 111 may be in the form of, for example, a glass plate.
[0031] The insulating material 112 may include an organic insulating material. The organic insulating material may include thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimides), or materials comprising inorganic fillers and / or organic fillers, as well as thermosetting resins and / or thermoplastic resins. For example, the organic insulating material may include an ajinomoto film (ABF) and a photosensitive dielectric (PID), but this disclosure is not limited thereto. One surface and another surface of the insulating material 112 may be substantially coplanar with the first surface S1 and the second surface S2 of the glass layer 111, respectively, but this disclosure is not limited thereto. If desired, the insulating material 112 may be filled with a first insulating layer 113. In this case, the insulating material 112 may be integrated with the first insulating layer 113 without a boundary.
[0032] Each of the first insulating layer 113 and the second insulating layer 114 may include an organic insulating material. The organic insulating material may include thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), or materials comprising inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth), as well as thermosetting resins and / or thermoplastic resins. For example, the organic insulating material may include prepreg (PPG), Ajinomoto laminate (ABF), and photosensitive dielectric (PID), but this disclosure is not limited thereto. Each of the first insulating layer 113 and the second insulating layer 114 may be formed using multiple layers. In this case, each of the multiple layers may be integrated with each other without boundaries, or each of the multiple layers may be integrated with each other such that the boundaries between the multiple layers are difficult to identify without using a scanning electron microscope. Furthermore, each of the multiple layers may include substantially the same insulating material, but may also include different insulating materials.
[0033] Each of the first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating of the seed layer as a plating layer. However, if desired, a titanium layer and a copper layer formed by sputtering may be included as seed layers. The first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124 may each perform various functions according to the design. For example, each of the first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124 may include signal patterns, power patterns, and ground patterns. Each of the patterns can have various shapes such as lines (e.g., traces), planes, and pads. Pads can be concepts including pads. Each of the second routing layer 122 and the fourth routing layer 124 can be formed using multiple layers. The second routing layer 122 and the fourth routing layer 124 can have the same number of layers, but this disclosure is not limited thereto, and the second routing layer 122 and the fourth routing layer 124 can have different numbers of layers. For example, the second routing layer 122 can have more layers than the fourth routing layer 124.
[0034] Each of the first connection via 131, the second connection via 132, and the third connection via 133 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the first connection via 131, the second connection via 132, and the third connection via 133 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating of the seed layer as a plating layer. However, if desired, a titanium and copper layer formed by sputtering may be included as a seed layer. The first connection via 131, the second connection via 132, and the third connection via 133 may each perform various functions according to the design. For example, each of the first connection via 131, the second connection via 132, and the third connection via 133 may include a connection via for signal transmission, a connection via for power transmission, and a connection via for grounding. Each of the first connecting via 131, the second connecting via 132, and the third connecting via 133 may include a filled via formed by filling the via hole with metal, but may also include a conformal via where metal is disposed along the wall surface of the via hole. Each of the first connecting via 131, the second connecting via 132, and the third connecting via 133 may have a tapered shape in the same direction. Each of the first connecting via 131, the second connecting via 132, and the third connecting via 133 may be provided in multiples.
[0035] The through-via 135 may include metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the through-via 135 may include a titanium and copper layer formed by sputtering as a seed layer, and may include an electrolytically plated copper layer formed by electrolytically plating the seed layer as a plating layer. However, if desired, the through-via 135 may include a chemically plated copper layer formed by electroless plating as a seed layer. The through-via 135 may perform various functions depending on the design. For example, the through-via 135 may include a through-via for signal transmission, a through-via for power transmission, and a through-via for grounding. The through-via 135 may include a filled via formed by filling the via with metal, but may also include a conformal via where metal is disposed along the wall surface of the via and filler is used to fill the space between the metals. The through-via 135 may have an hourglass shape, but may also have a cylindrical shape. Multiple through-vias 135 can be configured. Through-vias 135 can have a landless structure or a padless structure as needed, and in this case, through-vias 135 can be directly connected to each of the first via layer 136 and the second via layer 137 without pads or pads.
[0036] Each of the first via layer 136 and the second via layer 137 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the first via layer 136 and the second via layer 137 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating of the seed layer as a plating layer. However, if desired, the first via layer 136 and the second via layer 137 may include titanium and copper layers formed by sputtering as seed layers. Each of the first via layer 136 and the second via layer 137 may perform various functions according to the design. For example, each of the first via layer 136 and the second via layer 137 may include a connection via for signal transmission, a connection via for power transmission, and a connection via for grounding. Each of the first via layer 136 and the second via layer 137 may include a filled via formed by filling a via hole with metal, but may also include a conformal via where metal is disposed along the wall surface of the via hole. Connecting vias included in the first via layer 136 and connecting vias included in the second via layer 137 may have a tapering shape in opposite directions. Each of the first via layer 136 and the second via layer 137 may include a plurality of connecting vias. Each of the first via layer 136 and the second via layer 137 may be formed using multiple layers. The first via layer 136 and the second via layer 137 may have the same number of layers, but this disclosure is not limited thereto, and the first via layer 136 and the second via layer 137 may have different numbers of layers. For example, the number of layers in the first via layer 136 may be greater than the number of layers in the second via layer 137.
[0037] Each of the first electronic component 141 and the second electronic component 145 may include at least one of active and passive components. Each of the active and passive components may be in the form of an integrated circuit die or a chip-type component, but this disclosure is not limited thereto. Each of the active and passive components may be a silicon bridge, a silicon capacitor, and / or an integrated passive device (IPD), but this disclosure is not limited thereto. The number of active and / or passive components included in the first electronic component 141 and the second electronic component 145 is not specifically limited. The active and / or passive components of the first component 142 and the second component 143 included in the second electronic component 145 may be attached to the bottom surfaces of the first cavity C1 and / or the second cavity C2, respectively, via a first adhesive film 151 and / or a second adhesive film 152. Each of the first adhesive film 151 and the second adhesive film 152 may include a die attachment film (DAF). The DAF may be, for example, an epoxy-based film, a silicon-based film, an acrylic-based film, etc., but this disclosure is not limited thereto.
[0038] Metal component 155 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, metal component 155 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating of the seed layer as a plating layer. However, if desired, metal component 155 may include a titanium and copper layer formed by sputtering as a seed layer. Metal component 155 may be a dummy component formed for heat dissipation purposes, but is not limited thereto, and if desired, metal component 155 may be used as a component for signal transmission, power transmission, and / or grounding. Metal component 155 may be formed by filling a through-hole in the glass layer 111 and the second adhesive film 152 with metal, but this disclosure is not limited thereto. Metal component 155 may have a cylindrical shape, but is not limited thereto. Multiple metal components 155 may be provided.
[0039] In this disclosure, the term "cover" can include covering a portion or covering the entire area, and can also include direct or indirect coverage. Furthermore, the term "fill" can include not only complete filling but also partial filling, and can also include substantially filling (e.g., the presence of some pores or gaps). Additionally, the term "surround" can include not only complete surrounding but also partial and substantially surrounding. Furthermore, the term "expose" can include not only complete exposure but also partial exposure, and "expose" can mean that one element is exposed from another element (which is embedded within the other element).
[0040] In this disclosure, in cross-section, the term "object disposed within a cavity, cavity, through-hole, or through-hole" can include not only the case where the object is completely disposed within the cavity, cavity, through-hole, or through-hole, but also the case where the object protrudes upwards or downwards beyond the cavity, cavity, through-hole, or through-hole. For example, in a plane, the meaning of "object disposed within a cavity, cavity, through-hole, or through-hole" can be defined in a broader sense.
[0041] In this disclosure, "substantially" can encompass process errors and positional deviations that may occur during the manufacturing process, as well as errors during measurement. For example, substantially the same orientation can include not only exactly the same orientation, but also substantially the same orientation. Furthermore, substantially coplanar can include not only completely coplanar orientations, but also substantially coplanar orientations. Furthermore, substantially having a particular shape can include not only completely having such a shape, but also substantially having such a shape. Furthermore, substantially the same insulating material can mean not only completely identical insulating materials, but also materials comprising the same type of insulating material. Therefore, the composition of the insulating materials can be substantially the same, but their specific compositional proportions can be slightly different.
[0042] In this disclosure, "section" can refer to the cross-sectional shape when an object is cut vertically, or the cross-sectional shape when the object is viewed from a side view. Furthermore, "plane" can refer to the planar shape when an object is cut horizontally, or the planar shape when the object is viewed from a top or bottom view.
[0043] In this disclosure, for convenience, the term "lower" in "lower side," "lower part," and "lower surface" refers to the downward direction relative to the cross-section in the drawings, and the term "upper side," "upper part," and "upper surface" refers to the opposite direction. However, this definition of direction is for ease of explanation, and the scope of the claims is not specifically limited by the description of the direction, and the concepts of upper / lower can be changed at any time.
[0044] In this disclosure, "connection" is a concept that includes not only direct connections but also indirect connections such as those via adhesive layers. Additionally, the term "electrical connection" includes both physical and non-physical connections. Furthermore, expressions such as "first" and "second" are used to distinguish one element from another and do not limit the order and / or importance of the elements. In some cases, without departing from the scope of the claims, a first element may be referred to as a second element, or similarly, a second element may be referred to as a first element.
[0045] In this disclosure, parameters such as thickness, width, length, depth, linewidth, spacing, pitch, interval distance, and surface roughness can be measured using a scanning microscope, optical microscope, or similar means based on a polished or cut cross-section of a printed circuit board. The cut cross-section can be a vertical or horizontal cross-section, and the value of each of the above parameters can be measured based on the desired cross-section. For example, the width of the upper and / or lower portion of a via can be measured on a cross-section that has been cut along a central axis. In this case, when the measured values of the above parameters are not constant, the values of the above parameters can be determined as the average of the values measured at any five points.
[0046] The term "example embodiment" as used in this disclosure does not refer to the same embodiment, but is provided to illustrate unique features of different example embodiments. However, the example embodiments presented above do not preclude implementation in combination with features of other example embodiments. For example, unless there is a contrary or contradictory description in other example embodiments, matters described in a particular example embodiment may be understood as descriptions relating to other example embodiments even if they are not described in other example embodiments.
[0047] The terminology used in this disclosure is for the purpose of describing exemplary embodiments only and is not intended to limit the disclosure. In this context, singular terms include their plural forms unless the context clearly indicates otherwise.
[0048] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.
Claims
1. A printed circuit board, comprising: A glass layer having a first surface and a second surface that are opposite to each other; The first cavity extends through the region between the first surface and the second surface of the glass layer; The second cavity extends from the first surface of the glass layer through a portion of the glass layer; A first electronic component is disposed in the first cavity; as well as The second electronic component is disposed in the second cavity.
2. The printed circuit board as described in claim 1, in, Each of the first electronic component and the second electronic component includes at least one of an active component and a passive component.
3. The printed circuit board as described in claim 1, in, At least a portion of the wall surface of the first cavity has an uneven portion, and The second cavity has a rounded shape at the corner of its bottom surface.
4. The printed circuit board as described in claim 1, in, The second cavity includes a first cavity and a second cavity, the second cavity having a greater depth than the first cavity, and The second electronic component includes a first component and a second component, the first component being disposed in the first cavity, and the second component being disposed in the second cavity and having a thickness greater than that of the first component.
5. The printed circuit board as described in claim 4, in, The first cavity and the second cavity are integrally connected to each other.
6. The printed circuit board as described in claim 4, in, The thickness of the first electronic component is greater than the thickness of each of the first component and the second component.
7. The printed circuit board as described in claim 4, in, The first electronic component includes integrated passive devices. The first component includes a silicon bridge, and The second component includes a silicon capacitor.
8. The printed circuit board as described in claim 4, in, The first component is attached to the bottom surface of the first cavity via a first adhesive film, and the second component is attached to the bottom surface of the second cavity via a second adhesive film.
9. The printed circuit board of claim 8, further comprising: A metal component, in the area of the glass layer that overlaps with the second cavity in the plan view, the metal component extends from the second surface of the glass layer through both the glass layer and the second adhesive film and is attached to the back side of the second component.
10. The printed circuit board of claim 8, further comprising: An insulating material fills at least a portion of each of the first cavity and the second cavity including the first cavity and the second cavity, and covers at least a portion of each of the first electronic component and the second electronic component including the first component and the second component; A first connection via penetrates a first portion of the insulating material and connects to the first electronic component; as well as The second and third connecting vias penetrate the second and third portions of the insulating material, respectively, and are connected to the first and second components, respectively. The second and third connecting vias have the same thickness.
11. The printed circuit board of claim 10, further comprising: A first wiring layer is disposed on the first surface of the glass layer, wherein at least a portion of the first wiring layer is disposed on the insulating material, and the first wiring layer is respectively connected to each of the first connection via, the second connection via, and the third connection via; A first insulating layer is disposed on the first surface of the glass layer and covers at least a portion of each of the glass layer and the insulating material, as well as at least a portion of the first wiring layer; A second wiring layer is disposed on the first insulating layer; and A first via layer is disposed within the first insulating layer and is configured to connect at least a portion of each of the first wiring layer and the second wiring layer to each other.
12. The printed circuit board of claim 11, further comprising: A third wiring layer is disposed on the second surface of the glass layer; A second insulating layer is disposed on the second surface of the glass layer and covers at least a portion of each of the glass layer and the insulating material, as well as at least a portion of the third wiring layer; The fourth wiring layer is disposed on the second insulating layer; A second via layer is disposed within the second insulating layer and is configured to connect at least a portion of each of the third wiring layer and the fourth wiring layer to each other; as well as Through-holes penetrate the region between the first and second surfaces of the glass layer and are configured to connect at least a portion of each of the first and third wiring layers to each other.
13. A printed circuit board, comprising: A glass layer having a first surface and a second surface that are opposite to each other; A first cavity extends from the first surface of the glass layer through a portion of the glass layer; A second cavity extends from the first surface of the glass layer through another portion of the glass layer, connects to the first cavity, and has a different depth than the first cavity; The first component is disposed in the first cavity; as well as The second component is disposed in the second cavity and has a different thickness than the first component.
14. The printed circuit board as described in claim 13, in, Each of the first cavity and the second cavity has a bottom surface, and The first component is attached to the bottom surface of the first cavity via a first adhesive film, and the second component is attached to the bottom surface of the second cavity via a second adhesive film.
15. The printed circuit board as described in claim 14, in, Each of the first component and the second component is a silicon bridge, a silicon capacitor, or an integrated passive device.
16. The printed circuit board of claim 15, further comprising: An insulating material fills at least a portion of each of the first cavity and the second cavity and covers at least a portion of each of the first component and the second component; A wiring layer is disposed on the first surface of the glass layer, and at least a portion of the wiring layer is disposed on the insulating material; as well as A first connection via and a second connection via penetrate a portion of the insulating material and respectively connect the wiring layer to the first component and the second component. The first and second connection vias have the same thickness.
17. A printed circuit board, comprising: A glass layer having a first surface and a second surface opposite to each other and disposed within a through-hole of the frame; The first cavity penetrates the glass layer; Electronic components are disposed in the first cavity; as well as A first insulating layer fills at least a portion of the first cavity and covers at least a portion of the electronic component. The space between the frame and the glass layer is filled with the first insulating layer or a separate filler.
18. The printed circuit board as claimed in claim 17, in, The frame includes a copper-clad laminate or a bare copper-clad laminate.