Substrate structure
By setting an adhesion promotion layer and a dielectric layer on the dielectric substrate, direct contact between the pads and the dielectric substrate is avoided, the undercut problem at the contact point between the metal pad edge and the glass is solved, and the reliability of the substrate structure is improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- UNIMICRON TECH CORP
- Filing Date
- 2025-05-15
- Publication Date
- 2026-05-22
AI Technical Summary
In existing technologies, undercutting can easily occur at the contact point between the metal pad outside the glass conductive via and the glass, leading to a decrease in structural reliability.
An adhesion promoting layer is provided on the dielectric substrate, and the conductive via is covered by the dielectric layer. The pads are disposed in the openings of the dielectric layer to avoid direct contact between the pads and the dielectric substrate. The dielectric substrate is protected by the dielectric layer and the adhesion promoting layer.
This effectively avoids undercut between the pad and the dielectric substrate, improving the structural reliability of the substrate.
Smart Images

Figure CN122074010A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a substrate structure, and more particularly to a substrate structure with better structural reliability. Background Technology
[0002] Currently, the metal pads outside the conductive vias in the glass are manufactured using a semi-additive process (SAP), in which the metal pads directly connect to the conductive vias and directly contact the glass substrate. However, an undercut occurs at the contact angle between the edge of the metal pad and the glass, creating a stress concentration area that can easily cause the glass to crack, thus affecting the structural reliability of the product. Summary of the Invention
[0003] The present invention provides a substrate structure with better structural reliability.
[0004] The substrate structure of the present invention includes a dielectric substrate, an adhesion promoting layer, a conductive material, at least one dielectric layer, and at least one pad. The dielectric substrate has an upper surface and a lower surface opposite to each other, and at least one through-hole penetrating the dielectric substrate and connecting the upper and lower surfaces. The adhesion promoting layer is disposed on the upper surface, the lower surface, and the inner wall of the at least one through-hole of the dielectric substrate. The conductive material fills the at least one through-hole, defining at least one conductive via. The at least one dielectric layer is disposed on the adhesion promoting layer and has at least one opening exposing the at least one conductive via. The diameter of the at least one opening is larger than the diameter of the at least one conductive via. The at least one pad is disposed within the at least one opening of the at least one dielectric layer and extends onto the at least one dielectric layer, wherein the at least one pad is electrically connected to the at least one conductive via.
[0005] In one embodiment of the invention, the at least one pad described above includes a seed layer and a metal layer. The seed layer covers the inner wall of at least one opening and extends onto at least one dielectric layer, while the metal layer is disposed on the seed layer.
[0006] In one embodiment of the present invention, the top surface of the at least one conductive via is flush with the surface of the adhesion promoting layer that is relatively far from the dielectric substrate.
[0007] In one embodiment of the present invention, the dielectric substrate is made of inorganic materials or non-conductive composite materials.
[0008] In one embodiment of the present invention, the material of the adhesion promoting layer includes oxides or nitrides.
[0009] In one embodiment of the present invention, the thickness of the adhesion promoting layer is between 0.01 nanometers and 100 nanometers.
[0010] In one embodiment of the present invention, the adhesion force between the at least one pad and the at least one dielectric layer is greater than the adhesion force between the at least one pad and the adhesion promoting layer.
[0011] In one embodiment of the present invention, the Young's coefficient of the at least one dielectric layer is smaller than the Young's coefficient of the dielectric substrate.
[0012] In one embodiment of the present invention, the material of the at least one dielectric layer mentioned above includes organic or inorganic materials.
[0013] In one embodiment of the present invention, there is no undercut between the at least one pad and the dielectric substrate.
[0014] Based on the above, in the design of the substrate structure of the present invention, the adhesion promoting layer is disposed on the upper surface, the lower surface, and the inner wall of the via of the dielectric substrate, while the dielectric layer is disposed on the adhesion promoting layer, and the pad is disposed within the opening of the dielectric layer and extends onto the dielectric layer. That is, the pad and the dielectric substrate are separated by the dielectric layer and / or the adhesion promoting layer, so there is no undercut between the pad and the dielectric substrate, which enables the substrate structure of the present invention to have better structural reliability.
[0015] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description
[0016] Figures 1A to 1I This is a cross-sectional schematic diagram of a method for manufacturing a substrate structure according to an embodiment of the present invention.
[0017] Explanation of icon numbers
[0018] 100: Substrate structure;
[0019] 110: Dielectric substrate;
[0020] 111: Upper surface;
[0021] 112: Through hole;
[0022] 113: Lower surface;
[0023] 115: Surrounding surface;
[0024] 120: Adhesion promoting layer;
[0025] 121, 123: Surface;
[0026] 130: Conductive via;
[0027] 131: Top surface;
[0028] 133: Bottom;
[0029] 140: Dielectric layer;
[0030] 142: Opening;
[0031] 150: Connecting pad;
[0032] 155: Line;
[0033] CM: Conductive material;
[0034] D: Diameter;
[0035] D1: Caliber;
[0036] D2: Aperture;
[0037] M: Metal layer;
[0038] P: Patterned photoresist layer;
[0039] P1: First opening;
[0040] P2: Second opening;
[0041] S: Seed layer;
[0042] T1, T2: Thickness. Detailed Implementation
[0043] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same component reference numerals are used in the drawings and description to denote the same or similar parts.
[0044] The embodiments of the present invention can be understood in conjunction with the accompanying drawings, which are also considered part of the disclosure. It should be understood that the drawings of the present invention are not drawn to scale; in fact, the dimensions of the components may be arbitrarily enlarged or reduced to clearly illustrate the features of the present invention.
[0045] Figures 1A to 1I This is a cross-sectional schematic diagram of a method for manufacturing a substrate structure according to an embodiment of the present invention.
[0046] According to the substrate structure fabrication method of this embodiment, firstly, please refer to... Figure 1AA dielectric substrate 110 is provided, wherein the dielectric substrate 110 has an upper surface 111 and a lower surface 113 opposite to each other, and at least one through-hole (two through-holes 112 are schematically shown) penetrating the dielectric substrate 110 and connecting the upper surface 111 and the lower surface 113. In one embodiment, the dielectric substrate 110 is made of an inorganic material or a non-conductive composite material. In one embodiment, the aforementioned inorganic material is, for example, glass, ceramic, or glass-ceramic. In this embodiment, the surface roughness of the dielectric substrate 110, such as the arithmetic mean roughness (Ra), is less than 10 nanometers. The thickness T1 of the dielectric substrate 110 is, for example, between 10 micrometers and 400 micrometers. In one embodiment, the through-hole 112 may be a through-glass via (TGV), wherein the diameter D of the through-hole 112 is, for example, between 20 micrometers and 150 micrometers.
[0047] Next, please refer to Figure 1B An adhesion promoting layer 120 is formed on the upper surface 111, lower surface 113, and inner wall of the via 112 of the dielectric substrate 110 using a dry deposition method, but not limited to this method. Here, the adhesion promoting layer 120 completely covers the upper surface 111, lower surface 113, the surrounding surface 115 connecting the upper and lower surfaces 113, and the inner wall of the via 112 of the dielectric substrate 110. In one embodiment, the material of the adhesion promoting layer 120 is, for example, an oxide or a nitride, wherein the oxide is, for example, titanium oxide (TiOX) (such as titanium monoxide (TiO) or titanium dioxide (TiO2)), silicon oxide (SiOX) (such as silicon dioxide (SiO2)) or aluminum oxide (Al2O3), and the nitride is, for example, silicon nitride (SiNX) (such as silicon nitride (Si3N4)). In this embodiment, the thickness T2 of the adhesion promoting layer 120 is, for example, between 0.01 nanometers and 100 nanometers, wherein the adhesion promoting layer 120 can increase the adhesion between the dielectric substrate 110 and the subsequently formed metal layer.
[0048] Next, please refer to Figure 1C A conductive material CM is formed on the adhesion promoting layer 120 and fills the through-holes 112 using an electroplating method. The conductive material CM covers the adhesion promoting layer 120 located on the upper surface 111 and lower surface 113 of the dielectric substrate 110. In one embodiment, the conductive material CM is, for example, copper or conductive paste.
[0049] Next, please refer to the following: Figure 1C and Figure 1DA chemical-mechanical-polishing process is used to remove the conductive material CM located on the upper surface 111 and lower surface 113 of the dielectric substrate 110, thereby defining at least one conductive via (schematically showing two conductive vias 130) within the via 112. In one embodiment, the top surface 131 and bottom surface 133 of the conductive vias 130 are respectively flush with the surfaces 121 and 123 of the adhesion promoting layer 120 that are relatively far from the dielectric substrate 110.
[0050] Next, please refer to Figure 1E At least one dielectric layer (schematically showing two dielectric layers 140) is disposed on the adhesion promoting layer 120 and has at least one opening (schematically showing multiple openings 142) exposing a conductive via 130. The dielectric layers 140 are respectively disposed on the upper surface 111 and lower surface 113 of the dielectric substrate 110, wherein the dielectric layers 140 directly contact the adhesion promoting layer 120, and the aperture D1 of the opening 142 is larger than the aperture D2 of the corresponding conductive via 130. That is, the opening 142 of the dielectric layer 140 exposes the top surface 131 and bottom surface 133 of the conductive via 130 and a portion of the adhesion promoting layer 120. In one embodiment, the Young's coefficient of the dielectric layer 140 is smaller than the Young's coefficient of the dielectric substrate 110. In one embodiment, the material of the dielectric layer 140 is, for example, an organic material or an inorganic material. In one embodiment, the dielectric layer 140 is made of, for example, an Ajinomoto Build-up Film (ABF), silicon oxide, silicon nitride, or a photoresist material.
[0051] Next, please refer to Figure 1F A seed layer S is formed on the dielectric layer 140, wherein the seed layer S covers the dielectric layer 140 and the inner wall of the opening 142, and directly contacts the top surface 131 and bottom surface 133 of the conductive via 130.
[0052] Next, please refer to Figure 1G A patterned photoresist layer P is formed on the seed layer S, wherein the patterned photoresist layer P has a plurality of first openings P1 and a plurality of second openings P2, and the first openings P1 and P2 expose portions of the seed layer S, and the first opening P1 corresponds to a conductive via 130. In one embodiment, the first opening P1 is larger than the second opening P2. In one embodiment, the orthographic projection of the first opening P1 on the dielectric substrate 110 is larger than the conductive via 130, and the conductive via 130 is located within the orthographic projection of the first opening P1.
[0053] Next, please refer to Figure 1H A metal layer M is formed on the seed layer S exposed by the patterned photoresist layer P using an electroplating method, wherein the metal layer M is located on and fills the first opening P1 and the second opening P2.
[0054] Afterwards, please refer to the following: Figure 1H as well as Figure 1I The patterned photoresist layer P and its underlying seed layer S are removed, and pads 150 and lines 155 are formed on the dielectric layer 140. Here, pad 150 corresponds to the conductive via 130 and includes a seed layer S and a metal layer M. The seed layer S covers the inner wall of the opening 142 of the dielectric layer 140 and extends onto the dielectric layer 140, while the metal layer M is disposed on the seed layer S. Line 155 includes the seed layer S and the metal layer M. In other words, both pads 150 and lines 155 in this embodiment are two-layer structures, fabricated using a dual damascene method. Afterwards, a monomer cutting process is performed to align the edges of the dielectric layer 140, the edges of the adhesion promoting layer 120, and the surrounding surface 115 of the dielectric substrate 110. At this point, the fabrication of the substrate structure 100 is complete.
[0055] Structurally, please refer to [the relevant documentation / reference]. Figure 1I In this embodiment, the substrate structure 100 includes a dielectric substrate 110, an adhesion promoting layer 120, a conductive material CM, a dielectric layer 140, and a pad 150. The dielectric substrate 110 has an upper surface 111 and a lower surface 113 opposite to each other, and a through-hole 112 penetrating the dielectric substrate 110 and connecting the upper surface 111 and the lower surface 113. The adhesion promoting layer 120 is disposed on the upper surface 111, the lower surface 113, and the inner wall of the through-hole 112 of the dielectric substrate 110, meaning that the adhesion promoting layer 120 does not cover the surrounding surface 115 of the dielectric substrate 110. The conductive material CM fills the through-hole 112 to define a conductive through-hole 130. The top surface 131 and the bottom surface 133 of the conductive through-hole 130 are respectively aligned with the surfaces 121 and 123 of the adhesion promoting layer 120 that are relatively far away from the dielectric substrate 110. A dielectric layer 140 is disposed on an adhesion-enhancing layer 120 and has an opening 142 exposing a conductive via 130. The aperture D1 of the opening 142 is larger than the aperture D2 of the conductive via 130. The Young's coefficient of the dielectric layer 140 is smaller than that of the dielectric substrate 110. A pad 150 is disposed within the opening 142 of the dielectric layer 140 and extends onto the dielectric layer 140, wherein the pad 150 is electrically connected to the conductive via 130. The adhesive force between the pad 150 and the dielectric layer 140 is greater than the adhesive force between the pad 150 and the adhesion-enhancing layer 120; therefore, there is no undercut between the pad 150 and the dielectric substrate 110. In one embodiment, undercutting can only occur at the edge of the pad 150 and the contact angle of the dielectric layer 140, while the dielectric layer 140 and / or the adhesion promoting layer 120 located above the dielectric substrate 110 can effectively protect the dielectric substrate 110 and improve reliability.
[0056] In short, since the dielectric layer 140 and / or adhesion promoting layer 120 are spaced between the pad 150 and the dielectric substrate 110 in this embodiment, no undercut occurs between the pad 150 and the dielectric substrate 110, i.e., there is no undercut. Therefore, the substrate structure 100 in this embodiment can have better structural reliability.
[0057] In summary, in the substrate structure design of the present invention, the adhesion promoting layer is disposed on the upper surface, lower surface, and inner wall of the via of the dielectric substrate, while the dielectric layer is disposed on the adhesion promoting layer, and the pad is disposed within the opening of the dielectric layer and extends onto the dielectric layer. That is, the pad and the dielectric substrate are separated by the dielectric layer and / or the adhesion promoting layer, thus preventing undercut between the pad and the dielectric substrate, and enabling the substrate structure of the present invention to have better structural reliability.
[0058] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
[0059] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A substrate structure, characterized in that, include: A dielectric substrate having an upper surface and a lower surface opposite to each other, and at least one through-hole penetrating the dielectric substrate and connecting the upper surface and the lower surface; An adhesion promoting layer is disposed on the upper surface, the lower surface, and the inner wall of the at least one through hole of the dielectric substrate; A conductive material is used to fill the at least one through-hole to define at least one conductive through-hole; At least one dielectric layer is disposed on the adhesion-enhancing layer and has at least one opening exposing the at least one conductive via, wherein the diameter of the at least one opening is larger than the diameter of the at least one conductive via; and At least one pad is disposed within the at least one opening of the at least one dielectric layer and extends onto the at least one dielectric layer, wherein the at least one pad is electrically connected to the at least one conductive via.
2. The substrate structure according to claim 1, characterized in that, The at least one pad includes a seed layer and a metal layer, the seed layer covering the inner wall of the at least one opening and extending onto the at least one dielectric layer, and the metal layer disposed on the seed layer.
3. The substrate structure according to claim 1, characterized in that, The top surface of the at least one conductive via is flush with the surface of the adhesion promoting layer that is relatively far from the dielectric substrate.
4. The substrate structure according to claim 1, characterized in that, The dielectric substrate is made of inorganic materials or non-conductive composite materials.
5. The substrate structure according to claim 1, characterized in that, The material of the adhesion-promoting layer includes oxides or nitrides.
6. The substrate structure according to claim 1, characterized in that, The thickness of the adhesion-promoting layer is between 0.01 nanometers and 100 nanometers.
7. The substrate structure according to claim 1, characterized in that, The adhesion between the at least one pad and the at least one dielectric layer is greater than the adhesion between the at least one pad and the adhesion promoting layer.
8. The substrate structure according to claim 1, characterized in that, The Young's coefficient of the at least one dielectric layer is smaller than the Young's coefficient of the dielectric substrate.
9. The substrate structure according to claim 1, characterized in that, The material of the at least one dielectric layer may be an organic material or an inorganic material.
10. The substrate structure according to claim 1, characterized in that, There is no undercut between the at least one pad and the dielectric substrate.