A single-board testing method and system based on logical configuration
By adopting a single-board testing method based on logical configuration, parallel testing of multiple single boards is realized, which solves the problems of poor adaptability and low efficiency in traditional single-board testing methods, improves testing efficiency and accuracy, and reduces costs and barriers to entry.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 浙江众合科技股份有限公司
- Filing Date
- 2025-12-31
- Publication Date
- 2026-05-26
AI Technical Summary
Existing single-board testing methods suffer from poor test adaptability, low efficiency, and difficulty in adapting to diverse testing scenarios. In particular, in large-scale mass production testing, the traditional serial testing mode severely restricts testing speed and cost.
A logic-configurable single-board testing method is adopted. Test boards and test cases are selected through the test interface, and parallel testing is carried out using network communication interfaces. Test case logic files in XML format are used, and various logic rules such as ForLoop, If, and Break are built in. Custom configuration of complex test scenarios is supported, and the online status of the single board is monitored through a heartbeat detection mechanism.
It enables parallel testing of multiple boards, improves testing efficiency, reduces test script development and maintenance costs, shortens the testing cycle, improves the accuracy and reliability of test results, and lowers the testing threshold.
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Figure CN122086757A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of single-board testing technology, specifically to a single-board testing method and system based on logic configuration. Background Technology
[0002] With the rapid development of fields such as communications and industrial control, single-board computers (PCBs), as core components of electronic devices, directly determine the operational performance of the entire device through the stability and reliability of their software functions. To ensure PCB quality, testing has become an indispensable and crucial step in the PCB development process. Systematic testing can promptly identify software design flaws, logical vulnerabilities, and compatibility issues, reducing the risk of failures during mass production and maintenance.
[0003] Existing single-board testing methods mostly adopt traditional scripted testing or fixed-process testing modes, which have the following problems: First, poor test adaptability. Traditional testing solutions often develop test scripts customized for specific single-board models. When the single-board model is updated, the function is iterated, or the testing requirements change, the test scripts need to be rewritten or significantly modified, resulting in high testing costs and long cycles, making it difficult to adapt to diverse single-board testing scenarios. Second, low testing efficiency. Most testing methods adopt a serial testing architecture, which can only test a single single board at a time, and cannot meet the parallel testing requirements of batch single boards. Especially in large-scale mass production testing scenarios, the serial testing mode severely restricts the testing speed and results in low testing efficiency. Summary of the Invention
[0004] The purpose of this invention is to provide a single-board testing method and system based on logic configuration, which enables flexible selection of test boards and test cases, parallel testing of multiple test boards, and standardized configuration and precise execution of test logic, thereby improving the efficiency, flexibility and maintainability of single-board testing.
[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: This invention provides a single-board testing method based on logical configuration, comprising: selecting several test boards based on a first human-computer interaction instruction on the test interface, and selecting several test cases based on a second human-computer interaction instruction on the test interface; a testing tool performing parallel testing on the several test boards through several network communication interfaces, and loading the corresponding several test cases; calling the test case logic file corresponding to each test case, and sequentially parsing and executing the logical rules in the test case logic file to obtain the execution result, and generating a test report.
[0006] Optionally, the logical rules include one or more of the following: ForLoop logic, If logic, Then logic, Else logic, Break logic, Continue logic, Sleep logic, Print logic, Exec logic, and Return logic. Before selecting several test boards based on the first human-computer interaction instruction on the test interface, the system further includes: configuring test board information and test case information; the test board information includes the board number, the project to which the board belongs, the board type, and the board communication information; the test case information includes the logical rules.
[0007] Optionally, the test case logic file is in XML format; the logic rules in the test case logic file are parsed and executed sequentially, including: determining whether there is a ForLoop logic in the current logic rule; if so, parsing the variables var, from, to, and step in the ForLoop logic and executing the for loop logic; if not, continuing to parse the next logic rule.
[0008] Optionally, the logical rules in the test case logic file are parsed and executed sequentially, including: determining whether there is an If logic in the current logical rule; if so, parsing the variable condition in the If logic and executing the If logic to judge the condition; if the If condition is satisfied, determining whether the next logical rule is a Then logic; if it is a Then logic, executing the Then logic; if it is not a Then logic, continuing to parse the next logical rule; if the If condition is not satisfied, determining whether the next logical rule is an Else logic; if it is an Else logic, executing the Else logic; if it is not an Else logic, continuing to parse the next logical rule.
[0009] Optionally, the logical rules in the test case logic file are parsed and executed sequentially, including: determining whether there is a Break logic in the current logical rule; if so, interrupting all loops; determining whether there is a Continue logic in the current logical rule; if so, executing the Continue logic, interrupting the current loop and executing the next loop; determining whether there is a Sleep logic in the current logical rule; if so, executing the Sleep logic and configuring the sleep attribute according to the Sleep logic; determining whether there is a Print logic in the current logical rule; if so, printing execution log information according to the Print logic attribute, wherein the execution log information includes temporary variable values, global variable values, judgment condition results, and single-board software return value information.
[0010] Optionally, it also includes: the test tool periodically receives heartbeat information sent by the software of all test boards. If the heartbeat information is not received for a consecutive preset period, the test board is considered to be offline, the test case corresponding to the test board directly returns failure, the execution failure information is returned to the test interface, and the status of the test board in the test interface of the test tool is updated to offline.
[0011] Optionally, the logical rules in the test case logic file are parsed and executed sequentially, including: determining whether there is an Exec logic in the current rule; if so, executing the Exec logic, then determining whether it is serial communication; if so, loading serial port information and sending interface information to the board to be called, and then receiving the execution result information returned by the board software in the board to be called; the serial port information includes serial port device information, baud rate information, port information, and type information; if not, loading network information, binding network IP address and port information, and sending network IP address and interface information to the board to be called, and then receiving the execution result information returned by the board software in the board to be called; the interface information includes the name of the interface function called by the board software and the parameter information required by the interface function; the execution result information includes the return value information of the interface function or the execution failure information.
[0012] Optionally, after the single-board software returns the execution result information, it also includes: executing the If logic condition to determine whether the execution result of the interface function is consistent with the expectation. If consistent, the test status variable is recorded as success, and the next logic rule is parsed. If inconsistent, the current loop is exited, and the test status variable is recorded as failure.
[0013] Optionally, it also includes: displaying execution logs on the test interface; if there are test cases that fail to execute, interrupting the execution of the current test case and returning execution failure information to the test interface; the test report includes test items, the board under test, test cases, and test results; the test results include test start time, test end time, test time, results of each test step, final test results, and test logs.
[0014] This invention also provides a single-board testing system based on logical configuration, which performs testing based on the aforementioned single-board testing method based on logical configuration. The system includes a test selection module, a test loading module, and a test execution module connected in sequence. The test selection module is used to select several test boards based on a first human-computer interaction instruction from the test interface, and to select several test cases based on a second human-computer interaction instruction from the test interface. The test loading module is used for the testing tool to test the several test boards in parallel through several network communication interfaces, and to load the corresponding several test cases. The test execution module is used to call the test case logic file corresponding to each test case, and to sequentially parse and execute the logical rules in the test case logic file to obtain the execution result and generate a test report.
[0015] The beneficial effects of this invention are as follows: 1. It supports parallel testing of a corresponding number of test boards through several network communication interfaces, breaking through the limitations of traditional serial testing. It allows for simultaneous testing of multiple target boards, significantly reducing the overall testing time for large batches of boards and improving testing efficiency. 2. Based on XML format test case logic files, it decouples test cases from test logic, allowing for adjustments or additions to test logic without modifying the test code. This reduces the time cost of test script development and maintenance, and shortens the batch testing cycle.
[0016] 2. Built-in ForLoop, If, Break, and other logic rules support custom configurations for complex test scenarios, adapting to the differentiated testing needs of different types and project boards. Test case logic files exist independently in XML format. When adding a new test scenario, only the corresponding XML test case logic file needs to be written, without modifying the core code of the test framework, reducing the difficulty of expanding the test solution.
[0017] 3. A heartbeat detection mechanism can periodically monitor the online status of the test board. If no heartbeat information is received for a preset period, the board is determined to be offline and a failure is returned directly, avoiding the continuous occupation of invalid test processes. After the logical rule execution fails, the test is interrupted and the execution failure information is returned to the test interface. At the same time, the failure status variable is recorded to ensure that abnormal situations are identified and handled in a timely manner, improving the accuracy and reliability of test results.
[0018] 4. The overall testing process is conducted through a human-computer interaction interface. The selection of test boards and test cases is completed via the first and second human-computer interaction commands on the test interface. Testers do not need extensive coding skills, making it highly user-friendly and with a low testing threshold. It is compatible with both serial and network communication modes, adaptable to boards with different communication interface types, and has a wide range of applications. Attached Figure Description
[0019] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings. The drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings.
[0020] Figure 1 This is a flowchart of a single-board testing method based on logical configuration in this invention; Figure 2 This is a flowchart illustrating the development process of a single-board testing method based on logical configuration in this invention. Figure 3 This is a flowchart illustrating a sequential parsing and execution logic rule in this invention; Figure 4 This is a flowchart illustrating the use of a single-board testing method based on logical configuration in this invention. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only one preferred embodiment of this invention and are only used to explain this invention. They do not limit the scope of protection of this invention. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.
[0022] As one implementation method, such as Figure 1 As shown, this invention provides a single-board testing method based on logical configuration, including: S1, configuring test board information and test case information, wherein the test board information includes board number, the project to which the board belongs, board type, and board communication information. Several test boards are selected based on a first human-computer interaction instruction on the test interface, and several test cases are selected based on a second human-computer interaction instruction; the test case information includes logical rules. Further, if the selected board number is not found, a message indicating that the board information does not exist is returned to the test interface.
[0023] S2. The testing tool tests the multiple test boards in parallel through multiple network communication interfaces and loads the corresponding multiple test cases.
[0024] S3. Call the test case logic files corresponding to each test case, and sequentially parse and execute the logic rules in the test case logic files to obtain the execution results and generate a test report. The test case configuration file includes the test case logic files corresponding to each test case. The logic rules include one or more of the following: ForLoop logic (or ForLoop rules, the same below), If logic, Then logic, Else logic, Break logic, Continue logic, Sleep logic, Print logic, Exec logic, and Return logic. Furthermore, if the XML test case configuration file has an incorrect format, a configuration verification mechanism is triggered, prompting the tester to reconfigure or repair the XML test case configuration file.
[0025] Furthermore, the ForLoop logic repeatedly executes the test logic within the loop body according to a preset parameter range, eliminating the need to manually write repetitive steps; it corresponds to the for loop structure in programming. The If logic is the conditional judgment rule, the basic control rule for implementing branching test logic, corresponding to the if condition judgment in programming. Based on the preset condition, it determines whether the test process meets the specified requirements, thus deciding the execution branch of the subsequent test logic. The Then logic is the branch execution rule after the If condition is met; it is a matching rule for the If logic. When the condition of the If logic is true (meets expectations), the test logic corresponding to the Then logic is executed, implementing the branching flow of "if the condition is met, execute a certain operation". The Else logic is the branch execution rule after the If condition is met; it is a matching rule for the If logic. When the condition of the If logic is false (does not meet expectations), the test logic corresponding to the Else logic is executed, implementing the branching flow of "if the condition is met, execute a certain operation".
[0026] Break logic: Immediately terminates the current loop structure, exits the loop body, and stops executing the remaining logic rules within the loop, directly executing the next logic rule after the loop structure. Continue logic: Skips the remaining logic rules in the current loop iteration and directly proceeds to the judgment of the next loop iteration (i.e., whether the condition for loop continuation is met), without terminating the entire loop structure. Exec logic: Parses the interface information of the tested board software that needs to be called and drives the test tool to issue corresponding test instructions to the board software, thereby verifying the functional correctness of the target interface of the board software. It is the bridge connecting the logic configuration of the test tool and the actual functional execution of the board software. Sleep logic: According to the preset time attributes, it causes the test tool to pause the execution of subsequent logic and wait for a specified duration to adapt to the timing requirements such as the execution time and communication latency of the board software. Print logic: According to the preset configuration, it prints out the key information in the test process and synchronizes it to the test interface in real time, making it convenient for testers to trace the test process and locate the cause of failure. Exec logic: It is the interaction bridge between the test tool and the board under test, parses and issues interface call instructions, triggers the board software to execute the specified function, and receives the execution result returned by the board. Return logic: The test case result return rule is the final rule for each test case (the last rule must be Return). It ends the execution flow of the current test case and returns a preset test status variable (success or failure) as the final result of the test case, which is then summarized and displayed by the test tool's test interface.
[0027] Specifically, the logical rules in the test case logic file are parsed and executed sequentially, including: determining whether there is a ForLoop logic in the current logical rule; if so, parsing the variables var, from, to, and step in the ForLoop logic and executing the for loop logic; if not, continuing to parse the next logical rule.
[0028] Determine if an If statement exists in the current logical rule. If so, parse the `condition` variable in the If statement and execute the If statement to evaluate the condition. If the If condition is satisfied, determine if the next logical rule is a Then statement. If it is, execute the Then statement; otherwise, continue parsing the next logical rule. If the If condition is not satisfied, determine if the next logical rule is an Else statement. If it is, execute the Else statement; otherwise, continue parsing the next logical rule.
[0029] The system checks if a Break logic exists in the current rule. If so, it interrupts all loops. It then checks if a Continue logic exists in the current rule. If so, it executes the Continue logic, interrupting the current loop and starting the next loop. Next, it checks if a Sleep logic exists in the current rule. If so, it executes the Sleep logic and configures the sleep attribute accordingly. Finally, it checks if a Print logic exists in the current rule. If so, it prints execution log information according to the Print logic attribute. This execution log information includes temporary variable values, global variable values, judgment condition results, and single-board software return value information.
[0030] The system determines whether an Exec logic exists in the current rule. If so, it executes the Exec logic and then determines whether it is serial communication. If so, it loads the serial port information and sends the interface information and parameters from the Exec logic to the board to be called, and then receives the execution result information returned by the board software within the board to be called. The serial port information includes serial port device information, baud rate information, port information, and type information. If not, it loads network information, binds the network IP address and port information, and sends the interface information and parameters from the Exec logic to the board to be called, and then receives the execution result information returned by the board software within the board to be called. The network information refers to the network communication interface used for parallel testing. The interface information includes the name of the interface function called by the board software and the parameter information required by the interface function. The execution result information includes the return value information of the interface function or execution failure information.
[0031] The testing tool periodically receives heartbeat information sent by the software of all test boards. If no heartbeat information is received for a consecutive preset period, the test board is considered to be offline. The test case corresponding to the test board will return failure directly, return execution failure information to the test interface, and update the status of the test board in the test interface of the testing tool to be offline.
[0032] After the single-board software returns the execution result information, it also includes: executing the If logic condition to determine whether the execution result of the interface function is consistent with the expectation. If consistent, the test status variable is recorded as success, and the next logic rule is parsed. If inconsistent, the current loop is exited, and the test status variable is recorded as failure.
[0033] S4. Obtain the execution results of the logical rules, display the execution log on the test interface, and generate a test report. If there are logical rules that fail to execute, interrupt the execution of the current test case and return the execution failure information to the test interface. The test report includes the test item, the board under test, the test case, and the test results. The test results include the test start time, test end time, test time, the result of each test step, the final test result, and the test log.
[0034] The single-board design of this invention adds a network communication interface for parallel testing of multiple single boards. It allows for customized configuration of XML logic files based on the single-board test logic. Both the test logic configuration file and the test case configuration file are in XML format. The XML test case configuration file is automatically invoked based on user-selected test cases. Each test case in the XML test case configuration file corresponds to a test logic configuration file. The XML logic file is parsed and the logic is executed. Finally, the results are summarized and returned to the test interface. If any logic fails to execute, the execution of the current test case is interrupted, and an execution failure message is returned to the test interface.
[0035] The advantages of this invention include: 1. Time saving: Multiple single-board software programs can be tested simultaneously through several network communication interfaces. 2. Reduced version release frequency: When the testing method changes, testers can independently configure the test logic and test values through XML test case configuration files, eliminating the need for a separate version release for single-board software due to changes in test logic. 3. Easier problem localization: Test results and execution logs can be obtained after each step in the XML logic configuration file is completed, allowing test users to analyze the reasons for failures in specific logic. 4. Test cases periodically receive heartbeat information from the single-board software, increasing real-time communication between the single-board software and the test software. Users can observe the on-premises status of each single-board software program in real time. If the heartbeat information is not received for a consecutive preset period, the single-board software is considered offline, the test case directly returns a failure, and the test interface is updated to show the single-board software as offline.
[0036] As one implementation method, this embodiment provides a single-board testing system based on logical configuration, which performs testing based on the aforementioned single-board testing method based on logical configuration. It includes a test selection module, a test loading module, and a test execution module connected in sequence. The test selection module is used to select several test boards based on a first human-computer interaction instruction from the test interface, and to select several test cases based on a second human-computer interaction instruction from the test interface. The test loading module is used for the testing tool to test the several test boards in parallel through several network communication interfaces, and to load the corresponding several test cases. The test execution module is used to call the test case logic file corresponding to each test case, and to sequentially parse and execute the logical rules in the test case logic file to obtain the execution result and generate a test report.
[0037] As one implementation method, refer to Figure 2 This describes the development process of a single-board software testing method based on logical configuration, using C# as the development language, and refers to... Figure 3 , Figure 3 This is a flowchart illustrating a sequential parsing and execution logic rule process according to the present invention. It describes the expansion process of logical rules in a test case logic file, as detailed below: Step 1: Read the board information file, which exists in XML format. The board information includes, but is not limited to, board number, project to which the board belongs, board type, board communication information, and test cases contained in the board.
[0038] Step 2: Read the test case information corresponding to each board in Step 1. Each test case includes a test case logic file.
[0039] Step 3: Parse the test case logic file from Step 2. The test case logic file includes, but is not limited to, global variables and the definition of test logic.
[0040] Step 4: Parse the test logic in Step 3, store the global variables and logic rules in the configuration. The global variables must include test status variables, which are used to record the test results in the test steps.
[0041] Step 5: Determine if the current logical rule is a ForLoop rule. If so, parse the variables var, from, to, and step in the ForLoop rule, execute the for loop logic, and continue parsing the next logical rule.
[0042] Step 6: Determine if the current logical rule is an If rule. If it is, parse the condition in the If rule and determine if the condition is true.
[0043] Step 7: If the condition in Step 6 is true, continue parsing the next logical rule and determine if it is a Then rule. If it is a Then rule, continue to Step 4. If it is not, continue to Step 8.
[0044] Step 8: If the condition in Step 6 is not met, continue parsing the next rule and execute Step 9.
[0045] Step 9: Determine if the current rule is an Else rule. If it is, continue parsing the next logical rule and execute Step 4. Otherwise, continue parsing the next logical rule and execute Step 10.
[0046] Step 10: Determine if the current rule is a Break rule. If it is, interrupt the current loop, skip to Step 5, continue parsing the next logical rule, and execute Step 4.
[0047] Step 11: Determine if the current rule is a Continue rule. If so, exit the current loop and execute the next loop, then continue to Step 5.
[0048] Step 12: Determine if the current rule is a Sleep rule. If so, the program will configure the Sleep rule to enable sleep.
[0049] Step 13: Determine if the current rule is a Print rule. If so, the program prints relevant log information according to the Print rule attributes. This information includes, but is not limited to, temporary variable values, global variable values, judgment condition results, and single-board software return value information.
[0050] Step Fourteen: Determine if the current rule is an Exec rule. If it is, parse the execution interface function name and parameter values in Exec and continue to Step Fifteen. Otherwise, continue to parse the next logical rule.
[0051] Step 15: Initialize the communication information according to the communication method of the board in Step 1. If it is serial communication, proceed to Step 16; if it is network communication, proceed to Step 17.
[0052] Step 16: Initialize serial port information. Serial port information includes, but is not limited to, serial port device, baud rate, port, IP address, type, etc. The test tool will periodically receive heartbeat information from the single-board software. If no heartbeat information is received for more than 2 cycles, the single-board is considered to be offline, the test tool interface is updated to the single-board offline status, and the test case returns failure directly. Step 17: After binding the IP address and port information and initializing network communication, the test tool will periodically receive heartbeat information from the single-board software. If no heartbeat information is received for more than 2 cycles, the single-board is considered offline, the test tool interface is updated to the single-board offline status, and the test case returns failure directly. Step 18: Based on the execution information in Step 14, send test information to the board software under test. This information includes, but is not limited to, the names of the interface functions that the board software needs to call and the parameter information required by the interface functions.
[0053] Step 19: Wait for the tested board software to return the execution result information. The board software will parse the interface function name and parameter value in Step 18, then call the corresponding interface function, obtain the function return value, and return it to the testing tool according to the agreed format. This information includes, but is not limited to, whether the tested board software successfully executed the interface function. If it failed, it will include the failure exception information; if it succeeded, it will include the interface function return value information.
[0054] Step 20: After step 19, there should be an If logic rule to determine whether the execution result of the interface function is consistent with the expectation. If it is consistent, the test status variable should be recorded as success, and the next logic rule should be parsed to execute step 4. If it fails, the current loop logic rule or IF rule should be exited and step 21 should be executed. The test status variable should be recorded as failure and step 13 should be executed to print relevant log information.
[0055] Step 21: Determine if the current rule is a Return rule. If so, return the stored test state variable. In the logical rules of each test case, the last rule must be a Return rule.
[0056] Note: Steps four through twenty-one are repeated during the execution of each test case.
[0057] Step 22: After obtaining the test results, the single-board software updates the test results to the test interface in real time, including but not limited to the test start time, test end time, test time, results of each test step, final test result, and test log.
[0058] Step 23: Generate a test report based on the test results from Step 18. The test report information includes, but is not limited to, test items, the board under test, test cases, and test results.
[0059] Step 24: Test complete.
[0060] As one implementation method, refer to Figure 4 The user process of a single-board software testing method based on logical configuration is as follows: Step 1: The user configures the information of the single-board under test and the test case information, including the single-board communication method.
[0061] Step 2: The user configures the test logic information for each test case.
[0062] Step 3: Start the testing tool.
[0063] Step 4: Users select the boards to be tested, either by selecting all or selecting in batches.
[0064] Step 5: The user selects test cases. Each board software corresponds to multiple test cases. The user can select all test cases with one click or select them in batches.
[0065] Step 6: Perform the test.
[0066] Step 7: Wait for the test to finish.
[0067] Step 8: View the test report or test interface to analyze the test results.
[0068] Step 9: End the test.
[0069] Compared with the prior art, the present invention has the following beneficial effects based on the above embodiments: 1. Supports parallel testing of a corresponding number of test boards through multiple network communication interfaces, breaking through the limitations of traditional serial testing. It allows simultaneous testing of multiple target boards, significantly reducing the overall testing time for large batches of boards and improving testing efficiency. The XML-formatted test case logic file decouples test cases from test logic, enabling adjustments or additions to test logic without modifying the test code. This reduces the time cost of test script development and maintenance, and shortens the batch testing cycle.
[0070] 2. Built-in ForLoop, If, Break, and other logic rules support custom configuration for complex test scenarios, adapting to the differentiated testing needs of different types and project boards. Test logic configuration files exist independently as XML files. When adding a new test scenario, only the corresponding XML test case logic file needs to be written, without modifying the core code of the test framework, reducing the difficulty of expanding the test solution.
[0071] 3. A heartbeat detection mechanism can periodically monitor the online status of the test board. If no heartbeat information is received for a preset period, the board is determined to be offline and a failure is returned directly, avoiding the continuous occupation of invalid test processes. After the logical rule execution fails, the test is interrupted and the execution failure information is returned to the test interface. At the same time, the failure status variable is recorded to ensure that abnormal situations are identified and handled in a timely manner, improving the accuracy and reliability of test results.
[0072] 4. The overall testing process is conducted through a human-computer interaction interface. The selection of test boards and test cases is completed via the first and second human-computer interaction commands on the test interface. Testers do not need extensive coding skills, making it highly user-friendly and with a low testing threshold. It is compatible with both serial and network communication modes, adaptable to boards with different communication interface types, and has a wide range of applications.
[0073] The specific embodiments described above are preferred embodiments of a single-board testing method and system based on logic configuration according to this application, and are not intended to limit the specific implementation scope of this application. The scope of this application includes but is not limited to the specific embodiments described above. All equivalent changes made in accordance with the shape and structure of this application are within the protection scope of this application.
Claims
1. A single-board testing method based on logical configuration, characterized in that, include: Based on the first human-computer interaction command of the test interface, select several test boards, and based on the second human-computer interaction command of the test interface, select several test cases; The testing tool tests the multiple test boards in parallel through several network communication interfaces and loads the corresponding test cases. The test case logic file corresponding to each test case is called, and the logic rules in the test case logic file are parsed and executed sequentially to obtain the execution results and generate a test report.
2. The single-board testing method based on logical configuration according to claim 1, characterized in that, The logical rules include one or more of the following: ForLoop logic, If logic, Then logic, Else logic, Break logic, Continue logic, Sleep logic, Print logic, Exec logic, and Return logic. Before selecting several test boards based on the first human-computer interaction instruction on the test interface, the system also includes: configuring test board information and test case information. The test board information includes the board number, the project to which the board belongs, the board type, and the board communication information. The test case information includes the logical rules.
3. The single-board testing method based on logical configuration according to claim 2, characterized in that, The test case logic file is in XML format; the logic rules in the test case logic file are parsed and executed sequentially, including: determining whether there is a ForLoop logic in the current logic rule; if so, parsing the variables var, from, to, and step in the ForLoop logic and executing the for loop logic; if not, continuing to parse the next logic rule.
4. The single-board testing method based on logical configuration according to claim 2, characterized in that, The logical rules in the test case logic file are parsed and executed sequentially, including: determining whether there is an If logic in the current logical rule; if so, parsing the condition variable in the If logic and executing the If logic to judge the condition; if the If condition is satisfied, determining whether the next logical rule is a Then logic; if it is a Then logic, executing the Then logic; if it is not a Then logic, continuing to parse the next logical rule; if the If condition is not satisfied, determining whether the next logical rule is an Else logic; if it is an Else logic, executing the Else logic; if it is not an Else logic, continuing to parse the next logical rule.
5. The single-board testing method based on logical configuration according to claim 2, characterized in that, The logical rules in the test case logic file are parsed and executed sequentially, including: determining whether there is a Break logic in the current logical rule; if so, interrupting all loops; determining whether there is a Continue logic in the current logical rule; if so, executing the Continue logic, interrupting the current loop and executing the next loop; determining whether there is a Sleep logic in the current logical rule; if so, executing the Sleep logic and configuring the sleep attribute according to the Sleep logic; and determining whether there is a Print logic in the current logical rule; if so, printing execution log information according to the Print logic attribute. The execution log information includes temporary variable values, global variable values, judgment condition results, and single-board software return value information.
6. The single-board testing method based on logical configuration according to claim 2, characterized in that, Also includes: The testing tool periodically receives heartbeat information sent by the software of all test boards. If no heartbeat information is received for a consecutive preset period, the test board is considered to be offline. The test case corresponding to the test board will return failure directly, return execution failure information to the test interface, and update the status of the test board in the test interface of the testing tool to be offline.
7. The single-board testing method based on logical configuration according to claim 6, characterized in that, The logical rules in the test case logic file are parsed and executed sequentially, including: determining whether an Exec logic exists in the current logical rule; if so, executing the Exec logic; then determining whether it is serial communication; if so, loading serial port information and sending interface information to the board to be called; and then receiving the execution result information returned by the board software within the board to be called; the serial port information includes serial port device information, baud rate information, port information, and type information; if not, loading network information, binding network IP address and port information, and sending network IP address and interface information to the board to be called; and then receiving the execution result information returned by the board software within the board to be called; the interface information includes the name of the interface function called by the board software and the parameter information required by the interface function; the execution result information includes the return value information of the interface function or execution failure information.
8. The single-board testing method based on logical configuration according to claim 7, characterized in that, After the single-board software returns the execution result information, it also includes: executing the If logic condition to determine whether the execution result of the interface function is consistent with the expectation. If consistent, the test status variable is recorded as success, and the next logic rule is parsed. If inconsistent, the current loop is exited, and the test status variable is recorded as failure.
9. A single-board testing method based on logical configuration according to claim 8, characterized in that, Also includes: The execution log is displayed on the test interface; If a test case fails to execute, the execution of the current test case will be interrupted, and the execution failure information will be returned to the test interface. The test report includes the test items, the board under test, test cases, and test results; the test results include the test start time, test end time, test time, results of each test step, final test results, and test logs.
10. A single-board testing system based on logical configuration, wherein testing is performed based on the single-board testing method based on logical configuration as described in any one of claims 1 to 9, characterized in that, It includes a test selection module, a test loading module, and a test execution module connected in sequence; the test selection module is used to select several test boards based on the first human-computer interaction command of the test interface, and select several test cases based on the second human-computer interaction command of the test interface; The test loading module is used by the test tool to test the multiple test boards in parallel through multiple network communication interfaces and load the corresponding multiple test cases. The test execution module is used to call the test case logic files corresponding to each test case, and sequentially parse and execute the logic rules in the test case logic files to obtain the execution results and generate a test report.