Low-power control method and system for smart glasses based on SD NAND memory chips

Abstract

The application relates to the technical field of intelligent wearable devices and energy management, and discloses a low-power consumption control method and system for intelligent glasses based on an SD NAND storage chip, which comprises the following steps: synchronously aligning power supply voltage data and instruction frequency data to obtain a matching degree value; if the matching degree value is lower than a preset matching threshold value, using a pre-trained time sequence prediction model to predict a state switching duration and an instruction peak value interval to obtain a load change sequence; combining power supply noise and rhythm stability data to obtain a power supply configuration scheme through weighted calculation; performing sliding window processing on an instantaneous current sequence to obtain an efficiency change sequence; combining a preset efficiency reference sequence to calculate a correlation degree value and performing tolerance operation to obtain a dynamic switching threshold value; and combining a preset scene feature library to distribute weights to obtain a logic execution sequence and adjust the working state of the storage chip. The application realizes fine consumption reduction of the storage chip.

Description

Technical Field

[0001] This invention relates to the field of smart wearable devices and energy management technology, and in particular to a low-power control method and system for smart glasses based on SD NAND memory chips. Background Technology

[0002] Currently, in the field of smart wearable devices, especially in smart glasses where portability and extended use are highly demanding, the device's battery life and operating efficiency directly affect the continuity of user experience and practical value. As device functions become increasingly sophisticated, the frequent reading, writing, and access of massive amounts of data by internal high-capacity storage components has gradually made energy consumption a core bottleneck restricting the overall battery life development of smart glasses.

[0003] In a current technology, the overall power consumption of the smart glasses is typically set by the main control chip or microcontroller, employing a coarse-grained sleep and wake-up strategy based on a fixed load threshold. Specifically, when the system determines that the entire system is in an idle or low-frequency operation state, the power supply to each component is uniformly reduced; when a specific task is triggered, all hardware components, including the SD NAND storage chip, are woken up at full power to handle data read and write operations. However, this traditional energy management approach often only focuses on optimizing the overall power consumption of the device, neglecting the fine-grained control of key internal components under different operating states. In fact, the storage chip in smart glasses undertakes a large amount of data storage and retrieval tasks, but its switching of operating states often lacks precise coordination with the rhythm of the overall device operation instructions. Due to the failure to establish a dynamic mapping model between instantaneous power supply changes and instruction processing latency, the system cannot proactively predict the transient workload trends of the storage channel. This results in the storage chip remaining in a high-power state even when high-intensity read / write operations are not required, such as during the system buffer period after short video recording, leading to inefficient energy consumption. More complexly, this mismatch in state transitions further exacerbates the chaos in device instruction scheduling, causing delays or resource imbalances when the system processes assigned tasks. This blind and lagging state matching mechanism negates the portability and energy efficiency advantages of the hardware itself.

[0004] Therefore, existing technologies suffer from problems such as high energy wastage of internal storage chips in smart glasses and severe reduction in battery life. Summary of the Invention

[0005] This invention provides a low-power control method and system for smart glasses based on SD NAND storage chips, in order to solve the problems of high energy waste and severely reduced battery life of the internal storage chips in smart glasses in the prior art.

[0006] In a first aspect, to address the aforementioned technical problems, this invention provides a low-power control method for smart glasses based on SD NAND flash memory chips, comprising: Acquire power supply voltage data and command frequency data, and perform synchronization alignment processing on the power supply voltage data and the command frequency data to obtain a matching degree value; The state transition duration and instruction peak interval are obtained. If the matching degree value is lower than the preset matching threshold, the load change sequence is obtained by using a pre-trained time series prediction model to predict the state transition duration and instruction peak interval. Obtain power supply noise and rhythm stability data, and perform weighted calculations on the load change sequence, power supply noise, and rhythm stability data to obtain a power supply configuration scheme; Obtain the instantaneous current sequence, and combine it with the power supply configuration scheme to perform efficiency mapping modeling on the instantaneous current sequence to obtain the efficiency change sequence; The correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence is calculated to obtain the correlation degree value, and the dynamic switching threshold is obtained by performing tolerance algebra operation on the correlation degree value. The dynamic switching threshold and the preset scene feature library are used to perform weight allocation to obtain a logical execution sequence, and the working state of the storage chip is adjusted according to the logical execution sequence.

[0007] Secondly, the present invention provides a low-power control system for smart glasses based on SD NAND memory chips, comprising: The synchronous evaluation module is used to acquire power supply voltage data and command frequency data, and to perform synchronous alignment processing on the power supply voltage data and the command frequency data to obtain a matching degree value. The load prediction module is used to obtain the state switching duration and the peak instruction interval. If the matching degree value is lower than the preset matching threshold, the pre-trained time series prediction model is used to predict the state switching duration and the peak instruction interval to obtain the load change sequence. A configuration generation module is used to acquire power supply noise and rhythm stability data, and to perform weighted calculations on the load change sequence, the power supply noise and the rhythm stability data to obtain a power supply configuration scheme; The efficiency deduction module is used to obtain the instantaneous current sequence and, in conjunction with the power supply configuration scheme, perform efficiency mapping modeling on the instantaneous current sequence to obtain the efficiency change sequence; The threshold reconstruction module is used to calculate the correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence to obtain the correlation degree value, and to perform tolerance algebra operation on the correlation degree value to obtain the dynamic switching threshold. The strategy execution module is used to obtain a logical execution sequence by weighting the dynamic switching threshold and the preset scene feature library, and to adjust the working state of the storage chip according to the logical execution sequence.

[0008] Compared with the prior art, the present invention has the following beneficial effects: (1) This invention obtains power supply voltage and command frequency data, extracts phase difference sequences and calculates matching degree values ​​using cross-correlation functions and linear regression algorithms; when the matching degree is lower than the threshold, it uses a pre-trained timing prediction model to predict the evolution of state switching duration and command peak interval, and obtains load change sequences. This process completely abandons the passive response mechanism of traditional microcontrollers based on fixed load thresholds, and deeply explores the micro-timing coupling relationship between underlying hardware power supply transients and software command scheduling; by proactively predicting the future transient workload trend of the storage channel when there is a mismatch between power supply and commands, it effectively overcomes the perception lag and blindness problems existing in traditional global power consumption management, realizes accurate prediction of the underlying operating rhythm of SD NAND storage chips, and reduces the ineffective energy waste caused by maintaining unnecessary high power consumption during the system buffer period from the source.

[0009] (2) This invention generates a power supply configuration scheme by weighting the load change sequence through the fusion of power supply noise and rhythm stability data, and uses this scheme to perform efficiency mapping modeling on the instantaneous current sequence to extract the efficiency change sequence containing the underlying real energy consumption performance. This process innovatively incorporates environmental interference factors, such as physical power supply noise, and micro-execution rhythm, such as instruction rhythm stability, into the low-power decision closed loop, so that the issued voltage and current configuration can not only meet the energy-saving requirements, but also effectively resist the interference of external hardware noise; at the same time, the sliding window real-time monitoring based on instantaneous current provides the system with a high-fidelity energy conversion feedback mechanism. This scheme breaks the coarse global sleep / wake-up bipolar control strategy in the existing technology, and realizes fine and flexible parameter modulation for core storage components. Under the premise of ensuring zero latency and no imbalance in the complex instruction scheduling of smart glasses, it maximizes the energy-saving potential of the hardware.

[0010] (3) This invention utilizes the Pearson correlation coefficient algorithm to calculate the correlation between the real-time efficiency change sequence and the preset efficiency benchmark sequence, performs tolerance algebra operations to reconstruct the dynamic switching threshold, and combines a scene feature library to allocate node weights, ultimately generating a logic execution sequence to control the memory chip. This process upgrades power consumption optimization from the traditional passive voltage reduction to an intelligent paradigm of proactive optimization; using rigorous statistical correlation analysis, the system can adaptively anchor the optimal power supply state switching time under different load conditions, and dynamically iterate control strategies according to the specific application scenario of the smart glasses, such as video recording and standby display. This solution completely solves the persistent problem of mismatch between state switching nodes and the actual needs of the system, endows the underlying energy management logic of the device with the ability to evolve autonomously, and improves the overall battery life limit and user experience of smart glasses in complex and ever-changing usage scenarios. Attached Figure Description

[0011] Figure 1 This is a schematic flowchart of a low-power control method for smart glasses based on SD NAND storage chips provided in the first embodiment of the present invention; Figure 2 This is a schematic diagram of the low-power control system structure for smart glasses based on SD NAND storage chips provided in the second embodiment of the present invention. Detailed Implementation

[0012] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0013] Reference Figure 1 The first embodiment of the present invention provides a low-power control method for smart glasses based on SD NAND memory chips, including the following steps: S11, acquire power supply voltage data and command frequency data, and perform synchronization alignment processing on the power supply voltage data and the command frequency data to obtain a matching degree value; S12, obtain the state switching duration and the peak instruction interval. If the matching degree value is lower than the preset matching threshold, use the pre-trained time series prediction model to predict the state switching duration and the peak instruction interval to obtain the load change sequence. S13, acquire power supply noise and rhythm stability data, and perform weighted calculation on the load change sequence, the power supply noise and the rhythm stability data to obtain a power supply configuration scheme; S14, Obtain the instantaneous current sequence, and combine the power supply configuration scheme to perform efficiency mapping modeling on the instantaneous current sequence to obtain the efficiency change sequence; S15, calculate the correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence to obtain the correlation degree value, and perform tolerance algebra operation on the correlation degree value to obtain the dynamic switching threshold. S16, using the dynamic switching threshold and the preset scene feature library to perform weight allocation to obtain a logical execution sequence, and adjusting the working state of the storage chip according to the logical execution sequence.

[0014] In step S11, power supply voltage data and command frequency data are acquired, and the power supply voltage data and command frequency data are synchronized and aligned to obtain a matching degree value.

[0015] The process of synchronizing and aligning the power supply voltage data with the command frequency data to obtain a matching degree value includes: Perform a time alignment operation on the power supply voltage data and the command frequency data to obtain a phase difference sequence; A mapping model between the phase difference sequence and the preset instruction delay data is constructed using a linear regression algorithm; The correlation coefficient of the mapping model is extracted as the matching degree value.

[0016] In one implementation, a high-precision voltage sampling circuit configured on the smart glasses motherboard reads the transient voltage values ​​of the power supply pins of the SD NAND flash memory chip. The absolute timestamp is then matched and bound to the corresponding transient voltage value in a key-value pair format to generate power supply voltage data. It should be noted that the process for determining the preset sampling frequency of the high-precision voltage sampling circuit involves: extracting the highest instruction scheduling reference frequency of the SD NAND flash memory chip; according to the Nyquist sampling theorem, extracting twice the highest instruction scheduling reference frequency as a theoretical lower limit; and adding a preset engineering anti-aliasing coefficient to the theoretical lower limit.

[0017] It should be noted that the preset engineering anti-aliasing coefficient is determined by extracting the transition band bandwidth frequency value of the anti-aliasing low-pass filter configured in front of the analog-to-digital converter of the SD NAND flash memory chip, and using this transition band bandwidth frequency value as the preset engineering anti-aliasing coefficient. To ensure that the sampling process can completely cover the transition band of the filter to eliminate the risk of spectral aliasing, the theoretical lower limit and the preset engineering anti-aliasing coefficient are algebraically added together, and the sum is determined as the final preset sampling frequency, for example, set to 1000 Hz. Simultaneously, the task scheduling logs recorded at the bottom layer of the SD NAND flash memory chip controller are extracted, and the number of discrete instructions executed is counted according to a preset time window to generate instruction frequency data containing corresponding timestamps.

[0018] It should be noted that, regarding the time alignment operation and the generation process of the phase difference sequence, in order to extract the dynamically evolving temporal features, the power supply voltage data and command frequency data are synchronously divided into multiple continuous data blocks according to a preset sliding time window. To eliminate the influence of the difference in physical dimensions of voltage and frequency on subsequent calculations, Z-score standardization is performed on the power supply voltage data and command frequency data within each data block, so that the mean of the processed data sequence is equal to zero and the standard deviation is equal to one. The cross-correlation function is used to calculate the cross-correlation sequence of the standardized power supply voltage data and command frequency data, and the index position of the cross-correlation sequence with the largest correlation coefficient is extracted as the peak offset in the current time window. All sliding time windows are traversed, and the peak offsets extracted from all time windows are spliced ​​in chronological order to generate the phase difference sequence.

[0019] The length of the preset sliding time window is equal to an integer multiple of the reciprocal of the highest instruction scheduling reference frequency of the SD NAND memory chip, specifically ten times that reciprocal. This value has been verified through offline testing to achieve a balance between preserving the transient characteristics of instruction scheduling and suppressing sampling jitter.

[0020] It is worth noting that, in the process of acquiring the preset instruction delay data, during the offline calibration stage before the device leaves the factory, a test instruction set covering the entire frequency band is injected into the SD NAND storage chip; the physical time of each instruction from the microcontroller to the storage chip returning the response signal is captured using a logic analyzer, and multiple sets of time consumption characteristics are collected; Gaussian filtering is performed on the time consumption characteristics to remove pulse interference, a benchmark time consumption sequence is generated and stored in the local read-only memory, which is determined as the preset instruction delay data.

[0021] In one implementation, a mapping model between the phase difference sequence and preset instruction delay data is constructed using a linear regression algorithm. Specifically, the phase difference sequence is set as the independent variable matrix, and the locally read preset instruction delay data is set as the dependent variable matrix. Ordinary least squares is used to perform linear fitting calculations on the independent and dependent variable matrices, and the correlation coefficient of the mapping model is extracted as the matching degree value.

[0022] It should be noted that the logic for extracting the correlation coefficient is as follows: calculate the covariance of the independent variable matrix and the dependent variable matrix, divide the covariance by the product of the standard deviations of the independent variable matrix and the dependent variable matrix, and perform numerical division to obtain the Pearson correlation coefficient. The absolute value of the Pearson correlation coefficient is then extracted and determined as the degree of matching.

[0023] In step S12, the state switching duration and the peak instruction interval are obtained. If the matching degree value is lower than the preset matching threshold, the load change sequence is obtained by using the pre-trained time series prediction model to predict the state switching duration and the peak instruction interval.

[0024] The process of predicting the load change sequence by using a pre-trained time-series prediction model to forecast the state transition duration and the peak interval of the instructions includes: Perform a difference operation on the state switching duration and the peak interval of the instruction to obtain a change feature sequence; If the fluctuation amplitude of the change feature sequence is greater than the preset fluctuation threshold, the evolution nodes of the change feature sequence are extracted to obtain the prediction benchmark. The prediction benchmark is input into the pre-trained time series prediction model to obtain the prediction duration sequence and the prediction interval sequence; The load change sequence is obtained by weighting and summing the predicted duration sequence and the predicted interval sequence using preset weight parameters.

[0025] In one implementation, a timer configured in the main control module of the smart glasses is used to collect multiple physical time values ​​required for the SD NAND storage chip to continuously switch between different power states in real time, and record them in chronological order to generate a state switching duration sequence; at the same time, the system bus monitor is used to parse the release cycle of the storage instruction stream, continuously calculate the time span between multiple adjacent instruction execution peaks, and generate an instruction peak interval sequence.

[0026] It is worth noting that the process for determining the preset matching threshold is as follows: extract the maximum tolerance latency fluctuation percentage of instructions specified in the SD NAND memory chip datasheet, calculate the difference between constant one and the tolerance latency fluctuation percentage, and determine the difference as the preset safety margin coefficient; obtain multiple sets of matching degree sample data of the smart glasses device under historical fault-free calibration operation conditions; calculate the arithmetic mean of the multiple sets of matching degree sample data; multiply the arithmetic mean by the preset safety margin coefficient, perform numerical multiplication calculation, and determine the calculation result as the preset matching threshold.

[0027] It should be noted that if the matching degree value is lower than the preset matching threshold, a first-order difference operation is performed on the state switching duration sequence and the instruction peak interval sequence respectively. Specifically, the numerical difference between the current sampling point and the adjacent previous sampling point is calculated, and the numerical difference is used to construct a feature sequence reflecting the change of the numerical dynamic offset.

[0028] It is worth noting that the determination of the preset fluctuation threshold is based on the Leida criterion in statistics. Samples of the change characteristic sequence of the memory chip under historical stable operating conditions are extracted, the standard deviation of the samples is calculated, and three times the standard deviation is determined as the preset fluctuation threshold. In one implementation, the fluctuation amplitude is obtained by extracting the absolute difference between the maximum and minimum values ​​of the change characteristic sequence within the current window. If the fluctuation amplitude is greater than the preset fluctuation threshold, the operating state is determined to have entered a non-stationary evolution stage. Specifically, ten consecutive sampling points from the change characteristic sequence constitute a fluctuation analysis window, and the absolute difference between the maximum and minimum values ​​within this window is calculated as the fluctuation amplitude. The window length of ten sampling points is determined based on the first zero-crossing point of the autocorrelation function of the change characteristic sequence under historical stable operating conditions.

[0029] For example, the time node where the slope polarity changes in the change feature sequence is identified as the evolution node. Specifically, the determination logic is as follows: when the values ​​of three adjacent sampling points satisfy the condition that the current node value is greater than the previous node value and greater than the next node value, or the current node value is less than the previous node value and less than the next node value, the time node corresponding to the current node is determined as the evolution node. The historical state switching duration sequence and the historical command peak interval sequence from the initial monitoring time to the time corresponding to the evolution node are extracted. These two sequences are then matrix-concatenated according to the time step feature dimension to form a two-dimensional historical input matrix, which is then used as the prediction benchmark.

[0030] In one implementation, the prediction benchmark is input into a pre-trained time-series prediction model. It should be noted that, since the prediction benchmark contains bivariate features, the pre-trained time-series prediction model employs a vector autoregressive moving average model. The model's order parameter is determined by performing a grid search based on the Akaike Information Criterion for historical load data; the historical load data spans at least 72 hours and has a sampling frequency of at least 100 Hz. During the grid search, the search intervals for the autoregressive term, the differencing order, and the moving average term are all set to integers between zero and three. The time-series prediction model receives the prediction benchmark as input and obtains the predicted duration sequence and predicted interval sequence within the future time window through forward evolution prediction.

[0031] It is worth noting that the load change sequence is obtained by weighting and summing the predicted duration sequence and the predicted interval sequence using preset weight parameters. The preset weight parameters are determined by using a partial least squares algorithm to calculate the contribution ratio of the partial derivatives of state switching duration and command peak interval in historical range data to the overall energy consumption loss. The contribution ratios of the partial derivatives are then normalized to a sum of one to obtain the first weight and the second weight. In this embodiment, each element in the predicted duration sequence is multiplied by the first weight, and the corresponding element in the predicted interval sequence is multiplied by the second weight. The load change sequence is obtained by performing an addition summation operation.

[0032] It should be noted that if the fluctuation amplitude of the change feature sequence is not greater than the preset fluctuation threshold, the current working state is determined to be in a stable phase, no new evolution nodes are extracted, and the state switching duration and instruction peak interval obtained at the current moment are directly combined as the prediction benchmark; if there is a previously predicted load change sequence, the sequence is kept unchanged and the current prediction update is skipped.

[0033] In step S13, power supply noise and rhythm stability data are acquired, and a power supply configuration scheme is obtained by weighting the load change sequence, the power supply noise and the rhythm stability data.

[0034] The power supply configuration scheme is obtained by weighting the load change sequence, the power supply noise, and the rhythm stability data, including: The power supply noise and the rhythm stability data are normalized to obtain standard noise and standard rhythm. The adjustment index is obtained by performing a weighted summation calculation on the load change sequence, the standard noise, and the standard rhythm using preset decision coefficients; The target voltage and target current are extracted by performing a query operation in a preset parameter library using the adjustment index to obtain the power supply configuration scheme.

[0035] In one implementation, a high-frequency sampling circuit deployed on the power supply circuit of the memory chip is used to acquire voltage ripple data. The variance of the voltage ripple data within a preset observation window is calculated to obtain the power supply noise. Simultaneously, the execution frequency sequence of the current instruction stream is extracted. The standard deviation of the execution frequency sequence is used as the dividend, and the arithmetic mean of the execution frequency sequence is used as the divisor. Numerical division is performed to calculate the discrete coefficients, which are then used as the rhythm-stable data. The preset observation window is set to a length of 50 sampling points, which is equal to five times the duration of the dominant frequency period of the voltage ripple in the power supply circuit. This length is determined by spectral analysis to effectively cover the complete fluctuation period of the ripple. To unify the data dimension and achieve scalarization, the arithmetic mean of the load change sequence is calculated to obtain the load characteristic scalar. The load extreme values, noise extreme values, and rhythm extreme values ​​recorded in the local historical database are extracted as normalization boundary parameters. The min-max normalization algorithm is used to map the load characteristic scalar, the power supply noise, and the rhythm-stable data to a numerical range of zero to one, respectively, to obtain dimensionless standard load, standard noise, and standard rhythm.

[0036] It should be noted that the method for determining the preset decision coefficients involves extracting energy efficiency performance datasets from the smart glasses under different operating conditions during the historical offline calibration phase. The objective function is to maximize the overall energy efficiency ratio. A multiple linear regression algorithm is used to iteratively fit and calculate the historical load characteristics, noise characteristics, and rhythm characteristics in the energy efficiency performance dataset. The partial regression coefficients corresponding to each feature after convergence are extracted, and these coefficients are then subjected to min-max normalization. These processed partial regression coefficients are then solidified and determined as the preset decision coefficients. Using these preset decision coefficients, scalar multiplication operations are performed on the standard load, standard noise, and standard rhythm. The results of these scalar multiplication operations are then algebraically added, and a value between zero and one is output, which is determined as the adjustment index.

[0037] It is worth noting that during the construction of the preset parameter library, in offline calibration mode, an instruction set covering the entire operating frequency band was continuously injected into the SD NAND memory chip, and a stepped power supply parameter test was simultaneously applied with preset voltage adjustment step size and preset current adjustment step size. The preset voltage adjustment step size was set to 5% of the chip's nominal power supply voltage, and the preset current adjustment step size was set to 10% of the full-load limit current. A precision power meter was used to record the chip's power consumption performance and read / write latency under various parameter combinations, and the lowest power consumption physical inflection point under the premise of meeting the read / write latency threshold constraint was extracted.

[0038] It should be noted that the read / write latency threshold is derived from the maximum permissible communication latency time specified in the smart glasses system control bus protocol, and this maximum permissible communication latency time is determined as the read / write latency threshold. The voltage and current values ​​corresponding to the lowest power consumption physical inflection point are key-value bound to equidistant intervals of the adjustment index, thus constructing a preset parameter library. In this embodiment, based on the calculated adjustment index, a matching adjustment index interval is queried from the preset parameter library, and the target voltage and target current bound to the adjustment index interval are extracted and combined to generate a power supply configuration scheme.

[0039] In step S14, the instantaneous current sequence is obtained, and the efficiency change sequence is obtained by performing efficiency mapping modeling on the instantaneous current sequence in conjunction with the power supply configuration scheme.

[0040] Specifically, the efficiency change sequence is obtained by performing efficiency mapping modeling on the instantaneous current sequence in conjunction with the power supply configuration scheme, including: Extract the target current parameters from the power supply configuration scheme, perform averaging on the instantaneous current sequence according to the preset sliding window step size to obtain the average current sequence, and extract the fluctuation peak value of the instantaneous current sequence. Calculate the first ratio of the fluctuation peak value to the target current parameter, calculate the second ratio of the average current sequence to the target current parameter, and perform a weighted summation operation on the first ratio and the second ratio to obtain the ratio feature; The efficiency change sequence is obtained by inputting the ratio feature into a pre-constructed power consumption model for extrapolation and calculation.

[0041] In one implementation, a current sensing circuit configured at the power supply input of the SD NAND flash memory chip continuously acquires analog current signals during operation and converts them to digital signals to obtain an instantaneous current sequence. Simultaneously, the system power management module dynamically adjusts the target output of the power supply circuit based on the power supply configuration scheme generated in the preceding step. In this embodiment, the target current is extracted from the power supply configuration scheme generated in the preceding step S13 by parsing the scheme, and the target current is determined as the target current parameter.

[0042] It should be noted that the method for determining the preset sliding window step size involves using a Fast Fourier Transform algorithm to perform spectral analysis on the instantaneous current test data under historical steady-state operating conditions, extracting the cutoff frequency where the energy percentage of the transient current signal exceeds 90%. This 90% energy percentage is selected based on signal processing filtering optimization; choosing this 90% energy range maximizes the filtering of high-frequency harmonic hardware noise while fully preserving the core low-frequency current component that characterizes the actual load fluctuations. Based on the Nyquist sampling theorem, twice the reciprocal of the cutoff frequency is extracted as the theoretical safe period, and 0.5 times the theoretical safe period is extracted as the engineering hardware anti-aliasing redundancy tolerance. The theoretical safe period and the engineering hardware anti-aliasing redundancy tolerance are added together, and the result is used to determine the preset sliding window step size.

[0043] It is worth noting that, according to the preset sliding window step size, independent data windows are sequentially divided on the instantaneous current sequence. The arithmetic mean of all current sample values ​​within each data window is calculated, and all arithmetic means are arranged in chronological order to obtain the average current sequence. All current sample values ​​within each data window are traversed, and the largest value is recorded as the fluctuation peak. Using the fluctuation peak as the dividend and the target current parameter as the divisor, numerical division is performed to obtain the first ratio; using the arithmetic mean within the data window as the dividend and the target current parameter as the divisor, numerical division is performed to obtain the second ratio; a weighted summation operation is then performed on the first and second ratios using preset weighting coefficients.

[0044] It should be noted that the method for determining the preset weighting coefficients is as follows: Under an isolated calibration environment, analyze the contribution ratio of the partial derivatives of current peak transients and mean offsets to the energy efficiency loss of SD NAND memory chips in historical operating data; perform proportional normalization processing on the contribution ratios of the partial derivatives to a sum of one, obtaining a weight value reflecting the peak weight (e.g., 0.4) and a weight value reflecting the mean weight (e.g., 0.6), which are then determined as the preset weighting coefficients. The above calculation process generates dimensionless ratio characteristics. By introducing the target current parameter as a normalization benchmark, the relative deviation between the actual current transient and the expected system power supply is accurately characterized.

[0045] For example, regarding the specific construction and hyperparameter optimization process of the pre-built power consumption model, in an isolated test environment, real operation logs recorded by smart glasses over three consecutive natural months at a sampling frequency of one hertz were collected. Over 100,000 ratio feature samples containing different operating conditions and real energy efficiency values ​​measured simultaneously using precision instruments were extracted to construct a supervised learning training set. An initial model architecture was established using a support vector regression algorithm based on radial basis function kernels. A grid search was performed in the multi-dimensional feature space using a five-fold cross-validation algorithm, setting the minimization of the root mean square error as the model optimization objective. The penalty parameters and kernel function parameters in the support vector regression algorithm were combined and optimized. The optimal hyperparameter combination after convergence was solidified with the model neuron weights to generate the pre-built power consumption model. The real-time calculated ratio features were used as independent variables input to the pre-built power consumption model to perform forward mapping derivation, outputting predicted real-time energy efficiency data. Continuous real-time energy efficiency data were combined to generate an efficiency change sequence.

[0046] In step S15, the correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence is calculated to obtain the correlation degree value, and the dynamic switching threshold is obtained by performing tolerance algebra operation on the correlation degree value.

[0047] The process of calculating the correlation coefficient between the efficiency change sequence and a preset efficiency benchmark sequence to obtain the correlation degree value includes: The correlation coefficient is calculated using the Pearson correlation coefficient algorithm to obtain the correlation degree value between the efficiency change sequence and the preset efficiency benchmark sequence.

[0048] In one implementation, a preset efficiency benchmark sequence is extracted. The process of constructing the preset efficiency benchmark sequence is as follows: during the device factory calibration stage, the constant energy consumption efficiency evolution data of the device under a standard continuous video recording task is recorded; a Gaussian smoothing filter operation is performed on the constant energy consumption efficiency evolution data to generate a smooth one-dimensional reference array; the one-dimensional reference array is fixed in the local configuration register and determined as the preset efficiency benchmark sequence.

[0049] It should be noted that the Pearson correlation coefficient algorithm is used to calculate the efficiency variation sequence and the preset efficiency benchmark sequence. To eliminate the dimensional differences caused by multi-source physical acquisition, Z-score standardization is performed on the efficiency variation sequence and the preset efficiency benchmark sequence respectively, resulting in a first standard sequence and a second standard sequence with a mean of zero and a standard deviation of one. The inner product of the centered data of the first standard sequence and the second standard sequence is calculated and divided by the sequence length to obtain the covariance value. The covariance value is divided by the product of the standard deviations of the first standard sequence and the second standard sequence to output a scalar value. The absolute value of the scalar value is extracted and directly assigned to determine the correlation degree value.

[0050] The dynamic switching threshold is obtained by performing tolerance algebra operations on the correlation degree values, including: If the correlation value meets the preset stability tolerance range, extract the load rate node corresponding to the correlation value; The dynamic switching threshold is obtained by algebraically adding the load rate node and the preset switching error.

[0051] In one implementation, it is determined whether the correlation degree value falls within a preset stability tolerance interval. The preset stability tolerance interval is determined by statistically analyzing the distribution of correlation degree values ​​during historical fault-free operation cycles using the maximum likelihood estimation method. The upper and lower limits of the probability density function of the correlation degree value distribution, with a confidence level of 95%, are calculated, and these upper and lower limits are defined as the preset stability tolerance interval. If the correlation degree value is greater than the lower limit of the preset stability tolerance interval but less than the upper limit, then the correlation degree value is determined to conform to the preset stability tolerance interval.

[0052] It is worth noting that after confirmation, the calculated correlation value is entered into the pre-established correlation-load ratio mapping lookup table. The construction process of the correlation-load ratio mapping lookup table involves collecting historical full-lifecycle operating data of the device while offline, calculating the actual correlation evolution value under each known workload ratio, and creating one-to-one key-value pairs between the actual correlation evolution value and the known workload ratio, storing them as the correlation-load ratio mapping lookup table. This embodiment uses a binary search algorithm to retrieve the historical workload ratio feature with the smallest absolute difference from the current correlation value, extracting and identifying the historical workload ratio feature as the load ratio node.

[0053] For example, a preset switching error is obtained. This preset switching error is calculated based on physical hardware response parameters. The sampling delay constant of the analog-to-digital converter and the gate switching time of the power management chip are extracted. The sampling delay constant and gate switching time are algebraically added together and multiplied by the system reference load slope. The resulting deviation compensation is the preset switching error. The load rate node value is algebraically added to the preset switching error, and a corrected load ratio point is output. This corrected load ratio point is then determined as the dynamic switching threshold.

[0054] It should be noted that if the correlation value does not meet the preset stability tolerance range, the dynamic switching threshold calculated at the previous moment will remain unchanged; if it is the first run and there is no historical threshold, the preset default threshold will be determined as the dynamic switching threshold, and the default threshold is equal to the low power cut-in load rate reference value recommended in the chip datasheet.

[0055] In step S16, the dynamic switching threshold and the preset scene feature library are used to perform weight allocation to obtain a logical execution sequence, and the working state of the storage chip is adjusted according to the logical execution sequence.

[0056] The logical execution sequence is obtained by weighting the dynamic switching threshold with a preset scene feature library, including: The difference between the dynamic switching threshold and the baseline feature in the preset scene feature library is calculated to obtain the baseline difference value; The initial control logic is divided into logic control nodes based on the aforementioned benchmark difference. Node weights are assigned to the logical control nodes according to preset allocation rules; The initial control logic is weighted using the node weights to obtain the logic execution sequence.

[0057] In one implementation, a pre-defined scene feature library is extracted and stored in non-volatile memory. The construction process of the pre-defined scene feature library involves collecting the operating status logs of the smart glasses throughout their complete historical lifecycle and extracting the daily average load rate and average power consumption values ​​from these logs. To eliminate the influence of different physical dimensions on the clustering results, the daily average load rate and average power consumption value sequences are subjected to min-max normalization processing, and the processed values ​​are combined to form dimensionless two-dimensional feature vectors. The K-Means clustering algorithm is used to perform unsupervised classification processing on a large number of two-dimensional feature vectors, converging to obtain three independent data clusters: light load, medium load, and heavy load. The arithmetic mean of the coordinates of all two-dimensional feature vectors within each data cluster is calculated to obtain the cluster center, and the set of two-dimensional feature values ​​corresponding to the cluster center is determined as the baseline feature. The classification labels of all data clusters are bound to the corresponding baseline features, thus solidifying and generating the pre-defined scene feature library.

[0058] It should be noted that the process involves obtaining the current system's operating environment parameters, matching the corresponding target scene label in a preset scene feature library, and extracting the baseline features bound to the target scene label. The average load rate value in the baseline features is used as the minuend, and the dynamic switching threshold calculated in the previous steps is used as the subtrahend. An arithmetic subtraction calculation is performed, and the absolute value of the result is taken as the dimensionless baseline difference.

[0059] In one implementation, the initial control logic pre-configured by the underlying hardware is obtained. The initial control logic is a one-dimensional control instruction timeline sequence, including sequentially arranged frequency reduction instructions, bus suspension instructions, and deep sleep initiation instructions. This embodiment extracts the minimum base clock cycle parameter of the system's underlying control bus, for example, setting it to 1.0 milliseconds as a preset segmentation constant. The preset segmentation constant with time dimensions is divided by a dimensionless reference difference value to output a time step parameter with time dimensions. The timeline sequence containing the initial control logic is truncated at equal intervals according to the time step parameter into multiple independent execution intervals, and each independent execution interval is determined as a logic control node. If the dynamic switching threshold is equal to the reference characteristic, resulting in a reference difference of zero, the time step parameter is set to a preset maximum safe step size, which is equal to the minimum base clock cycle parameter of the system control bus. Simultaneously, the truncated operation of the initial control logic is skipped, maintaining the original execution order of the initial control logic.

[0060] It is worth noting that node weights are assigned to the logic control nodes according to a preset allocation rule. The preset allocation rule is determined by statistically analyzing the absolute decrease in power consumption resulting from hardware control actions in each independent execution interval during historical offline testing. This absolute decrease in power consumption is used as the dividend, and the total decrease in overall system power consumption is used as the divisor to perform numerical division, yielding standard proportional parameters. The mapping relationship library composed of these standard proportional parameters is then set as the preset allocation rule. In this embodiment, all the segmented logic control nodes are traversed, and matching standard proportional parameters are queried from the preset allocation rule. The extracted standard proportional parameters are directly assigned and determined as node weights.

[0061] For example, a weighted operation is performed on the initial control logic using node weights to obtain the logic execution sequence. Specifically, the original voltage drop parameters and original time delay parameters corresponding to each logic control node in the initial control logic are extracted. Each node weight is used as a scalar multiplier and multiplied numerically with the corresponding original voltage drop parameters and original time delay parameters to generate target voltage drop parameters and target time delay parameters. All generated target voltage drop parameters and target time delay parameters are concatenated and combined in time-axis order to output the generated logic execution sequence. The logic execution sequence is converted into a hardware level trigger signal and sent to the power management module. By adjusting the power supply pin voltage and chip select signal frequency of the SD NAND flash memory chip, the physical level switching of the memory chip's operating state is completed.

[0062] In summary, this invention precisely quantifies the microscopic matching degree between the transient power supply of the memory chip and instruction scheduling by extracting synchronous features from power supply voltage and instruction frequency data. By introducing a pre-trained timing prediction model, it abandons traditional static empirical estimation and achieves high-fidelity forward-looking inference of the microscopic transient workload trend of the memory channel. Furthermore, by combining power supply noise and rhythm stability data for weighted decision-making, a flexible power supply configuration scheme that balances anti-interference and precise power consumption reduction is formulated. Finally, by leveraging the efficiency mapping and statistical correlation analysis mechanism of instantaneous current, the system is given the ability to dynamically anchor the optimal switching threshold and autonomously allocate control weights according to the application scenario. This invention completely breaks through the limitations of traditional smart glasses that rely on microcontrollers for extensive, passive, and lagging global one-size-fits-all black-box power management. It achieves forward-looking and refined power supply control of SD NAND memory chips under complex and variable operating conditions, maximizing the reduction of invalid power loss during system buffer periods and avoiding underlying instruction response delays, while greatly improving the overall battery life physical limit and system operational stability of smart glasses.

[0063] Reference Figure 2 The second embodiment of the present invention provides a low-power control system for smart glasses based on SD NAND memory chips, comprising: The synchronous evaluation module is used to acquire power supply voltage data and command frequency data, and to perform synchronous alignment processing on the power supply voltage data and the command frequency data to obtain a matching degree value. The load prediction module is used to obtain the state switching duration and the peak instruction interval. If the matching degree value is lower than the preset matching threshold, the pre-trained time series prediction model is used to predict the state switching duration and the peak instruction interval to obtain the load change sequence. A configuration generation module is used to acquire power supply noise and rhythm stability data, and to perform weighted calculations on the load change sequence, the power supply noise and the rhythm stability data to obtain a power supply configuration scheme; The efficiency deduction module is used to obtain the instantaneous current sequence and, in conjunction with the power supply configuration scheme, perform efficiency mapping modeling on the instantaneous current sequence to obtain the efficiency change sequence; The threshold reconstruction module is used to calculate the correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence to obtain the correlation degree value, and to perform tolerance algebra operation on the correlation degree value to obtain the dynamic switching threshold. The strategy execution module is used to obtain a logical execution sequence by weighting the dynamic switching threshold and the preset scene feature library, and to adjust the working state of the storage chip according to the logical execution sequence.

[0064] It should be noted that the low-power control system for smart glasses based on SD NAND memory chips provided in this embodiment of the invention is used to execute all the process steps of the low-power control method for smart glasses based on SD NAND memory chips in the above embodiment. The working principles and beneficial effects of the two are one-to-one, so they will not be described again.

[0065] It should be noted that the system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Furthermore, in the accompanying drawings of the system embodiments provided by this invention, the connection relationships between modules indicate that they have communication connections, which can be specifically implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement this without any creative effort.

[0066] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A low-power control method for smart glasses based on SD NAND memory chips, characterized in that, include: Acquire power supply voltage data and command frequency data, and perform synchronization alignment processing on the power supply voltage data and the command frequency data to obtain a matching degree value; The state transition duration and instruction peak interval are obtained. If the matching degree value is lower than the preset matching threshold, the load change sequence is obtained by using a pre-trained time series prediction model to predict the state transition duration and instruction peak interval. Obtain power supply noise and rhythm stability data, and perform weighted calculations on the load change sequence, power supply noise, and rhythm stability data to obtain a power supply configuration scheme; Obtain the instantaneous current sequence, and combine it with the power supply configuration scheme to perform efficiency mapping modeling on the instantaneous current sequence to obtain the efficiency change sequence; The correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence is calculated to obtain the correlation degree value, and the dynamic switching threshold is obtained by performing tolerance algebra operation on the correlation degree value. The dynamic switching threshold and the preset scene feature library are used to perform weight allocation to obtain a logical execution sequence, and the working state of the storage chip is adjusted according to the logical execution sequence.

2. The low-power control method for smart glasses based on SD NAND memory chips according to claim 1, characterized in that, The process of synchronizing and aligning the power supply voltage data and the command frequency data to obtain a matching degree value includes: Perform a time alignment operation on the power supply voltage data and the command frequency data to obtain a phase difference sequence; A mapping model between the phase difference sequence and the preset instruction delay data is constructed using a linear regression algorithm; The correlation coefficient of the mapping model is extracted as the matching degree value.

3. The low-power control method for smart glasses based on SD NAND memory chips according to claim 1, characterized in that, The step of using a pre-trained time-series prediction model to predict the state transition duration and the peak interval of the instruction to obtain the load change sequence includes: Perform a difference operation on the state switching duration and the peak interval of the instruction to obtain a change feature sequence; If the fluctuation amplitude of the change feature sequence is greater than the preset fluctuation threshold, the evolution nodes of the change feature sequence are extracted to obtain the prediction benchmark. The prediction benchmark is input into the pre-trained time series prediction model to obtain the prediction duration sequence and the prediction interval sequence; The load change sequence is obtained by weighting and summing the predicted duration sequence and the predicted interval sequence using preset weight parameters.

4. The low-power control method for smart glasses based on SD NAND memory chips according to claim 1, characterized in that, The weighted calculation of the load change sequence, the power supply noise, and the rhythm stability data to obtain the power supply configuration scheme includes: The power supply noise and the rhythm stability data are normalized to obtain standard noise and standard rhythm. The adjustment index is obtained by performing a weighted summation calculation on the load change sequence, the standard noise, and the standard rhythm using preset decision coefficients; The target voltage and target current are extracted by performing a query operation in a preset parameter library using the adjustment index to obtain the power supply configuration scheme.

5. The low-power control method for smart glasses based on SD NAND memory chips according to claim 1, characterized in that, The efficiency change sequence is obtained by performing efficiency mapping modeling on the instantaneous current sequence in conjunction with the power supply configuration scheme, including: Extract the target current parameters from the power supply configuration scheme, perform averaging on the instantaneous current sequence according to the preset sliding window step size to obtain the average current sequence, and extract the fluctuation peak value of the instantaneous current sequence. Calculate the first ratio of the fluctuation peak value to the target current parameter, calculate the second ratio of the average current sequence to the target current parameter, and perform a weighted summation operation on the first ratio and the second ratio to obtain the ratio feature; The efficiency change sequence is obtained by inputting the ratio feature into a pre-constructed power consumption model for extrapolation and calculation.

6. The low-power control method for smart glasses based on SD NAND memory chips according to claim 1, characterized in that, The calculation of the correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence to obtain the correlation value includes: The correlation coefficient is calculated using the Pearson correlation coefficient algorithm to obtain the correlation degree value between the efficiency change sequence and the preset efficiency benchmark sequence.

7. The low-power control method for smart glasses based on SD NAND memory chips according to claim 1, characterized in that, The step of performing tolerance algebra operations on the correlation degree value to obtain the dynamic switching threshold includes: If the correlation value meets the preset stability tolerance range, extract the load rate node corresponding to the correlation value; The dynamic switching threshold is obtained by algebraically adding the load rate node and the preset switching error.

8. The low-power control method for smart glasses based on SD NAND memory chips according to claim 1, characterized in that, The step of obtaining a logical execution sequence by weighting the dynamic switching threshold with a preset scene feature library includes: The difference between the dynamic switching threshold and the baseline feature in the preset scene feature library is calculated to obtain the baseline difference value; The initial control logic is divided into logic control nodes based on the aforementioned benchmark difference. Node weights are assigned to the logical control nodes according to preset allocation rules; The initial control logic is weighted using the node weights to obtain the logic execution sequence.

9. A low-power control system for smart glasses based on SD NAND memory chips, characterized in that, include: The synchronous evaluation module is used to acquire power supply voltage data and command frequency data, and to perform synchronous alignment processing on the power supply voltage data and the command frequency data to obtain a matching degree value. The load prediction module is used to obtain the state switching duration and the peak instruction interval. If the matching degree value is lower than the preset matching threshold, the pre-trained time series prediction model is used to predict the state switching duration and the peak instruction interval to obtain the load change sequence. A configuration generation module is used to acquire power supply noise and rhythm stability data, and to perform weighted calculations on the load change sequence, the power supply noise and the rhythm stability data to obtain a power supply configuration scheme; The efficiency deduction module is used to obtain the instantaneous current sequence and, in conjunction with the power supply configuration scheme, perform efficiency mapping modeling on the instantaneous current sequence to obtain the efficiency change sequence; The threshold reconstruction module is used to calculate the correlation coefficient between the efficiency change sequence and the preset efficiency benchmark sequence to obtain the correlation degree value, and to perform tolerance algebra operation on the correlation degree value to obtain the dynamic switching threshold. The strategy execution module is used to obtain a logical execution sequence by weighting the dynamic switching threshold and the preset scene feature library, and to adjust the working state of the storage chip according to the logical execution sequence.

Images