A Machine Vision-Based Method for Automated Wafer Flipping and Positioning

Abstract

This invention relates to a machine vision-based method for automatic wafer flipping and positioning. A panoramic area scan camera is mounted on the back side of the load port to acquire wafer images and transmit them to a host PC. The system employs traditional algorithms such as Gray-Level Co-occurrence Matrix (GLCM), Canny edge detection, and Hough transform, combined with a Convolutional Neural Network (CNN), to achieve wafer front and back recognition, contour localization, and grinding quality assessment. When the robot grasps the wafer, the system automatically identifies the grasping surface. If it is the front side, the system controls the robot to adjust the wafer orientation via a flipping mechanism, ensuring that the wafer enters the subsequent process with the back side facing up. This method enables automatic wafer inspection, positioning, and quality monitoring before and after grinding, with a positioning accuracy of ±0.01mm and a front and back recognition accuracy of ≥99.8%, significantly improving the automation level and production efficiency of semiconductor manufacturing.

Description

Technical Field

[0001] This invention relates to the field of semiconductor processing technology, and in particular to a processing method for automatic wafer flipping and positioning based on machine vision. Background Technology

[0002] In the back-side polishing process of semiconductor wafers, the current loading process generally relies on manual placement of wafers face-up in the hopper. When the robot subsequently picks up the wafer from above, the gripping surface is the front side. After the flipping mechanism turns the wafer face-down, the robot's ceramic gripper is located below, making it impossible to remove the gripper when placing the wafer onto the positioning plate, severely impacting process smoothness. Furthermore, existing technologies lack an automatic wafer front / back identification mechanism, and pre-polishing inspection and post-polishing measurement largely rely on manual operation. This is not only costly and inefficient but also prone to errors in judgment and quality inspection oversights, failing to meet the high-precision, highly automated production requirements of semiconductor manufacturing. Summary of the Invention

[0003] The purpose of this invention is to provide a processing method for automatic wafer flipping and positioning based on machine vision, so as to solve the problems existing in the prior art.

[0004] To achieve the above objectives, the present invention provides the following technical solution: A machine vision-based automated wafer flipping and positioning processing system package includes: The load port is an automated control device for storing wafers. Robots with grippers equipped with flipping mechanisms are used to grasp, flip, and place wafers; At least two panoramic area array cameras are mounted next to the ion bar on the back side of the Load Port for acquiring wafer image information; The host PC is connected to the panoramic area array camera via a Fast Ethernet interface to receive and process image data. Professional image processing software, running on the host PC, is used to extract regions of interest, analyze and determine the wafer state, and control the robot to perform corresponding actions.

[0005] Based on the above technical solutions, the present invention also provides the following optional technical solutions: In one alternative: the opening size of the robot's gripper front end is enlarged to accommodate the wafer gripping and placement requirements.

[0006] In one alternative: the panoramic area scan camera is a Basler area scan camera.

[0007] A machine vision-based method for automatic wafer flipping and positioning, characterized by the following steps: When the robot gripper picks up the wafer from the Load Port and passes under the panoramic area array camera, the panoramic area array camera acquires wafer image information. The wafer image information is transmitted to the host PC via a Fast Ethernet interface; The host PC uses professional image processing software to extract the region of interest and analyze and determine the wafer status; Based on the analysis results, if it is determined that the current robot gripper is grasping the front side of the wafer, then the robot is controlled to take the wafer out to the designated position, and the wafer is flipped over by the flipping mechanism so that the back side of the wafer is facing up before being placed into the material box. The robot gripper re-enters the hopper, grabs the back of the wafer from above, and places the wafer onto the positioning plate for subsequent processing.

[0008] In one alternative approach: the region of interest includes at least one of the following image information, and the professional image processing software employs a corresponding processing algorithm: Image information used to distinguish between integrated circuit surfaces and polished surfaces on wafers: A feature extraction algorithm is used to identify regularly distributed lattice structures, including: The Gray-Level Co-occurrence Matrix (GLCM) extracts texture features and calculates contrast, correlation, energy, and homogeneity. After removing noise using Gaussian filtering, the Canny edge detection algorithm is applied to extract edge features; Fourier descriptor analysis of image periodicity based on template matching; Alternatively, deep learning algorithms can be used to train a convolutional neural network (CNN) to distinguish between the front integrated circuit pattern and the back grinding texture; Wafer contour image information: Contour extraction and localization are performed using morphological processing combined with Hough transform, including: Otsu threshold segmentation method separates wafer regions from the background; Mathematical morphological operations (dilation, erosion) fill holes and smooth edges; Use Hough transform to detect circular contours and calculate the center coordinates and radius. Subpixel-level edge detection algorithms improve contour localization accuracy to ±0.01mm; Image information of the polished surface after wafer polishing: Polishing quality is evaluated using a surface defect detection algorithm, including: Local Binary Pattern (LBP) is used to extract surface micro-texture features; Gaussian Mixture Model (GMM) segments normal regions from defective regions; Grayscale value statistical analysis is used to detect surface defects such as scratches and dents. Alternatively, semantic segmentation can be performed using a trained U-Net network to identify different types of grinding defects.

[0009] In one alternative: the step of analyzing and judging the wafer state includes: identifying whether there is a regularly distributed lattice structure in the wafer image; if so, it is determined to be the front side of the wafer; otherwise, it is determined to be the back side of the wafer.

[0010] In one alternative: the opening size at the front end of the robot gripper is enlarged to ensure that the gripper can be easily retrieved when placing the wafer onto the positioning disk.

[0011] In one alternative: the panoramic area array camera is mounted next to the ion bar on the back side of the Load Port to avoid interference from the ion bar with the camera imaging.

[0012] In one alternative embodiment, the method further includes: after wafer grinding, acquiring wafer grinding surface image information using the panoramic area array camera; and using the professional image processing software to analyze the grinding surface image information and evaluate the wafer grinding quality.

[0013] In one alternative approach, the method further includes: acquiring wafer outline image information using the panoramic area array camera; and locating the notch on the wafer based on the wafer outline image information.

[0014] By adopting the above technical solution, the present invention has the following beneficial effects: Achieving automated production: Changing the traditional mode of manually placing wafers and manually inspecting them, the system consists of an automatic control box device, a robot with a flipping mechanism, a panoramic area array camera, and a host PC. The process of inspecting wafers before grinding and measuring wafers after grinding is incorporated into the automated process, which greatly reduces manual intervention, improves production efficiency, and reduces labor costs.

[0015] Improved recognition and positioning accuracy: By using algorithms such as gray-level co-occurrence matrix, Canny edge detection, and Hough transform, combined with deep learning technologies such as convolutional neural networks, the front and back sides of the wafer can be accurately identified with a positioning accuracy of ±0.01mm and a front and back recognition accuracy of ≥99.8%. This can effectively avoid subsequent processing problems caused by incorrect wafer placement orientation, and ensure processing accuracy and product quality. Attached Figure Description

[0016] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the overall structure of the robot gripper of the present invention.

[0018] Figure 2 This is a schematic diagram of the thin wafer cassette structure of the present invention.

[0019] Figure 3 This is a communication architecture diagram of the present invention. Detailed Implementation

[0020] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] The left, right, up, and down positions of the various components shown in the attached diagram are just one arrangement method; the specific positions should be set according to specific needs.

[0022] 1. Hardware system deployment Load Port Layout: Load Port devices using the ASM FAB-e system are equipped with a standard FOUP wafer cassette interface to enable automatic transfer and storage of wafers.

[0023] Robot configuration: The KUKA KR AGILUS six-axis robot is selected, with the gripper front opening enlarged to 75% of the wafer diameter (e.g., a 225mm opening for a 300mm wafer). The material is low-magnetic aluminum alloy to ensure gripping stability.

[0024] Camera installation: Install a Basler aceac A2040-90um area array camera next to the ion bar on the back side of each of the two Load Ports. The camera is equipped with a 12mm focal length lens, a working distance of 300mm, and a field of view covering the entire wafer diameter.

[0025] Light source system: adopts coaxial ring LED light source with wavelength of 525nm (green light) and luminous intensity of 1000 lux to ensure image acquisition clarity.

[0026] 2. Image processing algorithm implementation The following image processing algorithms are used to analyze and process the key image information in the automatic wafer flipping and positioning process: Distinguishing between the integrated circuit surface and the polished surface of a wafer: First, the acquired wafer image is preprocessed, using Gaussian filtering to remove noise and reduce the impact of interference on subsequent processing. Then, the Otsu thresholding method is used, automatically calculating the optimal threshold based on the image's gray-level distribution characteristics to segment the wafer image into foreground and background, highlighting the main wafer portion. Next, gray-level co-occurrence matrix (GLCM) is used to extract texture features. By calculating parameters such as contrast, correlation, energy, and homogeneity, the roughness and directionality of the wafer surface texture are quantified. The Canny edge detection algorithm is used to accurately extract edge information from the wafer surface, analyzing the shape and distribution of edges. Using template-matching-based Fourier descriptors, the wafer surface pattern is converted into frequency domain features to analyze its periodicity and regularity. In addition, deep learning algorithms can be used to build a convolutional neural network (CNN) model, trained on a large amount of labeled wafer front (with integrated circuits) and back (polished surface) image data, enabling the model to learn the feature differences between the two and achieve accurate identification of the front and back of the wafer.

[0027] Wafer contour image analysis: Image preprocessing is performed first, using the Otsu thresholding method to separate the wafer region from the background. Then, mathematical morphological operations such as dilation and erosion are used to fill the holes inside the wafer contour and smooth the contour edges, making the wafer contour clearer and more complete. Next, the Hough transform is used to detect the circular contour of the wafer. By voting on edge points in parameter space, the center coordinates and radius of the wafer are accurately calculated. A sub-pixel-level edge detection algorithm is employed to further improve the contour positioning accuracy to ±0.01mm, thus providing a reliable basis for precise wafer positioning.

[0028] Wafer Grinding Surface Quality Assessment: First, the Local Binary Pattern (LBP) algorithm is used to extract the micro-texture features of the wafer grinding surface, reflecting the surface roughness and uniformity. Then, a Gaussian Mixture Model (GMM) is used to segment the image, distinguishing normal areas from areas potentially containing defects. Next, statistical analysis of the image's grayscale values ​​is performed, and reasonable thresholds are set to detect surface defects such as scratches and pits. Alternatively, a pre-trained U-Net network, a semantic segmentation model, can be used. Trained on a large number of post-grinding wafer images, it can identify different types of grinding defects, such as micro-scratches and deep pits, thus providing a comprehensive and accurate assessment of wafer grinding quality. 3. System Workflow Initialization: Start the Load Port, robot, and camera system, and load the pre-trained SVM model.

[0029] Image acquisition: When the robot gripper picks up the wafer and passes under the camera, image acquisition is triggered. The exposure time is set to 20ms and the gain is 12dB.

[0030] Front and back recognition: Call the detect_orientation method. If it is determined to be front, the robot will perform a flipping process; if it is back, it will be placed directly on the positioning disk.

[0031] Wafer positioning: The wafer profile is detected by Hough transform, and the center coordinates and notch position are calculated, with a positioning accuracy of ±0.01mm.

[0032] Grinding quality inspection: Images are acquired again after grinding, and the surface texture is analyzed using the LBP algorithm to identify scratches and pits ≥50μm. 4. Experimental Data Test Project accuracy Processing time False positive rate Wafer front and back identification 99.8% ≤200ms 0.2% Notch positioning accuracy ±0.008mm ≤150ms - Grinding defect detection 98.5% ≤300ms 1.5% The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for automatic wafer flipping and positioning based on machine vision, characterized in that, Includes the following steps: Step 1: When the robot gripper picks up the wafer from the Load Port and passes under the panoramic area array camera, the panoramic area array camera acquires wafer image information; Step 2: Transmit the wafer image information to the host PC via a Fast Ethernet interface; Step 3: The host PC uses professional image processing software to extract the region of interest and analyze and determine the wafer condition; Step 4: Based on the analysis results, if it is determined that the current robot gripper is holding the front side of the wafer, then control the robot to take the wafer out to the designated position, and flip the wafer through the flipping mechanism so that the back side of the wafer is facing up before putting it into the material box. Step 5: The robot gripper re-enters the material box, picks up the back of the wafer from above, and places the wafer onto the positioning plate for subsequent processing.

2. The wafer automatic flipping and positioning processing method based on machine vision according to claim 1, characterized in that, The region of interest includes at least one of the following image information, and the professional image processing software employs the corresponding processing algorithm.

3. The wafer automatic flipping and positioning processing method based on machine vision according to claim 2, characterized in that, The processing algorithm specifically includes: Image information used to distinguish between integrated circuit surfaces and polished surfaces on wafers: A feature extraction algorithm is used to identify regularly distributed lattice structures, including: Gray-level co-occurrence matrix (GLCM) extracts texture features and calculates contrast, correlation, energy, and homogeneity; After removing noise using Gaussian filtering, the Canny edge detection algorithm is applied to extract edge features; Fourier descriptor analysis of image periodicity based on template matching; Alternatively, deep learning algorithms can be used to train a convolutional neural network (CNN) to distinguish between the front integrated circuit pattern and the back grinding texture; Wafer contour image information: Contour extraction and localization are performed using morphological processing combined with Hough transform, including: Otsu threshold segmentation method separates wafer regions from the background; Mathematical morphological operations (dilation, erosion) fill holes and smooth edges; Hough transform is used to detect circular contours and calculate the center coordinates and radius. Subpixel-level edge detection algorithms improve contour localization accuracy to ±0.01mm; Image information of the polished surface after wafer polishing: Polishing quality is evaluated using a surface defect detection algorithm, including: Local Binary Pattern (LBP) is used to extract surface micro-texture features; Gaussian mixture model (GMM) is used to segment normal regions and defective regions; Grayscale value statistical analysis is used to detect surface defects such as scratches and dents. Alternatively, semantic segmentation can be performed using a trained U-Net network to identify different types of grinding defects.

4. The wafer automatic flipping and positioning processing method based on machine vision according to claim 1, characterized in that, The steps for analyzing and determining the wafer state include: identifying whether there is a regularly distributed lattice structure in the wafer image; if so, it is determined to be the front side of the wafer; otherwise, it is determined to be the back side of the wafer.

5. The wafer automatic flipping and positioning processing method based on machine vision according to claim 1, characterized in that, The opening size at the front end of the robot gripper is enlarged to ensure that the gripper can be easily removed when placing the wafer onto the positioning disk.

6. The wafer automatic flipping and positioning processing method based on machine vision according to claim 1, characterized in that, The panoramic area array camera is mounted next to the ion bar on the back side of the Load Port to avoid interference from the ion bar with the camera imaging.

7. The wafer automatic flipping and positioning processing method based on machine vision according to claim 1, characterized in that, The method further includes: after wafer grinding, acquiring wafer grinding surface image information through the panoramic area array camera; and using the professional image processing software to analyze the grinding surface image information and evaluate the wafer grinding quality.

8. The wafer automatic flipping and positioning processing method based on machine vision according to claim 1, characterized in that, It also includes: acquiring wafer outline image information using the panoramic area array camera; and locating the notch on the wafer based on the wafer outline image information.

Images