Data recovery method, device, controller, storage medium and program product

Abstract

This disclosure relates to the field of storage device technology, and discloses a data recovery method, apparatus, controller, storage medium, and program product. The method includes: in response to an abnormal power loss recovery command, acquiring a target logical partition in a solid-state drive (SSD) that has not been written to the disk; determining first data in the target logical partition that has not been written to flash memory; writing the first data to a target cache area, and recording the address mapping relationship between the first data in the target logical partition and the target cache area; and writing the first data to flash memory based on the address mapping relationship. This disclosure can solve the problem of slow data recovery when a partition namespace SSD experiences an abnormal power loss.

Description

Technical Field

[0001] This disclosure relates to the field of storage device technology, specifically to data recovery methods, apparatus, controllers, storage media, and software products. Background Technology

[0002] When a Zoned Namespace SSD (ZNS SSD) experiences an abnormal power loss, some data may not have been written to the NAND flash memory. In related technologies, when a Zoned Namespace SSD experiences an abnormal power loss, the system first uses information saved during the power loss process to determine which logical partitions' data was not written to disk. Then, the data in the superblock corresponding to these unwritten logical partitions is moved to a new superblock. However, in these technologies, data recovery for the unwritten logical partitions is performed sequentially, resulting in slow data recovery when a Zoned Namespace SSD experiences an abnormal power loss. Summary of the Invention

[0003] In view of this, this disclosure provides a data recovery method, apparatus, controller, storage medium, and program product to solve the problem of slow data recovery when a partition namespace solid-state drive experiences an abnormal power loss.

[0004] In a first aspect, this disclosure provides a data recovery method, the method comprising:

[0005] In response to an abnormal power failure recovery command, retrieve the target logical partition that has not been written to the solid-state drive;

[0006] Identify the first data in the target logical partition that has not been written to the flash memory;

[0007] Write the first data into the target cache area and record the address mapping relationship of the first data in the target logical partition and the target cache area;

[0008] The first data is written to the flash memory based on the address mapping relationship.

[0009] Secondly, this disclosure provides a data recovery apparatus, the apparatus comprising:

[0010] The command response module is used to respond to abnormal power failure recovery commands and obtain the target logical partition that has not been written to the solid-state drive;

[0011] The first calculation module is used to determine the first data in the target logical partition that has not been written to the flash memory;

[0012] The second processing module is used to write the first data into the target cache area and record the address mapping relationship of the first data in the target logical partition and the target cache area;

[0013] The data writing module is used to write the first data into the flash memory based on the address mapping relationship.

[0014] Thirdly, this disclosure provides a controller for a solid-state drive, including: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to perform the aforementioned data recovery method.

[0015] Fourthly, this disclosure provides a computer-readable storage medium storing computer instructions for causing a computer to perform the above-described data recovery method.

[0016] Fifthly, this disclosure provides a computer program product, including computer instructions for causing a computer to execute the above-described data recovery method.

[0017] The data recovery method provided in this disclosure, in response to an abnormal power loss recovery command, acquires the target logical partition in the solid-state drive (SSD) that has not been written to the flash memory. Then, it identifies the first data in the target logical partition that has not been written to the flash memory, writes the first data to a target cache area, and records the address mapping relationship between the first data in the target logical partition and the target cache area. Therefore, it is possible to read the first data in the target logical partition that has not been written to the flash memory from the target cache area through the address mapping relationship, and then write the first data to the flash memory. Simultaneously, during the process of writing the first data to the flash memory, it is not necessary to wait for the front-end of the SSD controller to sequentially process the first data of the unwritten target logical partition. It is possible to utilize the target cache area and the address mapping relationship to achieve concurrent writing of the first data of multiple target logical partitions, improving data recovery efficiency, effectively shortening the recovery time of abnormal power loss data from the SSD, and thus reducing the impact of SSD power loss on normal business operations. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the specific embodiments of this disclosure or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1This is a schematic flowchart of a first data recovery method according to an embodiment of the present disclosure;

[0020] Figure 2 This is a schematic diagram of a controller for a partitioned namespace solid-state drive according to an embodiment of the present disclosure;

[0021] Figure 3 This is a flowchart illustrating a second data recovery method according to an embodiment of the present disclosure;

[0022] Figure 4 This is a data storage schematic diagram of a flash memory according to an embodiment of the present disclosure;

[0023] Figure 5 This is a data storage diagram of a partitioned namespace solid-state drive according to an embodiment of the present disclosure;

[0024] Figure 6 This is a structural block diagram of a data recovery apparatus according to an embodiment of the present disclosure;

[0025] Figure 7 This is a structural block diagram of a solid-state drive controller according to an embodiment of the present disclosure. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0027] It is understood that before using the technical solutions disclosed in the various embodiments of this disclosure, users should be informed of the types, scope of use, and usage scenarios of the personal information involved in this disclosure in an appropriate manner in accordance with relevant laws and regulations, and user authorization should be obtained.

[0028] For example, upon receiving a user's active request, a prompt message is sent to the user to explicitly inform them that the requested operation will require the acquisition and use of the user's personal information. This allows the user to independently choose, based on the prompt message, whether to provide personal information to the software or hardware such as the solid-state drive controller, application program, server, or storage medium performing the operations of this disclosed technical solution.

[0029] As an optional but non-limiting implementation, in response to a user's active request, sending a prompt message to the user could be done via a pop-up window, where the prompt message could be presented in text format. Furthermore, the pop-up window could also include a selection control allowing the user to choose "agree" or "disagree" to provide personal information to the solid-state drive's controller.

[0030] It is understood that the above notification and user authorization process are merely illustrative and do not constitute a limitation on the implementation of this disclosure. Other methods that comply with relevant laws and regulations may also be applied to the implementation of this disclosure.

[0031] It is understood that the data involved in this technical solution (including but not limited to the data itself, the acquisition or use of the data) shall comply with the requirements of relevant laws, regulations and related provisions.

[0032] A Zoned Namespace SSD (ZNS SSD) consists of multiple logical zones, each with three states: open, finished, and empty. When a logical zone is in the open state, data can be written to it. After data writing is complete, the logical zone enters the finished state, at which point no further data can be written. Resetting a finished logical zone erases all data within it, and the zone enters the empty state.

[0033] When a partition namespace SSD experiences an abnormal power loss, some data may remain unwritten to the NAND flash memory. In related technologies, when a partition namespace SSD experiences an abnormal power loss, the data in the SSD cache is first written to the SSD's single-level cell (SLC). The write speed for single-level cells is faster and relatively stable. Then, when the SSD is powered on again, the data in the single-level cell is restored to the SSD cache.

[0034] Specifically, after an abnormal power outage, the data recovery process for a partition namespace SSD is as follows: The front end (FE) of the SSD controller is responsible for organizing the data sent by the target device (host) and arranging the data according to a specific layout. The flash translation layer (FTL) is responsible for organizing and sending the data sent by the front end to the specified logical address. For the back end (BE), the back end writes the data corresponding to the logical address into the corresponding physical address.

[0035] In related technologies, for partitioned namespace solid-state drives (SSDs), data is sent sequentially to the target device. After receiving data from the target device, the front-end temporarily stores the data in a write cache. When the data in the write cache accumulates to a certain amount, such as 768KB, the front-end arranges the data in the write cache and then sends the arranged data to the flash translation layer in multiple batches, for example, four times, 192KB each time. After receiving the data from the front-end, the flash translation layer sends the received data to the specific superblock (SBLK), the flash memory's functional chip (die), and the data writing unit (word line) of the flash memory storage area. Typically, the flash translation layer sends data sequentially, and the data writing unit also writes data sequentially.

[0036] Specifically, when the backend receives a write command from the flash translation layer, it maps it to the superblock of the corresponding physical area and initiates the write command. After the data writing is complete, it returns a message indicating that the data writing is complete to the frontend, and the frontend releases the cache buffer. If the SSD experiences an abnormal power loss during the data writing process, it prevents new write commands from being executed. Upon detecting an abnormal power loss on the SSD, the backend will also immediately terminate the current write command, including the ongoing write process. Therefore, half-written data on a functional chip is reset, resulting in incomplete data that cannot be rewritten. Based on this, in related technologies, the frontend writes the unwritten data to a single-level cell during the abnormal power loss recovery process, and restores the data of the single-level cell to the write cache the next time the physical area of ​​the SSD is powered on.

[0037] In related technologies, data recovery from partitioned namespace solid-state drives includes the following process:

[0038] Step 1: Based on the valid information saved during the abnormal power outage, determine which logical partitions on the SSD did not have their data written to disk, and then perform abnormal power outage recovery on the logical partitions that were not written to disk. For example, if there are 32 logical partitions and 5 logical partitions need to be recovered, these 5 logical partitions are zone0, zone3, zone4, zone6, and zone10 in that order.

[0039] Process 2 begins with the first logical partition, zone0. The front end notifies the flash conversion layer to move the data of the superblock corresponding to zone0. Simultaneously, it initiates the consolidation of write cache data in zone0 and sends write information to the flash conversion layer based on the consolidated data. At this point, the flash conversion layer first reads the data from the functional chip on the source superblock corresponding to zone0, places the read data into a buffer, and then writes the data from the buffer into the corresponding location on the new superblock. Since the flash conversion layer cannot determine the validity of the data on the functional chip corresponding to the source superblock when moving data from the source superblock to the new superblock, it checks the message queue sent by the front end to the flash conversion layer before reading the data. If the data is present, it reads it directly from the message queue. If not, it reads the data from the functional chip on the source superblock until the data movement of the source superblock corresponding to zone0 is complete.

[0040] In step 3, after the flash memory conversion layer completes the data migration, it sends a message to the front end indicating that the data migration for zone0 is complete and then closes zone0.

[0041] In process 4, the front end notifies the flash memory conversion layer to start the data migration of zone 3, and the front end simultaneously starts the integration of the cached data of zone 3. For the specific data migration process, please refer to processes 2 and 3.

[0042] Step 5: After all zones are shut down, the abnormal power outage recovery process is complete.

[0043] Therefore, data recovery from the write cache of a logical partition is a sequential process. Furthermore, the validity of the data needs to be checked after each logical partition data migration, resulting in slow data recovery when the partition namespace SSD experiences an abnormal power outage. Since the power-on recovery time of a partition namespace SSD is limited, if multiple logical partitions (e.g., 32) need to be recovered upon SSD power-on, and each logical partition takes 2 seconds to recover, then the recovery time would be 60 seconds, which is quite long.

[0044] In view of the above, according to the embodiments of this disclosure, a data recovery method embodiment is provided. It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowcharts, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0045] This embodiment provides a data recovery method that can be used in the controller of a solid-state drive. Figure 1 This is a flowchart illustrating a first data recovery method according to an embodiment of the present disclosure, as shown below. Figure 1As shown, the process includes the following steps:

[0046] Step S101: In response to the abnormal power failure recovery command, obtain the target logical partition that has not been written to the solid-state drive.

[0047] Specifically, the solid-state drive is a partitioned namespace solid-state drive.

[0048] Specifically, such as Figure 2 As shown, the controller of a solid-state drive includes a front-end, a flash conversion layer, and a back-end.

[0049] Specifically, when the front end is recovering from an abnormal power failure of the partition namespace solid-state drive, it writes the data of the logical partition that has not been written to the flash memory to the single-level cell. During the power-on process of the partition namespace solid-state drive, the front end restores the data saved to the single-level cell to the write cache corresponding to the logical partition.

[0050] It should be noted that "not written to disk" refers to data in the target logical partition that has not yet been written to the flash memory.

[0051] Step S102: Determine the first data in the target logical partition that has not been written to the flash memory.

[0052] Specifically, after the front end restores the data of the single-layer unit to the write cache corresponding to the target logical partition, the data of each target logical partition is integrated according to the layout of the flush data, that is, the data corresponding to each logical partition is integrated into multiple fixed-size unit data, for example, the logical partition is integrated into 192K unit data to obtain the first data in the target logical partition that has not been written to the flash memory.

[0053] Specifically, the flash memory is the write NAND gate flash memory of the partitioned namespace solid-state drive.

[0054] Step S103: Write the first data into the target cache area and record the address mapping relationship of the first data in the target logical partition and the target cache area.

[0055] Specifically, the target cache area is a single-level unit corresponding to the target logical partition.

[0056] Specifically, the front end writes multiple units of data (i.e., the first data) from each target logical partition into a single-layer unit and records the address mapping relationship of the first data in the target logical partition and the target cache area. The front end writes the address mapping relationship into shared memory so that the flash translation layer can obtain the address mapping relationship by accessing the shared memory. After the front end writes the first data into the target cache area, it releases the write cache corresponding to the target logical partition. At this point, the address mapping relationship can be persistently stored even if the partition namespace SSD loses power.

[0057] Specifically, the address mapping relationship is represented by a key-value pair mapping relationship. Here, the address of the first data in the target logical partition is the key, and the address of the first data in the target cache area is the value.

[0058] Step S104: Write the first data into the flash memory based on the address mapping relationship.

[0059] Specifically, the front end marks the target logical partition as having a power-loss recovery flag, for example, setting `zone_recover_flag = 1`, and then shuts down the target logical partition, effectively switching it to a completed state. Next, the front end instructs the flash memory translation layer to migrate the first data from the target logical partition, enabling the translation layer to write the first data to the flash memory based on the address mapping. Simultaneously, the solid-state drive (SSD) is powered on again.

[0060] Specifically, the concurrency of data writing to the flash memory is modified based on the number of target logical partitions to write the first data of each target logical partition to the flash memory in parallel. For example, if there are 5 target logical partitions, the concurrency of data writing is modified to 5 to write the first data of all 5 target logical partitions to the flash memory simultaneously.

[0061] The data recovery method provided in this embodiment, in response to an abnormal power loss recovery command, acquires the target logical partition in the solid-state drive (SSD) that has not been written to the flash memory. Then, it identifies the first data in the target logical partition that has not been written to the flash memory, writes the first data to the target cache area, and records the address mapping relationship between the first data in the target logical partition and the target cache area. Therefore, it is possible to read the first data of the target logical partition that has not been written to the flash memory in the target cache area through the address mapping relationship, and then write the first data to the flash memory. Simultaneously, during the process of writing the first data to the flash memory, it is not necessary to wait for the front-end of the SSD controller to sequentially process the first data of the unwritten target logical partition. It can utilize the target cache area and the address mapping relationship to achieve concurrent writing of the first data of multiple target logical partitions, improving data recovery efficiency, effectively shortening the recovery time of abnormal power loss data from the SSD, and thus reducing the impact of SSD power loss on normal business operations.

[0062] This embodiment provides a data recovery method that can be used in solid-state drive controllers. Figure 3 This is a flowchart of a second communication connection method according to an embodiment of the present invention, such as... Figure 3 As shown, the process includes the following steps:

[0063] Step S301: In response to the abnormal power failure recovery command, obtain the target logical partition that has not been written to the solid-state drive.

[0064] In some optional implementations, step S301 above includes:

[0065] Step S3011: In response to the abnormal power failure recovery command, determine the first write result of the first data corresponding to the historical abnormal power failure recovery command.

[0066] It's worth noting that, to prevent the SSD from repeatedly performing abnormal power-loss recovery, where a new round of abnormal power-loss recovery begins before a previous one has finished, it's necessary to determine the first write result of the first data corresponding to the previous abnormal power-loss recovery command when receiving the command. This is to ascertain whether the previous first data has been written to the flash memory.

[0067] Step S3012: If the first write result indicates that the first data corresponding to the historical abnormal power failure recovery instruction has been written, then the target logical partition that has not been written to the solid-state drive is obtained.

[0068] Specifically, after the initial data corresponding to all historical abnormal power loss recovery commands has been written, the target logical partition in the solid-state drive that has not yet been written to disk is retrieved, and the new batch of initial data is written to the flash memory. Therefore, this avoids compressing the initial data from multiple abnormal power loss recovery attempts and prevents insufficient target cache area.

[0069] The data recovery method provided in this embodiment only acquires the target logical partition that has not been written to the solid-state drive (SSD) after the first data corresponding to the historical abnormal power loss recovery command has been successfully written to the flash memory, and then writes the first data of the target logical partition to the flash memory. Therefore, it can avoid insufficient target cache area and ensure the normal operation of SSD abnormal power loss recovery.

[0070] It should be noted that, in addition to acquiring the target logical partition not yet written to the SSD only after the first data corresponding to the historical abnormal power loss recovery command has been written completely, the amount of the first data not yet written to the flash memory corresponding to the historical abnormal power loss recovery command can also be acquired. If the amount of data is less than or equal to a preset cache threshold, the target logical partition not yet written to the SSD is acquired. If the amount of data is greater than the preset cache threshold, the process waits for the amount of the first data not yet written to the flash memory to decrease to the preset cache threshold. It should be noted that the preset cache threshold can be determined based on the size of the target cache region (i.e., a single-level cell) in the SSD.

[0071] Step S302: Determine the first data in the target logical partition that has not been written to the flash memory. See step S102 above for details, and will not be repeated here.

[0072] Step S303: Write the first data to the target cache area and record the address mapping relationship of the first data in the target logical partition and the target cache area. See step S103 above for details, which will not be repeated here.

[0073] Step S304: Write the first data into the flash memory based on the address mapping relationship.

[0074] In some optional implementations, step S304 above includes:

[0075] Step S3041: In response to the data write instruction for the target logical partition, determine that the target logical partition corresponds to a first storage area of ​​the flash memory and a second storage area of ​​the flash memory to be written.

[0076] Specifically, the first storage area is the superblock of the flash memory corresponding to the target logical partition before the SSD's abnormal power loss. The second storage area is the superblock of the flash memory where the first data of the target logical partition is written during the SSD's abnormal power loss recovery process.

[0077] Step S3042: Analyze the storage cells in the first storage area to determine the target storage cell corresponding to the first data.

[0078] It should be noted that the storage unit is the data writing unit of the first storage area in the solid-state drive.

[0079] Specifically, such as Figure 4 As shown, after receiving data from the front end, the flash conversion layer sends it to the first storage area of ​​the flash memory. In the first storage area, each column represents a functional chip, and each row represents a data writing unit. Figure 4 As shown, the first storage area includes functional chips die0, die1, die2, die3, ..., dien, and data writing units WL0, WL1, ..., WLm-1, WLm. Here, n is the number of columns in the functional chips, and m is the number of rows in the data writing units. When writing data to the flash memory in the flash conversion layer, it is usually written sequentially. For example, data is first written to the storage units corresponding to die0 & WL0, then to the storage units corresponding to die1 & WL0, and so on, until it is written to dien & WL0. Then, data is written in the order of the data writing units. For example, data is first written to the storage unit corresponding to WL0, then to the storage unit corresponding to WL1, and so on, until it is written to the storage unit corresponding to WLm.

[0080] Therefore, before writing the first data of the target logical partition to the flash memory, the number of all aligned storage cells (i.e., storage cells in each row) in the first storage area can be determined. If the number of storage cells in the same row is consistent, it indicates that the data of the target logical partition corresponding to the storage cells in that row has been written completely. If the number of storage cells in any row is inconsistent with the number of storage cells in other rows, the storage cells in that row are considered unaligned storage cells, indicating that the target storage cell corresponding to the first data exists in that row. Therefore, it is possible to avoid repeatedly checking whether the data in the first storage area is valid data.

[0081] Step S3043: Determine the first address of the target logical partition corresponding to the target storage unit.

[0082] Specifically, in a solid-state drive, there is a data mapping relationship between the target logical partition and the first storage area. Based on the data mapping relationship between the target logical partition and the first storage area, the first address of the target storage unit corresponding to the target logical partition can be determined.

[0083] Step S3044: Query the second data corresponding to the first address based on the address mapping relationship, and write the second data into the second storage area.

[0084] Specifically, based on the address mapping relationship, the system queries the first address to find the second data in the target cache area. The second data is the first data in the target logical partition that has not been written to the flash memory. Then, the second data is written to the second storage area.

[0085] The data recovery method provided in this embodiment analyzes the storage cells in the first storage area of ​​the flash memory corresponding to the target logical partition to determine the target storage cell corresponding to the first data. Then, it determines the first address of the target storage cell corresponding to the target logical partition, queries the second data corresponding to the first address based on the address mapping relationship, and writes the second data to the second storage area. Therefore, it is possible to concurrently perform abnormal power loss recovery on the first data of multiple target logical partitions using the address mapping relationship, thereby improving the abnormal power loss recovery efficiency of solid-state drives.

[0086] In some optional implementations, the first storage region includes multiple storage sub-regions, and each storage sub-region includes multiple storage units. Therefore, the step S3042 above, which analyzes the storage units in the first storage region to determine the target storage unit corresponding to the first data, includes:

[0087] Step a1: Analyze the storage sub-regions in the first storage area to determine the target storage sub-regions where no data has been written.

[0088] Specifically, the storage sub-region is the region corresponding to the data writing unit of each row in the first storage region.

[0089] Specifically, such as Figure 5 As shown, the functional chips in each column are numbered to obtain the Logical Unit Number (LUN) from LUN0 to LUN31. The data writing units in each column are numbered to obtain the area numbers of the storage sub-regions from WL0 to WL6. Figure 5 In this system, each row of data writing units corresponds to a storage sub-region, and each storage sub-region includes the same number of storage units.

[0090] Understandably, during a solid-state abnormal power failure, the amount of initial data not written to the flash memory is significantly less than the amount of other data written to the flash memory. Therefore, by analyzing the storage sub-regions within the first storage region, the number of storage cells in each sub-region where data has been written can be determined. If the number of cells aligns with the number of cells in other storage sub-regions, it indicates that the data for the target logical partition corresponding to the current storage sub-region has been successfully written. If the number of cells does not align with the number of cells in other storage sub-regions, it indicates that the data for the target logical partition corresponding to the current storage sub-region has not been written to the flash memory.

[0091] For example, such as Figure 5 As shown, the storage areas corresponding to LUN0&WL0 to LUN6&WL4 are the first storage area. Assuming that only LUN2&WL4 and LUN5&WL4 in the first storage area failed to write data, the target storage sub-area can be determined by comparing the number of successfully written storage units in the WL0 to WL4 sub-areas. For example, if the WL0 to WL3 sub-areas each have 32 successfully written storage units, while the WL4 sub-area only has 5, then the WL4 sub-area is selected as the target storage sub-area.

[0092] Step a2: Determine the second address of the target logical partition corresponding to the storage cell in the target storage sub-region.

[0093] Specifically, after determining the target storage sub-region, based on the data mapping relationship between the target logical partition and the first storage region, the second address of each storage unit in the target storage sub-region corresponding to the target logical partition is determined.

[0094] Step a3: Check if a second address exists in the address mapping relationship.

[0095] Specifically, for each storage cell in the target storage sub-region, before writing the data corresponding to the second address of the target logical partition of each storage cell into the second storage region each time, it is necessary to check the second address based on the address mapping relationship to determine whether the data corresponding to the second address is the first data.

[0096] For example, such as Figure 5 As shown, assuming the WL4 storage sub-region is the target storage sub-region, the target storage sub-region contains storage units where data has been successfully written and storage units where data has not been successfully written. Taking the storage units corresponding to LUN2&WL4 and LUN5&WL4 as the target storage units as examples, assuming the address of the target logical partition corresponding to LUN2&WL4 is LMA A, the address of the target logical partition corresponding to LUN5&WL4 is LMA B, the address of the target cache region corresponding to LMA A is PBA0, and the address of the target cache region corresponding to LMA B is PBA1, then the address mapping relationship stores LMA A and PBA0, and LMA B and PBA1 in the form of key-value pairs. Simultaneously, the address mapping relationship also stores the total number of storage units corresponding to the first data, for example, 2. Therefore, by querying the address mapping relationship to see if a second address exists, it can be determined whether the second address is the address of the first data.

[0097] Step a4: If a second address exists, then the storage unit corresponding to the second address is determined as the target storage unit.

[0098] Specifically, if the second address does not exist in the address mapping relationship, it indicates that the data corresponding to the second address has already been written to the first storage area. If the second address exists in the address mapping relationship, it indicates that the data corresponding to the second address is the first data, and the storage unit corresponding to the second address is the target storage unit in the first storage area that the first data originally needed to be written to before the SSD experienced an abnormal power failure.

[0099] The data recovery method provided in this embodiment analyzes the storage sub-regions within the first storage region to determine the target storage sub-region where no data has been written. Therefore, it avoids repeatedly checking whether the data in the first storage region is valid, thereby further improving the efficiency of abnormal power-off recovery. Then, it determines the second address of the target logical partition corresponding to the storage cell in the target storage sub-region and queries the address mapping relationship to see if the second address exists. If the second address exists, the storage cell corresponding to the second address is determined as the target storage cell. Therefore, the address of the first data not written to the flash memory can be accurately determined based on the address mapping relationship.

[0100] In some optional implementations, the step a3 above, which involves querying whether a second address exists in the address mapping relationship, includes: determining the validity of the address mapping relationship; if the address mapping relationship is valid, then querying whether a second address exists in the address mapping relationship.

[0101] Specifically, if the address mapping is invalid, the writing of the first data to the flash memory is stopped.

[0102] The data recovery method provided in this embodiment determines the validity of the address mapping relationship before querying whether a second address exists in the address mapping relationship. Therefore, it can accurately determine the first data that was not written to the flash memory, thereby improving the accuracy of data recovery from abnormal power loss of solid-state drives.

[0103] In some optional implementations, the step S3044 above, which queries the second data corresponding to the first address based on the address mapping relationship, includes:

[0104] Step b1: Based on the address mapping relationship, query the third address corresponding to the target cache region of the first address.

[0105] Step b2: Read the second data in the target cache area based on the third address.

[0106] Specifically, the address mapping relationship stores the addresses of the first data in the target logical partition and the target cache area. Therefore, the address mapping relationship can be used to query the third address in the target cache area corresponding to the first address, so as to read the second data that has not been written to the flash memory in the target cache area according to the third address. The second data is the same as the corresponding first data.

[0107] The data recovery method provided in this embodiment queries a third address in the target cache region corresponding to a first address based on an address mapping relationship. Then, it reads the second data in the target cache region based on the third address. Therefore, it can improve the reading efficiency of data recovered from abnormal power outages.

[0108] In some optional implementations, the data recovery method of this disclosure further includes: identifying other storage units in the first storage region besides the target storage unit; and moving the third data in the other storage units to the second storage region.

[0109] It should be noted that the other storage units in the first storage area besides the target storage unit are the storage units where the data of the target logical partition has been successfully written.

[0110] The data recovery method provided in this embodiment directly moves the third data of a successfully written storage cell to a second storage area. Therefore, it reduces the data verification process for successfully written flash memory during abnormal power loss recovery, thereby further improving the efficiency of abnormal power loss recovery.

[0111] In some optional implementations, the data recovery method of this disclosure further includes: marking the target logical partition as an abnormal power failure recovery zone to put the target logical partition into a write-prohibited state.

[0112] It should be noted that the write-prohibited state means that the target logical partition has entered the completed state.

[0113] The data recovery method provided in this embodiment marks the target logical partition as an abnormal power loss recovery area, thereby putting the target logical partition into a write-prohibited state. Therefore, it can prevent the writing of new data to the target logical partition during the abnormal power loss recovery process, thus avoiding abnormal power loss recovery.

[0114] In some optional implementations, the data recovery method of this disclosure further includes:

[0115] Step c1: In response to the data read instruction from the target device for the fourth address of the target cache region, determine the second write result of the first data in the flash memory.

[0116] Step c2: If the second write result indicates that the first data has not been completely written to the flash memory, then query whether a fourth address exists in the address mapping relationship;

[0117] Step c3: If a fourth address exists, read the fourth data at the fourth address in the target cache area and send the fourth data back to the target device.

[0118] The data recovery method provided in this embodiment, during the process of the solid-state drive powering on but before the first data has been written, if a data read instruction for the target cache area is received from the target device, the method checks the existence of the fourth address carried in the data read instruction in the address mapping relationship. If the fourth address exists, the fourth data at the fourth address is read from the target cache area. Therefore, data read errors can be avoided.

[0119] In some optional implementations, the data recovery method of this disclosure further includes: in response to a data reset command for a target logical partition from the target device, clearing first data in the target cache area, invalidating the address mapping relationship of the target logical partition, and clearing the abnormal power failure recovery mark of the target logical partition.

[0120] Specifically, during the process of writing the first data to the flash memory, if a data reset command for the target logical partition is received from the target device, the writing of the first data to the current target logical partition needs to be stopped. Furthermore, the corresponding address mapping relationship is invalidated, the first data stored in the corresponding target cache area is cleared, and the abnormal power-down recovery flag of the current target logical partition is cleared.

[0121] The data recovery method provided in this embodiment, in response to a data reset command from the target device for the target logical partition, clears the first data in the target cache area, invalidates the address mapping relationship of the target logical partition, and clears the abnormal power-down recovery mark of the target logical partition. Therefore, it can avoid recovering invalid first data.

[0122] In some optional implementations, the data recovery method of this disclosure further includes:

[0123] Step d1: After the solid-state drive is powered on, determine the third write result of the first data in the flash memory.

[0124] Step d2: If the third write result indicates that the first data has not been completely written to the flash memory, a data transfer instruction for the target logical partition is sent to the target device so that the target device can transfer the first data of the target logical partition.

[0125] Specifically, after the solid-state drive is powered on, if the first data has not been written to the flash memory, the front end sends a data migration instruction for the target logical partition to the target device through an asynchronous event request (AER), so that the target device can migrate the first data of the target logical partition and reset the target logical partition.

[0126] The data recovery method provided in this embodiment, if the first data has not been completely written to the flash memory, sends a data migration command for the target logical partition to the target device, so that the target device can migrate the first data of the target logical partition. Therefore, it can give the target device a certain degree of initiative in abnormal power loss recovery, thereby reducing the data recovery pressure on the solid-state drive during the abnormal power loss recovery process.

[0127] In some optional implementations, the data recovery method of this disclosure further includes: if all data of the target logical partition has been written to the flash memory, releasing the first data in the target cache area, invalidating the address mapping relationship of the target logical partition, and clearing the abnormal power failure recovery mark of the target logical partition.

[0128] Specifically, once all data in the target logical partition has been written to the flash memory, or in other words, once all data in the target logical partition has been written to the second storage area, the first data in the target cache area is released, the address mapping relationship of the target logical partition is invalidated, and the abnormal power-down recovery flag of the target logical partition is cleared.

[0129] The data recovery method provided in this embodiment, if all data of the target logical partition has been written to the flash memory, releases the target cache area, invalidates the address mapping relationship, and clears the abnormal power-down recovery mark. Therefore, it can free up the storage resources of the solid-state drive, reducing the impact on normal business operations.

[0130] As a specific application example, a target program is installed on the controller of the partition namespace solid-state drive. This target program is used to execute the data recovery method disclosed herein to recover data from the partition namespace solid-state drive when the partition namespace solid-state drive experiences an abnormal power failure, so as to reduce the impact of the abnormal power failure of the partition namespace solid-state drive on normal business use.

[0131] It is worth noting that the data recovery method disclosed herein temporarily stores the first data of the target logical partition to be recovered in the target cache area and continues the power-on process of the solid-state drive (SSD). After the SSD is powered on, an abnormal power-down recovery process is executed to write the first data to the flash memory of the SSD, thereby improving the efficiency of abnormal power-down recovery and avoiding excessively long power-on time blocking the SSD, thus preventing power-on failure. Furthermore, in this data recovery method, after the SSD is powered on, a data migration command for the target logical partition is sent to the target device. This gives the target device some initiative during the abnormal power-down recovery process, suggesting that the target device migrate the first data of the target logical partition to reduce the pressure on the SSD during abnormal power-down recovery. Moreover, compared to the sequential data recovery process in related technologies, this data recovery method performs abnormal power-down recovery through the target cache area and address mapping relationship. Even in scenarios with multiple repeated abnormal power-downs, abnormal power-down recovery can be performed concurrently on the first data of multiple target logical partitions, improving the efficiency and shortening the recovery time. At the same time, it can solve the problem of SSDs not being recognized when powered on under some abnormal conditions, reducing the impact on normal business use and reducing maintenance costs.

[0132] This embodiment also provides a data recovery apparatus for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0133] This embodiment provides a data recovery device, such as... Figure 6 As shown, it includes:

[0134] The instruction response module 601 is used to respond to abnormal power failure recovery instructions and obtain the target logical partition that has not been written to the solid-state drive.

[0135] The first arithmetic module 602 is used to determine the first data in the target logical partition that has not been written to the flash memory;

[0136] The second operation module 603 is used to write the first data into the target cache area and record the address mapping relationship of the first data in the target logical partition and the target cache area;

[0137] The data writing module 604 is used to write the first data to the flash memory based on the address mapping relationship.

[0138] In some alternative implementations, the data writing module 604 includes:

[0139] The instruction response unit is used to respond to a data write instruction for a target logical partition and determine that the target logical partition corresponds to a first storage area of ​​the flash memory and a second storage area of ​​the flash memory to be written.

[0140] The first analysis unit is used to analyze the storage units in the first storage area and determine the target storage unit corresponding to the first data.

[0141] The address determination unit is used to determine the first address of the target storage unit corresponding to the target logical partition.

[0142] The data writing unit is used to query the second data corresponding to the first address based on the address mapping relationship, and write the second data to the second storage area.

[0143] In some optional implementations, the first storage region includes multiple storage sub-regions, and each storage sub-region includes multiple storage units. Therefore, the first analysis unit includes:

[0144] The first analysis subunit is used to analyze the storage sub-regions in the first storage area to determine the target storage sub-regions where no data has been written.

[0145] The address determination sub-unit is used to determine the second address of the storage unit in the target storage sub-region corresponding to the target logical partition;

[0146] The first query subunit is used to query whether a second address exists in the address mapping relationship;

[0147] The second analysis subunit is used to determine the storage unit corresponding to the second address as the target storage unit if the second address exists.

[0148] In some optional implementations, the address query subunit is specifically used to: determine the validity of the address mapping relationship; if the address mapping relationship is valid, then query whether a second address exists in the address mapping relationship.

[0149] In some optional implementations, the data writing unit includes:

[0150] The second query subunit is used to query the third address of the target cache region corresponding to the first address based on the address mapping relationship;

[0151] The data reading subunit is used to read second data from the target cache area based on the third address.

[0152] In some optional embodiments, the data recovery apparatus of this disclosure includes:

[0153] The third calculation module is used to determine other storage units in the first storage area besides the target storage unit;

[0154] The data migration module is used to move third data from other storage units to the second storage area.

[0155] In some alternative implementations, the instruction response module 601 includes:

[0156] The recovery instruction response unit is used to respond to an abnormal power failure recovery instruction and determine the first write result of the first data corresponding to the historical abnormal power failure recovery instruction.

[0157] The logical partition determination unit is used to obtain the target logical partition in the solid-state drive that has not been written to the disk if the first write result indicates that the first data corresponding to the historical abnormal power failure recovery instruction has been written.

[0158] In some optional embodiments, the data recovery apparatus of this disclosure includes:

[0159] The partition marking module is used to mark the target logical partition for abnormal power failure recovery, so that the target logical partition enters a write-prohibited state.

[0160] In some optional embodiments, the data recovery apparatus of this disclosure includes:

[0161] The fourth processing module is used to determine the second write result of the first data in the flash memory in response to a data read instruction from the target device for the fourth address of the target cache region;

[0162] The fifth operation module is used to query whether a fourth address exists in the address mapping relationship if the second write result indicates that the first data has not been completely written to the flash memory.

[0163] The data reading module is used to read the fourth data at the fourth address in the target cache area if a fourth address exists, and then feed the fourth data back to the target device.

[0164] In some optional embodiments, the data recovery apparatus of this disclosure includes:

[0165] The data reset module is used to respond to the data reset command of the target device for the target logical partition, clear the first data in the target cache area, invalidate the address mapping relationship of the target logical partition, and clear the abnormal power failure recovery mark of the target logical partition.

[0166] In some optional embodiments, the data recovery apparatus of this disclosure includes:

[0167] The sixth processing module is used to determine the third write result of the first data in the flash memory after the solid-state drive is powered on;

[0168] The data transfer module is used to send a data transfer instruction to the target device for the target logical partition if the third write result indicates that the first data has not been completely written to the flash memory, so that the target device can transfer the first data of the target logical partition.

[0169] In some optional embodiments, the data recovery apparatus of this disclosure includes:

[0170] The recovery completion module is used to release the first data in the target cache area, invalidate the address mapping relationship of the target logical partition, and clear the abnormal power failure recovery mark of the target logical partition if all data of the target logical partition has been written to the flash memory.

[0171] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0172] In this embodiment, the data recovery device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0173] This disclosure also provides a controller for a solid-state drive, having the above-described features. Figure 6 The data recovery device shown.

[0174] Please see Figure 7 , Figure 7 This is a structural block diagram of a solid-state drive controller provided in an optional embodiment of this disclosure, such as... Figure 7 As shown, the solid-state drive (SSD) controller includes one or more processors 701, a memory 702, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise as required. The processors can process instructions executed within the SSD controller, including instructions stored in or on the memory to display graphical information of a GUI on an external input / output device (such as a display device coupled to the interface). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple storage devices, if desired. Similarly, multiple SSD controllers can be connected, each device providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 7 Take the 701 processor as an example.

[0175] Processor 701 may be a central processing unit, a network processor, or a combination thereof. Processor 701 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GPA), or any combination thereof.

[0176] The memory 702 stores instructions executable by at least one processor 701 to cause at least one processor 701 to perform the method shown in the above embodiments.

[0177] The memory 702 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the solid-state drive's controller. Furthermore, the memory 702 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 702 may optionally include memory remotely located relative to the processor 701, and this remote memory may be connected to the solid-state drive's controller via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0178] The memory 702 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 702 may also include a combination of the above types of memory.

[0179] The solid-state drive controller also includes a communication interface 703 for communicating with other devices or communication networks.

[0180] This disclosure also provides a computer-readable storage medium in which the methods described in this disclosure can be implemented in hardware or firmware, or implemented as recordable on a storage medium, or implemented as computer code originally stored on a remote storage medium or a non-transitory machine-readable storage medium and subsequently stored on a local storage medium after being downloaded over a network. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium may be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium may also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code that, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0181] A portion of this disclosure can be applied to computer program products, such as computer program instructions, which, when executed by a computer, can invoke or provide methods and / or technical solutions according to this disclosure through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, and installation package files. Accordingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions; the computer compiling the instructions and then executing the corresponding compiled program; the computer reading and executing the instructions; or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0182] Although embodiments of the present disclosure have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A data recovery method, characterized in that, The method includes: In response to an abnormal power failure recovery command, retrieve the target logical partition that has not been written to the solid-state drive; Identify the first data in the target logical partition that has not been written to the flash memory; Write the first data into the target cache area and record the address mapping relationship of the first data in the target logical partition and the target cache area; The first data is written to the flash memory based on the address mapping relationship.

2. The data recovery method according to claim 1, characterized in that, The step of writing the first data to the flash memory based on the address mapping relationship includes: In response to a data write command for the target logical partition, it is determined that the target logical partition corresponds to a first storage area of ​​the flash memory, and a second storage area of ​​the flash memory to be written to; Analyze the storage units in the first storage area to determine the target storage unit corresponding to the first data; The first address of the target storage unit corresponding to the target logical partition is determined; Based on the address mapping relationship, query the second data corresponding to the first address and write the second data into the second storage area.

3. The data recovery method according to claim 2, characterized in that, The first storage area includes multiple storage sub-areas, and each storage sub-area includes multiple storage units; the step of analyzing the storage units in the first storage area to determine the target storage unit corresponding to the first data includes: Analyze the storage sub-regions in the first storage area to determine the existence of target storage sub-regions where no data has been written. Determine the second address of the storage cell in the target storage sub-region that corresponds to the target logical partition; Check if the second address exists in the address mapping relationship; If the second address exists, the storage unit corresponding to the second address is determined as the target storage unit.

4. The data recovery method according to claim 3, characterized in that, The query to determine whether the second address exists in the address mapping relationship includes: Determine the validity of the address mapping relationship; If the address mapping relationship is valid, then query whether the second address exists in the address mapping relationship.

5. The data recovery method according to claim 2, characterized in that, The step of querying the second data corresponding to the first address based on the address mapping relationship includes: Based on the address mapping relationship, query the third address corresponding to the target cache region for the first address; The second data is read from the target cache area based on the third address.

6. The data recovery method according to claim 3, characterized in that, The method further includes: Identify the other storage units in the first storage region besides the target storage unit; The third data in the other storage units is moved to the second storage area.

7. The data recovery method according to claim 1, characterized in that, The step of responding to an abnormal power failure recovery command and obtaining the target logical partition that has not been written to the solid-state drive includes: In response to the abnormal power failure recovery command, determine the first write result of the first data corresponding to the historical abnormal power failure recovery command; If the first write result indicates that the first data write corresponding to the historical abnormal power failure recovery instruction has been completed, then the target logical partition that has not been written to the solid-state drive is obtained.

8. The data recovery method according to claim 1, characterized in that, The method further includes: The target logical partition is marked as having recovered from an abnormal power failure, thereby putting the target logical partition into a write-prohibited state.

9. The data recovery method according to claim 1, characterized in that, The method further includes: In response to a data read instruction from the target device for a fourth address of the target cache region, a second write result of the first data in the flash memory is determined; If the second write result indicates that the first data has not been completely written to the flash memory, then query whether the fourth address exists in the address mapping relationship; If the fourth address exists, then the fourth data at the fourth address is read from the target cache area, and the fourth data is fed back to the target device.

10. The data recovery method according to claim 1, characterized in that, The method further includes: In response to a data reset command from the target device for the target logical partition, the first data in the target cache area is cleared, the address mapping relationship of the target logical partition is invalidated, and the abnormal power failure recovery flag of the target logical partition is cleared.

11. The data recovery method according to claim 1, characterized in that, The method further includes: After the solid-state drive is powered on, the third write result of the first data in the flash memory is determined; If the third write result indicates that the first data has not been completely written to the flash memory, a data migration instruction for the target logical partition is sent to the target device so that the target device can migrate the first data in the target logical partition.

12. The data recovery method according to claim 1, characterized in that, The method further includes: If all data of the target logical partition is written to the flash memory, then the first data in the target cache area is released, the address mapping relationship of the target logical partition is invalidated, and the abnormal power failure recovery mark of the target logical partition is cleared.

13. A data recovery device, characterized in that, The device includes: The command response module is used to respond to abnormal power failure recovery commands and obtain the target logical partition that has not been written to the solid-state drive; The first calculation module is used to determine the first data in the target logical partition that has not been written to the flash memory; The second processing module is used to write the first data into the target cache area and record the address mapping relationship of the first data in the target logical partition and the target cache area; The data writing module is used to write the first data into the flash memory based on the address mapping relationship.

14. A controller for a solid-state drive, characterized in that, include: A memory and a processor are communicatively connected, the memory stores computer instructions, and the processor executes the data recovery method according to any one of claims 1 to 12 by executing the computer instructions.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to perform the data recovery method according to any one of claims 1 to 12.

16. A computer program product, characterized in that, Includes computer instructions for causing a computer to perform the data recovery method according to any one of claims 1 to 12.

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