redrive circuit

Abstract

This application provides a re-drive circuit, comprising: a receiving module; a level shifting module, wherein a first input terminal and a second input terminal of the level shifting module are electrically connected to a first output terminal and a second output terminal of the receiving module, respectively; a signal processing module, wherein a first input terminal and a second input terminal of the signal processing module are electrically connected to a first output terminal and a second output terminal of the level shifting module, respectively, and the first and second output terminals of the signal processing module are used for electrical connection to a load; and a feedback compensation module, wherein a first input terminal and a second input terminal of the feedback compensation module are electrically connected to a first output terminal and a second output terminal of the signal processing module, respectively, a first output terminal of the feedback compensation module is electrically connected to a third input terminal of the level shifting module, and a second output terminal of the feedback compensation module is electrically connected to a fourth input terminal of the level shifting module. This application solves the problem that existing re-drive circuits cannot achieve low-power control while ensuring high-speed signal integrity.

Description

Technical Field

[0001] This application relates to the field of high-speed serial communication interface technology, and more specifically, to a re-drive circuit. Background Technology

[0002] As the High Definition Multimedia Interface (HDMI) standard continues to evolve and transmission rates continue to increase, re-drive circuits are widely used in high-speed serial signal links to compensate for and restore signals transmitted through printed circuit board traces, connectors, and cables. In high-speed transmission scenarios, channels typically exhibit low-pass characteristics, with significant attenuation of high-frequency components, which can easily lead to eye diagram closure and increased inter-symbol interference, thus affecting signal integrity. Therefore, re-drive circuits are needed to equalize, compensate for, and enhance the signal drive.

[0003] However, existing heavy-drive circuits still have shortcomings in practical applications. On the one hand, parasitic parameters introduced by the front-end protection structure can easily limit bandwidth, resulting in insufficient high-frequency compensation capability during high-speed signal transmission. On the other hand, there may be problems such as common-mode adaptation difficulties, coupling of equalization and gain functions, and DC offset accumulation caused by multi-stage cascading, which in turn affect output swing and transmission stability. At the same time, existing solutions usually lack fine-grained detection and control of the operating state, making it difficult to dynamically adjust power consumption according to the actual signal conditions, thus making it difficult to achieve low-power control while ensuring the integrity of high-speed signals. Summary of the Invention

[0004] The main objective of this application is to provide a re-drive circuit that at least solves the problem that existing re-drive circuits cannot achieve low-power control while ensuring the integrity of high-speed signals.

[0005] To achieve the above objectives, according to one aspect of this application, a re-driving circuit is provided, comprising: a receiving module, the receiving module including a differential positive input terminal, a differential negative input terminal, a first output terminal, and a second output terminal, the receiving module being used to perform bandwidth expansion and signal detection on an input first differential signal; a level shifting module, the first input terminal of the level shifting module being electrically connected to the first output terminal of the receiving module, the second input terminal of the level shifting module being electrically connected to the second output terminal of the receiving module, the level shifting module being used to shift the common-mode voltage of the first differential signal to obtain a second differential signal; and a signal processing module, the first input terminal of the signal processing module being electrically connected to the first output terminal of the level shifting module. The signal processing module has an output terminal electrically connected to the second input terminal of the signal processing module and an output terminal electrically connected to the second output terminal of the level shifting module. The first and second output terminals of the signal processing module are used to electrically connect to the load. The signal processing module is used to perform signal conditioning on the second differential signal to obtain a third differential signal. A feedback compensation module has its first input terminal electrically connected to the first output terminal of the signal processing module, its second input terminal electrically connected to the second output terminal of the signal processing module, its first output terminal electrically connected to the third input terminal of the level shifting module, and its second output terminal electrically connected to the fourth input terminal of the level shifting module.

[0006] Optionally, the receiving module includes a bandwidth extension network module and a signal detection module. The bandwidth extension network module is used to extend the bandwidth of the first differential signal, and the signal detection module is used to detect the first differential signal.

[0007] Optionally, the bandwidth extension network module includes: a first inductor, a second inductor, a third inductor, a fourth inductor, a first diode, a second diode, a third diode, and a fourth diode. The first terminal of the first inductor is the differential negative input terminal. The second terminal of the first inductor is electrically connected to the first terminal of the second inductor. The first terminal of the first diode is electrically connected to a first power supply. The second terminal of the first diode is electrically connected to the first terminal of the second inductor. The first terminal of the second diode is electrically connected to the second terminal of the first diode. The second terminal of the second diode is grounded. The second terminal of the second inductor is the first output terminal of the bandwidth extension network module. The first terminal of the third inductor is the differential positive input terminal. The second terminal of the third inductor is electrically connected to the first terminal of the fourth inductor. The first terminal of the third diode is electrically connected to a second power supply. The second terminal of the third diode is electrically connected to the first terminal of the fourth inductor. The first terminal of the fourth diode is electrically connected to the second terminal of the third diode. The second terminal of the fourth diode is grounded. The second terminal of the fourth inductor is the second output terminal of the bandwidth extension network module.

[0008] Optionally, the receiving module further includes a first voltage divider and a second voltage divider. The first end of the first voltage divider is electrically connected to a third power supply, the second end of the first voltage divider is electrically connected to a first output terminal of the bandwidth extension network module, the first end of the second voltage divider is electrically connected to a fourth power supply, and the second end of the second voltage divider is electrically connected to a second output terminal of the bandwidth extension network module.

[0009] Optionally, the signal detection module includes: a first signal detection module and a second signal detection module. The first signal detection module is used to detect data signals in the first differential signal whose amplitude is greater than a preset amplitude. The second signal detection module is used to detect a preset clock signal in the first differential signal. The amplitude is the voltage difference amplitude between the positive differential input terminal and the negative differential input terminal. The first input terminal of the first signal detection module is electrically connected to the second terminal of the first voltage divider. The second input terminal of the first signal detection module is electrically connected to the second terminal of the second voltage divider. The first input terminal of the second signal detection module is electrically connected to the second terminal of the first voltage divider. The second input terminal of the second signal detection module is electrically connected to the second terminal of the second voltage divider.

[0010] Optionally, the level shifting module includes: a third voltage divider, a fourth voltage divider, a first capacitor, a second capacitor, a first current source, and a second current source. The first terminal of the third voltage divider is electrically connected to the first terminal of the first capacitor, and the second terminal of the third voltage divider is electrically connected to the second terminal of the first current source. The first terminal of the first current source is grounded. The second terminal of the first capacitor is electrically connected to the second terminal of the third voltage divider. The first terminal of the fourth voltage divider is electrically connected to the first terminal of the second capacitor, and the second terminal of the fourth voltage divider is electrically connected to the second terminal of the second current source. The second terminal of the second capacitor is electrically connected to the second terminal of the second current source. The first terminal of the second current source is grounded. The first terminal of the third voltage divider is electrically connected to the first output terminal of the receiving module, and the first terminal of the fourth voltage divider is electrically connected to the second output terminal of the receiving module. The second terminal of the third voltage divider is the first output terminal of the level shifting module, the second terminal of the fourth voltage divider is the second output terminal of the level shifting module, the second terminal of the second current source is the third input terminal of the level shifting module, and the second terminal of the first current source is the fourth input terminal of the level shifting module.

[0011] Optionally, the first output terminal of the feedback compensation module is electrically connected to the second terminal of the second current source, and the second output terminal of the feedback compensation module is electrically connected to the second terminal of the first current source.

[0012] Optionally, the signal processing module includes an equalization module, a variable gain module, and a transmit driver module. The equalization module is used to perform equalization compensation on the second differential signal. The variable gain module is used to adjust the gain of the compensated second differential signal to obtain a third differential signal. The transmit driver module is used to drive the third differential signal to output. The first input terminal of the equalization module is the first input terminal of the signal processing module and is electrically connected to the first output terminal of the level shifting module. The second input terminal of the equalization module is the second input terminal of the signal processing module and is electrically connected to the second output terminal of the level shifting module. The output terminal of the equalization module is electrically connected to the input terminal of the variable gain module and the output terminal of the variable gain module is electrically connected to the input terminal of the transmit driver module. The first output terminal of the transmit driver module is the first output terminal of the signal processing module, and the second output terminal of the transmit driver module is the second output terminal of the signal processing module.

[0013] Optionally, the signal processing module further includes a fifth voltage divider, a sixth voltage divider, a fifth inductor, and a sixth inductor. The first output terminal of the transmitting drive module is electrically connected to the second terminal of the fifth inductor. The first terminal of the fifth inductor is electrically connected to the second terminal of the fifth voltage divider. The first terminal of the fifth voltage divider is electrically connected to the fifth power supply. The second output terminal of the transmitting drive module is electrically connected to the second terminal of the sixth inductor. The first terminal of the sixth inductor is electrically connected to the second terminal of the sixth voltage divider. The first terminal of the sixth voltage divider is electrically connected to the sixth power supply. The second terminal of the fifth inductor is the differential negative output terminal of the heavy driving circuit. The second terminal of the sixth inductor is the differential positive output terminal of the heavy driving circuit. The differential negative output terminal and the differential positive output terminal are respectively used to be electrically connected to the differential negative input terminal and the differential positive input terminal of the load.

[0014] Optionally, the feedback compensation module includes an operational amplifier, a third capacitor, a fourth capacitor, a seventh voltage divider, and an eighth voltage divider. The first terminal of the third capacitor is the first output terminal of the feedback compensation module, and the first terminal of the fourth capacitor is the second output terminal of the feedback compensation module. The first terminal of the operational amplifier is electrically connected to the first terminal of the third capacitor, and the second terminal of the operational amplifier is electrically connected to the first terminal of the fourth capacitor. The first terminal of the seventh voltage divider is electrically connected to the third terminal of the operational amplifier, and the first terminal of the eighth voltage divider is electrically connected to the fourth terminal of the operational amplifier. The third terminal of the operational amplifier is electrically connected to the second terminal of the third capacitor, and the fourth terminal of the operational amplifier is electrically connected to the second terminal of the fourth capacitor. The first terminal of the fourth capacitor is electrically connected to the second terminal of the operational amplifier. The third terminal of the operational amplifier is the first input terminal of the feedback compensation module, and the fourth terminal of the operational amplifier is the second input terminal of the feedback compensation module.

[0015] By applying the technical solution of this application, and by setting up a receiving module, a level shifting module, a signal processing module, and a feedback compensation module, the receiving module can perform bandwidth expansion and signal detection on the input differential signal, thereby improving the high-frequency transmission capability of the front end and providing a detection basis for subsequent power consumption control; the level shifting module can shift the common-mode voltage of the input differential signal to achieve common-mode adaptation between the front and rear stage circuits; the signal processing module can condition the signal and drive the load, thereby improving the compensation capability and output driving capability of the high-speed signal; the feedback compensation module can feed back the DC offset information at the output of the signal processing module to the level shifting module to suppress the accumulation of DC offset caused by multi-stage cascading, thereby achieving dynamic power consumption management and low power consumption control while ensuring the integrity of the high-speed signal. Attached Figure Description

[0016] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0017] Figure 1 A structural block diagram of a re-driving circuit provided in an embodiment of this application is shown;

[0018] Figure 2 A circuit diagram of a re-driving circuit according to an embodiment of this application is shown.

[0019] The above figures include the following reference numerals:

[0020] 100. Receiver module; 110. Bandwidth extension network module; 111. First inductor; 112. Second inductor; 113. Third inductor; 114. Fourth inductor; 115. First diode; 116. Second diode; 117. Third diode; 118. Fourth diode; 119. First power supply; 120. Signal detection module; 121. First signal detection module; 122. Second signal detection module; 130. First voltage divider; 140. Second voltage divider; 150. Third power supply; 160. Fourth power supply; 170. Second power supply; 200. Level shifting module; 210. Third voltage divider... Voltage divider device; 220, fourth voltage divider device; 230, first capacitor; 240, second capacitor; 250, first current source; 260, second current source; 300, signal processing module; 310, equalization module; 320, variable gain module; 330, transmit drive module; 340, fifth voltage divider device; 350, sixth voltage divider device; 360, fifth inductor; 370, sixth inductor; 380, fifth power supply; 390, sixth power supply; 400, feedback compensation module; 410, operational amplifier; 420, third capacitor; 430, fourth capacitor; 440, seventh voltage divider device; 450, eighth voltage divider device. Detailed Implementation

[0021] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0022] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0023] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0024] As described in the background section, existing re-drive circuits struggle to achieve low-power control while ensuring high-speed signal integrity. To address these technical problems, embodiments of this application provide a re-drive circuit.

[0025] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0026] Embodiments of this application provide a re-driving circuit. Figure 1 An exemplary block diagram of the re-driving circuit of this application is shown, such as... Figure 1 As shown, the above-mentioned re-drive circuit includes:

[0027] The receiving module 100 includes a differential positive input terminal Vip, a differential negative input terminal Vin, a first output terminal, and a second output terminal. The receiving module 100 is used to perform bandwidth expansion and signal detection on the input first differential signal.

[0028] Specifically, the differential positive input terminal Vip and the differential negative input terminal Vin are used to receive the first differential signal input from the outside. Vip is used to receive the positive phase signal component of the first differential signal, and Vin is used to receive the negative phase signal component of the first differential signal. By setting the differential positive input terminal Vip and the differential negative input terminal Vin, the external input signal can be introduced into the receiving module 100 in a differential manner.

[0029] A level shifting module 200 is provided, wherein the first input terminal of the level shifting module 200 is electrically connected to the first output terminal of the receiving module 100, and the second input terminal of the level shifting module 200 is electrically connected to the second output terminal of the receiving module 100. The level shifting module 200 is used to shift the common-mode voltage of the first differential signal to obtain a second differential signal.

[0030] Specifically, while maintaining the differential signal transmission characteristics, the first differential signal undergoes common-mode voltage adjustment via the level shifting module 200, shifting the common-mode level of the first differential signal from the voltage range corresponding to the input side to the target voltage range suitable for signal conditioning by the subsequent signal processing module 300, thereby outputting the second differential signal.

[0031] The signal processing module 300 has a first input terminal electrically connected to the first output terminal of the level shifting module 200, a second input terminal electrically connected to the second output terminal of the level shifting module 200, a first output terminal Voutn and a second output terminal Voutp of the signal processing module 300 for electrically connecting to a load, and the signal processing module 300 for performing signal conditioning on the second differential signal to obtain a third differential signal.

[0032] Specifically, the first output terminal Voutn of the signal processing module 300 is used to output a differential negative signal, and the second output terminal Voutp is used to output a differential positive signal. The two work together to form a differential output signal, which is connected to the differential input terminal of the load.

[0033] The feedback compensation module 400 has its first input terminal electrically connected to the first output terminal of the signal processing module 300, its second input terminal electrically connected to the second output terminal of the signal processing module 300, its first output terminal electrically connected to the third input terminal of the level shifting module 200, and its second output terminal electrically connected to the fourth input terminal of the level shifting module 200.

[0034] Specifically, the first and second input terminals of the feedback compensation module 400 are electrically connected to the first and second output terminals of the signal processing module 300, respectively, for collecting offset information of the two differential signals corresponding to the output terminals of the signal processing module 300; the first and second output terminals of the feedback compensation module 400 are electrically connected to the third and fourth input terminals of the level shift module 200, respectively, for feeding back the compensation signal generated based on the offset information to the level shift module 200, thereby compensating and adjusting the input nodes of the preceding stage to reduce the accumulation of DC offset during multi-stage cascaded signal processing.

[0035] Through the above embodiments, by setting up a receiving module, a level shifting module, a signal processing module, and a feedback compensation module, the receiving module can perform bandwidth expansion and signal detection on the input differential signal, thereby improving the high-frequency transmission capability of the front end and providing a detection basis for subsequent power consumption control; the level shifting module can shift the common-mode voltage of the input differential signal to achieve common-mode adaptation between the front and rear stage circuits; the signal processing module can condition the signal and drive the load, thereby improving the compensation capability and output driving capability of the high-speed signal; the feedback compensation module can feed back the DC offset information at the output of the signal processing module to the level shifting module to suppress the accumulation of DC offset caused by multi-stage cascading, thereby achieving dynamic power consumption management and low power consumption control while ensuring the integrity of the high-speed signal.

[0036] It should be noted that, in the embodiments of this application, the load can be a downstream receiving circuit, interface circuit, transmission channel or terminal device electrically connected to the output terminal of the drive circuit, used to receive the differential signal output by the signal processing module. The load is not specifically limited. Any circuit, device or system that can be electrically connected to the differential output terminal of the drive circuit and receive the output differential signal can be used as the load.

[0037] In one alternative, such as Figure 2 As shown, the receiving module 100 includes a bandwidth extension network module 110 and a signal detection module 120. The bandwidth extension network module 110 is used to extend the bandwidth of the first differential signal, and the signal detection module 120 is used to detect the first differential signal.

[0038] In the above embodiments, the bandwidth extension network module compensates for the high-frequency components in the first differential signal, reducing the impact of front-end parasitic capacitance on high-frequency transmission, thereby avoiding premature attenuation of the input bandwidth and enabling more high-frequency signal components to pass through the receiving module, thus improving the input integrity of high-speed signals; the signal detection module is used to detect the status information of the first differential signal, and when it detects a data signal or clock signal that meets the preset conditions, it outputs the corresponding detection result to control the on or wake-up state of subsequent circuits.

[0039] For example, after the receiving module receives the first differential signal, the first signal detection module detects the differential voltage amplitude of the first differential signal. When the amplitude of the data signal in the first differential signal is detected to be greater than a preset amplitude, the first detection result is output to indicate that there is a valid data signal at the input terminal, and the subsequent signal path is controlled to enter the open state accordingly. When no data signal with an amplitude greater than the preset amplitude is detected, the subsequent signal path remains in the closed state or partially closed state. At the same time, the second signal detection module detects the clock signal in the first differential signal. When a preset clock signal is detected, the second detection result is output to indicate that there is a wake-up event at the input terminal, and the subsequent circuit is controlled to switch from the standby state to the wake-up state accordingly. When the preset clock signal is not detected, the subsequent circuit remains in the standby state. In this way, the signal detection module can control the open state and wake-up state of the subsequent circuit respectively according to the detection results of different types of signals in the first differential signal.

[0040] In another alternative, such as Figure 2As shown, the bandwidth extension network module 110 includes: a first inductor 111, a second inductor 112, a third inductor 113, a fourth inductor 114, a first diode 115, a second diode 116, a third diode 117, and a fourth diode 118. The first terminal of the first inductor 111 is the differential negative input terminal Vin. The second terminal of the first inductor 111 is electrically connected to the first terminal of the second inductor 112. The first terminal of the first diode 115 is electrically connected to the first power supply 119. The second terminal of the first diode 115 is electrically connected to the first terminal of the second inductor 112. The first terminal of the second diode 116 is electrically connected to the second terminal of the first diode 115. The second terminal of diode 116 is grounded. The second terminal of the second inductor 112 is the first output terminal of the bandwidth extension network module. The first terminal of the third inductor 113 is the differential positive input terminal Vip. The second terminal of the third inductor 113 is electrically connected to the first terminal of the fourth inductor 114. The first terminal of the third diode 117 is electrically connected to the second power supply 170. The second terminal of the third diode 117 is electrically connected to the first terminal of the fourth inductor 114. The first terminal of the fourth diode 118 is electrically connected to the second terminal of the third diode 117. The second terminal of the fourth diode 118 is grounded. The second terminal of the fourth inductor 114 is the second output terminal of the bandwidth extension network module.

[0041] In the above embodiments, the first and second inductors form one bandwidth extension branch corresponding to the differential negative input terminal Vin, and the third and fourth inductors form another bandwidth extension branch corresponding to the differential positive input terminal Vip. The first, second, third, and fourth diodes, as front-end protection devices, introduce parasitic capacitance while providing input protection. The first, second, third, and fourth inductors compensate for the high-frequency attenuation caused by this parasitic capacitance, improving the high-frequency response at the input terminal and allowing more high-frequency components to be transmitted to subsequent circuits through the bandwidth extension network module. Through this bandwidth extension network module, while maintaining input protection functionality, the bandwidth limitation imposed by the parasitic capacitance of the protection devices can be reduced, preventing premature attenuation of high-speed differential signals at the input terminal, thereby improving input signal integrity and meeting high-speed transmission requirements.

[0042] In some exemplary embodiments, such as Figure 2As shown, the receiving module 100 further includes a first voltage divider 130 and a second voltage divider 140. The first end of the first voltage divider 130 is electrically connected to the third power supply 150, and the second end of the first voltage divider 130 is electrically connected to the first output end of the bandwidth extension network module. The first end of the second voltage divider 140 is electrically connected to the fourth power supply 160, and the second end of the second voltage divider 140 is electrically connected to the second output end of the bandwidth extension network module.

[0043] In the above embodiments, by setting the first voltage divider device and the second voltage divider device, a corresponding bias node can be formed at the output end of the bandwidth expansion network module, so that the first differential signal can be output to the signal detection module in a manner suitable for subsequent detection after the bandwidth expansion is completed, thereby facilitating the subsequent detection of data signals or clock signals.

[0044] In some other exemplary embodiments, the signal detection module 120 includes: a first signal detection module 121 and a second signal detection module 122. The first signal detection module 121 is used to detect a data signal in the first differential signal whose amplitude is greater than a preset amplitude. The second signal detection module 122 is used to detect a preset clock signal in the first differential signal. The amplitude is the voltage difference amplitude between the positive differential input terminal and the negative differential input terminal. The first input terminal of the first signal detection module 121 is electrically connected to the second terminal of the first voltage divider device 130. The second input terminal of the first signal detection module 121 is electrically connected to the second terminal of the second voltage divider device 140. The first input terminal of the second signal detection module 122 is electrically connected to the second terminal of the first voltage divider device 130. The second input terminal of the second signal detection module 122 is electrically connected to the second terminal of the second voltage divider device 140.

[0045] In the above embodiments, by setting a first signal detection module and a second signal detection module, the data signal and clock signal in the first differential signal can be detected respectively. The first signal detection module detects data signals with amplitudes greater than a preset amplitude to determine whether a valid data signal exists at the input terminal, and controls the opening state of subsequent signal paths accordingly. The second signal detection module detects a preset clock signal in the first differential signal to determine whether a wake-up-related clock event exists at the input terminal, and controls the wake-up state of subsequent circuits accordingly. Since the first and second signal detection modules are electrically connected to the output nodes of the first and second voltage dividers respectively, detection can be performed based on the bandwidth-extended differential signal, thereby improving the stability and reliability of the detection results.

[0046] In standby mode, only the first signal detection module is active, used to detect wake-up events corresponding to HDMI connections. Since only the first signal detection module operates in standby mode, while subsequent signal paths remain closed, standby power consumption is effectively reduced, meeting low-power standby requirements. In active-idle mode, the second signal detection module is active, used to detect the presence of high-speed signals at the input. Before detecting a high-speed signal, only the front-end detection circuitry operates, while subsequent signal processing paths are not fully activated. This maintains signal detection capabilities while reducing unnecessary power consumption, achieving dynamic power saving. In active mode, the entire signal path is activated to perform bandwidth expansion, level shifting, equalization compensation, gain adjustment, and output driving on the input high-speed differential signal, thereby supporting high-speed data transmission.

[0047] In one specific embodiment, the signal detection module includes a first signal detection module and a second signal detection module. Upon receiving the first differential signal, the first and second signal detection modules respectively detect the first differential signal. Specifically, the first signal detection module detects data signals in the first differential signal whose amplitude is greater than a preset amplitude. The amplitude is the voltage difference between the differential positive input terminal Vip and the differential negative input terminal Vin. When the first signal detection module detects a data signal with an amplitude greater than the preset amplitude, it outputs a corresponding first detection result to indicate the presence of a valid data signal at the input terminal, and controls the subsequent signal path to enter the open state accordingly; when no data signal with an amplitude greater than the preset amplitude is detected, the subsequent signal path remains in the closed state or partially closed state. Simultaneously, the second signal detection module detects a preset clock signal in the first differential signal. When the second signal detection module detects the preset clock signal, it outputs a corresponding second detection result to indicate the presence of a wake-up-related clock event at the input terminal, and controls the subsequent circuit to switch from a standby state to a wake-up state accordingly; when no preset clock signal is detected, the subsequent circuit remains in the standby state. In this way, the signal detection module can detect the valid data signal and the preset clock signal respectively, and then control the on or wake-up state of the subsequent circuit according to the state information of the first differential signal.

[0048] In some exemplary embodiments of this application, the level shifting module 200 includes: a third voltage divider 210, a fourth voltage divider 220, a first capacitor 230, a second capacitor 240, a first current source 250, and a second current source 260. The first terminal of the third voltage divider 210 is electrically connected to the first terminal of the first capacitor 230, and the second terminal of the third voltage divider 210 is electrically connected to the second terminal of the first current source 250. The first terminal of the first current source 250 is grounded. The second terminal of the first capacitor 230 is electrically connected to the second terminal of the third voltage divider 210. The first terminal of the fourth voltage divider 220 is electrically connected to the first terminal of the second capacitor 240, and the second terminal of the fourth voltage divider 220 is electrically connected to the first terminal of the second capacitor 240. The second terminal of the second current source 260 is electrically connected, the second terminal of the second capacitor 240 is electrically connected to the second terminal of the second current source 260, the first terminal of the second current source 260 is grounded, the first terminal of the third voltage divider 210 is electrically connected to the first output terminal of the receiving module, the first terminal of the fourth voltage divider 220 is electrically connected to the second output terminal of the receiving module, the second terminal of the third voltage divider 210 is the first output terminal of the level shifting module, the second terminal of the fourth voltage divider 220 is the second output terminal of the level shifting module, the second terminal of the second current source 260 is the third input terminal of the level shifting module, and the second terminal of the first current source 250 is the fourth input terminal of the level shifting module.

[0049] In the above embodiments, the third and fourth voltage dividers cooperate with the first and second capacitors, as well as the first and second current sources, respectively, to form a level shifting structure for the corresponding two differential branches. This structure, while maintaining the differential signal transmission characteristics, adjusts the common-mode voltage of the first differential signal, shifting the differential signal output by the receiving module from the common-mode voltage range corresponding to the input side to a target voltage range suitable for subsequent signal processing modules to perform equalization compensation, gain adjustment, and drive output. This achieves level adaptation between the front-end receiving module and the back-end signal processing module.

[0050] The first and second inductors form an asymmetric T-coil network, effectively offsetting the parasitic capacitance introduced by the first and second diodes in the ESD protection devices, significantly expanding the input stage bandwidth. The first voltage divider is a 50Ω on-chip terminating resistor, enabling input impedance matching and thus compatibility with different coupling input methods of the HDMI interface. The third voltage divider and the first capacitor form a full-pass network, which, in conjunction with a current source, performs a level shifting function, adjusting the input common-mode voltage to VDD-(R1+R0). I0, where VDD is the power supply voltage, R1 is the resistance of the first voltage divider device, and R0 is the resistance of the third voltage divider device, providing the optimal common-mode operating point for the subsequent equalization module.

[0051] In some further exemplary embodiments of this application, such as Figure 2 As shown, the first output terminal of the feedback compensation module 400 is electrically connected to the second terminal of the second current source 260, and the second output terminal of the feedback compensation module 400 is electrically connected to the second terminal of the first current source 250.

[0052] In the above embodiment, the feedback compensation module detects the differential signal at the output of the signal processing module, extracts the DC offset information, and injects corresponding compensation signals into the second terminals of the second current source and the first current source, respectively, through its first and second output terminals. Since the second terminals of the second and first current sources serve as input nodes of the level shifting module, the compensation signals can directly act on the level shifting module, thereby adjusting the common-mode level and offset of the differential signal at the front end to suppress the accumulation of DC offset in the entire signal processing link.

[0053] In one alternative, such as Figure 2 As shown, the signal processing module 300 includes an equalization module 310, a variable gain module 320, and a transmission drive module 330. The equalization module 310 is used to perform equalization compensation on the second differential signal. The variable gain module 320 is used to adjust the gain of the compensated second differential signal to obtain a third differential signal. The transmission drive module 330 is used to drive the third differential signal to output. The first input terminal of the equalization module 310 is the first input terminal of the signal processing module 300, and the first input terminal of the equalization module 310 is electrically connected to the first output terminal of the level shifting module 200. The second input terminal of the equalization module 310 is the second input terminal of the signal processing module 300. The second input terminal of the equalization module 310 is electrically connected to the second output terminal of the level shifting module 200. The output terminal of the equalization module 310 is electrically connected to the input terminal of the variable gain module 320. The output terminal of the variable gain module 320 is electrically connected to the input terminal of the transmission drive module 330. The first output terminal of the transmission drive module 330 is the first output terminal of the signal processing module 300. The second output terminal of the transmission drive module 330 is the second output terminal of the signal processing module 300.

[0054] In the above embodiments, the equalization module, the variable gain module, and the transmit drive module form a hierarchical signal processing path. The equalization module is dedicated to equalization compensation, the variable gain module is dedicated to gain adjustment, and the transmit drive module is dedicated to output drive. By separating equalization compensation, gain adjustment, and output drive, coupling between functions can be avoided, allowing each stage of the circuit to be optimized specifically, thereby improving the compensation effect and overall transmission performance of the high-speed differential signal. Through the above signal processing module, the second differential signal can be subjected to hierarchical signal conditioning, compensating for high-frequency attenuation while adjusting the signal amplitude, thus improving the integrity of the high-speed signal.

[0055] Specifically, the equalization module can adopt any continuous-time linear equalizer structure, whose core function is to provide high-frequency enhancement compensation without limiting the DC gain; the variable gain module can also adopt any variable gain amplifier structure, which only provides DC gain and does not provide additional high-frequency compensation; the transmit drive module adopts a CML (Current Mode Logic) current-mode drive structure.

[0056] In another alternative, such as Figure 2 As shown, the signal processing module 300 further includes a fifth voltage divider 340, a sixth voltage divider 350, a fifth inductor 360, and a sixth inductor 370. The first output terminal of the transmission drive module 330 is electrically connected to the second terminal of the fifth inductor 360. The first terminal of the fifth inductor 360 is electrically connected to the second terminal of the fifth voltage divider 340. The first terminal of the fifth voltage divider 340 is electrically connected to the fifth power supply 380. The second output terminal of the transmission drive module 330 is electrically connected to the second terminal of the sixth inductor 370. The first end of the sixth inductor 370 is electrically connected to the second end of the sixth voltage divider 350. The first end of the sixth voltage divider 350 is electrically connected to the sixth power supply 390. The second end of the fifth inductor 360 is the differential negative output terminal Voutn of the heavy drive circuit. The second end of the sixth inductor 370 is the differential positive output terminal Voutp of the heavy drive circuit. The differential negative output terminal Voutn and the differential positive output terminal Voutp are respectively used to electrically connect to the differential negative input terminal and the differential positive input terminal of the load.

[0057] In the above embodiment, the two differential signals output from the drive module are respectively output to the differential negative output terminal Voutn and the differential positive output terminal Voutp via the fifth inductor and the sixth inductor. The fifth voltage divider and the sixth voltage divider cooperate with the fifth inductor and the sixth inductor to provide corresponding voltage support and impedance matching for the output node. The fifth inductor and the sixth inductor are used to improve the high-frequency response at the output terminal and reduce the attenuation of high-speed signals at the output terminal. Through the above structure, it is beneficial to improve the integrity of the high-speed differential signal output and the driving stability of the subsequent load.

[0058] In some exemplary embodiments, such as Figure 2 As shown, the feedback compensation module 400 includes an operational amplifier 410, a third capacitor 420, a fourth capacitor 430, a seventh voltage divider 440, and an eighth voltage divider 450. The first terminal of the third capacitor 420 is the first output terminal of the feedback compensation module 400, the first terminal of the fourth capacitor 430 is the second output terminal of the feedback compensation module 400, the first terminal of the operational amplifier 410 is electrically connected to the first terminal of the third capacitor 420, and the second terminal of the operational amplifier 410 is electrically connected to the first terminal of the fourth capacitor 430. The first terminal of the seventh voltage divider 440 is... The third terminal of the above-mentioned operational amplifier 410 is electrically connected to the third terminal of the above-mentioned operational amplifier 410. The first terminal of the above-mentioned eighth voltage divider device 450 is electrically connected to the fourth terminal of the above-mentioned operational amplifier 410. The third terminal of the above-mentioned operational amplifier 410 is electrically connected to the second terminal of the above-mentioned third capacitor 420. The fourth terminal of the above-mentioned operational amplifier 410 is electrically connected to the second terminal of the above-mentioned fourth capacitor 430. The first terminal of the above-mentioned fourth capacitor 430 is electrically connected to the second terminal of the above-mentioned operational amplifier 410. The third terminal of the above-mentioned operational amplifier 410 is the first input terminal of the above-mentioned feedback compensation module 400. The fourth terminal of the above-mentioned operational amplifier 410 is the second input terminal of the above-mentioned feedback compensation module 400.

[0059] In the above embodiments, by setting up an operational amplifier, a third capacitor, a fourth capacitor, a seventh voltage divider, and an eighth voltage divider, an integral compensation structure for the feedback compensation module can be formed. This structure is used to extract and integrate the DC offset information at the output of the signal processing module and generate a corresponding compensation signal to be output to the level shift module, thereby constructing a negative feedback compensation path between the output of the signal processing module and the input of the level shift module.

[0060] It is obvious to those skilled in the art that the modules of the present invention described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the present invention is not limited to any particular combination of hardware and software.

[0061] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0062] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0063] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0064] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0065] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0066] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0067] Computer-readable media include both permanent and non-permanent, removable and non-removable media that can store information by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0068] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0069] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0070] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0071] The re-drive circuit of this application, by setting up a receiving module, a level shifting module, a signal processing module, and a feedback compensation module, enables the receiving module to perform bandwidth expansion and signal detection on the input differential signal, thereby improving the high-frequency transmission capability of the front end and providing a detection basis for subsequent power consumption control; the level shifting module can shift the common-mode voltage of the input differential signal to achieve common-mode adaptation between the front and rear stage circuits; the signal processing module can condition the signal and drive the load, thereby improving the compensation capability and output driving capability of the high-speed signal; the feedback compensation module can feed back the DC offset information at the output of the signal processing module to the level shifting module to suppress the accumulation of DC offset caused by multi-stage cascading, thereby achieving dynamic power consumption management and low power consumption control while ensuring the integrity of the high-speed signal.

[0072] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A re-driving circuit, characterized in that, include: The receiving module includes a differential positive input terminal, a differential negative input terminal, a first output terminal, and a second output terminal. The receiving module is used to perform bandwidth expansion and signal detection on the input first differential signal. A level shifting module, wherein the first input terminal of the level shifting module is electrically connected to the first output terminal of the receiving module, and the second input terminal of the level shifting module is electrically connected to the second output terminal of the receiving module, the level shifting module is used to shift the common-mode voltage of the first differential signal to obtain a second differential signal; The signal processing module has a first input terminal electrically connected to the first output terminal of the level shifting module, a second input terminal electrically connected to the second output terminal of the level shifting module, and the first and second output terminals of the signal processing module being electrically connected to a load. The signal processing module is used to perform signal conditioning on the second differential signal to obtain a third differential signal. The feedback compensation module has its first input terminal electrically connected to the first output terminal of the signal processing module, its second input terminal electrically connected to the second output terminal of the signal processing module, its first output terminal electrically connected to the third input terminal of the level shifting module, and its second output terminal electrically connected to the fourth input terminal of the level shifting module.

2. The re-driving circuit according to claim 1, characterized in that, The receiving module includes a bandwidth extension network module and a signal detection module. The bandwidth extension network module is used to extend the bandwidth of the first differential signal, and the signal detection module is used to detect the first differential signal.

3. The re-driving circuit according to claim 2, characterized in that, The bandwidth extension network module includes: a first inductor, a second inductor, a third inductor, a fourth inductor, a first diode, a second diode, a third diode, and a fourth diode. The first terminal of the first inductor is the differential negative input terminal. The second terminal of the first inductor is electrically connected to the first terminal of the second inductor. The first terminal of the first diode is electrically connected to a first power supply. The second terminal of the first diode is electrically connected to the first terminal of the second inductor. The first terminal of the second diode is electrically connected to the second terminal of the first diode. The second terminal of the second diode is grounded. The second terminal of the second inductor is the first output terminal of the bandwidth extension network module. The first terminal of the third inductor is the differential positive input terminal. The second terminal of the third inductor is electrically connected to the first terminal of the fourth inductor. The first terminal of the third diode is electrically connected to a second power supply. The second terminal of the third diode is electrically connected to the first terminal of the fourth inductor. The first terminal of the fourth diode is electrically connected to the second terminal of the third diode. The second terminal of the fourth diode is grounded. The second terminal of the fourth inductor is the second output terminal of the bandwidth extension network module.

4. The re-driving circuit according to claim 3, characterized in that, The receiving module further includes a first voltage divider and a second voltage divider. The first end of the first voltage divider is electrically connected to a third power supply, and the second end of the first voltage divider is electrically connected to the first output end of the bandwidth extension network module. The first end of the second voltage divider is electrically connected to a fourth power supply, and the second end of the second voltage divider is electrically connected to the second output end of the bandwidth extension network module.

5. The re-driving circuit according to claim 4, characterized in that, The signal detection module includes a first signal detection module and a second signal detection module. The first signal detection module is used to detect data signals in the first differential signal whose amplitude is greater than a preset amplitude. The second signal detection module is used to detect a preset clock signal in the first differential signal. The amplitude is the voltage difference amplitude between the positive differential input terminal and the negative differential input terminal. The first input terminal of the first signal detection module is electrically connected to the second terminal of the first voltage divider device. The second input terminal of the first signal detection module is electrically connected to the second terminal of the second voltage divider device. The first input terminal of the second signal detection module is electrically connected to the second terminal of the first voltage divider device. The second input terminal of the second signal detection module is electrically connected to the second terminal of the second voltage divider device.

6. The re-driving circuit according to claim 1, characterized in that, The level shifting module includes: a third voltage divider, a fourth voltage divider, a first capacitor, a second capacitor, a first current source, and a second current source. The first terminal of the third voltage divider is electrically connected to the first terminal of the first capacitor, and the second terminal of the third voltage divider is electrically connected to the second terminal of the first current source. The first terminal of the first current source is grounded. The second terminal of the first capacitor is electrically connected to the second terminal of the third voltage divider. The first terminal of the fourth voltage divider is electrically connected to the first terminal of the second capacitor, and the second terminal of the fourth voltage divider is electrically connected to the second terminal of the second current source. The second terminal of the second capacitor is electrically connected to the second terminal of the second current source. The first terminal of the second current source is grounded. The first terminal of the third voltage divider is electrically connected to the first output terminal of the receiving module, and the first terminal of the fourth voltage divider is electrically connected to the second output terminal of the receiving module. The second terminal of the third voltage divider is the first output terminal of the level shifting module, the second terminal of the fourth voltage divider is the second output terminal of the level shifting module, the second terminal of the second current source is the third input terminal of the level shifting module, and the second terminal of the first current source is the fourth input terminal of the level shifting module.

7. The re-driving circuit according to claim 6, characterized in that, The first output terminal of the feedback compensation module is electrically connected to the second terminal of the second current source, and the second output terminal of the feedback compensation module is electrically connected to the second terminal of the first current source.

8. The re-driving circuit according to claim 1, characterized in that, The signal processing module includes an equalization module, a variable gain module, and a transmit driver module. The equalization module is used to perform equalization compensation on the second differential signal. The variable gain module is used to adjust the gain of the compensated second differential signal to obtain a third differential signal. The transmit driver module is used to drive the third differential signal to output. The first input terminal of the equalization module is the first input terminal of the signal processing module and is electrically connected to the first output terminal of the level shifting module. The second input terminal of the equalization module is the second input terminal of the signal processing module and is electrically connected to the second output terminal of the level shifting module. The output terminal of the equalization module is electrically connected to the input terminal of the variable gain module and the output terminal of the variable gain module is electrically connected to the input terminal of the transmit driver module. The first output terminal of the transmit driver module is the first output terminal of the signal processing module, and the second output terminal of the transmit driver module is the second output terminal of the signal processing module.

9. The re-driving circuit according to claim 8, characterized in that, The signal processing module further includes a fifth voltage divider, a sixth voltage divider, a fifth inductor, and a sixth inductor. The first output terminal of the transmitting drive module is electrically connected to the second terminal of the fifth inductor. The first terminal of the fifth inductor is electrically connected to the second terminal of the fifth voltage divider. The first terminal of the fifth voltage divider is electrically connected to the fifth power supply. The second output terminal of the transmitting drive module is electrically connected to the second terminal of the sixth inductor. The first terminal of the sixth inductor is electrically connected to the second terminal of the sixth voltage divider. The first terminal of the sixth voltage divider is electrically connected to the sixth power supply. The second terminal of the fifth inductor is the differential negative output terminal of the heavy driving circuit. The second terminal of the sixth inductor is the differential positive output terminal of the heavy driving circuit. The differential negative output terminal and the differential positive output terminal are respectively used to be electrically connected to the differential negative input terminal and the differential positive input terminal of the load.

10. The re-driving circuit according to claim 1, characterized in that, The feedback compensation module includes an operational amplifier, a third capacitor, a fourth capacitor, a seventh voltage divider, and an eighth voltage divider. The first terminal of the third capacitor is the first output terminal of the feedback compensation module, and the first terminal of the fourth capacitor is the second output terminal of the feedback compensation module. The first terminal of the operational amplifier is electrically connected to the first terminal of the third capacitor, and the second terminal of the operational amplifier is electrically connected to the first terminal of the fourth capacitor. The first terminal of the seventh voltage divider is electrically connected to the third terminal of the operational amplifier, and the first terminal of the eighth voltage divider is electrically connected to the fourth terminal of the operational amplifier. The third terminal of the operational amplifier is electrically connected to the second terminal of the third capacitor, and the fourth terminal of the operational amplifier is electrically connected to the second terminal of the fourth capacitor. The first terminal of the fourth capacitor is electrically connected to the second terminal of the operational amplifier. The third terminal of the operational amplifier is the first input terminal of the feedback compensation module, and the fourth terminal of the operational amplifier is the second input terminal of the feedback compensation module.

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