Broadband hybrid class non-symmetrical doherty power amplifier based on resistive factor

By using a broadband hybrid asymmetric Doherty power amplifier based on resistive factor, the efficiency and bandwidth issues of Doherty power amplifiers under 5G high PAPR signals are solved, achieving high efficiency and broadband performance in the high backoff range.

CN122159802APending Publication Date: 2026-06-05SHENZHEN UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHENZHEN UNIV
Filing Date
2026-03-13
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

Existing Doherty power amplifiers lack sufficient back-off capability when facing 5G high PAPR signals, resulting in decreased efficiency and difficulty in balancing bandwidth and high efficiency.

Method used

A broadband hybrid asymmetric Doherty power amplifier based on resistive factor is adopted. Impedance matching and harmonic control are achieved by combining an input matching network, an impedance inversion network, and a post-matching network. By combining different transistor configurations of the main and auxiliary power amplifier units, a resistive factor is introduced to adjust the second harmonic impedance.

Benefits of technology

Maintaining high efficiency over a high backoff range and extending bandwidth, it achieves broadband, high-efficiency power amplifier performance.

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Abstract

The application discloses a kind of broadband mixed class asymmetric Doherty power amplifiers based on resistive factor, including input matching network unit, power divider, impedance inversion network unit and post matching network unit, the input end of power divider is electrically connected with input matching network unit, the output end of power divider has first output end and second output end, to independently output each target signal;Impedance inversion network unit includes main path power amplifier unit and auxiliary power amplifier unit, the input end of main path power amplifier unit is electrically connected with the first output end of power divider, the input end of auxiliary power amplifier unit is electrically connected with the second output end of power divider;The input end of post matching network unit is electrically connected with the output end of main path power amplifier unit and the output end of auxiliary power amplifier unit respectively.The technical scheme of the application can take into account the advantages of high return, wideband and high efficiency, not only can maintain high efficiency in deep return area, but also can realize relatively wide relative bandwidth, with better broadband high efficiency performance.
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Description

Technical Field

[0001] This invention relates to a power amplifier, and more particularly to a broadband hybrid asymmetric Doherty power amplifier based on resistivity factor. Background Technology

[0002] To support ultra-high data rates, fifth-generation mobile communication systems commonly employ complex modulation signals with high peak-to-average power ratios (PAPR). This forces power amplifiers to operate in the power back-off region for extended periods, leading to a sharp decline in the efficiency of traditional architectures and severely limiting the overall energy efficiency of transmitters and system performance. Doherty power amplifiers, due to their simple structure and inherent high efficiency in the back-off region, have become one of the mainstream solutions for handling high PAPR signals. Classic Doherty architectures are typically designed with a 6dB power back-off point for load modulation, but their back-off capability is insufficient for higher PAPR scenarios such as 5G. Although increasing the back-off range can further improve efficiency, the resulting high impedance transformation ratio leads to a drastic compression of the matching network bandwidth, making it difficult to balance bandwidth and high efficiency.

[0003] To balance bandwidth and high efficiency, asymmetric Doherty power amplifiers have emerged, where the carrier amplifier and peak amplifier use transistors of different sizes or different drain voltages to improve the back-off range. Meanwhile, continuous-mode power amplifiers (such as Class-J and Class-F) extend bandwidth and improve efficiency through harmonic impedance control. However, these types of power amplifiers are extremely sensitive to harmonic termination impedance, requiring complex and narrow-band harmonic control networks, which is detrimental to achieving broadband performance.

[0004] In recent years, resistive continuous mode power amplifiers have been introduced. By introducing real impedance at the harmonic port instead of an ideal open / short circuit, the stringent requirements on harmonic impedance phase have been effectively relaxed, significantly simplifying broadband matching designs. However, how to integrate resistive continuous mode with the asymmetric Doherty architecture and achieve broadband and harmonic controllability while ensuring high back-off efficiency remains a pressing technical challenge in the industry.

[0005] In view of this, it is necessary to propose improvements to the current structure of the asymmetric Doherty power amplifier. Summary of the Invention

[0006] To address at least one of the aforementioned technical problems, the main objective of this invention is to provide a broadband hybrid asymmetric Doherty power amplifier based on resistivity factor.

[0007] To achieve the above objectives, one technical solution adopted by the present invention is as follows: providing a broadband hybrid asymmetric Doherty power amplifier based on resistive factor, comprising: The input matching network unit is used to input the input signal to be amplified; A power divider, wherein the input terminal of the power divider is electrically connected to an input matching network unit to split the input signal into two target signals, and the output terminal of the power divider has a first output terminal and a second output terminal to independently output each target signal; An impedance inversion network unit is provided, comprising a main power amplifier unit and an auxiliary power amplifier unit. The input terminal of the main power amplifier unit is electrically connected to the first output terminal of the power divider to perform impedance matching and impedance transformation according to the target signal output from the first output terminal. The input terminal of the auxiliary power amplifier unit is electrically connected to the second output terminal of the power divider to perform load modulation according to the target signal output from the second output terminal. The post-matching network unit has its input terminals electrically connected to the output terminals of the main power amplifier unit and the auxiliary power amplifier unit, respectively, and is used to adjust the fundamental and harmonic impedances at the combining point to perform harmonic control on the main power amplifier unit.

[0008] The main power amplifier unit includes a first coupling capacitor, a first RC frequency selection network, and a first switching transistor. The input terminal of the first coupling capacitor is electrically connected to the first output terminal of the power divider. The output terminal of the first coupling capacitor is electrically connected to the input terminal of the first switching transistor through the first RC frequency selection network. The output terminal of the first switching transistor is electrically connected to the input terminal of the post-matching network unit.

[0009] The auxiliary power amplifier unit includes a second coupling capacitor, a second RC frequency selection network, and a second switching transistor. The input terminal of the second coupling capacitor is electrically connected to the second output terminal of the power divider. The output terminal of the second coupling capacitor is electrically connected to the input terminal of the second switching transistor through the second RC frequency selection network. The output terminal of the second switching transistor is electrically connected to the input terminal of the post-matching network unit. The model of the second switching transistor is different from that of the first switching transistor.

[0010] Wherein, both the first switching transistor and the second switching transistor are GaN HEMT transistors, LDMOS transistors, or GaAs FET transistors; The gate of the first switching transistor is electrically connected to the output of the first RC frequency selection network, the drain is electrically connected to the input of the matching network unit, and the source is grounded. The gate of the second switching transistor is electrically connected to the output of the second RC frequency selection network, the drain is electrically connected to the input of the matching network unit, and the source is grounded.

[0011] The main power amplifier unit further includes a third resistor and a first bias capacitor that are electrically connected. The third resistor is electrically connected to the gate of the first switching transistor, and the other end of the first bias capacitor is grounded. The auxiliary power amplifier unit also includes a fourth resistor and a second bias capacitor that are electrically connected. One end of the fourth resistor is electrically connected to the gate of the second switching transistor, and the other end of the second bias capacitor is grounded.

[0012] The first RC frequency selection network includes a first resistor and a fourth capacitor connected in parallel, wherein the two ends of the first resistor and the fourth capacitor connected in parallel are electrically connected to the output terminal of the first coupling capacitor and the gate of the first switching transistor, respectively. The second RC frequency selection network includes a second resistor and a fifth capacitor connected in parallel. The two ends of the second resistor and the fifth capacitor connected in parallel are electrically connected to the output terminal of the second coupling capacitor and the gate of the second switching transistor, respectively.

[0013] The post-matching network unit includes a microstrip line, a first open path, a second open path, and a third coupling capacitor. The microstrip line is electrically connected to the input terminal of the third coupling capacitor, and the output terminal of the third coupling capacitor is used to connect to a load. The first open path and the second open path are respectively electrically connected to the microstrip line.

[0014] The post-matching network unit further includes a third bias capacitor, one end of which is electrically connected to the microstrip line, and the other end of which is grounded.

[0015] The microstrip line is a distributed microstrip line.

[0016] The power divider is a Wilkinson power divider.

[0017] The technical solution of this invention mainly includes an input matching network unit, a power divider, an impedance inversion network unit, and a post-matching network unit. The impedance inversion network unit is divided into a main power amplifier unit and an auxiliary power amplifier unit. The main power amplifier unit can perform impedance matching and impedance transformation according to the target signal output from the first output terminal of the power divider. The auxiliary power amplifier unit can perform load modulation according to the target signal output from the second output terminal of the power divider. The post-matching network unit can adjust the fundamental and harmonic impedances at the combining point to perform harmonic control on the main power amplifier unit. The transistor configurations in the main power amplifier unit and the main power amplifier unit are different. Combined with fundamental and harmonic impedance modulation, the power amplifier of this solution can achieve high back-off. Based on this, by introducing a resistive factor, the second harmonic impedance is no longer a simple imaginary impedance, but also has a real impedance, which makes it easier to tune the second harmonic so that the power amplifier can maintain high efficiency in the backoff range. Furthermore, by adjusting the broadband characteristics of the impedance inversion network unit and using the post-matching network unit to tune the signal, the power amplifier can not only maintain high efficiency in the deep backoff region, but also achieve a wider relative bandwidth, resulting in better broadband high-efficiency performance. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0019] Figure 1 This is a block diagram of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. Figure 2 This is a schematic diagram of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. Figure 3 This is a schematic diagram of the bandwidth variation surface after introducing a continuous factor and a resistive factor in a broadband hybrid asymmetric Doherty power amplifier based on a resistive factor according to an embodiment of the present invention. Figure 4 This is a circuit diagram of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. Figure 5 This is a schematic diagram of the structure of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. Figure 6This is a schematic diagram of the theoretical and simulated impedance curves at the current source plane of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor during power back-off, according to an embodiment of the present invention. Figure 7 This is a schematic diagram of the theoretical and simulated impedance curves of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor at the junction point (normalized impedance 30Ω) according to an embodiment of the present invention. Figure 8 This is a schematic diagram of the simulation curves of the current and voltage waveforms of a 1.7 GHz signal at the current source plane when the first switching transistor is in a power back-off state, according to an embodiment of the present invention. Figure 9 This is a schematic diagram of the simulation curves of the current and voltage waveforms of a 2.3 GHz signal at the current source plane when the first switching transistor is in a power back-off state, according to an embodiment of the present invention. Figure 10 This is a schematic diagram of the simulation efficiency, gain, and output power curves of signals of different frequencies at the first switching transistor in one embodiment of the present invention.

[0020] Explanation of reference numerals in the attached figures: 100 Input matching network unit; 200 Power divider; 300 Impedance inversion network unit; 310 Main power amplifier unit; 311 First RC frequency selection network; 320 Auxiliary power amplifier unit; 321 Second RC frequency selection network; 400 Post-matching network unit.

[0021] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0023] It should be noted that the descriptions involving "first," "second," etc., in this invention are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Furthermore, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0024] Unlike power amplifiers in related technologies that suffer from sharp efficiency drops, limited bandwidth, and complex harmonic control in the power back-off region, this invention provides a broadband hybrid asymmetric Doherty power amplifier based on resistive factor. This amplifier aims to combine the advantages of high back-off, wide bandwidth, and high efficiency, thereby improving the overall performance of the power amplifier. The specific structure of this broadband hybrid asymmetric Doherty power amplifier based on resistive factor is described in the following embodiment.

[0025] Please refer to Figures 1 to 3 , Figure 1 This is a block diagram of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. Figure 2 This is a schematic diagram of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. Figure 3 This is a schematic diagram of the bandwidth variation surface after introducing a continuous factor and a resistive factor in a broadband hybrid asymmetric Doherty power amplifier based on a resistive factor according to an embodiment of the present invention. In this embodiment, the broadband hybrid asymmetric Doherty power amplifier based on a resistive factor integrates a resistive continuous-mode operation with an asymmetric Doherty architecture, and can be applied to 5G communication or future communication systems, enabling efficient transmission of complex modulated signals. The asymmetric Doherty power amplifier includes: Input matching network unit 100 is used to input the signal to be amplified. The input signal is a modulated signal with a frequency between approximately 1.4 GHz and 2.6 GHz. Input matching network unit 100 can be simulated using source_pull software, and its impedance is approximately 10 Ω. During design, a 10-ohm to 50-ohm port can be used for input matching. It can be understood that the frequency of the modulated signal can be set to a frequency band less than 1.4 GHz or greater than 2.6 GHz, depending on the actual design requirements.

[0026] A power divider 200 is provided, with its input terminal electrically connected to an input matching network unit 100 to split the input signal into two target signals. The power divider 200 has a first output terminal and a second output terminal to independently output each target signal. Specifically, the power divider 200 is a Wilkinson power divider 200, characterized by its simple structure, good port matching, and good isolation between its first and second output terminals, effectively reducing signal interference. The two target signals output through the first and second output terminals exhibit low interference and good independence.

[0027] An impedance inversion network unit 300 includes a main power amplifier unit 310 and an auxiliary power amplifier unit 320. The input terminal of the main power amplifier unit 310 is electrically connected to the first output terminal of the power divider 200 to perform impedance matching and impedance transformation according to the target signal output from the first output terminal. The input terminal of the auxiliary power amplifier unit 320 is electrically connected to the second output terminal of the power divider 200 to perform load modulation according to the target signal output from the second output terminal. The main power amplifier unit 310 operates in Class J, Class F, or a hybrid class between the two. The auxiliary power amplifier unit 320 operates in Class C and does not operate during low power input, in which case it is in an open circuit state with infinite impedance. During low power operation, only the main power amplifier unit 310 operates, and its impedance is a hybrid class impedance. As the input power increases, the auxiliary power amplifier unit 320 starts working. At this time, load modulation is activated, and the impedances of the two channels begin to change dynamically according to the ratio of the two currents, until the main power amplifier and the auxiliary power amplifier are fully saturated. The impedances of the main power amplifier unit 310 and the auxiliary power amplifier unit 320 are respectively their optimal impedances R at saturation. opt The junction impedance is set to Z. pmn,nf n is 1, 2, or 3, representing the fundamental frequency, second harmonic, and third harmonic, respectively. Please refer to [reference needed]. Figure 2 OMN C This indicates the main power amplifier unit 310, OMN. P This indicates the auxiliary power amplifier unit 320, and PMN indicates the post-matching network unit. The impedance representing the plane saturation state of a current source. R represents the impedance at the saturation state of the combining point. L Indicates load.

[0028] A post-matching network unit 400 is included, with its input terminals electrically connected to the output terminals of both the main power amplifier unit 310 and the auxiliary power amplifier unit 320. This post-matching network unit 400 is used to adjust the fundamental and harmonic impedances at the combining point to control the harmonics of the main power amplifier unit 310. Since this solution requires bandwidth expansion, the post-matching network unit 400 can be used to achieve this. Specifically, the post-matching network unit 400 can control the harmonics of the main power amplifier unit 310 by adjusting the fundamental and harmonic impedances at the combining point.

[0029] Assuming the main power amplifier unit 310 is a lossless transmission network, since the impedance at the main combiner point saturation is (1+ )Z pmn,f When reverting, it is Z. pmn,f Therefore, according to the formula for calculating the reflection coefficient, the reflection coefficients of the current source plane and the junction point during the retraction can be calculated as follows: Where c represents the transistor current source plane, c1 represents the combining point, and back represents the ideal state. This indicates the phase of the transistor's current source plane.

[0030] Then, based on the resistivity factor mixed impedance formula and the reflection coefficient calculation formula: in, The mixed impedance formula representing the planar resistivity of a current source, combined with the reflection coefficient, is used. This represents the plane reflection coefficient of a current source under ideal conditions. express phase, express The phase.

[0031] Therefore, the reflection coefficient can be calculated. ,make and By ensuring that the phase range of the main power amplifier unit 310 centered at 90° is equal, the relative bandwidth can also be calculated. The specific formula is as follows: in, Indicates the center frequency. Indicates the operating frequency.

[0032] The reflection coefficient of the current source plane under ideal conditions is: The combined reflection coefficient of the plane resistivity factor of the current source is: in, This represents the impedance of the current source plane in saturation state, specifically 32Ω.

[0033] In this embodiment, the main power amplifier unit 310 performs impedance matching and impedance transformation (setting the center phase to 90°), satisfying impedance matching during backoff and saturation. The auxiliary power amplifier unit 320 enables load modulation during operation. The post-matching network unit 400 is mainly used to adjust the distribution of harmonic impedance of the main power amplifier on the Smith chart. In this scheme, the broadband hybrid asymmetric Doherty power amplifier introduces resistive and continuity factors, and its impedance is calculated as follows: Voltage of hybrid continuous operating mode with introduction of resistive factor for: in, ( The symbols represent the operating state, α represents the fundamental component coefficient, which controls the fundamental frequency, β represents the third harmonic component coefficient, which controls the magnitude of the harmonic components, γ is the continuity factor, which changes the representation of impedance on the Smith chart from a point to a line, thus expanding the impedance range and bandwidth, and δ is the resistive factor, which can be adjusted by circuit parameters, changing the representation of impedance on the Smith chart from a line to a region, thus also expanding the impedance range and bandwidth.

[0034] When α=1 and β=0, its operation is class J; when α=1 and β=0, its operation is class F. α and β satisfy the following relationship: when α=1 and β=0, its operation is class F. The area between these two is class F. This indicates a continuous pattern that incorporates a continuous factor. This indicates the operating state of the introduced resistive factor. To ensure that the voltage value is not less than 0 after its introduction, the range of values ​​for the continuity factor and the resistive factor is as follows: , .

[0035] Current in hybrid continuous operating mode with introduced resistive factor for: β must satisfy: The impedance range of this hybrid transistor can be determined from the voltage-to-current ratio. in, The term represents the hybrid fundamental impedance in the back-off state of the transistor current source plane, where Z represents impedance, the subscript c indicates the transistor current source plane, h1 represents the hybrid fundamental impedance, bo represents the back-off state, h2 represents the hybrid second harmonic, and h3 represents the hybrid third harmonic. Since... To ensure that the impedance of the mixed-type second harmonic is not negative, then 0 < <1.

[0036] For ease of calculation, let: Then we have: in, =2,R opt=32Ω, substituting the resistivity factor into the mixed impedance formula and combining it with the reflection coefficient calculation formula, we have: Simplification allows us to calculate the relationship between γ and δ, as well as the bandwidth range: Since γ is symmetric about the origin in the range of -1 to 1, and arctan is an odd function, we can obtain: Since the variable on the right side of the above equation is known, it can be calculated. The value of is given, therefore the formula for relative bandwidth is: in, express upper sideband phase, express The lower sideband phases are symmetrical about 90°. Substituting the equations for A and B and combining them with the above equations, we can derive: .

[0037] Although introducing a resistive factor degrades the performance of the power amplifier in this design, it significantly expands the bandwidth. The final selected ranges for the resistive and continuity factors are as follows: With γ = ±0.52, the final calculated bandwidth reached 60%, as verified by MATLAB. Figure 3 As shown. Based on the transmission line impedance calculation formula, the impedance distribution range at the junction point can be obtained. The calculation formulas for the second and third harmonic impedances of the transmission line are as follows: .

[0038] When designing a broadband hybrid asymmetric Doherty power amplifier, the ranges of α and β are selected, and the ranges of γ and δ are calculated using the above formula. Then, based on the models of the first and second switching transistors used, the optimal impedance R of the corresponding transistors is calculated using the impedance calculation formula. opt Therefore, the devices in the impedance inversion network unit 300 are designed, and then the devices in the post-matching network unit 400 are designed according to the transmission line calculation formula. Finally, the optimal input impedance of the first and second switching transistors is found by load-pull software simulation, and the devices in the input matching network unit 100 are designed.

[0039] Please refer to Figure 4 and Figure 5 , Figure 4This is a circuit diagram of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. Figure 5 This is a schematic diagram of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor according to an embodiment of the present invention. In a specific embodiment, the main power amplifier unit 310 includes a first coupling capacitor C1, a first RC frequency selection network, and a first switching transistor Q1. The input terminal of the first coupling capacitor C1 is electrically connected to the first output terminal of the power divider 200, and the output terminal of the first coupling capacitor C1 is electrically connected to the input terminal of the first switching transistor Q1 through the first RC frequency selection network. The output terminal of the first switching transistor Q1 is electrically connected to the input terminal of the post-matching network unit 400. The first coupling capacitor C1 serves to isolate DC signals. More specifically, the first RC frequency selection network includes a first resistor R1 and a fourth capacitor C4 connected in parallel. The two ends of the first resistor R1 and the fourth capacitor C4 connected in parallel are electrically connected to the output terminal of the first coupling capacitor C1 and the gate of the first switching transistor Q1, respectively. The first RC frequency selection network includes a first resistor R1 and a fourth capacitor C4, which are connected in parallel in the circuit.

[0040] The first coupling capacitor C1 is connected to the power divider 200, the first coupling capacitor C1 is connected to the first RC frequency selection network, and the first RC frequency selection network is connected to the first switching transistor Q1 via microstrip lines. The length and width dimensions of the microstrip lines can be flexibly designed according to actual needs.

[0041] Specifically, the auxiliary power amplifier unit 320 includes a second coupling capacitor C2, a second RC frequency selection network, and a second switching transistor Q2. The input terminal of the second coupling capacitor C2 is electrically connected to the second output terminal of the power divider 200, and the output terminal of the second coupling capacitor C2 is electrically connected to the input terminal of the second switching transistor Q2 through the second RC frequency selection network. The output terminal of the second switching transistor Q2 is electrically connected to the input terminal of the post-matching network unit 400. The type of the second switching transistor Q2 is different from that of the first switching transistor Q1. The second coupling capacitor C2 serves to isolate DC signals. The second RC frequency selection network includes a second resistor R2 and a fifth capacitor C5, which are connected in parallel in the circuit. The second switching transistor Q2 can also amplify the signal passing through it. More specifically, the second RC frequency selection network includes a second resistor R2 and a fifth capacitor C5 connected in parallel. The two ends of the parallel connection of the second resistor R2 and the fifth capacitor C5 are respectively electrically connected to the output terminal of the second coupling capacitor C2 and the gate of the second switching transistor Q2. The first switching transistor Q1 can amplify the signal passing through it.

[0042] The second coupling capacitor C2 is connected to the power divider 200, the second coupling capacitor C2 is connected to the second RC frequency selection network, and the second RC frequency selection network is connected to the second switching transistor Q2 via microstrip lines. The length and width dimensions of the microstrip lines can be flexibly designed according to actual needs.

[0043] In one specific embodiment, both the first switching transistor Q1 and the second switching transistor Q2 are GaN HEMT transistors, LDMOS transistors, or GaAs FET transistors; The gate of the first switching transistor Q1 is electrically connected to the output terminal of the first RC frequency selection network, the drain is electrically connected to the input terminal of the matching network unit 400, and the source is grounded. The gate of the second switching transistor Q2 is electrically connected to the output of the second RC frequency selection network, the drain is electrically connected to the input of the matching network unit 400, and the source is grounded.

[0044] In this embodiment, GaN HEMT transistors, LDMOS transistors, or GaAs FET transistors are selected to meet the requirements of high frequency and high power, ensuring the transistor's operating performance. It is understood that the first switching transistor Q1 and the second switching transistor Q2 described above can also be other high-power transistors to meet the needs of specific application environments.

[0045] In one embodiment, the main power amplifier unit 310 further includes a third resistor R3 and a first bias capacitor C6 electrically connected. The first resistor R3 is electrically connected to the gate of the first switching transistor Q1, and the other end of the first bias capacitor C6 is grounded. The auxiliary power amplifier unit 320 further includes a fourth resistor R4 and a second bias capacitor C7 electrically connected. One end of the fourth resistor R4 is electrically connected to the gate of the second switching transistor Q2, and the other end of the second bias capacitor C7 is grounded. The aforementioned third resistor R3 and first bias capacitor C6 are used to ensure that the first switching transistor Q1 operates in a stable working state, and the fourth resistor R4 and second bias capacitor C7 are used to ensure that the second switching transistor Q2 operates in a stable working state, preventing signal oscillation. The first bias capacitor C6 and second bias capacitor C7 can be a capacitor bank composed of multiple parallel capacitors.

[0046] In one specific embodiment, the post-matching network unit 400 includes a microstrip line, a first open-circuit line A, a second open-circuit line B, and a third coupling capacitor C3. The microstrip line is electrically connected to the input terminal of the third coupling capacitor C3, and the output terminal of the third coupling capacitor C3 is used to connect a load. The first open-circuit line A and the second open-circuit line B are respectively electrically connected to the microstrip line. The microstrip line is a distributed microstrip line, and its length and width can be designed according to actual requirements. The first open-circuit line A and the second open-circuit line B are used to jointly adjust the second and third harmonics. The third coupling capacitor C3 also serves to isolate DC current.

[0047] Specifically, the post-matching network unit 400 further includes a third bias capacitor C8. One end of the third bias capacitor C8 is electrically connected to the microstrip line, and the other end of the third bias capacitor C8 is grounded. The aforementioned third bias capacitor C8 ensures that the post-matching network unit 400 operates in a stable state and prevents signal oscillation. The third bias capacitor C8 can also be a capacitor bank composed of multiple capacitors connected in parallel.

[0048] Please refer to Figures 6-10 , Figure 6 This is a schematic diagram of the theoretical and simulated impedance curves at the current source plane of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor during power back-off, according to an embodiment of the present invention. Figure 7 This is a schematic diagram of the theoretical and simulated impedance curves of a broadband hybrid asymmetric Doherty power amplifier based on resistive factor at the junction point (normalized impedance 30Ω) according to an embodiment of the present invention. Figure 8 This is a schematic diagram of the simulation curves of the current and voltage waveforms of a 1.7 GHz signal at the current source plane when the first switching transistor Q1 is in a power back-off state, according to an embodiment of the present invention. Figure 9 This is a schematic diagram of the simulation curves of the current and voltage waveforms of the 2.3 GHz signal at the current source plane when the first switching transistor Q1 is in the power back-off state, according to an embodiment of the present invention. Figure 10 This is a schematic diagram showing the simulated efficiency, gain, and output power curves of signals of different frequencies at the first switching transistor Q1 in one embodiment of the present invention. The theoretically calculated impedance distribution and the actual simulated impedance distribution of the transistor port of the main power amplifier unit 310 are shown below. Figure 6 As shown, the theoretically calculated impedance distribution and the actual simulated impedance distribution of the 400-plane port of the post-matching network element are as follows: Figure 7 As shown, Figure 6 and Figure 7 The resistivity factor δ varies uniformly from 0 to 0.5. Since the power amplifier in this design is a hybrid class amplifier between Class J and Class F, to reduce transistor losses, the time-domain waveforms of the transistor's current and voltage should not overlap. The simulation results are as follows... Figure 8 and Figure 9 As shown. Figure 10 The relationship between the drain efficiency, gain, and output power of the Doherty power amplifier is shown. Within the 1.4–2.6 GHz frequency band, the simulated drain efficiency is 46–70% within the 9 dB output power back-off range, with the efficiency reaching 45.5–55% at the 9 dB back-off point. Its saturated output gain is in the range of 5.6–9.2 dB, and its saturated output power is in the range of 45.2–46.3 dBm. Through theoretical and simulation verification, this hybrid continuous-type Doherty power amplifier based on resistive factor design can achieve a wide bandwidth while maintaining good overall performance.

[0049] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made using the contents of the present invention specification and drawings under the technical concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A broadband hybrid asymmetric Doherty power amplifier based on resistive factor, characterized in that, The broadband hybrid asymmetric Doherty power amplifier includes: The input matching network unit is used to input the input signal to be amplified; A power divider, wherein the input terminal of the power divider is electrically connected to an input matching network unit to split the input signal into two target signals, and the output terminal of the power divider has a first output terminal and a second output terminal to independently output each target signal; An impedance inversion network unit is provided, comprising a main power amplifier unit and an auxiliary power amplifier unit. The input terminal of the main power amplifier unit is electrically connected to the first output terminal of the power divider to perform impedance matching and impedance transformation according to the target signal output from the first output terminal. The input terminal of the auxiliary power amplifier unit is electrically connected to the second output terminal of the power divider to perform load modulation according to the target signal output from the second output terminal. The post-matching network unit has its input terminals electrically connected to the output terminals of the main power amplifier unit and the auxiliary power amplifier unit, respectively, and is used to adjust the fundamental and harmonic impedances at the combining point to perform harmonic control on the main power amplifier unit.

2. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 1, characterized in that, The main power amplifier unit includes a first coupling capacitor, a first RC frequency selection network, and a first switching transistor. The input terminal of the first coupling capacitor is electrically connected to the first output terminal of the power divider. The output terminal of the first coupling capacitor is electrically connected to the input terminal of the first switching transistor through the first RC frequency selection network. The output terminal of the first switching transistor is electrically connected to the input terminal of the post-matching network unit.

3. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 2, characterized in that, The auxiliary power amplifier unit includes a second coupling capacitor, a second RC frequency selection network, and a second switching transistor. The input terminal of the second coupling capacitor is electrically connected to the second output terminal of the power divider. The output terminal of the second coupling capacitor is electrically connected to the input terminal of the second switching transistor through the second RC frequency selection network. The output terminal of the second switching transistor is electrically connected to the input terminal of the post-matching network unit. The model of the second switching transistor is different from that of the first switching transistor.

4. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 3, characterized in that, Both the first and second switching transistors are GaN HEMT transistors, LDMOS transistors, or GaAsFET transistors; The gate of the first switching transistor is electrically connected to the output of the first RC frequency selection network, the drain is electrically connected to the input of the matching network unit, and the source is grounded. The gate of the second switching transistor is electrically connected to the output of the second RC frequency selection network, the drain is electrically connected to the input of the matching network unit, and the source is grounded.

5. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 4, characterized in that, The main power amplifier unit also includes a third resistor and a first bias capacitor that are electrically connected. The third resistor is electrically connected to the gate of the first switching transistor, and the other end of the first bias capacitor is grounded. The auxiliary power amplifier unit also includes a fourth resistor and a second bias capacitor that are electrically connected. One end of the fourth resistor is electrically connected to the gate of the second switching transistor, and the other end of the second bias capacitor is grounded.

6. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 4, characterized in that, The first RC frequency selection network includes: a first resistor and a fourth capacitor connected in parallel, wherein the two ends of the first resistor and the fourth capacitor connected in parallel are respectively electrically connected to the output terminal of the first coupling capacitor and the gate of the first switching transistor. The second RC frequency selection network includes a second resistor and a fifth capacitor connected in parallel. The two ends of the second resistor and the fifth capacitor connected in parallel are electrically connected to the output terminal of the second coupling capacitor and the gate of the second switching transistor, respectively.

7. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 1, characterized in that, The post-matching network unit includes a microstrip line, a first open path, a second open path, and a third coupling capacitor. The microstrip line is electrically connected to the input terminal of the third coupling capacitor, and the output terminal of the third coupling capacitor is used to connect to a load. The first open path and the second open path are respectively electrically connected to the microstrip line.

8. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 7, characterized in that, The post-matching network unit also includes a third bias capacitor, one end of which is electrically connected to the microstrip line, and the other end of which is grounded.

9. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in claim 7, characterized in that, The microstrip line is a distributed microstrip line.

10. The broadband hybrid asymmetric Doherty power amplifier based on resistive factor as described in any one of claims 1-9, characterized in that, The power divider is a Wilkinson power divider.