Method for improving heat dissipation performance of cof roll tape

By optimizing the mask design and increasing the area of ​​the light-blocking pattern, the problem of insufficient heat dissipation of COF tape was solved, resulting in more efficient heat dissipation performance and reduced costs.

CN122161013APending Publication Date: 2026-06-05HEFEI ESWIN MATERIALS TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HEFEI ESWIN MATERIALS TECH CO LTD
Filing Date
2026-04-16
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

Existing COF tape heat dissipation methods increase manufacturing costs and process flow, and the heat dissipation effect is insufficient, affecting service life and working performance.

Method used

By optimizing the mask design, increasing the area of ​​the light-shielding pattern, especially the line width of the virtual pattern area and the functional circuit area, and increasing the area of ​​pure copper, heat dissipation performance is improved.

Benefits of technology

It improves the heat dissipation performance of COF tape, reduces manufacturing costs, extends service life, and enhances work efficiency.

✦ Generated by Eureka AI based on patent content.

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    Figure CN122161013A_ABST
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Abstract

The present application relates to the technical field of COF tape preparation, and particularly relates to a method for improving the heat dissipation performance of a COF tape. The method is to increase the light-shielding pattern area of a mask plate used for preparing the COF tape, so as to increase the copper area of the COF tape. In the case that the structure of the original product is not changed, the heat dissipation of the COF tape product is improved by optimizing the product line design on the mask plate and the differential optimization of different areas for heat dissipation, that is, the heat dissipation capacity of the product is improved by increasing the proportion of the pure copper area of the whole pattern of the COF tape.
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Description

Technical Field

[0001] This invention relates to the field of COF tape manufacturing technology, and in particular to a method for improving the heat dissipation performance of COF tape. Background Technology

[0002] COF (Chip On Film) is an advanced packaging technology that directly encapsulates integrated circuit chips onto flexible circuit boards (such as FPCs), also known as flip-chip film or flip-chip film. This technology uses a flexible attached circuit board as a carrier to combine the chip with the flexible substrate circuitry, achieving highly integrated connections. Compared to traditional packaging, COF technology can reduce size and weight, improve heat dissipation, and support complex circuit integration, making it suitable for applications with high space and performance requirements.

[0003] The main manufacturing processes for COF carrier tapes include: coating → exposure → development → etching → resist removal → micro-etching → tin plating → solder resist printing. As consumer electronics screens need to integrate more functions to enhance the consumer experience, more lines need to be laid on the COF carrier tape. More lines mean more input and output signals, and the chip needs to process more input and output signals, which causes the chip to generate more heat during operation. If the heat generated by the chip during operation is not dissipated in time, it will affect the lifespan and working performance of the entire COF carrier tape.

[0004] The mainstream COF carrier heat dissipation method on the market is to add a thermal pad to the back of the COF carrier at the packaging and testing end. However, adding a thermal pad will undoubtedly increase the corresponding manufacturing costs and process flow. Summary of the Invention

[0005] The purpose of this invention is to address the aforementioned shortcomings of the prior art by proposing a method to improve the heat dissipation performance of COF tape.

[0006] The present invention provides a method for improving the heat dissipation performance of COF tape by increasing the area of ​​the light-shielding pattern on the mask used to prepare the COF tape, thereby increasing the copper area of ​​the COF tape.

[0007] Furthermore, the mask includes a glass substrate and a light-shielding pattern layer formed on the glass substrate; the light-shielding pattern layer is divided into a virtual pattern area and a functional circuit area, and the virtual pattern area is a whole light-shielding pattern.

[0008] Furthermore, the line width of the light-shielding line in the functional circuit area is L, and the spacing of the light-shielding line is S. Under the premise that the sum of L and S is a constant, L is increased, and S is not less than 8 μm.

[0009] Furthermore, the functional circuit area includes an inner lead area, and the light-shielding pin circuit of the inner lead area is divided into three segments: a head bonding circuit, a trapezoidal circuit, and a through circuit; the head bonding circuit is bonded to the chip, and its linewidth matches the bonding point of the chip; the linewidth of the through circuit is L, which is greater than the linewidth of the head bonding circuit.

[0010] Furthermore, the length of the head bonding line is less than 200 μm.

[0011] Furthermore, the length of the trapezoidal circuit is 40-60 μm.

[0012] Furthermore, the length of the trapezoidal circuit is 50 μm.

[0013] Furthermore, the difference between the linewidth of the through line and the linewidth of the head bonding line is not less than 3μm.

[0014] Since pure copper has a high thermal conductivity of up to 400 W / (m·K), this invention improves the heat dissipation of COF tape products by optimizing the product circuit design on the mask and optimizing the differences in heat dissipation in different areas, without changing the original product structure. In other words, it improves the heat dissipation capacity of the product by increasing the proportion of pure copper area on the entire COF tape pattern.

[0015] The specific methods to increase the proportion of pure copper area are as follows: 1. Change the dummy area (virtual pattern area) of the COF tape from a hollow design to a pure copper block design; 2. Design the pin lines of the Inner Lead area (inner lead area) into three segments: head bonding line, trapezoidal line, and through line; 3. Increase the line width of the COF tape copper circuit. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of the virtual pattern area of ​​the mask in the prior art and Embodiment 1; Figure 2 This is a schematic diagram of the line widening in Example 2; Figure 3 Comparison diagram of route design for the Inner Lead area; Detailed Implementation The following are specific embodiments of the present invention, which are described in conjunction with the accompanying drawings. However, the present invention is not limited to these embodiments.

[0017] The specific preparation method of the COF carrier tape in this embodiment is as follows: S1: In the coating stage, a 1.2-1.6μm layer of positive photoresist is uniformly coated on the surface of the copper foil substrate using a slot extrusion coating machine. S2: During the exposure stage, the positive photoresist is irradiated with a high-pressure UV lamp to transfer the pattern on the photomask onto the positive photoresist. S3: During the development stage, an alkaline developer with a pH > 13 is used to develop the pattern of the mask onto the positive photoresist. S4: Etching stage, using etching solution to etch away excess copper on the copper foil, transferring the pattern on the mask onto the copper foil, so that the actual circuit is formed on the copper foil; S5: Subsequent processes such as adhesive removal, tin plating, and solder rejection printing are then used to finally form the COF tape finished product.

[0018] Example 1 The photomask includes a glass substrate and a light-shielding pattern layer formed on the glass substrate; the light-shielding pattern layer is divided into a dummy pattern area and a functional circuit area, such as... Figure 1 As shown, the virtual pattern area is a complete light-blocking pattern. Figure 1 The upper image is a schematic diagram of a virtual pattern area in the prior art, and the lower image is the virtual pattern area of ​​this embodiment. The specific pattern of the virtual pattern area can be changed according to actual needs, as long as it is a whole light-blocking pattern.

[0019] It is important to clarify here that dummy areas refer to patterns added to the COF tape layout that have no actual electrical function. Their existence is purely to meet the physical or chemical requirements of the manufacturing process, not for conducting electricity or implementing circuit functions. Functional circuit areas, on the other hand, refer to all circuits other than dummy areas that are for conducting electricity or implementing circuit functions.

[0020] The dummy area on the mask is designed to block light, meaning the virtual pattern area is a single piece of light-blocking pattern. This prevents the dummy area on the COF tape from being exposed to high-pressure UV lamps during the exposure stage. After desmearing, because the dummy pins of the COF tape's InnerLead area are connected to its dummy area, the heat generated by the chip during operation can be dissipated. Furthermore, the dummy area on the COF tape is designed as a pure copper block, which greatly enhances its thermal conductivity and allows for rapid heat dissipation.

[0021] Example 2 like Figure 2As shown (the left image is the unmodified version, and the right image is the improved version of this embodiment), with the pitch unchanged (pitch = line width (L) + spacing between lines (S)), the line width L of the light-shielding lines in the functional line area on the mask is increased, and the spacing S between the lines is decreased, thereby increasing the line width. With the line height unchanged, the cross-sectional area of ​​the line increases, which in turn increases the proportion of pure copper area in the entire pattern, thus improving the heat dissipation performance of the COF tape.

[0022] Example 3 Based on Example 2, in order to ensure the bonding performance between the pin header and the chip in the Inner Lead region, the width of the pin header is matched with the bonding point of the chip. In the prior art, the width of the entire pin is often designed to be the same as the width of the pin header (e.g., ...). Figure 3 (See the left figure), but in this embodiment, the pin line design of the Inner Lead area on the mask is divided into three segments: head bonding line, trapezoidal line, and through line.

[0023] The head bonding circuit is bonded to the chip, and its width cannot be changed. However, the linewidth of the through circuit is increased. To ensure that the bonding effect is not affected and to avoid excessive stress, a trapezoidal circuit is set between the through circuit and the head bonding circuit, such as... Figure 3 As shown in the right figure, the head bonding circuit is connected to the trapezoidal circuit and the through circuit. The head bonding circuit is connected to the lower base of the trapezoidal circuit, and the through circuit is connected to the upper base of the trapezoidal circuit. The length of the upper base of the trapezoidal circuit is the same as the linewidth of the through circuit, which is greater than the length of the lower base of the trapezoidal circuit, which is the same as the linewidth of the head bonding circuit. This design not only ensures the normal application of the product, but also increases the cross-sectional area of ​​the entire Inner Lead through circuit, thereby improving the thermal conductivity of the through circuit in the Inner Lead region.

[0024] Comparative Example 1 The only difference between this comparative example and Example 1 is that the spacing between the lines S < 8 μm.

[0025] If the spacing S between lines is less than 8μm, the Hast capability of COF tape products will be weakened, and they may not pass performance tests when driven by high voltage; the morphology of copper lines will be trapezoidal, affecting the yield of copper line forming.

[0026] Comparative Example 2 The difference between this comparative example and Example 3 is that the line width of the Inner Lead region is consistent with the width of the head bonding line, which reduces the copper area and relatively weakens the heat dissipation performance of the product.

[0027] For any points not covered above, existing technologies shall apply.

[0028] Although specific embodiments of the present invention have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and are not intended to limit the scope of the invention. Those skilled in the art can make various modifications or additions to the described specific embodiments or use similar methods to replace them, without departing from the direction of the invention or exceeding the scope defined by the appended claims. Those skilled in the art should understand that any modifications, equivalent substitutions, improvements, etc., made to the above embodiments based on the technical essence of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for improving the heat dissipation performance of COF (Copper Oxide Foil) tape, characterized in that, Increasing the area of ​​the light-shielding pattern on the mask used to prepare the COF tape increases the copper area of ​​the COF tape.

2. The method for improving the heat dissipation performance of COF tape as described in claim 1, characterized in that, The mask includes a glass substrate and a light-shielding pattern layer formed on the glass substrate; the light-shielding pattern layer is divided into a virtual pattern area and a functional circuit area, and the virtual pattern area is a whole light-shielding pattern.

3. A method for improving the heat dissipation performance of COF tape as described in claim 1 or 2, characterized in that, The line width of the light-shielding lines in the functional circuit area is L, and the spacing between the light-shielding lines is S. Under the premise that the sum of L and S is a constant, L is increased, and S is not less than 8 μm.

4. The method for improving the heat dissipation performance of COF tape as described in claim 3, characterized in that, The functional circuit area includes an inner lead area, and the light-shielding pin circuit of the inner lead area is divided into three segments: a head bonding circuit, a trapezoidal circuit, and a through circuit. The head bonding circuit is bonded to the chip, and its linewidth matches the bonding point of the chip. The linewidth of the through circuit is L, which is greater than the linewidth of the head bonding circuit.

5. The method for improving the heat dissipation performance of COF tape as described in claim 4, characterized in that, The length of the head bonding line is less than 200 μm.

6. A mask for preparing COF tape as described in claim 4, characterized in that, The length of the trapezoidal circuit is 40-60 μm.

7. A mask for preparing COF tape as described in claim 6, characterized in that, The length of the trapezoidal circuit is 50 μm.

8. A mask for preparing COF tape as described in claim 4, characterized in that, The difference between the linewidth of the through line and the linewidth of the head bond line shall not be less than 3μm.