A method for preparing SiO2 thin film by direct current pulse PVD

Abstract

The application relates to the technical field of thin film preparation, and discloses a method for preparing a SiO2 thin film through direct-current pulse PVD, which comprises the following steps: loading a substrate into a vacuum cavity provided with a controllable mechanical baffle to perform plasma bombardment cleaning; introducing argon, oxygen and trace helium, controlling a unipolar direct-current pulse power source in a low-frequency low-duty cycle mode, and depositing a low-temperature buffer layer on the substrate; cutting off the power source and the reaction gas, and performing in-situ thermodynamic annealing on the bottom layer thin film in an environment with retained inert gas; resuming the introduction of oxygen, switching the power source into a high-frequency high-duty cycle mode, depositing a dense layer after pre-sputtering through the closed baffle, and finally cooling out of the furnace in a vacuum state. The method adopts the pulse sputtering with variable frequency and variable duty cycle in combination with the in-situ annealing process, effectively releases the residual stress in the initial deposition stage, suppresses the arc phenomenon on the target surface, and successfully prepares the silicon dioxide thin film with high interface bonding force and high density.

Description

Technical Field

[0001] This invention relates to the field of thin film preparation technology, specifically to a method for preparing SiO2 thin films by DC pulse PVD. Background Technology

[0002] Silica thin films are widely used in semiconductor manufacturing and protective coatings for optical devices, primarily due to their inherent optical transmittance, electrical insulation, and chemical stability. Currently, the industry mainly relies on physical vapor deposition (PVD) to prepare these films. However, based on feedback from actual production, current PVD technology still faces some process-level bottlenecks.

[0003] Taking a conventional deposition process as an example, it is difficult to maintain a dynamic balance between the energy and deposition rate of sputtered particles throughout the entire film growth cycle. This directly results in the accumulation of significant residual stress within the grown film. The presence of residual stress greatly weakens the interfacial adhesion between the film and the substrate. As a result, the coated film is prone to wrinkling or even detachment during subsequent processing or when exposed to alternating environmental temperatures. A common compromise in the industry to address excessive stress is to forcibly reduce the deposition power or slow down the film formation rate. However, this introduces new problems: insufficient atomic mobility at the deposition point leads to a weak and porous microstructure in the deposited film, failing to meet the high density standards required for practical applications. Conversely, simply increasing the sputtering energy to forcibly fill micropores and improve density inevitably exacerbates the secondary accumulation of internal stress. Ultimately, the limitations of conventional single-step deposition processes make low stress and high density of the film an irreconcilable contradiction.

[0004] Besides the trade-off between density and stress, the inherent instability of reactive sputtering is another critical concern. When oxygen is introduced into the cavity to participate in the reaction, insulating silicon dioxide inevitably adheres to the non-sputtering areas or edges of the silicon target. As deposition progresses, positive ions accumulate on these insulating surfaces. Once the accumulated surface charge exceeds a critical threshold, the target surface is broken down, triggering arcing. This frequent arcing not only easily induces target poisoning but also makes the plasma state highly unstable, interfering with the entire deposition process. In the final product, this manifests as fluctuating film deposition rates and even the introduction of large particle defects within the film, leading to a significant decrease in the uniformity and overall quality of the silicon dioxide film. Summary of the Invention

[0005] The technical problem solved by this invention is that existing physical vapor deposition technology often faces the problem of high residual stress inside the film when preparing silicon dioxide thin films. This can easily lead to insufficient bonding force between the film and the substrate, resulting in film peeling. Furthermore, conventional single-step deposition methods cannot simultaneously achieve low stress and high density of the film. In addition, during reactive sputtering, charge accumulation on the silicon target surface can easily occur and cause arcing, ultimately leading to instability in the deposition process and a decrease in film quality.

[0006] To address the above problems, the present invention provides the following technical solution: This invention provides a method for preparing SiO2 thin films using DC pulse PVD, employing the following technical solution: A method for preparing SiO2 thin films using DC pulse PVD, comprising: The substrate is loaded into a vacuum chamber with controllable mechanical baffles to obtain a pretreated substrate; The vacuum chamber is evacuated to the ultimate vacuum level and working gas is introduced to maintain the working pressure. The single-pole DC pulse power supply is turned on, and the pre-treated substrate is bombarded and cleaned while the controllable mechanical baffle is open to obtain the cleaned substrate. The substrate stage is heated and argon, oxygen and trace helium are introduced. The unipolar DC pulse power supply is controlled to be in a low frequency and low duty cycle mode. A low temperature buffer layer is deposited on the cleaned substrate with the controllable mechanical baffle open to obtain the bottom film substrate. The controllable mechanical baffle is closed and the unipolar DC pulse power supply and oxygen are cut off. The inert gas is retained to maintain the pressure. The bottom film substrate is heated to perform in-situ annealing to obtain the annealed substrate. The oxygen supply is restored and the unipolar DC pulse power supply is switched to a high frequency, high duty cycle mode. After pre-sputtering with the closed baffle, the controllable mechanical baffle is opened, a dense layer is deposited on the annealed substrate, and the substrate is cooled under vacuum and then removed from the furnace to obtain a SiO2 thin film.

[0007] By employing the above technical solution, and utilizing pulse sputtering with variable frequency and duty cycle combined with in-situ annealing, this invention obtains a silicon dioxide thin film with both high adhesion and high density. The specific reaction mechanism is as follows: During plasma bombardment cleaning, the working gas is ionized under a high-voltage electric field to generate argon ions, which are accelerated to bombard the substrate under a negative bias. Impurities and adsorbates on the substrate surface are stripped away through momentum transfer, thereby increasing the dangling bond density and surface energy of the substrate surface.

[0008] After cleaning is completed, the buffer layer deposition process begins, and an ionization reaction occurs within the vacuum chamber. ; The introduced trace amount of helium gas forms metastable helium atoms under electric field excitation. Because these metastable helium atoms have a high excitation potential, they can transfer energy to oxygen molecules through the Penning ionization effect, promoting the dissociation of oxygen molecules. This effectively increases the concentration of reactive oxygen species (ROS). Simultaneously, a unipolar DC pulsed power supply drives argon ions to bombard the silicon target, sputtering silicon atoms. These silicon atoms migrate to the substrate surface and react with ROS to form silicon dioxide. In this process, the low-frequency, low-duty-cycle mode limits the kinetic energy and deposition rate of the film-forming particles, allowing sufficient time for diffusion and alignment on the substrate surface, thereby generating a bottom buffer layer with high lattice matching with the substrate and low internal stress.

[0009] To further process the already formed buffer layer, the process disconnects the power supply and reactant gases, entering a purely thermodynamic annealing state. The heat energy causes lattice rearrangement and defect recombination of silicon and oxygen atoms within the low-temperature buffer layer. This process releases the residual stress accumulated during the previous deposition process and strengthens the adhesion between the underlying film and the substrate.

[0010] After stress release, high-throughput dense layer deposition is immediately performed. The system then switches to a high-frequency, high-duty-cycle mode, maintaining high-density plasma discharge during pulse forward conduction. Film-forming particles reach the substrate surface with high energy to fill microscopic pores. The matched reverse turn-off time neutralizes the positive charge accumulated on the silicon target surface, preventing target breakdown and arcing. This composite treatment method, combining bottom-layer buffering, in-situ annealing, and dense layer coverage, fundamentally solves the technical bottleneck of stress and density constraints in traditional processes, thus achieving a thin film effect that balances adhesion and density.

[0011] Preferably, in the process of obtaining the pretreated substrate, the substrate includes a single-crystal silicon wafer or a quartz glass lens that has been cleaned and dried; the substrate holder is driven to move linearly or rotate by a drive mechanism. By adopting the above technical solution, deposition dead zones can be effectively eliminated, ensuring that film-forming particles are evenly distributed on the substrate surface.

[0012] Preferably, in the process of obtaining the cleaned substrate, the working gas is high-purity argon; the unipolar DC pulse power supply applies a voltage of 500V to 600V, and the bombardment cleaning time is 3 to 5 minutes. By adopting the above technical solution, the ion bombardment energy is reasonably controlled, and excessive damage to the substrate lattice is avoided while removing surface contaminants.

[0013] Preferably, during the process of obtaining the underlying thin film substrate, the heating temperature of the substrate stage is set to 150℃~180℃; the volume flow ratio of argon to oxygen is adjusted to 1:1~1:5, the volume flow ratio of argon to trace helium is controlled to 10:1~15:1, and the total pressure of the vacuum chamber is controlled to be stable at 0.3Pa~1.0Pa. By adopting the above technical solution, basic thermal energy is provided for the reaction and a suitable partial pressure of the reaction gas is maintained in the chamber, avoiding excessive oxidation of the silicon target surface and target poisoning.

[0014] Preferably, the low-frequency, low-duty-cycle mode specifically involves setting the pulse frequency to 10kHz–15kHz and the duty cycle to 30%–35%; controlling the sputtering power density of the silicon target to 2.8W / cm²–4.2W / cm². By adopting the above technical solution, the average sputtering energy can be effectively reduced, thereby matching the low-speed growth requirements of the buffer layer.

[0015] Preferably, during the process of obtaining the underlying thin film substrate, the deposition rate of the low-temperature buffer layer is controlled to be 0.3 nm / s to 1.2 nm / s, and the deposition thickness of the low-temperature buffer layer is 4 nm to 96 nm. By adopting the above technical solution, the reasonable thickness limitation ensures that the buffer layer can isolate the stress brought by the subsequent growth of the dense layer without affecting the overall optical transmittance performance of the thin film.

[0016] Preferably, during the process of obtaining the annealed substrate, the heating rate is controlled at 15°C / min to 25°C / min using a substrate stage heater to raise the substrate stage temperature to 350°C to 400°C. By adopting the above technical solution, the heat input gradient is stably controlled, preventing excessively rapid heating that could lead to thermal expansion mismatch between the substrate and the film, thereby avoiding interfacial microcracks.

[0017] Preferably, in the process of obtaining the SiO2 thin film, the high-frequency, high-duty-cycle mode specifically includes: a dynamically switching pulse frequency of 40kHz–50kHz and a duty cycle of 55%–60%; and a reverse deionization turn-off time of 9μs–10μs. By adopting the above technical solution, the sputtering yield of target atoms is increased to accelerate the deposition rate, while the matched reverse turn-off time can promptly eliminate target surface charge and maintain the electrical stability of reactive sputtering.

[0018] Preferably, during the process of obtaining the SiO2 thin film, the pre-sputtering time with the closed baffle is 1 min to 2 min; the deposition rate of the dense layer is controlled to be 0.3 nm / s to 1.2 nm / s, and the deposition thickness of the dense layer is 16 nm to 384 nm. By adopting the above technical solution, the pre-sputtering process can effectively remove oxide layer impurities that may be generated on the target surface during annealing, ensuring that the deposition environment is in a stable state when the mechanical baffle is reopened.

[0019] Preferably, in the process of obtaining the SiO2 thin film, after the dense layer deposition is completed, the gas path is closed, and after cooling under vacuum, dry nitrogen is introduced before exiting the furnace; the final total thickness of the SiO2 thin film is 20nm to 480nm. By adopting the above technical solution, dry nitrogen is used to cut off the contact path between the thin film and moisture in the air, preventing moisture absorption and degradation of the high-temperature thin film when it exits the furnace.

[0020] This invention provides a method for preparing SiO2 thin films using DC pulse PVD. It has the following beneficial effects: 1. This invention prepares a low-temperature buffer layer by using a low-frequency, low-duty-cycle mode in the early stage of deposition, and combines it with in-situ thermal annealing treatment, which can significantly improve the stress distribution inside the film. This low-speed growing bottom film provides a good foundation for subsequent film layers. The subsequent in-situ annealing process promotes atomic rearrangement and repairs lattice defects through thermal energy, which greatly enhances the interfacial bonding force between the silicon dioxide film and the substrate, effectively solving the technical problem of easy film detachment.

[0021] 2. This invention employs a composite structure combining a buffer layer and a dense layer, successfully breaking the mutual constraint between film stress and density. By switching to a high-frequency, high-duty-cycle mode for deposition on the stress-released buffer layer, the structural integrity of the film can be improved by utilizing the filling effect of high-energy particles. Thus, a high-density silica film is obtained without damaging the adhesion of the underlying layer, thereby improving the overall protective performance of the film.

[0022] 3. This invention improves the electrical stability of the reactive sputtering process by introducing trace amounts of helium and matching the reverse deionization turn-off time of the unipolar DC pulse power supply. The Penning ionization effect of helium atoms promotes the dissociation of oxygen molecules, which improves deposition efficiency while preventing oxidation poisoning on the silicon target surface. Combined with timely neutralization of the target surface charge, it effectively suppresses arcing during sputtering, ensuring the uniformity of film quality and the continuity of the process. Attached Figure Description

[0023] Figure 1 This is a comparison chart of the plasma discharge stability trends of various embodiments and comparative examples of the present invention; Figure 2This is a diagram showing the distribution of the basic physical properties of thin film optics in the embodiments and comparative examples of the present invention; Figure 3 The diagram shows the distribution of electrical defects and insulating dielectric properties in the embodiments and comparative examples of this invention. Figure 4 The diagram shows the macroscopic thermodynamic stress release and uniformity distribution of the embodiments and comparative examples of the present invention. Detailed Implementation

[0024] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] Examples 1-3: Example 1: This embodiment provides a method for preparing SiO2 thin films using DC pulse PVD, including the following steps: S1. An 8-inch single-crystal silicon wafer is cleaned and dried using the standard RCA cleaning process, and then loaded onto a substrate holder in a vacuum chamber equipped with a controllable mechanical baffle. The substrate holder is set to run at a speed of 0.6 m / min to obtain a pre-treated substrate. S2. Start the vacuum system to evacuate the vacuum chamber to the ultimate vacuum level of 1×10⁻⁶. -5 Pa, high-purity argon gas is introduced to maintain the working pressure of the cavity at 0.5 Pa, the controllable mechanical baffle is kept in the open state, a single-pole DC pulse power supply is turned on to apply a voltage of 500V and a frequency of 10kHz, and the surface of the pretreated substrate is subjected to plasma bombardment cleaning for 3 minutes. After cleaning, the power is turned off to obtain the cleaned substrate. S3. Set the substrate stage heating temperature to 150℃, adjust the volume flow ratio of high-purity argon to high-purity oxygen to 1:1, introduce trace amounts of high-purity helium and control the volume flow ratio of argon to helium to 10:1, and stabilize the total pressure in the chamber at 0.3Pa; turn on the unipolar DC pulse power supply, set the pulse frequency to 10kHz and the duty cycle to 30%, and control the sputtering power density of a single high-purity silicon target to 2.8W / cm². 2 The controllable mechanical baffle is opened, and a 4nm thick low-temperature buffer layer is deposited on the cleaned substrate at a deposition rate of 0.3nm / s to obtain the bottom thin film substrate. S4. Immediately after the deposition reaches the target, close the controllable mechanical baffle, simultaneously cut off the output of the unipolar DC pulse power supply and stop the supply of high-purity oxygen, and retain high-purity argon and high-purity helium to maintain the total pressure of the chamber; heat the substrate stage temperature to 350°C by using the substrate stage heater at a heating rate of 15°C / min, and perform in-situ pure thermodynamic annealing of the bottom thin film substrate in a plasma-free environment to obtain the annealed substrate; S5. After the temperature stabilizes, the high-purity oxygen intake is restarted and restored to the original 1:1 flow ratio. The single-pole DC pulse power supply is dynamically switched to a high-frequency, high-duty-cycle mode with a pulse frequency of 40kHz and a duty cycle of 60% (at this time, the reverse deionization turn-off time of the equipment output is strictly matched to 10μs). The device is re-ignited while the controllable mechanical baffle remains closed, and a high-throughput pre-sputtering cleaning is performed for 1 minute. After the pre-sputtering is completed, the controllable mechanical baffle is opened again, and the remaining 16nm thick dense layer is deposited on the annealed substrate at a rate of 0.3nm / s. The power supply and gas path are turned off, and the device is cooled in a vacuum for 30 minutes before being charged with dry nitrogen and removed from the furnace to obtain a final coating product with a total thickness of 20nm.

[0026] Example 2: This embodiment provides a method for preparing SiO2 thin films using DC pulse PVD, including the following steps: S1. The quartz glass lens is ultrasonically cleaned and dried in sequence with acetone, ethanol and ultrapure water, and then loaded onto the substrate holder in the vacuum chamber equipped with a controllable mechanical baffle. The running speed of the substrate holder is set to 0.6m / min to obtain the pretreated substrate. S2. Start the vacuum system to evacuate the vacuum chamber to the ultimate vacuum level of 1×10⁻⁶. -5 Pa, high-purity argon gas is introduced to maintain the working pressure of the cavity at 0.5 Pa, the controllable mechanical baffle is kept in the open state, a single-pole DC pulse power supply is turned on to apply a voltage of 550V and a frequency of 10kHz, and the surface of the pretreated substrate is subjected to plasma bombardment cleaning for 4 minutes. After cleaning, the power is turned off to obtain the cleaned substrate. S3. Set the substrate stage heating temperature to 165℃, adjust the volume flow ratio of high-purity argon to high-purity oxygen to 1:3, introduce trace amounts of high-purity helium and control the volume flow ratio of argon to helium to 12:1, and stabilize the total pressure in the chamber at 0.6Pa; turn on the unipolar DC pulse power supply, set the pulse frequency to 12kHz and the duty cycle to 32%, and control the sputtering power density of a single high-purity silicon target to 3.5W / cm³. 2 The controllable mechanical baffle is opened, and a 50nm thick low-temperature buffer layer is deposited on the cleaned substrate at a deposition rate of 0.7nm / s to obtain the bottom thin film substrate. S4. After the deposition reaches the target, immediately close the controllable mechanical baffle, simultaneously cut off the output of the unipolar DC pulse power supply and stop the supply of high-purity oxygen, and retain high-purity argon and high-purity helium to maintain the total pressure of the chamber; heat the substrate stage temperature to 375°C by using the substrate stage heater at a heating rate of 20°C / min, and perform in-situ pure thermodynamic annealing of the bottom thin film substrate in a plasma-free environment to obtain the annealed substrate; S5. After the temperature stabilizes, the high-purity oxygen intake is restarted and restored to the original 1:3 flow ratio. The unipolar DC pulse power supply is dynamically switched to a high-frequency, high-duty-cycle mode with a pulse frequency of 45kHz and a duty cycle of 58% (at this time, the reverse deionization turn-off time of the equipment output is precisely matched to 9.3μs). The device is re-ignited while the controllable mechanical baffle remains closed, and a high-throughput pre-sputtering cleaning is performed for 1.5 minutes. After the pre-sputtering is completed, the controllable mechanical baffle is opened again, and the remaining 200nm thick dense layer is deposited on the annealed substrate at a rate of 0.7nm / s. The power supply and gas path are turned off, and the device is cooled in a vacuum state for 30 minutes before being charged with dry nitrogen and removed from the furnace to obtain a final coating product with a total thickness of 250nm.

[0027] Example 3: This embodiment provides a method for preparing SiO2 thin films using DC pulse PVD, including the following steps: S1. The thick quartz glass lens is ultrasonically cleaned and dried in sequence with acetone, ethanol and ultrapure water, and then loaded onto the substrate holder in the vacuum chamber equipped with a controllable mechanical baffle. The rotation speed of the substrate holder is set to 20 rpm to obtain the pretreated substrate. S2. Start the vacuum system to evacuate the vacuum chamber to the ultimate vacuum level of 1×10⁻⁶. -5 Pa, high-purity argon gas is introduced to maintain the working pressure of the cavity at 0.5 Pa, the controllable mechanical baffle is kept in the open state, a single-pole DC pulse power supply is turned on to apply a voltage of 600V and a frequency of 10kHz, and the surface of the pretreated substrate is subjected to plasma bombardment cleaning for 5 minutes. After cleaning, the power is turned off to obtain the cleaned substrate. S3. Set the substrate stage heating temperature to 180℃, adjust the volume flow ratio of high-purity argon to high-purity oxygen to 1:5, introduce trace amounts of high-purity helium and control the volume flow ratio of argon to helium to 15:1, and stabilize the total pressure in the chamber at 1.0 Pa; turn on the unipolar DC pulse power supply, set the pulse frequency to 15 kHz and the duty cycle to 35%, and control the sputtering power density of a single high-purity silicon target to 4.2 W / cm². 2 The controllable mechanical baffle is opened, and a 96nm thick low-temperature buffer layer is deposited on the cleaned substrate at a deposition rate of 1.2nm / s to obtain the bottom thin film substrate. S4. After the deposition reaches the target, immediately close the controllable mechanical baffle, simultaneously cut off the output of the unipolar DC pulse power supply and stop the supply of high-purity oxygen, and retain high-purity argon and high-purity helium to maintain the total pressure of the chamber; heat the substrate stage temperature to 400°C by using the substrate stage heater at a heating rate of 25°C / min, and perform in-situ pure thermodynamic annealing of the bottom thin film substrate in a plasma-free environment to obtain the annealed substrate; S5. After the temperature stabilizes, the high-purity oxygen intake is restarted and restored to the original 1:5 flow ratio. The unipolar DC pulse power supply is dynamically switched to a high-frequency, high-duty-cycle mode with a pulse frequency of 50kHz and a duty cycle of 55% (at this time, the reverse deionization turn-off time of the equipment output is precisely matched to 9μs). The device is re-ignited while the controllable mechanical baffle remains closed, and a high-throughput pre-sputtering cleaning is performed for 2 minutes. After the pre-sputtering is completed, the controllable mechanical baffle is opened again, and the remaining 384nm thick dense layer is deposited on the annealed substrate at a rate of 1.2nm / s. The power supply and gas path are turned off, and the device is cooled in a vacuum for 30 minutes before being filled with dry nitrogen and removed from the furnace to obtain a final coating product with a total thickness of 480nm.

[0028] Comparative Examples 1-4: Comparative Example 1: Compared with Example 2, the difference is that in steps S3 and S5, no trace amount of high-purity helium is introduced at all; only high-purity argon is introduced to react with high-purity oxygen. The rest are the same.

[0029] Comparative Example 2: Compared with Example 2, the difference is that during the deposition of the low-temperature buffer layer in stage S3, a low frequency and low duty cycle are not used. Instead, the parameters of the unipolar DC pulse power supply are kept consistent with those in stage S5, that is, the pulse frequency is fixed at 45kHz and the duty cycle is 58% throughout the process, and the rest are the same.

[0030] Comparative Example 3: Compared with Example 2, the difference is that in the S4 stage (pure thermal annealing dormancy period from 165°C to 375°C), the controllable mechanical baffle is not closed, the unipolar DC pulse power supply is not cut off, and the supply of high-purity oxygen is not stopped (i.e., it slowly idles in an oxygen-rich environment to wait for the temperature to rise while maintaining low-power plasma ignition); at the same time, the baffle-closed high-flux pre-sputtering step is cancelled in the S5 stage, and the parameters are directly adjusted for deposition, and the rest are the same.

[0031] Comparative Example 4: Compared to Example 2, the difference lies in the use of a traditional one-step constant parameter deposition process. Specifically, no high-purity helium gas is introduced throughout the process; the substrate stage temperature is kept constant at 375°C from start to finish; the segmented buffering step S3 and the in-situ annealing step S4 are eliminated; a 250nm thick SiO2 film is deposited continuously in one pass under constant conditions of a pulse frequency of 45kHz and a duty cycle of 58%, with all other steps remaining the same.

[0032] Test Examples 1-4: Test Example 1: The deposition processes corresponding to the preparation processes in Examples 1, 2, and 3, as well as Comparative Examples 3 and 4, were selected as monitoring objects. During equipment operation, the arc counter module built into the DC pulse power supply was connected, and the arc monitoring threshold was set to 30% of the discharge current mutation overshoot setting value. The total number of micro-arc occurrences during the dense layer deposition stage of each test group was recorded, and the average micro-arc occurrence rate was calculated based on the runtime of the deposition stage. Using an oscilloscope and data acquisition card linked to the power supply system, the discharge voltage data within the first 30 seconds of dense layer deposition ignition was collected. The average value of the voltage fluctuation within the first 30 seconds was compared with the preset constant output voltage target value of the power supply, and the ignition voltage offset ΔV was calculated and recorded.

[0033] Table 1. Plasma discharge stability test data for each embodiment and comparative example Note: "-" indicates that the ignition voltage is lower than the preset constant output voltage target value of the power supply, that is, the voltage has a negative drop and shift.

[0034] See attached document Figure 1 , Figure 1 The left vertical axis and the dark gray solid line square mark represent the average micro-arc occurrence rate of the test object, and the right vertical axis and the light gray dashed triangle mark represent the on-glow voltage offset of the test object in the early stage of dense layer deposition. The horizontal axis corresponds to Examples 1 to 3, and Comparative Examples 3 and 4, respectively.

[0035] Data conclusion analysis: According to Table 1 and Figure 1The data shows that the discharge characteristics of each test group during the dense layer deposition stage exhibit physical state differentiation. In the single-target reactive sputtering process, the evolution of target surface impedance directly reflects the discharge voltage drift. Combined with the test data of Comparative Example 3, the voltage offset during the dense layer ignition stage drops to -124.6V, and the micro-arc occurrence rate reaches 863.5 times / h. Process environment analysis indicates that electrical instability is related to maintaining oxygen-rich plasma idling during the deposition cycle. During the substrate heating period of more than ten minutes, reactive oxygen free radicals chemically coordinate with the silicon target surface under low sputtering stripping rate conditions, resulting in the formation of an insulating silicon oxide passivation layer on the target surface. When the equipment performs dense layer deposition at high power, the insulating passivation layer blocks electron emission and conduction between the target substrate. The accumulation of positive charge on the surface causes local electric field distortion, which continuously breaks down the passivation layer and generates micro-arcs.

[0036] The data trends from Examples 1 to 3 show that the voltage offset remained between 2.8V and 5.7V, and the micro-arc occurrence rate was controlled below 20 times / h. By introducing a mechanical baffle and a spatiotemporal decoupling mechanism into the process, after cutting off the pulse power supply and oxygen source and closing the baffle, the target surface was placed in a background dormant environment composed of argon and helium, blocking the parasitic oxidation reaction path under high-temperature conditions. After entering the high-frequency dense deposition state in the S5 stage, a reverse deionization time window distributed between 9 and 10 microseconds was generated at the output end using a frequency of 40 to 50 kHz and a duty cycle of 55% to 60%. In the vacuum plasma dynamic discharge environment, the pulse turn-off relaxation period met the requirements for recombination and neutralization of residual positive charges in the target surface micro-region, preventing charge accumulation from exceeding the breakdown threshold.

[0037] Studies of reactive plasma discharge processes reveal that traditional methods commonly suffer from surface charge imbalance. Comparative Example 4 employed continuous deposition with constant parameters, achieving an arc rate of 158.1 times / h. Even without prolonged target idling and aging, a single DC pulse lacking temporal waveform modulation still exhibited localized charge mismatch under prolonged ion bombardment. By mechanically isolating chemically active materials during the non-deposition period and matching the plasma deionization cycle in the microscopic temporal domain during film formation, a dynamic balance between the metal and transition states on the target surface was maintained. Improved discharge stability reduced droplet splashing and particulate encapsulation, establishing the necessary physical environment for obtaining dielectric films with low pinhole defect density.

[0038] Test Example 2: Thin film substrates prepared according to Examples 1, 2, and 3, as well as Comparative Example 1, were selected as test objects. The refractive index parameter of the thin film at the center wavelength was measured using a spectroscopic ellipsometry. Before testing, the instrument was baseline-calibrated using a standard single-crystal silicon wafer. Five detection points were selected on the surface of the test sample according to a center-and-surround distribution pattern for data acquisition. The polarized light reflection data at each point was fitted using the Cauchy dispersion model to calculate and extract the average refractive index n value at 850 nm wavelength. Subsequently, the test sample was placed in the sample chamber of a UV-Vis-NIR spectrophotometer, and the spectral scanning range was set to 400 nm to 1000 nm, using an uncoated blank substrate of the same thickness as the reference optical path. After scanning, the transmittance data at 850 nm wavelength was extracted, and the measurement results were recorded to evaluate the optical loss caused by the internal chemical coordination state of the thin film.

[0039] Table 2. Test data of the basic optical physical properties of the examples and comparative examples See attached document Figure 2 , Figure 2 The left vertical axis and the dark gray solid line square mark represent the refractive index of the test object at 850nm wavelength, and the right vertical axis and the middle gray dashed line triangle mark represent the transmittance of the test object at 850nm wavelength. The horizontal axis corresponds to Examples 1 to 3, and Comparative Example 1.

[0040] Data conclusion analysis: According to Table 2 and Figure 2 The data shows that the optical characterization parameters of the test group reflect the changes in the microscopic chemical coordination state during vapor deposition. In the physical vapor deposition process of silica thin films, controlling the sub-oxidation state inside the film is fundamental to reducing intrinsic absorption and optical loss. Observing the data of Comparative Example 1, under the condition of no trace helium gas participating in the discharge, the refractive index of the film reaches 1.534, and the transmittance at 850 nm wavelength drops to 91.7%. From the analysis of the plasma discharge mechanism, the dissociation energy barrier of oxygen molecules in a pure argon-oxygen mixed discharge environment is about 5.1 eV. When relying on the low-frequency electron collision mechanism of DC pulse power supply, the generation efficiency of highly reactive oxygen free radicals in the gas phase is limited due to the collision cross section. Insufficient reaction kinetics cause the silicon atoms reaching the substrate to fail to complete oxidation coordination before condensation, and some unbonded silicon atoms and oxygen vacancies are retained inside the film structure, resulting in the deviation of intrinsic optical absorption and refractive index.

[0041] Examples 1 to 3 introduced trace amounts of helium in specific proportions into the process, transforming the thin film optical properties towards the stoichiometric ratio of silica. The first excited metastable energy level of helium atoms was 19.8 eV, exceeding the dissociation threshold of oxygen molecules. In gas-phase inelastic collisions, long-lived metastable helium atoms transferred energy to oxygen molecules through the Penning ionization effect. This energy transfer pathway compensated for the limitation of low ionization rate in direct electron collisions. Under the process setting of maintaining a constant total oxygen partial pressure in the cavity, the concentration of highly reactive oxygen free radicals in the region near the substrate was increased. The increased reactant reserve provided conditions for the coordination of surface-migrating silicon atoms. Measurement results showed that the refractive index of the three examples was between 1.455 and 1.463, close to the theoretical value of standard amorphous silica, and the transmittance all reached over 98%. Adjusting the chemical kinetics of gas-phase discharge avoided the target depth poisoning problem caused by simply increasing the oxygen flow rate to increase the oxidation degree, achieving process compatibility between discharge stability and thin film micro-coordination quality.

[0042] Test Example 3: Silica thin film substrates prepared in Examples 1, 2, and 3, as well as Comparative Examples 2 and 4, were selected as test objects. The samples with the thin films were immersed in a dilute hydrofluoric acid solution for 1 minute for standard wet etching to amplify the microscopic defects inside the films. After etching, the substrates were rinsed with ultrapure water and dried. The wafer surface was scanned using a dark-field optical surface defect scanner to count the number of etched pinholes per unit area and record the defect density parameters. On the unetched film surfaces of the same batch, aluminum electrodes were deposited using a mask to construct a test structure containing metal, insulator, and semiconductor. The voltage and current characteristics of this structure were scanned using a semiconductor parameter analyzer, and the limiting electric field strength corresponding to the leakage current breakdown point was recorded to extract the dielectric breakdown voltage data.

[0043] Table 3. Test data on electrical defects and dielectric properties of the embodiments and comparative examples See attached document Figure 3 , Figure 3 The left vertical axis and the dark gray solid line circle mark represent the macroscopic defect density of the test object, and the right vertical axis and the middle gray dashed diamond mark represent the dielectric breakdown voltage of the test object. The horizontal axis corresponds to Examples 1 to 3, and Comparative Examples 2 and 4.

[0044] Data conclusion analysis: According to Table 3 and Figure 3The data shows that the dielectric properties of the thin film insulation are controlled by the surface reaction kinetics during the deposition process. Residual oxygen vacancies and a porous microstructure within the insulating layer are physical factors that trigger leakage current collapse. Observing the test results of Comparative Example 2, at a low-temperature deposition stage of 165℃ using a frequency of 45kHz and a duty cycle of 58%, the macroscopic defect density of the thin film was measured to be 94.6 defects / cm². 2 The breakdown voltage is 5.8 MV / cm. When the thermodynamic energy is at a low point, the activation energy and lattice mobility of silicon atoms are limited. Due to the lack of low-frequency pulse turn-off relaxation time, incompletely coordinated silicon atoms are buried by subsequently deposited particles before reaching low-energy lattice sites. The misalignment between the electrical output frequency and the thermodynamic timescale leaves interfacial oxygen vacancy defects within the film, providing tunneling leakage channels for charge carriers.

[0045] Through adjustments to the spatiotemporal decoupling parameters, the dielectric properties of Examples 1 to 3 were improved. Example 1 showed a dielectric breakdown voltage of 12.6 MV / cm and a defect density of 1.3 defects / cm². 2 The use of a low-frequency, low-duty-cycle waveform of 10-15 kHz extended the DC pulse non-discharge turn-off time, providing a surface diffusion window for reactive oxygen species induced by the gas-phase Penning effect. Reactive oxygen species gained relaxation time and combined with low-mobility silicon atoms, blocking oxygen vacancy formation at the molecular level. Comparative Example 4 employed continuous deposition with constant parameters, but the fabrication process lacked a low-temperature kinetic matching buffer, and the initial lattice mismatch stress in heteroepitaxy lacked an in-situ thermodynamic annealing release stage. Residual internal stress induced microscopic interface deformation and stacking defects, resulting in a breakdown strength maintained at 7.4 MV / cm. The introduction of two-stage pulse time-domain modulation compensated for and matched the atomic surface diffusion limits at different temperature ranges, controlling interface defect generation and meeting the electrical reliability requirements of the insulating dielectric layer.

[0046] Test Example 4: Silica thin film substrates prepared in Examples 1, 2, 3, and Comparative Example 4 were selected as test objects. The difference in macroscopic radius of curvature of the substrate before and after coating was measured using a laser wafer warp meter. The extracted radius of curvature data was substituted into the Stoney formula to calculate the residual internal stress of the film. Nine detection points were selected in a cross-shaped distribution on the film surface using a spectroscopic ellipsometry to measure the local thickness. Based on the thickness measurement results at each point, the percentage difference between the maximum and minimum values ​​relative to the average thickness was calculated, and the film thickness uniformity parameter was recorded.

[0047] Table 4. Macroscopic thermodynamic stress release and uniformity test data of the examples and comparative examples See attached document Figure 4 , Figure 4The left vertical axis and the dark gray solid line triangle mark represent the residual internal stress of the film of the test object, while the right vertical axis and the middle gray dashed line circle mark represent the extremely poor film thickness uniformity of the test object. The horizontal axis corresponds to Examples 1 to 3 and Comparative Example 4.

[0048] Data conclusion analysis: According to Table 4 and Figure 4 Data shows that the thermodynamic evolution during physical vapor deposition affects the mechanical stability and spatial distribution characteristics of the thin film. In thick film preparation, the difference in thermal expansion coefficients between the heterogeneous substrate and the dielectric layer leads to the accumulation of interfacial stress. Observing the test results of Comparative Example 4, the residual internal stress of the film deposited continuously at constant temperature and parameters is 243.8 MPa, and the film thickness uniformity is extremely poor, reaching 6.7%. In the early stage of epitaxy, the high-throughput growth mode is directly entered, and the lattice distortion caused by lattice mismatch is not released. Continuous ion bombardment accompanied by the thermal inertia of the substrate causes the internal stress to be superimposed in the thickness direction, affecting the film growth smoothness.

[0049] After introducing a spatiotemporal decoupling mechanism, the residual stress in Examples 1 to 3 ranged from 78.4 MPa to 92.1 MPa, and the film thickness uniformity remained within 1.9%. The changes in mechanical properties were related to the in-situ annealing stage following buffer layer deposition. In an environment where the plasma was cut off and the mechanical baffle was closed, the underlying film underwent stress release and lattice rearrangement during the heating period. The heat treatment process consumed the interfacial deformation potential energy, providing a homogeneous condensation substrate with a stress-buffered gradient for the subsequent dense layer. The high-frequency pre-sputtering operation with the baffle closed before film deposition stripped impurities adsorbed on the target surface during the dormant period, maintaining the spatial uniformity of the sputtering particle flux when the baffle was officially opened. The combination of physical spatial isolation and thermodynamic timescales limited stress accumulation and particle flux drift during continuous deposition, meeting the device's requirements for thick film flatness.

Claims

1. A method for preparing SiO2 thin films by DC pulse PVD, characterized in that, Includes the following steps: The substrate is loaded into a vacuum chamber with controllable mechanical baffles to obtain a pretreated substrate; The vacuum chamber is evacuated to the ultimate vacuum level and working gas is introduced to maintain the working pressure. The unipolar DC pulse power supply is turned on, and the pre-treated substrate is bombarded and cleaned while the controllable mechanical baffle is open to obtain the cleaned substrate. The substrate stage is heated and argon, oxygen and trace helium are introduced. The unipolar DC pulse power supply is controlled to be in a low frequency and low duty cycle mode. A low temperature buffer layer is deposited on the cleaned substrate with the controllable mechanical baffle open to obtain the bottom film substrate. The controllable mechanical baffle is closed and the unipolar DC pulse power supply and oxygen are cut off. The inert gas is retained to maintain the pressure. The bottom film substrate is heated to perform in-situ annealing to obtain the annealed substrate. The oxygen supply is restored and the unipolar DC pulse power supply is switched to a high frequency, high duty cycle mode. After pre-sputtering with the closed baffle, the controllable mechanical baffle is opened, a dense layer is deposited on the annealed substrate, and the substrate is cooled under vacuum and then removed from the furnace to obtain a SiO2 thin film.

2. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, In the process of obtaining the pretreated substrate, the substrate includes a single-crystal silicon wafer or a quartz glass lens that has been cleaned and dried; the substrate holder is driven to move linearly or rotate by a drive mechanism.

3. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, During the process of obtaining the cleaned substrate, the working gas is high-purity argon; the unipolar DC pulse power supply applies a voltage of 500V to 600V, and the bombardment cleaning time is 3min to 5min.

4. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, During the process of obtaining the underlying thin film substrate, the heating temperature of the substrate stage is set to 150℃~180℃; the volume flow rate ratio of argon to oxygen is adjusted to 1:1~1:5, the volume flow rate ratio of argon to trace helium is controlled to 10:1~15:1, and the total pressure of the vacuum chamber is controlled to be stable at 0.3Pa~1.0Pa.

5. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, The low-frequency, low-duty-cycle mode is specifically as follows: Set the pulse frequency to 10kHz–15kHz and the duty cycle to 30%–35%; The sputtering power density of the silicon target was controlled at 2.8 W / cm². 2 ~4.2W / cm 2 .

6. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, During the process of obtaining the underlying thin film substrate, the deposition rate of the low-temperature buffer layer is controlled to be 0.3 nm / s to 1.2 nm / s, and the deposition thickness of the low-temperature buffer layer is 4 nm to 96 nm.

7. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, During the process of obtaining the annealed substrate, the heating rate is controlled at 15℃ / min to 25℃ / min by the substrate stage heater, and the temperature of the substrate stage is raised to 350℃ to 400℃.

8. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, In the process of obtaining the SiO2 thin film, the high-frequency high duty cycle mode is specifically as follows: the dynamic switching pulse frequency is 40kHz to 50kHz, the duty cycle is 55% to 60%, and the reverse deionization turn-off time is matched to 9μs to 10μs.

9. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, During the process of obtaining the SiO2 thin film, the pre-sputtering time with the closed baffle is 1 min to 2 min; the deposition rate of the dense layer is controlled to be 0.3 nm / s to 1.2 nm / s, and the deposition thickness of the dense layer is 16 nm to 384 nm.

10. The method for preparing SiO2 thin films by DC pulse PVD according to claim 1, characterized in that, In the process of obtaining the SiO2 thin film, after the dense layer deposition is completed, the gas path is closed, and after cooling under vacuum, dry nitrogen is introduced and the film is removed from the furnace; the total thickness of the SiO2 thin film obtained is 20nm to 480nm.

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