Sigma-delta adc testing trimming device and method

By integrating a low-inductive probe and impedance matching circuit, the problem of high-frequency dynamic linearity testing in traditional ADC testing equipment is solved, thereby improving the stability of ADC performance and testing efficiency, and reducing system debugging costs.

CN122247425APending Publication Date: 2026-06-19上海芯哲微电子科技股份有限公司

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
上海芯哲微电子科技股份有限公司
Filing Date
2026-03-19
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

Traditional ADC testing equipment struggles to perform high-frequency dynamic linearity testing, and the inductance value of low-inductance probes is difficult to control stably, resulting in inconsistent product performance in customer applications and high system-level debugging costs.

Method used

It adopts an integrated, seamless, cold-forged low-sensitivity probe and spring compression structure, combined with a two-stage impedance matching circuit and noise shielding structure, and designs automatic and manual control modules to achieve stable transmission of high-frequency signals and frequency calibration, supporting dynamic INL/DNL testing.

🎯Benefits of technology

It enables high-frequency dynamic INL/DNL testing, ensuring product performance consistency, reducing system-level debugging costs, and improving testing efficiency and accuracy.

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Abstract

This invention relates to the field of semiconductor testing technology, and in particular to a Σ-Δ ADC testing and adjustment device and method. The Σ-Δ ADC testing and adjustment device of this invention includes a test socket assembly for carrying the ADC under test and establishing a connection with the PCB through a low-inductance probe to achieve a resettable low-inductance contact; a two-stage impedance matching circuit for providing frequency adaptation for clock frequency adjustment; a dual control module, including an automatic control unit and a manual control unit; a digital-to-analog conversion and amplification module, including a digital-to-analog converter and a differential amplifier, wherein the digital input terminal of the digital-to-analog converter is connected to the logic output port of the dual control module, and the output terminal of the differential amplifier is used to connect to the differential input terminal of the ADC under test; a frequency testing module, connected to the clock output terminal of the ADC under test through a relay circuit, for detecting the clock frequency output by the ADC under test; and a logic signal acquisition module, connected to the digital output terminal of the ADC under test, for reading the analog-to-digital conversion logic signal of the ADC under test.
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