Multilayer electronic component

Abstract

The present disclosure provides a multilayer electronic component and a method of manufacturing a multilayer electronic component. The multilayer electronic component includes a main body including a dielectric layer and internal electrodes alternately disposed with the dielectric layer, and an external electrode disposed on the main body. The dielectric layer includes a central portion spaced apart from the internal electrodes, and an interface portion disposed between the internal electrodes and the central portion, the interface portion including Dy, Tb, and Gd. The atomic percentage content of Tb of the central portion is lower than the atomic percentage content of Tb of the interface portion, or substantially does not include Tb.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0192973, filed on December 20, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs), as multilayer electronic components, are chip capacitors mounted on printed circuit boards of various types of electronic products, such as imaging devices including liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smartphones, and mobile phones, for charging or discharging from them.

[0004] MLCCs are used as components in a variety of electronic devices due to their small size, high capacitance, and ease of installation. With the miniaturization and high output power of various electronic devices such as computers and mobile devices, the demand for miniaturization and high capacitance of multilayer ceramic capacitors is also increasing.

[0005] In addition, as the application environments of MLCCs become more diverse, reliability at high temperatures is also required.

[0006] To achieve miniaturization and high capacitance in MLCCs, the thickness of the dielectric layer needs to be reduced to increase the number of layers. However, as the dielectric layer thickness decreases, physical defects may become more likely, potentially increasing the process defect rate or reducing reliability. Furthermore, adding tetrahydropalmitate (Tb) to the dielectric layer may make it easier to ensure high-temperature reliability. However, ceramic green sheets with added Tb may have reduced rigidity, potentially increasing the process defect rate or introducing structural defects within the dielectric layer.

[0007] Therefore, there is a need to develop a new type of MLCC with a structure that can ensure high-temperature reliability while reducing the thickness of the dielectric layer. Summary of the Invention

[0008] One aspect of this disclosure is to provide a multilayer electronic component with excellent reliability.

[0009] Another aspect of this disclosure is to provide a multilayer electronic component with excellent high-temperature reliability.

[0010] Another aspect of this disclosure is to provide a multilayer electronic component including a dielectric layer with excellent rigidity.

[0011] However, the aspects of this disclosure are not limited to those set forth herein, and will be more readily understood in the process of describing specific exemplary embodiments of this disclosure.

[0012] According to one aspect of this disclosure, a multilayer electronic component is provided, comprising: a body including a dielectric layer and inner electrodes alternately disposed with respect to the dielectric layer; and an outer electrode disposed on the body. The dielectric layer may include a central portion spaced apart from the inner electrodes and an interface portion disposed between the inner electrodes and the central portion, the interface portion including Dy, Tb, and Gd. The atomic percentage content of Tb in the central portion may be lower than the atomic percentage content of Tb in the interface portion, or the central portion may be substantially free of Tb.

[0013] According to another aspect of this disclosure, a method of manufacturing a multilayer electronic component includes: coating a sol solution onto a film to form a first coating, the sol solution comprising Tb, Dy, and Gd; coating a slurry onto the first coating to form a ceramic portion, the slurry comprising ceramic particles; coating the sol solution onto the ceramic portion to form a second coating; and coating a paste onto the second coating to form an internal electrode pattern, the paste comprising metal particles.

[0014] According to an example embodiment of this disclosure, Dy, Tb and Gd can be disposed in the interface portion of the dielectric layer, and the atomic percentage content of Tb in the interface portion can be controlled to be higher than the atomic percentage content of Tb in the central portion of the dielectric layer, so that the multilayer electronic component can have improved reliability.

[0015] However, the various advantages and effects of this disclosure are not limited to those set forth herein, and will be more readily understood in the process of describing specific exemplary embodiments of this disclosure. Attached Figure Description

[0016] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 This is a schematic perspective view of a multilayer electronic assembly according to an exemplary embodiment of the present disclosure; Figure 2 It shows Figure 1 Example embodiments excluding external electrodes; Figure 3 It shows Figure 2 Example embodiments excluding the side edges; Figure 4 It is along Figure 1 A schematic cross-sectional view of line I-I'; Figure 5 It is along Figure 1 A schematic cross-sectional view taken from line II-II'; Figure 6 yes Figure 5 A magnified view of the K1 region; Figure 7 yes Figure 5 Enlarged view of region K2; Figure 8 This is a diagram illustrating the process for manufacturing a ceramic green sheet for forming capacitor forming portions used in a method of manufacturing a multilayer electronic component according to an exemplary embodiment of the present disclosure. Figure 9 This is a diagram illustrating the process of forming a laminate in a method of manufacturing a multilayer electronic component according to an exemplary embodiment of the present disclosure; Figure 10 This is a graph showing the results of performing High Accelerated Life Test (HALT) on 40 sample pieces for test number 4; Figure 11 This is a graph showing the results of performing a high-accelerated lifetime test (HALT) on 40 sample pieces of test number 5; Figure 12 This is a graph showing the results of high-accelerated lifetime testing (HALT) on 40 sample pieces of test number 6; and Figure 13 This is a graph showing the results of measuring the breakdown voltage (BDV) of 20 sample pieces for each of test numbers 4, 5, and 6. Detailed Implementation

[0017] In the following description, exemplary embodiments of the present disclosure are illustrated with reference to the accompanying drawings. However, the present disclosure may be exemplified in many different forms and should not be construed as limited to the specific exemplary embodiments set forth herein. Additionally, exemplary embodiments of the present disclosure may be provided to describe the present disclosure more completely to those skilled in the art. Therefore, for clarity of description, the shape and size of elements in the drawings may be exaggerated, and elements denoted by the same reference numerals in the drawings may be the same elements.

[0018] For clarity of this disclosure, parts irrelevant to the description have been omitted, and dimensions (e.g., lengths) have been enlarged to clearly indicate areas (e.g., layers), and similar parts having the same function within the same area are indicated by similar reference numerals throughout the specification. Throughout the specification, unless otherwise expressly stated, when an element is referred to as "comprising" or "including" another element, it means that it may also include other elements, but does not exclude them.

[0019] In the accompanying drawings, the X direction can be defined as a first direction, a stacking direction, or a thickness direction; the Y direction can be defined as a second direction or a length direction; and the Z direction can be defined as a third direction or a width direction.

[0020] Multilayer electronic components Figure 1 This is a schematic perspective view of a multilayer electronic component according to an exemplary embodiment of the present disclosure.

[0021] Figure 2 It shows Figure 1 Example embodiments excluding external electrodes.

[0022] Figure 3 It shows Figure 2 Example embodiments excluding the side edges.

[0023] Figure 4 It is along Figure 1 A schematic cross-sectional view taken from line I-I'.

[0024] Figure 5 It is along Figure 1 A schematic cross-sectional view taken from line II-II'.

[0025] Figure 6 yes Figure 5 A magnified view of the K1 region.

[0026] Figure 7 yes Figure 5 A magnified view of the K2 region.

[0027] In the following text, reference will be made to Figures 1 to 7 A multilayer electronic assembly 100 according to an exemplary embodiment of the present disclosure is described in detail. Furthermore, a multilayer ceramic capacitor (hereinafter referred to as "MLCC") is described as an example of a multilayer electronic assembly, but the present disclosure is not limited thereto, and the present disclosure is applicable to various electronic products formed using ceramic materials, such as inductors, piezoelectric elements, varistors, thermistors, etc.

[0028] A multilayer electronic component 100 according to an exemplary embodiment of the present disclosure may include: a body 110 including a dielectric layer 111 and inner electrodes 121 and 122 alternately disposed with respect to the dielectric layer 111; and outer electrodes 131 and 132 disposed on the body 110. The dielectric layer 111 may include a central portion CP spaced apart from the inner electrodes 121 and 122 and interface portions IP1 and IP2 disposed between the inner electrodes 121 and 122 and the central portion CP, the interface portions IP1 and IP2 including Dy, Tb and Gd. The atomic percentage content of Tb in the central portion CP may be lower than the atomic percentage content of Tb in the interface portions IP1 and IP2 (e.g., each of the interface portions IP1 and IP2), or the central portion CP may substantially exclude Tb. As used herein, the expressions “substantially exclude” and “substantially contain” can mean: (i) the Tb content measured by the methods described in this disclosure or any other method understood by a person skilled in the art is less than or equal to 0.05 at%, or (ii) the Tb content is less than the detection limit of the tools used in the methods described in this disclosure or any other method understood by a person skilled in the art.

[0029] To achieve miniaturization and high capacitance in MLCCs, the thickness of the dielectric layer needs to be reduced to increase the number of layers. However, as the dielectric layer thickness decreases, physical defects may become more likely, potentially increasing the process defect rate or reducing reliability. Conversely, adding tetrahydropalmitate (Tb) to the dielectric layer can easily ensure high-temperature reliability. However, ceramic green sheets with added Tb may have reduced rigidity, potentially increasing the process defect rate or introducing structural defects within the dielectric layer. Here, rigidity refers to a strong or hard property that prevents shape or volume change even when external pressure is applied.

[0030] According to an example embodiment of this disclosure, when Dy, Tb and Gd are disposed in the interface portions IP1 and IP2 of the dielectric layer 111, and the atomic percentage content of Tb in each of the interface portions IP1 and IP2 is controlled to be higher than the atomic percentage content of Tb in the central portion CP, physical defects and structural defects in the dielectric layer can be suppressed, and the multilayer electronic component 100 can have improved high-temperature reliability.

[0031] In the following, each of the components included in the multilayer electronic assembly 100 according to an exemplary embodiment of the present disclosure will be described.

[0032] In the body 110, the dielectric layer 111 and the inner electrodes 121 and 122 may be stacked alternately.

[0033] The specific shape of the main body 110 is not limited. However, as Figure 3As shown, the body 110 may have a hexahedral shape or a shape similar to a hexahedron. During the sintering process, the ceramic particles included in the body 110 may shrink, so that the body 110 may not have a hexahedral shape with perfectly straight lines, but may have a generally hexahedral shape.

[0034] The main body 110 may have: a first surface 1 and a second surface 2, which are opposite to each other in a first direction; a third surface 3 and a fourth surface 4, which are connected to the first surface 1 and the second surface 2, and are opposite to each other in a second direction; and a fifth surface 5 and a sixth surface 6, which are connected to the first surface 1 and the second surface 2, as well as the third surface 3 and the fourth surface 4, and are opposite to each other in a third direction.

[0035] Since the edge regions of the dielectric layer 111 on which the inner electrodes 121 and 122 are not disposed overlap each other, a step difference can be caused by the thickness of the inner electrodes 121 and 122, such that the corners connecting the first surface 1 to the third surface 3 to the sixth surface 6 and / or the corners connecting the second surface 2 to the third surface 3 to the sixth surface 6 may shrink relative to the first surface 1 or the second surface 2 towards the center of the body 110 in the first direction. Optionally, due to the shrinkage behavior of the body 110 during the sintering process, the corners connecting the first surface 1 to the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6 and / or the corners connecting the second surface 2 to the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6 may shrink relative to the first surface 1 or the second surface 2 towards the center of the body 110 in the first direction. Optionally, in order to prevent defects such as breakage, an additional process may be performed to round off the corners connecting the various surfaces of the body 110. Therefore, the corners connecting the first surface 1 to the third to sixth surfaces 6 and / or the corners connecting the second surface 2 to the third to sixth surfaces 6 may have a rounded shape.

[0036] To suppress the step difference caused by the inner electrodes 121 and 122, the inner electrodes 121 and 122 can be stacked and then cut to expose the inner electrodes 121 and 122 to the fifth surface 5 and the sixth surface 6 of the body 110. Thereafter, one or two or more dielectric layers can be stacked on the fifth surface 5 and the sixth surface 6 of the body 110 to form side edge portions 114 and 115. In this case, the portions connecting the first surface 1 to the fifth surface 5 and the sixth surface 6, and the portions connecting the second surface 2 to the fifth surface 5 and the sixth surface 6, do not need to be shrunk.

[0037] The plurality of dielectric layers 111 included in the body 110 may be in a sintered state, and adjacent dielectric layers 111 may be integrated with each other, making it difficult to distinguish their boundaries without the use of a scanning electron microscope (SEM). The number of dielectric layers stacked is not limited and can be determined taking into account the size of the multilayer electronic assembly. For example, the body may be formed by stacking 400 or more dielectric layers.

[0038] Dy, Tb, and Gd can be disposed in the interface portions IP1 and IP2 of dielectric layer 111. Typically, a predetermined amount of rare earth elements can be added to the dielectric layer to improve reliability. The interface portions IP1 and IP2 (rather than the central portion CP) disposed at the interface between dielectric layer 111 and the inner electrodes 121 and 122 have the greatest impact on the reliability of the multilayer electronic assembly. Therefore, in this disclosure, Dy, Tb, and Gd can be disposed in the interface portions IP1 and IP2 of dielectric layer 111 to effectively improve withstand voltage and reliability.

[0039] Furthermore, by controlling the atomic percentage content of Tb in each of the interface portions IP1 and IP2 to be higher than that in the central portion CP, physical and structural defects in the dielectric layer 111 can be suppressed, and the multilayer electronic component 100 can have improved high-temperature reliability. When the central portion CP has a high Tb content, the dielectric layer 111 may have reduced rigidity, resulting in brittleness. Consequently, structural defects may appear in the dielectric layer 111.

[0040] Furthermore, Dy, Tb, and Gd can be disposed in the interface portions IP1 and IP2 of the dielectric layer 111, thereby suppressing the disconnection and aggregation of the internal electrodes, thus improving the reliability of the multilayer electronic components and the capacitance per unit volume.

[0041] In the example embodiment, the sum of the Dy, Tb, and Gd contents of dielectric layer 111 relative to 100 mol Ti can be less than or equal to 1.5 mol. Therefore, the TCC (capacitance temperature coefficient) temperature characteristic (X6S) can be satisfied while improving the withstand voltage characteristics.

[0042] When the sum of the Dy, Tb and Gd contents relative to 100 mol Ti in dielectric layer 111 is greater than 1.5 mol, the Curie temperature (Tc) may shift to room temperature, and therefore may not meet the TCC temperature characteristics (X6S).

[0043] In the example embodiment, the Tb content of dielectric layer 111 relative to 100 mol Ti may be less than or equal to 0.5 mol. When the Tb content included in dielectric layer 111 relative to 100 mol Ti is greater than 0.5 mol, dielectric layer 111 may have reduced rigidity, resulting in brittle properties. As a result, structural defects may occur in dielectric layer 111.

[0044] The lower limit of the Tb content included in dielectric layer 111 is not limited. For example, the lower limit of the Tb content included in dielectric layer 111 relative to 100 mol Ti can be 0.2 mol or greater. Therefore, the multilayer electronic component 100 can have further improved reliability.

[0045] In the example embodiment, the molar ratio of the Gd content to the sum of the Dy and Tb contents of dielectric layer 111 can be greater than or equal to 0.2 and less than or equal to 0.67. Therefore, the reliability improvement effect due to the addition of Gd can become significant.

[0046] When the molar ratio of Gd content to the sum of Dy and Tb content in dielectric layer 111 is less than 0.2, the reliability improvement effect due to the addition of Gd may be insufficient. When the molar ratio of Gd content to the sum of Dy and Tb content in dielectric layer 111 is greater than 0.67, dielectric layer 111 may become excessively N-type, and product characteristics may deteriorate.

[0047] The lower limit of the molar ratio of the Gd content to the sum of the Dy and Tb contents of the dielectric layer 111 is preferably 0.2 or greater, more preferably 0.200 or greater.

[0048] There are no lower limits for the Dy and Tb contents of dielectric layer 111. For example, the Dy content of dielectric layer 111 relative to 100 mol Ti can be greater than or equal to 0.2 mol, and the Tb content of dielectric layer 111 relative to 100 mol Ti can be greater than or equal to 0.2 mol.

[0049] In an example embodiment, when the atomic percentage content of Tb in interface portions IP1 and IP2 (e.g., each of interface portions IP1 and IP2) is referred to as At1 and the atomic percentage content of Tb in the central portion CP is referred to as At2, At1 / At2 can be greater than or equal to 5.

[0050] Preferably, Tb is concentrated in the interface portions IP1 and IP2 of dielectric layer 111 to improve reliability, and Tb is substantially not included in the central portion CP to suppress the reduction of rigidity of dielectric layer 111.

[0051] In this case, the atomic percentage content (At1) of Tb in interface parts IP1 and IP2 (e.g., each of interface parts IP1 and IP2) is preferably greater than or equal to 0.2at% and less than or equal to 0.5at%, and the atomic percentage content (At2) of Tb in the central part CP is preferably less than or equal to 0.1at.

[0052] Elemental analysis of the dielectric layer 111 can be performed based on images obtained by observing cross-sections of the subject 110 in the first and second directions using scanning electron microscopy-energy dispersive X-ray spectroscopy (SEM-EDS), transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS), scanning transmission electron microscopy-energy dispersive X-ray spectroscopy (STEM-EDS), or field emission-scanning electron microscopy-energy dispersive X-ray spectroscopy (FE-SEM-EDS). Other methods and / or tools understood by those skilled in the art may be used, even if not described in this disclosure.

[0053] More specifically, the multilayer electronic assembly 100 can be exposed in both the first and second directions by polishing it to half its position in the third direction. Thereafter, the contents (mol%) of Ti, Dy, Tb, and Gd in the dielectric layer disposed in the central portion of the capacitor forming section Ac in the first direction can be measured using FE-SEM-EDS (accelerating voltage: 2kV, magnification: 50000x). Based on the measurement results, the molar amounts of Dy, Tb, and Gd relative to 100 mol Ti in the dielectric layer can be calculated. Ten dielectric layers can be selected in each of the upper, middle, and lower portions of the capacitor forming section Ac in the first direction, and the molar amounts of Dy, Tb, and Gd relative to 100 mol Ti can be calculated for each of the total 30 dielectric layers. Then, the average of the calculated values ​​can be obtained so that the molar amounts of Dy, Tb and Gd content relative to 100 mol Ti included in the dielectric layer can be more generalized.

[0054] The interface portion IP and the central portion CP of dielectric layer 111 can be distinguished from each other in an image showing the concentration of each element, and this distinction can be based on the Tb content. Thereafter, the atomic percentage content of Tb measured at the center of the interface portion IP in the first direction can be referred to as At1, and the atomic percentage content of Tb measured at the center of the central portion CP in the first direction can be referred to as At2. Ten dielectric layers can be selected in each of the upper, middle, and lower portions of the capacitance forming portion Ac in the first direction, and At1 and At2 can be obtained for each of the total 30 dielectric layers. The average of the obtained values ​​can be obtained to more generalize the atomic percentage content of Tb measured at the center of the interface portion IP in the first direction and the atomic percentage content of Tb measured at the center of the central portion CP in the first direction.

[0055] In the example embodiment, the average thickness tdi of the interface portion can be greater than or equal to 5 nm and less than or equal to 50 nm (e.g., greater than or equal to 10 nm and less than or equal to 50 nm).

[0056] When the average thickness tdi of the interface is less than 5 nm (specifically, less than 10 nm), the reliability improvement effect caused by the interface may be insufficient. When the average thickness tdi of the interface is greater than 50 nm, the thickness of the dielectric layer may increase.

[0057] The average thickness tdi of the interface portion can refer to the thickness of each of the first interface portion IP1 and the second interface portion IP2. That is, the average thickness of the first interface portion IP1 can be greater than or equal to 5 nm and less than or equal to 50 nm (for example, greater than or equal to 10 nm and less than or equal to 50 nm), and the average thickness of the second interface portion IP2 can be greater than or equal to 5 nm and less than or equal to 50 nm (for example, greater than or equal to 10 nm and less than or equal to 50 nm).

[0058] In the example embodiment, the average thickness tdc of the central portion CP can be less than or equal to 500 nm. Therefore, the thickness of the dielectric layer 111 can be reduced, making it easier to achieve miniaturization and high capacitance of multilayer electronic components.

[0059] In the example embodiment, when the average thickness of the central portion is referred to as tdc and the average thickness of the interface portion is referred to as tdi, tdi / tdc can be greater than or equal to 0.02 and less than or equal to 0.1.

[0060] The average thickness td of the dielectric layer 111 is not limited. For example, the dielectric layer 111 disposed between the inner electrodes 121 and 122 may include a central portion CP, a first interface portion IP1 and a second interface portion IP2, so the average thickness td of the dielectric layer 111 may be less than or equal to 600 nm.

[0061] Here, the average thickness tdi of the interface portion and the average thickness tdc of the central portion can refer to the thickness in the first direction. The average thickness tdi of the interface portion and the average thickness tdc of the central portion can be measured by scanning the cross-section of the body 110 in the first and second directions using SEM at a magnification of 10,000. More specifically, after identifying the interface portion including Dy, Tb, and Gd using SEM-EDS, the thickness of the interface portion IP1 and the central portion CP can be measured at 30 points spaced apart from each other at equal intervals in the second direction, and their respective average values ​​can be measured. The 30 points spaced apart from each other at equal intervals can be specified in the capacitance forming portion Ac described below. In addition, when such an average value measurement is performed on 10 dielectric layers 111, the average thickness tdi of the interface portion and the average thickness tdc of the central portion can be more generalized. Other methods and / or tools understood by those skilled in the art can be used even if not described in this disclosure.

[0062] The method of forming dielectric layer 111 is not limited.

[0063] For example, a sol solution comprising Tb, Dy, and Gd can first be coated onto a carrier film 300 to form a first coating PIP1. Subsequently, a ceramic slurry comprising ceramic particles, an organic solvent, and a binder can be coated onto the first coating PIP1 to form a ceramic portion PCP. Then, a sol solution comprising Tb, Dy, and Gd can be coated onto the ceramic portion PCP to form a second coating PIP2. A ceramic green sheet comprising the first coating PIP1, the ceramic portion PCP, and the second coating PIP2 can then be sintered. During the sintering process, Tb, Dy, and Gd included in the first coating PIP1 and the second coating PIP2 can react with a portion of the ceramic portion PCP to form interface portions IP1 and IP2, and the area other than the interface portions IP1 and IP2 can become the central portion CP.

[0064] When ceramic green sheets are formed as ultrathin layers, structural defects such as increased surface roughness and thickness inhomogeneity may occur. According to an example embodiment of this disclosure, when a first coating PIP1 and a second coating PIP2 are formed on both surfaces of the ceramic PCP, structural defects in the ceramic green sheet can be compensated for, thereby improving reliability.

[0065] Furthermore, when Tb, Dy, and Gd are directly mixed into a ceramic slurry comprising ceramic particles, organic solvents, and binders, and the resulting ceramic slurry is used to manufacture ceramic green sheets, the ceramic green sheets may have increased rigidity, which may increase the process defect rate or cause structural defects in the dielectric layer.

[0066] According to an exemplary embodiment of the present disclosure, when the first coating PIP1 and the second coating PIP2 are formed on two surfaces of the ceramic part PCP, structural defects of the green ceramic sheet can be compensated, thereby improving reliability.

[0067] The ceramic particles included in the green ceramic sheet are not limited as long as sufficient capacitance can be obtained by using them, and may be, for example, barium titanate (BaTiO3)-based particles. As a more specific example, the ceramic particles may be at least one of BaTiO3, (Ba 1-y x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1- y Zr y )O3 (0 < y < 1).

[0068] Therefore, in an exemplary embodiment, the dielectric layer 111 may include at least one of BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y )O3 (0 < y < 1) as a main component. Here, the main component may mean that: with respect to 100 mol of the main component, the number of moles of components other than the main component is less than or equal to 30 mol.

[0069] The main body 110 may include: a capacitance forming part Ac provided in the main body 110, the capacitance forming part Ac having capacitance by including a first inner electrode 121 and a second inner electrode 122 which are arranged opposite to each other and the dielectric layer 111 is interposed therebetween; and covering parts 112 and 113 provided on the upper and lower parts of the capacitance forming part Ac in the first direction.

[0070] Furthermore, the capacitor forming portion Ac can be a portion that contributes to the capacitance of the capacitor, and can be formed by repeatedly stacking a plurality of first internal electrodes 121 and a plurality of second internal electrodes 122 on each other, with a dielectric layer 111 between the first internal electrodes 121 and the second internal electrodes 122.

[0071] Cover portions 112 and 113 may include an upper cover portion 112 disposed on the upper part of the capacitor forming portion Ac in the first direction and a lower cover portion 113 disposed on the lower part of the capacitor forming portion Ac in the first direction.

[0072] The upper cover portion 112 and the lower cover portion 113 can be formed by stacking one or two or more dielectric layers on the upper and lower surfaces of the capacitor forming portion Ac in the thickness direction, respectively, and can be used to prevent the internal electrode from being damaged due to physical stress and / or chemical stress.

[0073] The upper cover 112 and the lower cover 113 may not include the inner electrode and may include the same material as the dielectric layer 111.

[0074] In other words, the upper cover 112 and the lower cover 113 may include ceramic materials, and may include, for example, barium titanate (BaTiO3) based ceramic materials.

[0075] The thickness of each of the covers 112 and 113 is not limited. However, in order to easily achieve miniaturization and high capacitance of multilayer electronic components, the average thickness tc of each of the covers 112 and 113 can be less than or equal to 15 μm.

[0076] The average thickness tc of each of the covers 112 and 113 may refer to the dimension of each of the covers 112 and 113 in the first direction, and may have a value obtained by averaging the dimensions of each of the covers 112 and 113 in the first direction measured at five points spaced apart from each other at equal intervals on the upper or lower part of the capacitor forming part Ac.

[0077] Additionally, side edge portions 114 and 115 may be provided on the fifth surface 5 and the sixth surface 6 of the main body 110, respectively.

[0078] The side edge portions 114 and 115 may include a first side edge portion 114 disposed on the fifth surface 5 of the body 110 and a second side edge portion 115 disposed on the sixth surface 6 of the body 110. That is, the side edge portions 114 and 115 may be disposed on the two side surfaces of the body 110 in the width direction, respectively.

[0079] like Figure 5As shown, side edges 114 and 115 may refer to the region between the two ends of each of the first inner electrode 121 and the second inner electrode 122 and the outer surface of the multilayer electronic assembly 100 in a cross-section cut in the first direction and the third direction upward.

[0080] The side edges 114 and 115 can be used to prevent damage to the internal electrode due to physical and / or chemical stress.

[0081] Side edge portions 114 and 115 can be formed by coating a conductive paste onto a ceramic green sheet (except for the portion of the ceramic green sheet on which the side edge portions will be formed) to form an internal electrode.

[0082] Furthermore, to suppress the step difference caused by the inner electrodes 121 and 122, the inner electrodes 121 and 122 can be laminated and then cut to expose the inner electrodes 121 and 122 on the fifth surface 5 and the sixth surface 6 of the body 110. Thereafter, one or two or more dielectric layers can be laminated on the fifth surface 5 and the sixth surface 6 of the body 110 to form side edge portions 114 and 115.

[0083] The width of each of the side edges 114 and 115 is not limited. However, in order to easily achieve miniaturization and high capacitance of multilayer electronic components, the average width of each of the side edges 114 and 115 may be less than or equal to 15 μm.

[0084] The average width of each of the side edges 114 and 115 may be the average size wm of the regions of the inner electrodes 121 and 122 that are spaced apart from the outer surface of the multilayer electronic assembly 100 in the third direction in the third direction, and may have the average value of the size of each of the side edges 114 and 115 in the third direction measured at five points equally spaced apart from each other on the fifth surface 5 and the sixth surface 6 of the body 110.

[0085] Therefore, in the example embodiment, the average size wm of the regions of the inner electrodes 121 and 122 that are spaced apart from the outer surface of the multilayer electronic assembly 100 in the third direction in the third direction can be less than or equal to 15 μm.

[0086] In an example embodiment, dielectric layer 111 and inner electrodes 121 and 122 may be alternately stacked in a first direction. Body 110 may have: a first surface 1 and a second surface 2, opposite to each other in the first direction; a third surface 3 and a fourth surface 4, connected to the first surface 1 and the second surface 2, opposite to each other in a second direction; and a fifth surface 5 and a sixth surface 6, connected to the first surface 1 to the fourth surface 4, opposite to each other in a third direction. Outer electrodes 131 and 132 may be disposed on the third surface 3 and the fourth surface 4, and side edges 114 and 115 may be disposed on the fifth surface 5 and the sixth surface 6.

[0087] In this case, the interface portions IP1 and IP2 and the central portion CP can be led out to the third surface 3 and the fourth surface 4 and connected to the external electrodes 131 and 132, and can be led out to the fifth surface 5 and the sixth surface 6 and connected to the side edge portions 114 and 115.

[0088] Reference Figure 7 To suppress the step difference caused by the inner electrodes 121 and 122, the inner electrodes 121 and 122 can be cut to expose the inner electrodes 121 and 122 to the fifth surface 5 and the sixth surface 6 of the body 110. Thereafter, one or two or more dielectric layers can be laminated on the fifth surface 5 and the sixth surface 6 of the body 110 to form side edge portions 114 and 115. In this case, interface portions IP1 and IP2 may not be provided in the side edge portions 114 and 115.

[0089] The method of forming side edges 114 and 115 by stacking one or more dielectric layers on the fifth surface 5 and the sixth surface 6 of the body 110 can be applied to miniaturized and high-capacitance multilayer electronic assemblies. The reliability improvement effect according to this disclosure becomes more significant in miniaturized and high-capacitance multilayer electronic assemblies and / or in multilayer electronic assemblies in which side edges are formed. Specifically, it may be necessary to cut the inner electrodes 121 and 122 so that the inner electrodes 121 and 122 are exposed to the fifth surface 5 and the sixth surface 6. When the ceramic green sheet used to form the capacitor forming portion has insufficient rigidity, the process defect rate may increase, or structural defects may occur in the dielectric layer. According to the exemplary embodiments of this disclosure, the rigidity of the dielectric layer can be ensured. Therefore, even when one or more dielectric layers are stacked on the fifth surface 5 and the sixth surface 6 of the body 110 to form side edges 114 and 115, an increase in the process defect rate or the occurrence of structural defects in the dielectric layer can be suppressed.

[0090] The inner electrodes 121 and 122 may include a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 and the second inner electrode 122 may be alternately arranged opposite each other, and a dielectric layer 111 is disposed between the first inner electrode 121 and the second inner electrode 122, and the first inner electrode 121 and the second inner electrode 122 may be exposed on the third surface 3 and the fourth surface 4 of the body 110, respectively.

[0091] The first inner electrode 121 may be spaced apart from the fourth surface 4 and exposed through the third surface 3, and the second inner electrode 122 may be spaced apart from the third surface 3 and exposed through the fourth surface 4. The first outer electrode 131 may be disposed on the third surface 3 of the body 110 and connected to the first inner electrode 121, and the second outer electrode 132 may be disposed on the fourth surface 4 of the body 110 and connected to the second inner electrode 122.

[0092] That is, the first inner electrode 121 may be connected to the first outer electrode 131 but not to the second outer electrode 132, and the second inner electrode 122 may be connected to the second outer electrode 132 but not to the first outer electrode 131. Therefore, the first inner electrode 121 may be formed to be spaced apart from the fourth surface 4 by a predetermined distance, and the second inner electrode 122 may be formed to be spaced apart from the third surface 3 by a predetermined distance. Furthermore, the first inner electrode 121 and the second inner electrode 122 may be configured to be spaced apart from the two side surfaces of the multilayer electronic assembly 100 in the third-direction orientation.

[0093] The conductive metal included in the inner electrodes 121 and 122 may include at least one of Ni, Cu, Pd, Ag, Au, Pt, In, Sn, Al, W, Ti and alloys thereof, but this disclosure is not limited thereto.

[0094] The average thickness te of the inner electrodes is not limited. In this case, the thickness of each of the inner electrodes 121 and 122 may refer to the dimension of each of the inner electrodes 121 and 122 in the first direction.

[0095] However, in order to more easily achieve miniaturization and high capacitance of multilayer electronic components, the average thickness of each of the internal electrodes 121 and 122 can be less than or equal to 0.4 μm.

[0096] Here, the average thickness *te* of the inner electrodes can be measured by scanning the cross-section of the body 110 in the first and second directions using a SEM at a magnification of 10,000. More specifically, the thickness of each of the inner electrodes 121 and 122 at multiple points (e.g., thirty points spaced apart from each other at equal intervals) in the second direction can be measured to determine its average value. The thirty points spaced apart from each other at equal intervals can be specified in the capacitor forming section *Ac*. Furthermore, when such an average value measurement is performed on ten inner electrodes 121 or ten inner electrodes 122, the average thickness of each of the inner electrodes 121 and 122 can be more generalized.

[0097] External electrodes 131 and 132 can be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively.

[0098] The external electrodes 131 and 132 may be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively, and may include the first external electrode 131 and the second external electrode 132 connected to the first internal electrode 121 and the second internal electrode 122, respectively.

[0099] Reference Figure 1 The external electrodes 131 and 132 can be configured to cover the two end surfaces of the side edges 114 and 115 in the second direction.

[0100] In this example embodiment, a multilayer electronic component 100 is described having a structure with two external electrodes 131 and 132, but the number and shape of the external electrodes 131 and 132 may be changed depending on the shape of the internal electrodes 121 and 122 or for other purposes.

[0101] Each of the external electrodes 131 and 132 can be formed using any conductive material (such as metal), and the specific material can be determined taking into account electrical properties, structural stability, etc. Furthermore, each of the external electrodes 131 and 132 can have a multilayer structure.

[0102] For example, the external electrodes 131 and 132 may include electrode layers 131a and 132a disposed on the body 110, and plating layers 131b and 132b formed on the electrode layers 131a and 132a.

[0103] As a more specific example of electrode layers 131a and 132a, electrode layers 131a and 132a may be sintered electrodes comprising conductive metal and glass, or they may be resin-based electrodes comprising conductive metal and resin.

[0104] Furthermore, electrode layers 131a and 132a may have a form in which a sintered electrode and a resin-based electrode are sequentially formed on the body 110. Additionally, electrode layers 131a and 132a can be formed by transferring a sheet including a conductive metal onto the body 110 or by transferring a sheet including a conductive metal onto a sintered electrode.

[0105] Materials with excellent electrical conductivity can be used as conductive metals included in electrode layers 131a and 132a, but such materials are not limited. For example, the conductive metal can be at least one of nickel (Ni), copper (Cu), and alloys thereof.

[0106] Platings 131b and 132b can be used to improve mounting characteristics. The type of each of platings 131b and 132b is not limited, and each of platings 131b and 132b can be a plating including at least one of Ni, Sn, Pd and alloys thereof, and can be formed as a multilayer.

[0107] As a more specific example of plating layers 131b and 132b, each of plating layers 131b and 132b may be a Ni plating layer or a Sn plating layer, or may have a Ni plating layer and a Sn plating layer sequentially formed on electrode layers 131a and 132a, or may have a Sn plating layer, a Ni plating layer, and a Sn plating layer formed sequentially. Additionally, each of plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.

[0108] The size of the multilayer electronic component 100 is not limited.

[0109] However, according to the exemplary embodiments of this disclosure, the thickness of the inner electrode and dielectric layer can be easily reduced, making the reliability improvement and capacitance improvement per unit volume of this disclosure more significant in multilayer electronic components 100 with dimensions of 0603 (length × width: 0.6 mm × 0.3 mm) or smaller. Furthermore, the structure of this disclosure can also be applied to multilayer electronic components 100 with dimensions of 0201 (length × width: 0.2 mm × 0.1 mm) or smaller.

[0110] Taking into account manufacturing errors, external electrode dimensions, etc., the reliability improvement effect and capacitance improvement effect per unit volume according to this disclosure can become more significant when the multilayer electronic component 100 has a length of 0.66 mm or less and a width of 0.33 mm or less. Here, the length of the multilayer electronic component 100 may refer to the maximum dimension of the multilayer electronic component 100 in the second direction, and the width of the multilayer electronic component 100 may refer to the maximum dimension of the multilayer electronic component 100 in the third direction.

[0111] Methods for manufacturing multilayer electronic components Hereinafter, examples of methods for manufacturing a multilayer electronic component 100 according to exemplary embodiments of the present disclosure will be described. However, the methods for manufacturing the multilayer electronic component 100 of the present disclosure are not limited thereto.

[0112] Figure 8 This is a diagram illustrating the process of manufacturing a ceramic green sheet for forming capacitor forming portions used in a method of manufacturing a multilayer electronic component according to an exemplary embodiment of the present disclosure.

[0113] First, a sol solution including Tb, Dy, and Gd can be coated onto a carrier membrane 300 to form a first coating PIP1. Then, a ceramic slurry including ceramic particles, an organic solvent, and a binder can be coated onto the first coating PIP1 to form a ceramic part PCP. Subsequently, a sol solution including Tb, Dy, and Gd can be coated onto the ceramic part PCP to form a second coating PIP2. Alternatively, the ceramic slurry may be substantially free of Tb, Dy, and Gd.

[0114] Subsequently, a conductive paste comprising metal particles, adhesives, and organic solvents for forming internal electrodes can be printed onto the second coating PIP2 to a predetermined thickness using screen printing or gravure printing to form an internal electrode pattern EP, thereby manufacturing a ceramic green sheet AGS for forming the capacitor forming portion.

[0115] Figure 9 This is a diagram illustrating the process of forming a laminate in a method of manufacturing a multilayer electronic component according to an exemplary embodiment of the present disclosure.

[0116] Ceramic green sheets AGS used to form capacitor forming portions can be stacked in the X direction to form a laminate. In this case, ordinary ceramic green sheets GS can be stacked on the upper and lower portions of the laminate to form covering portions 112 and 113 after sintering. Here, ordinary ceramic green sheets GS may refer to ceramic green sheets that include the ceramic portion PCP but do not include the first coating PIP1 and the second coating PIP2 described above.

[0117] The laminate can then be cut into sheets of a predetermined size. In this case, the ends of the inner electrode pattern EP can be exposed to the two surfaces of the cut sheet that are opposite each other in the third direction.

[0118] Subsequently, the sheet used to form the side edges can be attached to the two opposing surfaces of the cutting disc in the third direction, and then sintered to form the body 110 and the side edges 114 and 115. For example, the sintering temperature can be greater than or equal to 1000°C and less than or equal to 1400°C, but this disclosure is not limited thereto.

[0119] The sheet material used to form the side edges is not limited, and can be the aforementioned ordinary ceramic green sheet.

[0120] Subsequently, external electrodes 131 and 132 can be formed. For example, when electrode layers 131a and 132a include sintered electrodes, the body 110 can be immersed in a conductive paste for forming external electrodes, which includes metal particles, glass frit, binder and organic solvent, and then the conductive paste for forming external electrodes can be sintered at a temperature of 500°C to 900°C to form sintered electrodes.

[0121] For example, when electrode layers 131a and 132a comprise resin-based electrodes, the body 110 may be immersed in a conductive resin composition comprising metal particles, resin, binder and organic solvent, and then cured by heat treatment at a temperature of 250°C to 550°C to form a resin-based electrode.

[0122] Furthermore, plating layers 131b and 132b can be formed on electrode layers 131a and 132a by further performing electroplating and / or chemical plating methods.

[0123] (Experimental Example) A sample sheet with dimensions of 0603 (length: approx. 0.6 mm, width: approx. 0.3 mm, thickness: approx. 0.3 mm) was prepared using the manufacturing method described above.

[0124] Tb, Dy, and Gd are not added to the ceramic PCP, but only to the sol solution used to form coatings PIP1 and PIP2. The molar amounts of Tb, Dy, and Gd included in dielectric layer 111 relative to 100 mol Ti are adjusted to satisfy Tables 1 and 3 below. In Tables 1 and 3, test numbers marked with "*" are comparative examples.

[0125] The molar amounts of Tb, Dy, and Gd content relative to 100 mol Ti in the dielectric layer 111 were measured by analyzing cross sections of the sample wafer polished to 1 / 2 point in the first and second directions, using FE-SEM-EDS (accelerating voltage: 2 kV, magnification: 50,000x).

[0126] In addition, the temperature characteristics of tests 1, 2, and 3 were evaluated, and the evaluation results are shown in Table 2 below. In Table 2, for each test number, the rate of change of capacitance (ΔC, %) relative to the capacitance measured at 25°C for the corresponding sample piece from -55°C to 105°C is shown.

[0127] To meet the temperature characteristics of the X6S, the absolute value of the capacitance change rate (%) from -55℃ to 105℃ may need to be less than or equal to 22%.

[0128] [Table 1]

[0129] [Table 2]

[0130] To meet the temperature characteristics of the X6S, the capacitance change rate (%) from -55℃ to 105℃ may need to be less than or equal to ±22%.

[0131] Referring to Tables 1 and 2, it can be confirmed that test number 1, with a Dy+Tb+Gd content of 1.5 mol, satisfies the X6S temperature characteristics, while test numbers 2 and 3, with a Dy+Tb+Gd content greater than 1.5 mol, do not satisfy the X6S temperature characteristics.

[0132] [Table 3]

[0133] Figure 10 , Figure 11 and Figure 12 This is a graph showing the results of High Accelerated Life Test (HALT) performed on 40 sample pieces for each of test numbers 4, 5, and 6. Figures 10 to 12 In the diagram, the horizontal axis represents time in hours (hr), and the vertical axis represents insulation resistance (IR) in ohms (Ω).

[0134] A 24-hour HALT was performed at 125°C and 1.5Vr. Samples were assessed as defective when a short circuit occurred in the insulation resistance (IR).

[0135] It was confirmed that test number 5, in which the molar ratio of Gd content to the sum of Dy and Tb content was greater than or equal to 0.2 and less than or equal to 0.67, exhibited excellent high-temperature lifetime characteristics. Conversely, test numbers 4 and 6, in which the molar ratios of Gd content to the sum of Dy and Tb content were less than 0.2 and greater than 0.67, respectively, exhibited poor high-temperature lifetime characteristics.

[0136] Figure 13 This is a graph showing the results of measuring the breakdown voltage (BDV) of 20 sample pieces for each of test numbers 4, 5, and 6.

[0137] For breakdown voltage measurements, 20 sample pieces were prepared for each test number. The voltage was increased at a rate of 50 V / s at 25°C, and the voltage at which a short circuit occurred in each sample piece was defined as BDV. Figure 13 As shown in the image.

[0138] It can be confirmed that, compared with test numbers 4 and 6, where the molar ratio of Gd content to the sum of Dy and Tb content is less than 0.2 and greater than 0.67, respectively, test number 5, where the molar ratio of Gd content to the sum of Dy and Tb content is greater than or equal to 0.2 and less than or equal to 0.67, shows improved average BDV and average BDV change.

[0139] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and changes may be made without departing from the scope of this disclosure as defined by the appended claims.

[0140] Furthermore, the term "example embodiment" as used herein does not refer to the same example embodiment, but is provided to emphasize a particular feature or characteristic that differs from a particular feature or characteristic of another example embodiment. However, the example embodiments provided herein are considered to be achievable through overall or partial combination with each other. For example, even if an element described in a particular example embodiment is not described in another example embodiment, it may be understood as a description relating to the other example embodiment, unless a contrary or contradictory description is provided herein.

[0141] The terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to limit the exemplary embodiments. Unless the context clearly indicates otherwise, the singular forms as used herein are intended to include the plural forms as well.

Claims

1. A multilayer electronic component, comprising: The main body includes a dielectric layer and internal electrodes alternately disposed with the dielectric layer; as well as External electrodes are disposed on the main body; The dielectric layer includes a central portion spaced apart from the inner electrode and an interface portion disposed between the inner electrode and the central portion. The interface portion includes Dy, Tb, and Gd. The atomic percentage content of Tb in the central portion is lower than the atomic percentage content of Tb in the interface portion, or The central part contains virtually no Tb.

2. The multilayer electronic component according to claim 1, wherein, The sum of the Dy, Tb, and Gd contents of the dielectric layer relative to 100 mol Ti is less than or equal to 1.5 mol.

3. The multilayer electronic component according to claim 1, wherein, The Tb content of the dielectric layer relative to 100 mol Ti is less than or equal to 0.5 mol.

4. The multilayer electronic component according to claim 1, wherein, The molar ratio of the Gd content to the sum of the Dy and Tb contents of the dielectric layer is greater than or equal to 0.2 and less than or equal to 0.

67.

5. The multilayer electronic component according to claim 1, wherein, The Tb content of the dielectric layer relative to 100 mol Ti is less than or equal to 0.5 mol. The sum of the Dy, Tb, and Gd contents of the dielectric layer relative to 100 mol Ti is less than or equal to 1.5 mol, and The molar ratio of the Gd content to the sum of the Dy and Tb contents of the dielectric layer is greater than or equal to 0.2 and less than or equal to 0.

67.

6. The multilayer electronic assembly according to claim 1, wherein, When the atomic percentage content of Tb in the interface portion is referred to as At1 and the atomic percentage content of Tb in the central portion is referred to as At2, At1 / At2 is greater than or equal to 5.

7. The multilayer electronic assembly according to claim 1, wherein, When the atomic percentage content of Tb in the interface portion is referred to as At1 and the atomic percentage content of Tb in the central portion is referred to as At2, At1 is greater than or equal to 0.2at% and less than or equal to 0.5at%, and At2 is less than or equal to 0.1at.

8. The multilayer electronic component according to claim 1, wherein, The average thickness of the interface portion is greater than or equal to 5 nm and less than or equal to 50 nm.

9. The multilayer electronic assembly according to claim 1, wherein, The average thickness of the central portion is less than or equal to 500 nm.

10. The multilayer electronic assembly according to claim 1, wherein, When the average thickness of the central portion is referred to as tdc and the average thickness of the interface portion is referred to as tdi, tdi / tdc is greater than or equal to 0.02 and less than or equal to 0.

1.

11. The multilayer electronic assembly according to claim 1, wherein, The dielectric layer includes at least one selected from the group consisting of BaTiO3, (Ba 1-x Ca x )TiO3, Ba(Ti 1-y Ca y )O3, (Ba 1-x Ca x )(Ti 1-y Zr y )O3, and Ba(Ti 1-y Zr y )O3 as the main component. In (Ba 1-x Ca x )TiO3, 0 < x < 1; in Ba(Ti 1-y Ca y )O3, 0 < y < 1; in (Ba 1-x Ca x )(Ti 1-y Zr y )O3, 0 < x < 1, 0 < y < 1; in Ba(Ti 1-y Zr y )O3, 0 < y < 1.

12. The multilayer electronic assembly according to claim 1, wherein, The dielectric layer and the internal electrode are alternately arranged in a first direction. The body has: a first surface and a second surface, which are opposite to each other in the first direction; a third surface and a fourth surface, which are connected to the first surface and the second surface, and the third surface and the fourth surface are opposite to each other in the second direction; And a fifth surface and a sixth surface, connected to the first surface to the fourth surface, the fifth surface and the sixth surface being opposite each other in a third direction, and The external electrode is disposed on the third surface and the fourth surface, and The multilayer electronic assembly also includes side edge portions disposed on the fifth and sixth surfaces.

13. The multilayer electronic assembly according to claim 12, wherein, The interface portion and the central portion extend to the third surface and the fourth surface, and are connected to the external electrode. The interface portion and the central portion extend to the fifth surface and the sixth surface, and are connected to the side edge portion.

14. A method for manufacturing a multilayer electronic component, comprising: A sol solution comprising Tb, Dy, and Gd is coated onto a membrane to form a first coating. A slurry is applied to the first coating layer to form a ceramic portion, the slurry comprising ceramic particles. The sol solution is applied to the ceramic part to form a second coating, and A paste is applied to the second coating to form an internal electrode pattern, the paste comprising metal particles.

15. The method according to claim 14, wherein, The slurry is essentially free of Tb, Dy, and Gd.

16. The method according to claim 14, further comprising sintering the ceramic green sheet.

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