Method for manufacturing ultra-high multilayer printed circuit board based on pre-stabilization of sub-structures

Abstract

The application discloses a kind of based on substructure pre-stabilization ultra-high multilayer printed circuit board manufacturing method, suitable for the number of layers N greater than 20 ultra-high multilayer board manufacturing.The method divides the whole manufacturing process into three stages, and sequentially forms inner core, intermediate and final substructure.The core is: after each manufacturing stage is completed, the complete encapsulation process of metalization, resin filling, grinding and copper cap plating of interconnection hole is carried out, so that the mechanical and electrical stability of the current substructure is realized before entering the next stage of pressing.Meanwhile, for each substructure, its pressing process parameters are independently set to match its material and structural characteristics.The application effectively solves the core problems of poor interlayer alignment accuracy, poor high aspect ratio hole plating uniformity and low overall yield caused by thermal-mechanical stress accumulation in traditional manufacturing of ultra-high multilayer board, significantly improves the reliability and manufacturing efficiency of the product.

Description

Technical Field

[0001] This invention relates to the field of circuit board manufacturing technology, and in particular to a method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization. Background Technology

[0002] With the rapid development of 5G communication, artificial intelligence, and high-performance computing devices, the requirements for the number of layers and interconnection density of core component printed circuit boards are constantly increasing, making the demand for ultra-high multilayer PCBs with 30 layers or more increasingly urgent. However, the exponential increase in the number of layers brings physical and engineering challenges that are difficult to overcome by traditional manufacturing processes:

[0003] Uncontrolled interlayer alignment due to accumulated thermo-mechanical stress: During the lamination of multilayer boards, factors such as resin flow and mismatch in coefficients of thermal expansion (CTE) can generate internal stress. In the traditional "layer-by-layer" lamination process, the stress generated by each lamination accumulates and is transferred to subsequent processes, causing interlayer alignment deviations to increase non-linearly. When the number of layers exceeds 20, the accumulated deviation can easily exceed the tolerance of high-end designs (such as <50μm alignment tolerance), causing short circuits or open circuits.

[0004] Challenges in plating uniformity and reliability of high aspect ratio interconnects: As the board thickness increases with the number of layers, the depth-to-diameter ratio of through holes often exceeds 15:1. Existing plating technologies struggle to deposit sufficient copper thickness in the middle of such holes, resulting in a "dog bone" effect or voids, which severely impacts current carrying capacity and thermomechanical reliability (making them prone to breakage from the middle of the hole wall during thermal cycling).

[0005] Low process yield and difficulty in tracing the source of problems: In traditional processes, defects in any layer or interconnect hole are often only exposed during final testing, leading to the scrapping of the entire board, high costs, and difficulty in tracing the root cause of the problem.

[0006] Given this situation, a solution is urgently needed. Summary of the Invention

[0007] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a method for manufacturing ultra-high-performance multilayer PCBs based on the concepts of "substructure pre-stabilization" and "progressive interconnection". This method restructures the manufacturing sequence, decomposing the complex ultra-high-performance multilayer board into multiple pre-stabilized substructures for step-by-step construction. This effectively suppresses stress accumulation, precisely controls interlayer alignment, and ensures the reliability of high aspect ratio interconnects, ultimately achieving high yield and stable production of ultra-high-performance multilayer PCBs.

[0008] This invention provides a method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization, characterized in that it is used to manufacture printed circuit boards with a total number of N layers, where N is an integer greater than 20, and characterized in that it includes the following sequential steps:

[0009] S10, Stable core substructure formation: Prepare at least one inner core board containing circuit patterns from the 3rd layer to the (N-2)th layer; perform a first pressing and curing of the inner core board and the first adhesive sheet to form a core substructure; fabricate a first type of interconnect hole on the core substructure, and perform hole metallization, resin filling, surface grinding and form a first electroplated copper cap on the surface of the filled resin in sequence for the first type of interconnect hole;

[0010] S20. Formation of intermediate transition substructure: On the upper and lower surfaces of the core substructure, a second adhesive sheet and a second outer copper foil are respectively stacked and then pressed and cured for the second time to form an intermediate transition substructure containing the second to (N-1) layers of circuit; on the intermediate transition substructure, a second type of interconnection hole is fabricated, and the second type of interconnection hole is sequentially metallized, filled with resin, ground, and a second electroplated copper cap is formed on the filled resin surface.

[0011] S30. Final Overall Structure Formation and Interconnection: On the upper and lower surfaces of the intermediate transition substructure, a third bonding sheet and an outermost copper foil are respectively stacked and then pressed and cured for the third time to obtain the final overall structure; on the final overall structure, a third type of interconnection hole and a first through hole penetrating all layers are fabricated; the third type of interconnection hole and the first through hole are metallized; and the third type of interconnection hole is filled with resin, surface polished, and a third electroplated copper cap is formed on the surface of the filled resin.

[0012] S40, Outer Layer Circuitry and Post-processing: Outer layer circuitry patterns are formed on both sides of the final overall structure, and solder resist, surface coating, electrical testing and shape processing are performed.

[0013] The pressing temperature curve, pressure curve, and curing time used in the first, second, and third pressing curing processes are set independently.

[0014] Preferably, the first type of interconnecting hole is a buried hole formed by mechanical drilling, and the second and third types of interconnecting holes are blind holes formed by laser drilling.

[0015] Preferably, the copper layer thickness of the first, second, and third electroplated copper caps is 30-40 μm.

[0016] Preferably, the depth-to-diameter ratio AR of the first through hole satisfies: AR≥15:1.

[0017] Preferably, when metallizing the first through hole, a pulse electroplating process is used, wherein the duty cycle of the pulse electroplating is 1:3 to 1:5 and the average current density is 1.5-2.5 ASD.

[0018] Preferably, N is selected from any value among 28, 30, 32, and 34.

[0019] Preferably, in step S10, the heating rate of the first pressing and curing is 1.5-2.5℃ / min, the maximum pressure is 300-400 psi, and the curing time at 180-190℃ is 100-150 minutes.

[0020] Preferably, the total number of layers N of the printed circuit board is greater than 20, and it contains at least three blind via interconnect structures of different depths, filled with resin and covered with electroplated copper caps.

[0021] Preferably, the printed circuit board includes through holes with a depth-to-diameter ratio ≥ 15:1, and the copper thickness uniformity of the hole wall is greater than 85%.

[0022] Preferably, the alignment deviation between any two layers of the printed circuit board is less than or equal to 40 μm.

[0023] The beneficial effects of this invention are as follows:

[0024] 1. Fundamentally suppresses the accumulation of interlayer alignment deviations: The innovative "substructure pre-stabilization" strategy of this invention ensures that the completed substructure (such as the core substructure) has undergone a complete pressing, curing, and stress release process before the next substructure is constructed, and its size and shape have become stable. Subsequent pressing processes mainly affect the few newly added layers, significantly reducing stress sources and thus controlling the overall layer misalignment to an extremely low level.

[0025] 2. Ensures ultimate reliability of high aspect ratio interconnects: After each interconnect layer (blind via) is completed, the invention immediately performs a complete encapsulation process of "metallization - resin filling - copper plating cap". Resin filling eliminates voids within the via and provides flat mechanical support; the copper plating cap forms a robust metal connection point on the resin. This "connect-and-seal" method protects each interconnect point during subsequent high-temperature and high-pressure pressing, avoiding connection failure caused by resin flow or thermal stress. Especially for through-holes with a depth-to-diameter ratio ≥15:1, combined with pulse electroplating, the hole copper thickness uniformity (TIR) ​​can be improved to over 85%, and the pass rate for 1000 cycles of -55℃ to 125℃ thermal cycling tests reaches 99.5%.

[0026] 3. Achieved controllable manufacturing process and high yield: Phased construction modularizes the production process. Each substructure can be subjected to non-destructive testing (such as automated optical inspection, AOI) upon completion, allowing for early detection and removal of defective components, preventing them from flowing into subsequent expensive processes. Actual production data shows that this invention's method can increase the overall yield of PCBs with 30 or more layers from less than 60% using traditional processes to over 85%, resulting in significant economic benefits.

[0027] 4. Offers high flexibility in process design: the lamination parameters at each stage can be optimized independently to match the material properties of different substructures. For example, for core substructures with multiple layers, slow heating and long curing times can be used to ensure sufficient degassing and flow; while the outer layer lamination parameters can be adjusted appropriately to improve efficiency. Attached Figure Description

[0028] Figure 1 This is a process flow diagram for the first embodiment.

[0029] Figure 2 This is a process flow diagram for the second embodiment. Detailed Implementation

[0030] To further understand the features, technical means, and specific objectives and functions achieved by the present invention, the present invention will be described in further detail below with reference to specific embodiments and accompanying drawings.

[0031] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0032] Please refer to Figure 1 As shown, Example 1: Manufacturing a 32-layer high-end server motherboard

[0033] This embodiment takes the manufacturing of a 32-layer PCB with a board thickness of 3.2mm and a minimum through-hole diameter of 0.2mm (depth-to-diameter ratio of 16:1) as an example.

[0034] Step S10: Formation of stable core substructure (construction of L4-L29 layers) Prepare 14 core boards with completed inner layer patterns (corresponding to L4 / 5, L6 / 7, ..., L28 / 29) and corresponding prepregs.

[0035] First pressing: After laminating according to the stacked structure, the layers are placed in a vacuum press. The first pressing profile is used: the temperature is increased to 180°C at a rate of 2.0°C / min, the pressure is increased to 350 psi, and the layer is held at 180°C for 120 minutes for complete curing. After cooling, the core substructure is obtained.

[0036] Drilling and finishing of buried holes: Drill the required buried holes (0.25mm diameter). Perform chemical copper plating and full-board electroplating until the copper thickness of the holes reaches 20μm. Vacuum plug the holes using epoxy resin and grind them smooth. Then perform a second pattern electroplating to form a first copper cap with a thickness of 35μm.

[0037] Step S20: Formation of intermediate transition substructure (construction of L3-L30 layers) PP and copper foil (corresponding to L3 and L30) are stacked on both sides of the structure obtained in S10.

[0038] Second pressing: Using the second pressing curve: the temperature is increased to 175°C at 2.5°C / min, the pressure is increased to 300 psi, and the temperature is held at 175°C for 90 minutes. An intermediate transition substructure is formed.

[0039] Fabrication and treatment of laser-drilled blind vias: L3-L4 and L29-L30 blind vias were drilled using a UV laser. Chemical copper plating and electroplating were then performed to fill the vias. The process of resin plugging, grinding, and electroplating copper caps (a second copper cap, 35μm thick) was then repeated.

[0040] Step S30: Final overall structure formation and interconnection (building L1-L32 layers) PP and the outermost copper foil (L1, L32) are stacked on both sides of the structure obtained in S20.

[0041] Third pressing: Using the third pressing curve: heat to 170℃ at 3.0℃ / min, pressurize to 280psi, and hold at 170℃ for 60 minutes. A complete 32-layer laminate is obtained.

[0042] Drilling and Metallization: Drill laser-drilled blind holes L1-L2 and L31-L32. Drill through holes (0.2mm diameter, 16:1 aspect ratio). Perform chemical copper plating on all holes. For through holes, use pulse plating (2.2 ASD forward current, 0.7 ASD reverse current, 1:4 duty cycle) until the thinnest copper layer is ≥25μm. For blind holes, perform resin plugging, grinding, and copper capping (third copper capping).

[0043] Step S40: Outer layer circuitry and post-processing (same as conventional process).

[0044] See Figure 2 As shown, Example 2: Manufacturing a 30-layer high-speed switch backplane

[0045] This embodiment takes the manufacturing of a 30-layer, 4.0mm thick high-speed switch backplane with extremely high mechanical stability and signal integrity requirements as an example. This backplane needs to support a large number of high-density connectors, and the requirements for interlayer alignment accuracy and overall flatness are extremely stringent.

[0046] Step S10: Formation of a stable kernel substructure (construction of layers L3-L28)

[0047] Design and Lamination: The target board has a total of 30 layers, N=30. Based on electrical performance and mechanical strength design, the core substructure comprises layers 3 to 28 (L3-L28), totaling 26 layers. Prepare 13 core boards (corresponding to L3 / 4, L5 / 6, ..., L27 / 28) with completed fine inner layer circuit patterns and browning treatment, along with a corresponding number of low-flow, high glass transition temperature (Tg≥180℃) prepregs as the first bonding sheets.

[0048] First pressing (core stabilization pressing): Strictly aligned and stacked in a vacuum hot press according to the laminate structure. The first pressing profile is used to fully degas, promote uniform resin flow, and achieve complete curing to maximize stress release: Heating rate: 1.8℃ / min, slow heating to reduce thermal shock.

[0049] Maximum pressure: 380 psi, ensuring sufficient interlayer filling.

[0050] Curing stage: Keep at 185℃ for 140 minutes to ensure complete cross-linking of the polymer resin.

[0051] After being pressed and cooled to room temperature, X-ray inspection confirmed that there was no layer deviation, resulting in a core substructure with a thickness of approximately 3.2 mm and extremely stable dimensions.

[0052] Drilling and interconnection: Using a precision mechanical drill, buried vias (0.3mm diameter) are drilled on the core substructure to connect layers L3-L28. Descaling, chemical copper plating, and full-board electroplating are then performed (achieving a copper thickness of 18μm in the vias). Subsequently, high-heat-resistant, low-shrinkage epoxy resin is vacuum-pressed in, and after filling, the resin surface is precision ground to ensure it is flush with the copper surface. Finally, patterned electroplating is used to form a 38μm thick first copper cap in this area, providing a robust and reliable electrical connection and mechanical support platform for subsequent lamination.

[0053] Step S20: Formation of intermediate transition substructures (construction of layers L2-L29)

[0054] Layering and secondary lamination: On the upper and lower surfaces of the core substructure obtained in S10, a semi-cured sheet as a second bonding sheet and copper foil for forming the second layer (L2) and the 29th layer (L29) are respectively stacked.

[0055] Second pressing (transition layer pressing): The second pressing curve is used. The goal of this stage is to achieve good adhesion of the new layer without damaging the already stable core: heating rate: 2.2℃ / min.

[0056] Maximum pressure: 320 psi (slightly lower than the first time to prevent over-squeezing of the already stabilized core).

[0057] Curing temperature and time: Hold at 182℃ for 100 minutes.

[0058] After compression, an intermediate transition substructure containing layers L2 to L29 is formed.

[0059] Laser Blind Via Fabrication and Processing: Using a CO2 laser drill, second-order laser blind vias connecting layers L2-L3 and L28-L29 are precisely drilled on the intermediate transition substructure. Slag removal, chemical copper plating, and electroplating are then performed. The "resin filling-grinding-copper cap plating" process is repeated to form a second 36μm thick copper cap, thereby re-establishing stable interconnect nodes near the outer layers.

[0060] Step S30: Final Overall Structure Formation and Interconnection (Constructing Layers L1-L30)

[0061] Lamination and final bonding: On the upper and lower surfaces of the intermediate transition substructure obtained in S20, a prepreg (third bonding sheet) for the final outer layer and the outermost (L1, L30) copper foil are respectively stacked.

[0062] Third lamination (outer layer lamination): The third lamination curve is used. The main goal of this stage is to achieve good adhesion and flatness of the outer layer, while avoiding thermal stress on the internal structure. Heating rate: 2.5℃ / min. Maximum pressure: 300psi.

[0063] Curing temperature and time: Hold at 178℃ for 75 minutes.

[0064] After pressing, a complete 30-layer final overall structure with a total thickness of approximately 4.0 mm is obtained.

[0065] Final interconnect hole processing: Laser blind hole: Drilling third-order laser blind holes connecting layers L1-L2 and L29-L30.

[0066] High aspect ratio vias: The first via is drilled through all 30 layers for power plane and low-frequency signal connections. Some critical power vias have a diameter of 0.25mm and an aspect ratio as high as 16:1.

[0067] Hole metallization and treatment: All newly drilled holes underwent chemical copper plating. For through-holes with an aspect ratio of 16:1, an optimized pulse plating process was used: forward current density 2.0 ASD, reverse current density 0.65 ASD, duty cycle 1:4, to ensure uniform copper deposition in the middle section of the hole wall under high aspect ratio conditions. After plating, the thinnest copper layer in the hole was ≥22μm.

[0068] Outer blind via encapsulation: The third-order laser blind via is encapsulated again by resin filling, grinding and electroplating copper cap (third electroplated copper cap, 35μm thick).

[0069] Step S40: Outer layer circuitry and post-processing

[0070] Intricate pads and peripheral circuit patterns are formed on layers L1 and L30 through pattern transfer and etching.

[0071] Perform solder resist coating and character printing.

[0072] In the connector mating and unmating area, a hard gold (gold-nickel) plating is used as a surface treatment to ensure wear resistance and contact reliability.

[0073] Finally, flying probe testing, automated optical inspection (AOI), and contour machining are performed.

[0074] By combining Example 1 (32-layer server motherboard) with Example 2 (30-layer switch backplane), the powerful adaptability and consistently excellent performance of the "Ultra-high Multilayer Printed Circuit Board Manufacturing Method Based on Substructure Pre-stabilization" of this invention are fully demonstrated in different number of layers, different board thicknesses, and different terminal applications.

[0075] Existing technologies employ segmented lamination to improve production efficiency or address alignment issues for specific layers. In contrast, the segmentation (three-stage specific division) of this invention aims to achieve "substructure pre-stabilization" to systematically solve the stress accumulation problem in ultra-high-density multilayer (N>20) structures. Existing technologies typically use resin plugging as a final surface treatment or to resolve welding issues. However, the "immediate connection and sealing" process of this invention is performed immediately after each intermediate manufacturing stage. Its purpose is to provide a mechanically and electrically stable interconnection platform for the next stage of lamination, which is unprecedented.

[0076] The embodiments described above illustrate only two implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization, characterized in that, For manufacturing printed circuit boards with a total of N layers, where N is an integer greater than 20, the method is characterized by comprising the following sequential steps: S10, Stable core substructure formation: Prepare at least one inner core board containing circuit patterns from the 3rd layer to the (N-2)th layer; perform a first pressing and curing of the inner core board and the first adhesive sheet to form a core substructure; fabricate a first type of interconnect hole on the core substructure, and perform hole metallization, resin filling, surface grinding and form a first electroplated copper cap on the surface of the filled resin in sequence for the first type of interconnect hole; S20. Formation of intermediate transition substructure: On the upper and lower surfaces of the core substructure, a second adhesive sheet and a second outer copper foil are respectively stacked and then pressed and cured for the second time to form an intermediate transition substructure containing the second to (N-1) layers of circuit; on the intermediate transition substructure, a second type of interconnection hole is fabricated, and the second type of interconnection hole is sequentially metallized, filled with resin, ground, and a second electroplated copper cap is formed on the filled resin surface. S30. Final Overall Structure Formation and Interconnection: On the upper and lower surfaces of the intermediate transition substructure, a third bonding sheet and an outermost copper foil are respectively stacked and then pressed and cured for the third time to obtain the final overall structure; on the final overall structure, a third type of interconnection hole and a first through hole penetrating all layers are fabricated; the third type of interconnection hole and the first through hole are metallized; and the third type of interconnection hole is filled with resin, surface polished, and a third electroplated copper cap is formed on the surface of the filled resin. S40, Outer Layer Circuitry and Post-processing: Outer layer circuitry patterns are formed on both sides of the final overall structure, and solder resist, surface coating, electrical testing and shape processing are performed. The pressing temperature curve, pressure curve, and curing time used in the first, second, and third pressing curing processes are set independently.

2. The method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization according to claim 1, characterized in that, The first type of interconnecting hole is a buried hole formed by mechanical drilling, while the second and third types of interconnecting holes are blind holes formed by laser drilling.

3. The method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization according to claim 1, characterized in that, The copper layer thickness of the first, second, and third electroplated copper caps is 30-40 μm.

4. The method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization according to claim 1, characterized in that, The depth-to-diameter ratio AR of the first through hole satisfies: AR≥15:

1.

5. The method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization according to claim 1, characterized in that, When metallizing the first through hole, a pulse electroplating process is used, wherein the duty cycle of the pulse electroplating is 1:3 to 1:5 and the average current density is 1.5-2.5 ASD.

6. The method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization according to claim 1, characterized in that, N is selected from any value among 28, 30, 32, and 34.

7. The method for manufacturing ultra-high multilayer printed circuit boards based on substructure pre-stabilization according to claim 1, characterized in that, In step S10, the heating rate of the first pressing and curing is 1.5-2.5℃ / min, the maximum pressure is 300-400 psi, and the curing time at 180-190℃ is 100-150 minutes.

8. A printed circuit board manufactured by the method according to any one of claims 1 to 7, characterized in that, The total number of layers N of the printed circuit board is greater than 20, and it contains at least three blind via interconnect structures of different depths, filled with resin and covered with electroplated copper caps.

9. The printed circuit board according to claim 8, characterized in that, The printed circuit board includes through holes with a depth-to-diameter ratio ≥ 15:1, and the copper thickness uniformity of the hole wall is greater than 85%.

10. The printed circuit board according to claim 9, characterized in that, The alignment deviation between any two layers of the printed circuit board is less than or equal to 40 μm.

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