A hard drive status light control system and method for a hard drive backplane

Abstract

This application provides a hard drive status light control system and method for a hard drive backplane, belonging to the field of hard drive hardware management technology. The system provided includes a main hard drive backplane and cascaded hard drive backplanes. The main hard drive backplane is equipped with a SAS expander, a CPLD, and a cascade connector. The cascaded hard drive backplanes are connected to the main hard drive backplane via the cascade connector. The SGPIO of the SAS expander is connected to the input of the CPLD, receiving the SGPIO bitstream signal output from the SAS expander, reconstructing the SGPIO bitstream signal, and sending the reconstructed SGPIO bitstream signal to the cascaded hard drive backplanes. The cascaded hard drive backplanes parse the reconstructed SGPIO bitstream signal and drive the hard drive status lights to indicate the hard drive status based on the parsed SGPIO bitstream signal. The hard drive status light control system and method for a hard drive backplane provided in this application enable the reuse of existing hard drive backplane hardware and firmware, reducing maintenance costs.

Description

Technical Field

[0001] This application relates to the field of hard disk hardware management technology, and in particular to a hard disk status light control system and method for a hard disk backplane. Background Technology

[0002] In the hardware implementation of storage servers, in order to meet the product requirements and cost considerations of different application scenarios, various forms of hard drive backplanes are usually designed, such as 24-bay, 12-bay, and 8-bay models, to flexibly adapt to various storage density requirements. Hard drive backplanes are usually equipped with hard drive status indicator lights to indicate the working status of each hard drive in real time, including read / write activity status, error alarm status, and location identification status, so as to facilitate equipment monitoring and maintenance management by operation and maintenance personnel.

[0003] To standardize the control signals for hard drive status indicator lights, the SFF committee developed the SFF-8489 standard, which defines the bitstream parsing of the SGPIO serial universal input / output interface and the driving method for hard drive status lights. In existing storage system designs, when a hard drive backplane is directly connected to an HBA or RAID card, the HBA / RAID card transmits hard drive status information to the backplane via a standard 4-bay SGPIO bitstream (12 bits). The CPLD or MCU on the backplane parses this bitstream according to standard firmware and drives the indicator lights. To achieve large-scale hard drive expansion, storage systems often use SAS Expander chips to cascade multiple hard drive backplanes. The SAS Expander chip acts as an initiator for the SGPIO bus, generating SGPIO bitstream signals based on the status information from the HBA / RAID card and outputting them to each cascaded backplane.

[0004] However, SAS Expander chips typically support a maximum of four SGPIO interfaces. The raw SGPIO bitstream output is generated based on the total number of managed hard drive bays, and the bitstream length does not match the standard 4-bay length (12 bits). For example, the second SGPIO bitstream output by SAS Expander corresponds to 12 bays, with a bitstream length of 36 bits. However, standard 12-bay cascaded hard drive backplanes, when directly connected to HBA / RAID cards, typically parse using three sets of 4-bay SGPIO (12 bits each). This necessitates custom CPLD firmware for cascaded hard drive backplanes to adapt to the non-standard bitstream length, making it incompatible with the standard firmware configured for directly connected HBA / RAID cards. This increases the complexity and cost of firmware version maintenance. Furthermore, as the number of cascaded backplanes increases, the limited number of SGPIO interfaces in the SAS Expander chip becomes insufficient to meet the demands. Furthermore, because the CPLD firmware on the cascaded backplane needs to be customized according to the actual bit stream length, every change in the number or combination of hard drive backplane bays means that the CPLD firmware must be modified, re-verified, and re-released, making it incompatible with the standard firmware used when directly connecting HBA / RAID cards. This development model of repeatedly modifying firmware according to changes in drive bay configuration introduces a large amount of repetitive adaptation work throughout the entire process of R&D testing, production control, and product shipment, increasing the complexity and cost of firmware version maintenance. Summary of the Invention

[0005] In view of this, this application provides a hard drive status light control system and method for a hard drive backplane, which enables the reuse of existing hard drive backplane hardware and firmware under the limited SGPIO interface conditions of the SASExpander chip, thereby reducing maintenance costs.

[0006] Specifically, this application is implemented through the following technical solution: The first aspect of this application provides a hard disk status light control system for a hard disk backplane. The system includes a main hard disk backplane and a cascaded hard disk backplane. The main hard disk backplane is provided with a SAS expander, a CPLD, and a cascade connector. The cascaded hard disk backplane is connected to the main hard disk backplane through the cascade connector. The SGPIO of the SAS expander is connected to the input terminal of the CPLD. Multiple hard disks are mounted on the main hard disk backplane and the cascaded hard disk backplane respectively. Each hard disk is provided with a set of hard disk status lights. The number of hard disk status lights is the same as the total number of hard disks mounted on the main hard disk backplane and the cascaded hard disk backplane. The CPLD receives the SGPIO bit stream signal output by the SAS extender. The SGPIO bit stream signal carries the working status information of each hard disk drive bay. The number of bits in the SGPIO bit stream signal is three times that of the hard disk drive bay. The CPLD reconstructs the SGPIO bit stream signal and sends the reconstructed SGPIO bit stream signal to the cascaded hard disk backplane. The number of bits in the SGPIO bit stream signal is greater than the target bit stream of the cascaded hard disk backplane. The number of bits in the reconstructed SGPIO bit stream signal matches the target bit stream. The cascaded hard drive backplane parses the reconstructed SGPIO bit stream signal and drives the hard drive status light to indicate the hard drive status based on the parsed SGPIO bit stream signal.

[0007] A second aspect of this application provides a method for controlling the hard drive status lights on a hard drive backplane, the method comprising: The CPLD receives the SGPIO bit stream signal output by the SAS extender, and the SGPIO bit stream signal carries the working status information of the hard disk drive managed by the SAS extender. The CPLD reconstructs the SGPIO bitstream signal to generate a reconstructed SGPIO bitstream signal. The CPLD sends the reconstructed SGPIO bitstream signal to the cascaded hard disk backplane through the cascade connector. The cascaded hard disk backplane parses the reconstructed SGPIO bitstream signal according to the fixed standard SGPIO parsing logic, and drives the status indicator lights corresponding to each hard disk on the cascaded hard disk backplane according to the parsing result.

[0008] The hard drive status light control system and method for hard drive backplanes provided in this application directly connects the SGPIO bit stream signal output by the SAS expander to the CPLD. The CPLD on the main hard drive backplane acts as a relay processor for the SGPIO bit stream signal, and performs adaptive reconstruction of the non-standard long bit stream signal output by the SAS expander. This allows the CPLD to adaptively convert one long bit stream into multiple standard bit stream signals that precisely match the number of disk bays on each cascaded hard drive backplane, regardless of how the number of cascaded hard drive backplanes changes or how the number of hard drive bays on each backplane is adjusted. This ensures that the signal format received by the cascaded hard drive backplanes is fully compatible with its standard firmware, thereby enabling the hardware and firmware of existing hard drive backplanes to be reused without modification and reducing firmware version maintenance costs. Specifically, the number of bits in the SGPIO bitstream signal output by the SAS extender is determined by the total number of hard drive bays it manages. When the bitstream length exceeds the standard target bitstream length fixed by the cascaded hard drive backplane, the CPLD intervenes in the signal transmission path, reconstructs the original bitstream into a signal format that matches the target bitstream of each cascaded backplane before sending it down. This ensures that the signal received by the cascaded hard drive backplane is completely consistent in format with that of a directly connected HBA / RAID card. The cascaded backplane does not need to be aware of the existence of the front-end SAS extender, nor does it need to make any custom modifications to its firmware. It can parse the signal and drive the status lights according to the existing standard logic, thereby achieving unified decoupling of the signal interface between the main backplane and the cascaded backplane and eliminating the firmware fragmentation problem caused by incompatible bitstream formats. Attached Figure Description

[0009] Figure 1 A schematic diagram of the structure of a first embodiment of the hard drive status light control system for the hard drive backplane provided in this application; Figure 2 A schematic diagram of the structure of a conventional control system shown as an exemplary embodiment of this application; Figure 3 A schematic diagram of the hard disk status light control system shown as an exemplary embodiment of this application; Figure 4 The flowchart is a second embodiment of the hard drive status light control method for the hard drive backplane provided in this application. Detailed Implementation

[0010] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application.

[0011] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used herein are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0012] It should be understood that although the terms first, second, third, etc., may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."

[0013] The following specific embodiments are given to illustrate the technical solution of this application in detail.

[0014] Figure 1 This is a schematic diagram of the hard drive status light control system for the hard drive backplane provided in this application, according to one embodiment. Please refer to... Figure 1 The system provided in this embodiment includes: The system includes a main hard drive backplane and a cascaded hard drive backplane. The main hard drive backplane is equipped with a SAS expander, a CPLD, and a cascade connector. The cascaded hard drive backplane is connected to the main hard drive backplane via the cascade connector. The SGPIO of the SAS expander is connected to the input terminal of the CPLD. Multiple hard drives are mounted on the main hard drive backplane and the cascaded hard drive backplane, respectively. Each hard drive is equipped with a set of hard drive status lights. The number of hard drive status lights is the same as the total number of hard drives mounted on the main hard drive backplane and the cascaded hard drive backplane. The CPLD receives the SGPIO bit stream signal output by the SAS extender. The SGPIO bit stream signal carries the working status information of each hard disk drive bay. The number of bits in the SGPIO bit stream signal is three times that of the hard disk drive bay. The CPLD reconstructs the SGPIO bit stream signal and sends the reconstructed SGPIO bit stream signal to the cascaded hard disk backplane. The number of bits in the SGPIO bit stream signal is greater than the target bit stream of the cascaded hard disk backplane. The number of bits in the reconstructed SGPIO bit stream signal matches the target bit stream. The cascaded hard drive backplane parses the reconstructed SGPIO bit stream signal and drives the hard drive status light to indicate the hard drive status based on the parsed SGPIO bit stream signal.

[0015] For details, please refer to Figure 1The main hard drive backplane integrates a SAS expander, a CPLD, and multiple cascading connectors. The SAS expander is used for large-scale storage expansion, the CPLD is used for signal parsing and reconstruction, and the cascading connectors are used to cascade downstream devices. The cascading hard drive backplane, as a downstream expansion module, has its own onboard cascading connector and is physically connected to the cascading connector on the main hard drive backplane via cables, thus mounting it on the main hard drive backplane. Both the main hard drive backplane and the cascading hard drive backplane have several hard drive slots, each with a set of status indicator lights. These indicator lights display active read / write status, fault alarm status, and location identification status. The total number of hard drive status lights in the entire system equals the total number of hard drives mounted on the main backplane and the cascading backplane, achieving global physical visual coverage.

[0016] Furthermore, Figure 2 This is a schematic diagram of the structure of a conventional control system shown as an exemplary embodiment of this application. Figure 3 This is a schematic diagram of the hard disk status light control system shown as an exemplary embodiment of this application. Please also refer to... Figure 2 and Figure 3 In traditional control systems, the SGPIO bitstream signal output by the SAS expander is typically sent directly to the cascaded hard drive backplane via the cascading connector. The CPLD or control logic on the cascading backplane then parses and drives the status indicator lights. This means the cascading backplane must receive and process the original long bitstream generated by the SAS expander based on the total number of drives. If the drive bay configuration of the cascading backplane changes, for example from 12 bays to 8 or 4 bays, the length of the original bitstream also changes. The CPLD firmware on the cascading backplane must then be re-adapted to the new bitstream length, and the standard parsing logic used when directly connecting to HBAs or RAID cards cannot be reused. Figure 3 In this configuration, the SGPIO bitstream signal output from the SAS expander is connected to the CPLD input on the main hard drive backplane. This CPLD acts as a signal processing node, receiving the raw bitstream, reconstructing it, and then connecting it to each cascade connector via cables to the respective cascade hard drive backplanes. This connection adjustment ensures that the non-standard long bitstream, originally directly faced by the cascade backplanes, is intercepted by the CPLD on the main backplane and converted into a standard bitstream precisely matching the number of drive bays on each cascade backplane. Therefore, the signal format received by the cascade backplanes remains consistent with that of the direct-connected HBA or RAID card, no longer affected by changes in the length of the bitstream output from the front-end SAS expander, and eliminating the need for repeated firmware modifications due to adjustments in the number of hard drives or backplane configurations.

[0017] Furthermore, the SAS expander, acting as the initiator of the SGPIO bus, receives instructions from the host-side HBA or RAID card, converting the working status of each hard drive bay into a serial SGPIO bitstream signal, which is then output from its dedicated pin. The SGPIO bitstream signal is received by the input of the CPLD, and this single CPLD handles all subsequent processing. The SGPIO bitstream signal received by the CPLD is the original SGPIO bitstream signal, which is usually quite long, with a bit width equal to three times the total number of hard drives managed by the SAS expander. The CPLD does not directly pass through the signal but reconstructs the received SGPIO bitstream signal, performing splitting and remapping operations to generate multiple new bitstream signals with shorter lengths. The reconstructed SGPIO bitstream signal is sent out through the cascading connector on the main backplane and transmitted to the cascaded hard drive backplane via physical cables. After receiving the signal, the cascaded backplane parses it according to standard logic and directly drives the corresponding status indicator light.

[0018] Furthermore, standard cascaded hard drive backplanes, when directly connected to HBA / RAID cards, often follow a format such as 4 drive bays per group, with a corresponding SGPIO bit stream standard length of 12 bits. However, in a cascaded architecture, the signals uniformly generated by the SAS expander are long bit streams arranged in large, continuous intervals. For example, the second group of SGPIOs might directly output a 36-bit long signal corresponding to 12 drive bays. If this 36-bit signal is directly sent to the cascaded backplane, the standard firmware of the cascaded backplane will not be able to recognize it. The CPLD internally presets the drive bay mapping relationship for each cascaded backplane. After receiving the 36-bit long bitstream, it is divided into 12-bit units, that is, according to the regular length of three 4-bay drives, the long signal is cut into three independent sub-bitstreams. In this process, only the physical transmission channel and sequence length of the bitstream are changed, without tampering with the specific information representing hard drive read / write, error, etc. The length of each sub-bitstream generated is 12 bits, which can match the standard 4-bay format that is fixed at the factory of the cascaded hard drive backplane. The CPLD sends out the three 12-bit reconstructed signals through three SlimSAS connectors. In this way, the signal received by the cascaded backplane is as if it comes from three independent direct-connected HBA / RAID cards, so no custom firmware is needed, and standard parsing functions can be used to directly control the hard drive status lights to turn on and off.

[0019] Optionally, the SAS extender outputs the original SGPIO bitstream signal to the CPLD on the main hard drive backplane based on the hard drive bay status information output by the HBA or RAID card. The CPLD reconstructs the original SGPIO bitstream signal and sends the reconstructed SGPIO bitstream signal to the cascaded hard drive backplane through the cascade connector. The cascaded hard drive backplane is equipped with a second CPLD, which receives the reconstructed SGPIO bitstream signal and parses the reconstructed SGPIO bitstream signal according to the standard SGPIO parsing logic fixed on the cascaded hard drive backplane to drive the hard drive status lights.

[0020] Specifically, the HBA or RAID card, as the core controller of the storage system, monitors and determines the working status of each hard drive bay in real time, and sends this status information to the SAS expander. The SAS expander generates an SGPIO bit stream signal based on the status information. The SGPIO bit stream signal is a serial data sequence containing the status information of all managed hard drive bays. Each hard drive bay occupies a fixed 3 bits, and the total number of bits is equal to three times the number of managed hard drive bays. Furthermore, since the bit stream length output by the SAS expander does not match the standard SGPIO parsing logic fixed on the cascaded hard drive backplane, the CPLD located on the main hard drive backplane receives the SGPIO bit stream signal and performs reconstruction processing. The CPLD splits the long bit stream into multiple sub-bit streams according to the standard length through the preset hard drive bay mapping relationship. Each sub-bit stream corresponds to a cascaded backplane or a group of hard drive bays. It should be noted that in this process, only the channel affiliation and timing of the bit stream are changed, without changing the original status information of each hard drive bay.

[0021] Furthermore, the reconstructed multi-channel standard SGPIO bit streams are sent to each level of the cascaded hard drive backplane via the cascade connector. The second CPLD on the cascaded backplane receives bit stream signals that are fully matched with its own standard firmware. Therefore, without any customization modifications, it can parse bit by bit according to the factory-fixed standard parsing logic. Based on the high and low levels of each status bit, it drives the corresponding hard drive's activity indicator, error indicator, and positioning indicator to light up or turn off, thereby realizing the customization-free reuse of the cascaded backplane hardware and firmware.

[0022] The CPLD on the main hard drive backplane reconstructs the long bitstream SGPIO signal output by the SAS expander, corresponding to the total number of disks, into multiple standard-length bitstream signals that match the disk bay configuration of each cascaded backplane. This ensures that the signal format received by the second CPLD on the cascaded hard drive backplane is completely consistent with that when directly connected to an HBA / RAID card. The signal adaptation work is completely converged on the main backplane side. The cascaded backplane does not need to be aware of the existence of the front-end expander, nor does it need to make any customized modifications to its fixed standard SGPIO parsing logic. It can directly reuse existing hardware and firmware, thereby eliminating the firmware version fragmentation problem caused by incompatible bitstream formats and significantly reducing maintenance costs.

[0023] Optionally, multiple cascaded hard drive backplanes exist, and each hard drive mounted on the cascaded hard drive backplane has a corresponding set of hard drive status lights. Each set of hard drive status lights on the main hard drive backplane and each set of hard drive status lights on the cascaded hard drive backplanes includes at least an activity indicator, an error indicator, and a positioning indicator. The reconstructed SGPIO bit stream signal contains an activity indicator bit, an error indicator bit, and a positioning indicator bit corresponding to each hard drive on each cascaded hard drive backplane. The cascaded hard drive backplane is used to parse the reconstructed SGPIO bit stream signal, control the activity indicator of the corresponding hard drive to flash or turn off at a first frequency according to the high or low level of the activity indicator bit, control the error indicator of the corresponding hard drive to stay on or turn off according to the high or low level of the error indicator bit, and control the positioning indicator of the corresponding hard drive to flash or turn off at a second frequency according to the high or low level of the positioning indicator bit.

[0024] Specifically, the system includes multiple cascaded hard drive backplanes. Each hard drive on each cascaded backplane corresponds to a set of status lights, including an activity indicator, an error indicator, and a positioning indicator. The CPLD on the main hard drive backplane sends the reconstructed SGPIO bit stream signal to each cascaded backplane through various channels. Each bit stream has a 3-bit group arranged consecutively, corresponding one-to-one with the hard drive on the backplane. The three indicator bits correspond to the three indication functions: activity, error, and positioning, respectively. After receiving the bit stream, the cascaded hard drive backplane parses it bit by bit according to the fixed standard logic. When the activity indicator bit corresponding to a hard drive is high, it drives its activity indicator to flash at a first frequency to indicate the read / write status; when it is low, it is off. When the error indicator bit is high, it drives the error indicator to stay on to indicate a fault; when it is low, it is off. When the positioning indicator bit is high, it drives the positioning indicator to flash at a second frequency to assist in positioning; when it is low, it is off. This control relies entirely on the original status information retained in the reconstructed signal, enabling the cascaded backplane to achieve precise lighting feedback without any firmware customization. It should be noted that the first and second frequencies are different.

[0025] Furthermore, the information of the activity indicator, position indicator, and error indicator bits for each disk slot in the SGPIO bitstream is determined by the HBA / RAID card, generated by the SAS expander, and then sent to the CPLD. During the reconstruction process, the CPLD only changes the channel affiliation and timing of the bitstream, without changing the specific level values ​​of the three indicator bits within each 3-bit group. Therefore, the status information of each hard drive is preserved as is and accurately transmitted to the corresponding cascaded backplane. The control logic on the cascaded backplane (whether it is the second CPLD, MCU, or discrete logic) only needs to read the standard parsing order set by the factory to execute the above-mentioned on / off control based on the high and low levels, without needing to be aware of whether the front-end signal has undergone reconstruction processing. The entire lighting control process relies entirely on the original status bits carried in the reconstructed signal. Each cascaded backplane does not need to be aware of the existence of the front-end SAS expander, nor does it need to make any custom modifications to the firmware. This achieves refined visual feedback while eliminating firmware fragmentation problems in cascaded scenarios, significantly reducing the deployment and maintenance costs of multi-backplane systems.

[0026] Optionally, the SAS extender outputs multiple sets of SGPIO bit stream signals. Each set of SGPIO bit stream signals corresponds to the management of a range of hard disk slots. The number of bits in each set of SGPIO bit stream signals is three times the number of hard disk slots in the range. The three bits corresponding to each hard disk slot are used as an activity indicator bit, a positioning indicator bit, and an error indicator bit, respectively. The CPLD reconstructs the SGPIO bit stream signal and outputs multiple reconstructed SGPIO bit stream signals. Each reconstructed SGPIO bit stream signal corresponds to one of the cascade connectors. The number of bits in each reconstructed SGPIO bit stream signal is three times the number of hard disks on the cascaded hard disk backplane. The three bits corresponding to each hard disk slot in each channel are used as an activity indicator bit, a positioning indicator bit, and an error indicator bit, respectively.

[0027] Specifically, the SAS extender divides the managed hard drive bays into multiple intervals. Each SGPIO bit stream signal corresponds to one interval, with its bit width being three times the number of hard drive bays within that interval. Each bay is allocated a fixed 3 bits, used as an activity indicator, a position indicator, and an error indicator. After receiving each SGPIO bit stream signal, the CPLD performs reconstruction processing, splitting the original continuous bit stream arranged in large intervals into multiple independent reconstructed SGPIO bit stream signals. Each stream corresponds to a cascade connector, and its bit width strictly matches the number of hard drive bays on the cascaded hard drive backplane connected to that connector (also three times the number of hard drive bays). Each hard drive bay in each stream still maintains a 3-bit structure, corresponding to the activity, position, and error indicator bits. This conversion process only changes the channel assignment and timing of the bit stream, without altering the original status information of each bay. This ensures that the format of each output signal is completely consistent with the standard SGPIO bit stream when directly connected to an HBA / RAID card on a cascaded backplane, thereby achieving custom-free multiplexing of the cascaded backplane firmware.

[0028] Optionally, the SGPIO bit stream signal is a serial data sequence containing the status information of all cascaded hard disks. The CPLD has a preset disk position mapping table, which records the correspondence between each bit segment in the SGPIO bit stream signal and each cascaded hard disk backplane and each hard disk position on it. When reconstructing the SGPIO bit stream signal, the CPLD splits the SGPIO bit stream signal according to the disk position mapping table by bit segment, identifies the cascaded hard disk backplane and corresponding hard disk position to which each bit segment belongs, and recombines the bit segments belonging to the same cascaded hard disk backplane into a reconstructed SGPIO bit stream signal, which is then sent to the cascaded hard disk backplane through the corresponding cascade connector.

[0029] Specifically, the SGPIO bit stream signal output by the SAS extender is a long data sequence that serially arranges the status of all managed hard disk drive bays in a fixed order. Each drive bay occupies a fixed 3 bits. The CPLD on the main hard disk backplane stores a drive bay mapping table in advance. The drive bay mapping table records the correspondence between each 3-bit group in the SGPIO bit stream signal and each cascaded hard disk backplane and its specific hard disk drive bay. For example, the 1st to the Kth 3-bit group of the SGPIO bit stream signal belongs to cascaded backplane A, the K+1st to the 2Kth 3-bit group belongs to cascaded backplane B, and so on. When the CPLD receives the original long bit stream, it identifies each segment according to the records in the mapping table. First, it locates the start bit of the original bit stream. Following the boundaries defined by the mapping table, it sequentially divides the continuously arranged bit segments into multiple sub-segments. Each sub-segment contains all 3-bit groups belonging to the same cascaded backplane. The CPLD maintains the original relative order of the 3-bit groups within each sub-segment and repackages them into an independent reconstructed SGPIO bit stream signal. This signal is then sent out through the cascade connector corresponding to the cascaded hard drive backplane. The level values ​​of the activity indicator, position indicator, and error indicator bits for each drive bay remain unchanged before and after the split; only the signal organization and transmission channel are altered. By pre-setting a disk location mapping table within the CPLD on the main backplane, precise splitting and reassembly of the original long bit stream SGPIO signals according to their affiliation are achieved. The mapping table, as a set of pre-defined correspondence rules, establishes a clear association between each bit segment in the originally flattened long bit stream and each cascaded backplane and its specific disk location. Based on this, the CPLD performs analytical splitting with bit segments as the smallest unit, and re-aggregates segments belonging to the same cascaded backplane into an independent output. This allows the SAS extender to output only one continuous bit stream according to its maximum management range, without needing to consider the number of downstream cascaded backplanes or their disk location configuration. The signals received by each cascaded backplane appear as if they were emitted from their own independent direct-connected HBA / RAID cards, with standard format and clear affiliation. This completely decouples the signal format binding between the extender output and the cascaded backplane input. Each cascaded backplane does not need to be aware of the mapping rules and can directly parse and drive using its fixed standard firmware. In large-scale multi-cascade scenarios, this completely eliminates the need for firmware customization, reducing system deployment complexity and maintenance costs.

[0030] Furthermore, the steps for reconstructing the SGPIO bitstream signal include: (1) Obtain the total number of bits of the SGPIO bit stream signal output by the SAS extender, and the number of hard drives mounted on each of the cascaded hard drive backplanes; Specifically, it receives the SGPIO bit stream signal output by the SAS extender, identifies the frame start flag and clock edge of the SGPIO bit stream signal, counts the valid data bits on the SDataOut data line within a frame to obtain the total number of bits of the SGPIO bit stream signal, and reads the system configuration information pre-stored inside the CPLD to obtain the number of hard drives mounted on each cascaded hard drive backplane.

[0031] Furthermore, the SGPIO bit stream signal output by the SAS extender is a serial data sequence, and its frame structure is defined by the SLoad signal. When the SLoad signal is valid, it indicates the start of a frame. Subsequently, in each clock cycle of SClock, one valid data bit is transmitted on the SDataOut line. The CPLD locates the start of the frame by sampling the rising or falling edge of the SLoad signal, and uses an internal counter to count the bits on SDataOut under the drive of SClock until the start of the next frame or the preset maximum frame length is reached, thereby obtaining the total number of bits. At the same time, the non-volatile memory area of ​​the CPLD stores the system topology configuration, including the number of hard disk bays on the cascaded hard disk backplane connected to each cascade connector. The number of hard disk bays is pre-written according to the actual hardware connection relationship during system design. The CPLD reads these values ​​through internal registers to provide a basis for subsequent calculations.

[0032] (2) Determine the target number of bits of the SGPIO bit stream signal after reconstruction for each channel based on the number of hard drives in each cascaded hard drive backplane, and determine the number of split channels based on the ratio of the total number of bits of the SGPIO bit stream signal to the target number of bits. Specifically, for the i-th cascaded hard disk backplane, multiply its number of hard disks by 3 to obtain the target number of bits of the SGPIO bit stream signal after reconstruction; calculate the sum of the target number of bits for all cascaded hard disk backplanes and verify whether the sum of the target number of bits is equal to the original total number of bits; determine the number of split paths based on the ratio of the total number of bits of the SGPIO bit stream signal to the target number of bits.

[0033] Furthermore, according to the SFF-8489 standard, each hard drive bay occupies a fixed 3 bits. Therefore, the total number of bits in one SGPIO bit stream must strictly satisfy a three-fold relationship with the number of hard drives managed. The CPLD calculates the required bit length of each reconstructed signal based on the number of hard drives on each backplane. For example, if cascaded backplane A has 4 drives, its target bit length T1 = 12 bits; if cascaded backplane B has 2 drives, then T2 = 6 bits. The sum of all target bit lengths must equal the total number of bits N in the original bit stream, because the SAS expander outputs the result of these drive bay states arranged serially in a fixed order. The verification step ensures that the mapping relationship is correct. The number of split paths is the number of cascaded backplanes, and each path corresponds to an independent cascade connector. If all cascaded backplanes have the same number of drives (e.g., all have 4 drives), then the target bit length for each path is equal; if the number of drives is different, the number of split paths is determined directly according to the preset number of backplanes.

[0034] (3) Starting from the start bit of the SGPIO bit stream signal, the SGPIO bit stream signal is sequentially and continuously divided into M segments according to the target number of bits, and each segment corresponds to a reconstructed SGPIO bit stream signal. Specifically, the first valid data bit of the SGPIO bitstream signal is identified as the starting position for splitting; based on the target number of bits for each cascade backplane, the original bitstream is sequentially divided into multiple consecutive bit segments, with the i-th bit segment containing bits offset from the starting bit (ΣT). j (j=1 to i-1)+1 starting T i Each bit segment maintains its original relative order and is temporarily stored in the corresponding buffer inside the CPLD, with the buffer marked to indicate its correspondence with the target cascade connector.

[0035] Furthermore, the SLoad signal marks the start of a frame, and the SDataOut data corresponding to the first SClock edge immediately following it is the first valid data bit, typically corresponding to the activity indicator bit of the first hard disk drive. The CPLD uses this bit as the starting offset of 0 and internally maintains a bit pointer. For the first cascaded backplane, its target number of bits is T1, so the bit segment [0: T1-1] is extracted; for the second cascaded backplane, the bit segment [T1 : T1+T2-1] is extracted; and so on, until all multiple bit segments have been extracted. The bit order within each bit segment strictly matches the order of appearance in the original bit stream. For example, the first 3 bits in the first bit segment still correspond to the activity, location, and error indicator bits of the first hard disk drive. The CPLD allocates an independent buffer register for each output, writes the segmented data in parallel, and sets the corresponding channel strobe signal for subsequent processing and transmission.

[0036] (4) Perform timing alignment and signal shaping on each bit stream to form M independent standard SGPIO bit stream signals, which are then output to the corresponding cascaded hard disk backplane through the corresponding cascade connector.

[0037] Specifically, independent SClock and SLoad signals are generated for each reconstructed bit stream, with their clock frequency and frame timing meeting the standard SGPIO protocol specifications; the data of each bit stream segment is serially shifted and output to the corresponding SDataOut line according to the SClock clock cycle, ensuring that the setup / hold time of the data bits and SClock meets the requirements; the level, drive capability, and edge slope of the output signal are shaped to meet the signal integrity requirements of the cascade connector and backplane traces; and the SClock, SLoad, and SDataOut signals are sent to the corresponding cascaded hard disk backplane through the corresponding cascade connector pins.

[0038] Furthermore, the split bit streams are still parallel data and need to be repackaged into serial signals conforming to the SGPIO bus physical layer standard. Internally, the CPLD instantiates an SGPIO transmit controller for each output. The controller generates the SClock clock, SLoad frame synchronization signal, and SDataOut serial data line according to the standard protocol. Each controller retrieves the bit segment data from its corresponding buffer register. After SLoad is valid, it shifts the data out bit by bit on the rising or falling edge of SClock, ensuring that the data bit changes are strictly aligned with the clock edge to guarantee correct sampling at the receiving end (cascaded backplane). The CPLD also shapes the signal through output pin configurations (such as drive strength selection and slope control) to compensate for signal attenuation and reflection that may occur during long-distance cable transmission. The shaped three-wire SGPIO signal is output through the corresponding SlimSAS connector pins. The cascaded hard drive backplane receives a complete SGPIO bit stream that is timing-independent, formatted correctly, and whose content corresponds one-to-one with its own drive bay, thus achieving a signal interface indistinguishable from a direct-connection HBA / RAID card scenario.

[0039] Through systematic parameter acquisition and calculation, automated signal adaptation is achieved for cascaded backplanes configured with any drive bay. The CPLD senses the total length of the SGPIO long bit stream and the number of drives in each cascaded backplane, calculates the target bit length and number of split channels for each output, and continuously segments sub-bit segments corresponding to each cascaded backplane along the bit stream direction based on the starting bit. Each segment is independently shaped into an SGPIO bus signal with a complete frame structure and standard timing. The entire process only involves bit stream segmentation and channel remapping, without changing the original status information of each drive bay. This ensures that the signals received by each cascaded backplane are completely consistent in format and timing with those directly connected to HBA / RAID cards. No firmware customization is required for plug-and-play parsing and driving of hard drive status lights, truly realizing standardized decoupling and maintenance-free deployment of signal interfaces in large-scale cascaded scenarios.

[0040] Furthermore, the SGPIO bitstream signal output by the SAS extender is a single frame of serial data sequence, consisting of N consecutively arranged 3-bit groups, where N is the total number of hard disk bays managed by the SAS extender through SGPIO. Each 3-bit group sequentially includes an activity indicator bit, a location indicator bit, and an error indicator bit, with the i-th 3-bit group corresponding to the i-th hard disk bay. The steps for reconstructing the SGPIO bitstream signal further include: (1) Using 3-bit groups as the smallest splitting unit, the N consecutive 3-bit groups in the SGPIO bit stream signal are divided into M bit segments according to the number of hard disk slots mounted on each cascaded hard disk backplane. Each bit segment contains K complete 3-bit groups, corresponding to K hard disk slots of a cascaded hard disk backplane. Specifically, the frame start position of the original SGPIO bitstream signal is identified, and the entire frame bitstream is parsed into a logical sequence consisting of N consecutive 3-bit groups, grouped into 3-bit groups; the number K of hard drive bays on each cascaded hard drive backplane is read. i Using 3-bit groups as units, the first K1 complete 3-bit groups are divided into the first segment, corresponding to the first cascaded hard disk backplane; the next K2 3-bit groups are divided into the second segment, and so on, until all N 3-bit groups are allocated, forming M segments.

[0041] Furthermore, according to the SFF-8489 standard, a complete frame of the SGPIO bit stream signal is defined by the SLoad signal, marking the start and end of the frame. Within the frame, the serial data transmitted on the SDataOut line is grouped into sets of 3 bits, corresponding sequentially to the activity, location, and error status indicators of each hard disk drive bay. Therefore, a 3-bit group is the smallest semantic unit of hard disk status information. Since the three bits are indivisible, when the CPLD receives the SGPIO bit stream, it locates the start time of the frame by detecting the edge of the SLoad signal. Subsequently, it sequentially receives data bits on SDataOut at each SClock clock edge and uses an internal modulo-3 counter to divide the continuous bit stream into complete 3-bit groups, forming a logical sequence of N 3-bit groups.

[0042] At the same time, the CPLD reads system topology information from its internal configuration storage area. The system topology information records the number of hard drives K1, K2, ..., K on the cascaded hard drive backplanes connected to each cascade connector. m Since each hard drive bay corresponds to exactly one 3-bit group, the K1 bays of the first cascaded backplane correspond to the first K1 3-bit groups in the original bit stream, the K2 bays of the second cascaded backplane correspond to the following K2 3-bit groups, and so on. Following this order, the CPLD uses 3-bit groups as indivisible atomic units, starting from the beginning of the original bit stream sequence, continuously marking the first K1 3-bit groups as the first bit segment, the next K2 3-bit groups as the second bit segment, until all N 3-bit groups are completely divided into M bit segments. Because the division boundary always falls on the integer boundary of the 3-bit group, there will be no situation where the three indicator bits of a hard drive are split into different bit segments, fundamentally ensuring the integrity and correctness of the status information of each hard drive.

[0043] (2) Keep the original relative order of the K 3-bit groups in each bit segment unchanged, perform timing alignment respectively, and output them as an independent reconstructed SGPIO bit stream signal. In each reconstructed SGPIO bit stream signal, the three indicator bits of each 3-bit group are consistent with the three indicator bits of the corresponding hard disk position in the SGPIO bit stream signal.

[0044] Specifically, for each bit segment, the arrangement order of its K internal 3-bit groups in the original bit stream is kept unchanged, and they are temporarily stored in the corresponding output buffer registers in sequence; an independent SClock clock signal and SLoad frame synchronization signal are generated for each output, and the bit segment data in the buffer register is serially shifted out bit by bit according to the SGPIO protocol timing; the clock edge, data setup / hold time and drive level of each output signal are shaped to form an independent bit stream signal that conforms to the standard SGPIO physical layer specification, and sent through the corresponding cascade connector.

[0045] Furthermore, each bit segment is essentially a continuous sequence of 3-bit groups. The arrangement of the 3-bit groups within each segment, as well as the arrangement of the three indicator bits within each 3-bit group, is completely consistent with the original SGPIO bit stream. The CPLD allocates an independent buffer register group for each output, writing all the bit data in the corresponding bit segment in the original order. The level states of the activity indicator, position indicator, and error indicator bits carried by each 3-bit group are completely consistent with the status information of the corresponding hard disk drive in the original signal.

[0046] Furthermore, after data buffering is completed, the CPLD instantiates an independent SGPIO transmit controller for each output. Each transmit controller first generates an independent SClock clock signal, the frequency of which can be the original SGPIO clock or the system standard frequency; simultaneously, it generates an SLoad frame synchronization signal to mark the start time of the reconstructed bit stream frame for that channel. After SLoad is valid, driven by SClock, the transmit controller fetches data bit by bit from the corresponding buffer register in a first-in-first-out order, serially shifts it, and outputs it to the SDataOut signal line of that channel. Since each channel has an independent clock and frame synchronization signal, the reconstructed SGPIO bit streams are completely decoupled in timing and do not interfere with each other. The CPLD performs physical layer shaping on each SGPIO signal by configuring parameters such as the drive strength and edge slope of the output pins to compensate for signal attenuation and reflection caused by transmission through cables of different lengths, ensuring correct sampling on the backplane side of the cascaded hard drives. In this way, each cascaded hard drive backplane receives a standard SGPIO bit stream signal through its dedicated cascade connector. This signal is logically identical to the original bit stream and physically independent and complete, thus achieving the same signal interface experience as in the scenario of a cascaded backplane and a direct connection to an HBA / RAID card.

[0047] Using 3-bit groups as the smallest indivisible operating unit fundamentally ensures that the activity indicator, position indicator, and error indicator of each hard drive bay are always processed as a whole during the reconstruction process, without being split into different channels. The CPLD divides the N consecutively arranged 3-bit groups in the original long bit stream into M bit segments according to the number of drive bays in each cascade backplane. The original arrangement order of the 3-bit groups within each bit segment is completely preserved, and each segment is output after independent timing alignment. In this way, the status information of each reconstruction signal is logically consistent with the corresponding part of the original bit stream, and the physical format becomes a standard SGPIO signal with independent clock and frame synchronization. This makes the signals received by each cascade backplane equivalent to the standard bit stream when each is directly connected to an HBA / RAID card. It can drive the hard drive status lights plug and play without any firmware adaptation, truly realizing the standardized and custom-free deployment of signal interfaces in large-scale cascade scenarios.

[0048] Optionally, the CPLD splits and reconstructs the SGPIO bit stream signal, and outputs M independent reconstructed SGPIO bit stream signals. Each reconstructed SGPIO bit stream signal is a serial data sequence consisting of K consecutive 3-bit groups, where K is the number of hard drives mounted on the cascaded hard drive backplane to which the signal is sent. The CPLD has a preset channel mapping table, which records the correspondence between each reconstructed SGPIO bit stream signal and each cascade connector and cascaded hard disk backplane. The CPLD sends each reconstructed SGPIO bit stream signal to the corresponding cascaded hard disk backplane through the corresponding cascade connector according to the channel mapping table. The j-th 3-bit group in each reconstructed SGPIO bit stream signal corresponds to a set of hard disk status lights for the j-th hard disk on the cascaded hard disk backplane. The activity indicator bit, position indicator bit, and error indicator bit in the 3-bit group correspond to the activity indicator light, position indicator light, and error indicator light in the hard disk status lights, respectively. After receiving the reconstructed SGPIO bitstream signal, the cascaded hard disk backplane parses each 3-bit group bit by bit. When the activity indicator bit in the 3-bit group is high, the corresponding hard disk's activity indicator light is lit; when the activity indicator bit in the 3-bit group is low, the corresponding hard disk's activity indicator light is turned off. When the positioning indicator bit is high, the corresponding hard disk's positioning indicator light is lit; when the positioning indicator bit is low, the corresponding hard disk's positioning indicator light is turned off. When the error indicator bit is high, the corresponding hard disk's error indicator light is lit; when the error indicator bit is low, the corresponding hard disk's error indicator light is turned off.

[0049] Specifically, after the CPLD splits and reconstructs the original long bit stream, it outputs M independent reconstructed SGPIO bit stream signals. Each signal is a complete serial data sequence in format, consisting of K consecutive 3-bit groups, where K equals the total number of hard drives mounted on the cascaded hard drive backplane to which the signal is sent. For example, if a cascaded backplane has 4 hard drives mounted, the reconstructed signal sent to that backplane will contain 4 3-bit groups, totaling 12 bits. Each signal has an independent frame start marker and clock tick, and physically it is a standard SGPIO bus signal. The CPLD internally stores a channel mapping table, which is pre-configured during system design based on the actual hardware connection relationships. The channel mapping table clearly records the binding relationship between each reconstructed SGPIO bit stream signal and each cascade connector on the main backplane, and each cascade connector uniquely corresponds to a cascaded hard drive backplane via a physical cable. Therefore, the channel mapping table records the binding relationship between each reconstructed SGPIO bitstream signal and a specific cascading connector on the main backplane. In the hardware wiring, each cascading connector uniquely corresponds to a cascaded hard drive backplane via a physical cable. Once the CPLD determines which connector a particular reconstructed signal originates from, it naturally locks onto the cascading backplane to which that signal will ultimately be delivered. This pre-defined correspondence logic ensures that the signals received by each cascading backplane are clearly and unambiguously assigned to their respective drive bays, each independently carrying complete status information without crosstalk. This achieves precise and orderly signal distribution in large-scale cascading scenarios at the physical transmission level. When outputting signals, the CPLD selects each signal to the correct connector pin according to the mapping table, ensuring that the signal is accurately delivered to the target cascading backplane without channel misalignment.

[0050] Furthermore, within each reconstructed SGPIO bitstream signal, the j-th 3-bit group strictly corresponds to the j-th hard drive on the cascaded hard drive backplane connected to that channel. Each 3-bit group contains three bits, carrying three status information for the hard drive: activity indicator, position indicator, and error indicator. These three indicators are mapped one-to-one with a set of status lights on the hard drive: the activity indicator corresponds to the activity indicator, the position indicator to the position indicator, and the error indicator to the error indicator. This mapping relationship is completely consistent with the SFF-8489 standard definition, therefore the cascaded backplane can directly reuse its factory-installed standard parsing logic. After receiving the reconstructed SGPIO bitstream signal, the cascaded hard drive backplane's onboard control logic parses the signal bit by bit according to the standard SGPIO protocol. The parsing process is performed in 3-bit groups: for each 3-bit group, the level values ​​of three bits are read sequentially, and the corresponding indicator lights on the hard drive are driven accordingly.

[0051] Furthermore, when the activity indicator bit is high, the circuit outputs a drive signal to make the activity indicator light flash at a standard flashing frequency (e.g., 4Hz), indicating that the hard drive is performing read / write operations; when the bit is low, the drive signal is turned off, and the indicator light is off. When the positioning indicator bit is high, the positioning indicator light flashes at a frequency different from the activity light (e.g., 1Hz), making it easier for maintenance personnel to identify the physical location of the hard drive; it is off when the bit is low. When the error indicator bit is high, the error indicator light is constantly lit (usually red), indicating that the hard drive has failed and needs attention; it is off when the bit is low. The entire parsing and driving process is based entirely on the high / low level states of each indicator bit in the reconstructed signal. The level values ​​are retained exactly from the indicator bits of the corresponding disk slots in the SGPIO bit stream. Without knowing the existence of the front-end SAS expander, the cascaded backplane can achieve accurate visual feedback on the hard drive status solely based on its own fixed standard parsing logic, completely eliminating the need for firmware customization in cascaded scenarios.

[0052] Optionally, the CPLD is the only programmable logic device on the main hard disk backplane. The CPLD is used to parse the SGPIO bit stream signal to drive the local hard disk status lights on the main hard disk backplane. The CPLD is also used to reconstruct the SGPIO bit stream signal and forward it to the cascaded hard disk backplane to drive the hard disk status lights on the cascaded hard disk backplane.

[0053] Specifically, on the main hard drive backplane, the CPLD is the only device responsible for programmable logic control. No second CPLD, MCU, or other programmable logic chip is placed on the board to share signal processing tasks. This means that all SGPIO-related signal parsing, processing, and forwarding functions are centralized in this single CPLD. This simplifies the main backplane's component bill of materials and firmware management complexity, making the CPLD the core hub of the entire hard drive status light control system.

[0054] Furthermore, the first function of the CPLD is to serve the locally mounted hard drives on the main hard drive backplane. The SGPIO bit stream signal output by the SAS expander contains status information of both the local hard drives on the main backplane and the status information of the hard drives on each cascaded backplane. The status information is arranged continuously in a fixed order within the same bit stream frame. After receiving this bit stream, the CPLD extracts the 3-bit group data belonging to the local hard drives on the main backplane from the original bit stream according to the preset local disk position mapping relationship. For each 3-bit group corresponding to a local hard drive, the CPLD parses the activity indicator bit, positioning indicator bit, and error indicator bit bit bit by bit. Based on the high or low level of each indicator bit, it directly drives a set of status indicator lights on the corresponding hard drive on the main backplane. The activity indicator flashes or turns off at a specific frequency to indicate read / write status, the error indicator light stays on or turns off to indicate fault status, and the positioning indicator light flashes or turns off at another frequency to assist hard drive identification. This process is completely consistent with the lighting control logic when the backplane is directly connected to the HBA / RAID card in a conventional non-cascaded scenario.

[0055] Furthermore, while driving the local hard drive status lights, the CPLD performs a second function in parallel: reconstructing the SGPIO bit stream and forwarding it to each cascaded hard drive backplane. From the same original bit stream, the CPLD sequentially separates the 3-bit groups belonging to each cascaded backplane hard drive according to a preset disk location mapping table. For example, several 3-bit groups immediately following the local hard drive's 3-bit group in the original bit stream might belong to cascaded backplane A, and the rest to cascaded backplane B. The CPLD divides the data into 3-bit groups as the smallest unit, re-aggregating the bit segments belonging to the same cascaded backplane, and generating independent SClock and SLoad signals for each channel, performing timing alignment and signal shaping to form multiple independent standard SGPIO bit stream signals. These reconstructed signals are sent to each cascaded hard drive backplane through the corresponding cascade connectors, allowing them to be parsed according to standard firmware and drive the status lights of their respective hard drives.

[0056] The two functions of the CPLD are executed in parallel, rather than being processed serially in a time-division multiplexing manner. Internally, the CPLD instantiates both a local parsing logic module and a multi-channel SGPIO transmit controller module. They share the reception and sampling results of the raw SGPIO bit stream, but operate independently. The local parsing module focuses on extracting local disk slot data and driving local LED groups; each transmit controller focuses on independently outputting the bit segment data of the corresponding cascaded backplane according to standard SGPIO timing. Since the signal source for both functions is the same raw bit stream, the CPLD only needs to receive and sample once to serve both directions simultaneously, eliminating data conflicts or timing interference.

[0057] By integrating local lighting control and signal reconstruction forwarding into a single CPLD, the signal processing chain is fully centralized. The reconstructed signal received by the cascaded hard drive backplane is completely consistent with the standard SGPIO bit stream format when directly connected to an HBA / RAID card, allowing for plug-and-play functionality without any firmware customization. The status light control of the local hard drives on the main backplane is also identical to that in conventional non-cascaded scenarios, eliminating synchronization and compatibility issues caused by multi-device collaboration, reducing the number of devices and interconnection complexity on the backplane, and consolidating firmware maintenance work into a single version of a CPLD, significantly reducing the management costs of the entire R&D, production, and maintenance process.

[0058] The hard drive status light control system for the hard drive backplane provided in this embodiment uses a CPLD on the main hard drive backplane to split, reassemble, and time-shape the non-standard long bitstream SGPIO signals output by the SAS expander, converting them into multiple standard bitstream signals that are completely matched with the standard SGPIO parsing logic of each cascaded hard drive backplane. This allows the cascaded hard drive backplane to directly reuse the original standard parsing logic to drive the hard drive status lights without modifying the hardware and firmware. At the same time, the main backplane CPLD can simultaneously complete the local hard drive status light driving and cascade signal reconstruction and forwarding. Under the condition of a limited number of SGPIO interfaces of the SAS expander, it realizes the unified reuse of hard drive backplane hardware and firmware, effectively reduces the complexity and cost of firmware version maintenance, simplifies system hardware design, and improves compatibility, stability, and maintainability in large-scale hard drive cascade expansion scenarios.

[0059] Corresponding to the aforementioned embodiment of a hard disk status light control system for a hard disk backplane, this application also provides an embodiment of a hard disk status light control method for a hard disk backplane.

[0060] Figure 4 The flowchart illustrates a second embodiment of the hard drive status light control method for the hard drive backplane provided in this application. Please refer to... Figure 4 The method provided in this embodiment includes S401, CPLD receives the SGPIO bit stream signal output by the SAS extender, the SGPIO bit stream signal carrying the working status information of the hard disk drive managed by the SAS extender; S402, The CPLD reconstructs the SGPIO bitstream signal to generate a reconstructed SGPIO bitstream signal; S403. The CPLD sends the reconstructed SGPIO bit stream signal to the cascaded hard disk backplane through the cascade connector. The cascaded hard disk backplane parses the reconstructed SGPIO bit stream signal according to the fixed standard SGPIO parsing logic, and drives the status indicator lights corresponding to each hard disk on the cascaded hard disk backplane according to the parsing result.

[0061] The method in this embodiment can be used to execute Figure 1 The steps of the system embodiment shown are similar in principle and process, and will not be repeated here.

[0062] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A hard drive status light control system for a hard drive backplane, characterized in that, The system includes a main hard disk backplane and a cascaded hard disk backplane. The main hard disk backplane is equipped with a SAS expander, a CPLD, and a cascade connector. The cascaded hard disk backplane is connected to the main hard disk backplane through the cascade connector. The SGPIO of the SAS expander is connected to the input terminal of the CPLD. Multiple hard disks are mounted on the main hard disk backplane and the cascaded hard disk backplane, respectively. Each hard disk is equipped with a set of hard disk status lights. The number of hard disk status lights is the same as the total number of hard disks mounted on the main hard disk backplane and the cascaded hard disk backplane. The CPLD receives the SGPIO bit stream signal output by the SAS extender. The SGPIO bit stream signal carries the working status information of each hard disk drive bay. The number of bits in the SGPIO bit stream signal is three times that of the hard disk drive bay. The CPLD reconstructs the SGPIO bit stream signal and sends the reconstructed SGPIO bit stream signal to the cascaded hard disk backplane. The number of bits in the SGPIO bit stream signal is greater than the target bit stream of the cascaded hard disk backplane. The number of bits in the reconstructed SGPIO bit stream signal matches the target bit stream. The cascaded hard drive backplane parses the reconstructed SGPIO bit stream signal and drives the hard drive status light to indicate the hard drive status based on the parsed SGPIO bit stream signal.

2. The system according to claim 1, characterized in that, The SAS extender outputs the original SGPIO bitstream signal to the CPLD on the main hard drive backplane based on the hard drive bay status information output by the HBA or RAID card. The CPLD reconstructs the original SGPIO bitstream signal and sends the reconstructed SGPIO bitstream signal to the cascaded hard drive backplane through the cascade connector. The cascaded hard drive backplane is equipped with a second CPLD, which receives the reconstructed SGPIO bitstream signal and parses the reconstructed SGPIO bitstream signal according to the standard SGPIO parsing logic fixed on the cascaded hard drive backplane to drive the hard drive status lights.

3. The system according to claim 1, characterized in that, Multiple cascaded hard drive backplanes exist, and each hard drive mounted on the cascaded hard drive backplane has a corresponding set of hard drive status lights. Each set of hard drive status lights on the main hard drive backplane and each set of hard drive status lights on the cascaded hard drive backplanes includes at least an activity indicator, an error indicator, and a positioning indicator. The reconstructed SGPIO bit stream signal contains an activity indicator bit, an error indicator bit, and a positioning indicator bit corresponding to each hard drive on each cascaded hard drive backplane. The cascaded hard drive backplane is used to parse the reconstructed SGPIO bit stream signal, control the activity indicator of the corresponding hard drive to flash or turn off at a first frequency according to the high or low level of the activity indicator bit, control the error indicator of the corresponding hard drive to remain on or turn off according to the high or low level of the error indicator bit, and control the positioning indicator of the corresponding hard drive to flash or turn off at a second frequency according to the high or low level of the positioning indicator bit.

4. The system according to claim 1, characterized in that, The SAS extender outputs multiple sets of SGPIO bit stream signals. Each set of SGPIO bit stream signals corresponds to the management of a range of hard disk slots. The number of bits in each set of SGPIO bit stream signals is three times the number of hard disk slots in the range. The three bits corresponding to each hard disk slot are used as an activity indicator bit, a positioning indicator bit, and an error indicator bit, respectively. The CPLD reconstructs the SGPIO bit stream signal and outputs multiple reconstructed SGPIO bit stream signals. Each reconstructed SGPIO bit stream signal corresponds to one of the cascade connectors. The number of bits in each reconstructed SGPIO bit stream signal is three times the number of hard disks on the cascaded hard disk backplane. The three bits corresponding to each hard disk slot in each channel are used as an activity indicator bit, a positioning indicator bit, and an error indicator bit, respectively.

5. The system according to claim 1, characterized in that, The SGPIO bit stream signal is a serial data sequence containing the status information of all cascaded hard disks. The CPLD has a preset disk position mapping table, which records the correspondence between each bit segment in the SGPIO bit stream signal and each cascaded hard disk backplane and each hard disk position on it. When reconstructing the SGPIO bit stream signal, the CPLD splits the SGPIO bit stream signal according to the disk position mapping table by bit segment, identifies the cascaded hard disk backplane and corresponding hard disk position to which each bit segment belongs, and recombines the bit segments belonging to the same cascaded hard disk backplane into a reconstructed SGPIO bit stream signal, which is then sent to the cascaded hard disk backplane through the corresponding cascade connector.

6. The system according to claim 1, characterized in that, The reconstruction of the SGPIO bitstream signal includes: Obtain the total number of bits of the SGPIO bit stream signal output by the SAS extender, and the number of hard drives mounted on each cascaded hard drive backplane. The target number of bits for each reconstructed SGPIO bit stream signal is determined based on the number of hard drives in each cascaded hard drive backplane, and the number of split paths is determined based on the ratio of the total number of bits in the SGPIO bit stream signal to the target number of bits. Starting from the beginning bit of the SGPIO bit stream signal, the SGPIO bit stream signal is sequentially and continuously divided into M segments according to the target number of bits, with each segment corresponding to a reconstructed SGPIO bit stream signal. Each bit stream segment is time-aligned and shaped to form M independent standard SGPIO bit stream signals, which are then output to the corresponding cascaded hard disk backplane through the corresponding cascade connector.

7. The system according to claim 6, characterized in that, The SGPIO bitstream signal output by the SAS extender is a single frame of serial data sequence, consisting of N consecutively arranged 3-bit groups, where N is the total number of hard disk bays managed by the SAS extender through SGPIO. Each 3-bit group sequentially contains an activity indicator bit, a location indicator bit, and an error indicator bit, with the i-th 3-bit group corresponding to the i-th hard disk bay. The reconstruction of the SGPIO bitstream signal further includes: Using 3-bit groups as the smallest splitting unit, the N consecutive 3-bit groups in the SGPIO bit stream signal are divided into M bit segments according to the number of hard disks mounted on each cascaded hard disk backplane. Each bit segment contains K complete 3-bit groups, corresponding to K hard disks on a cascaded hard disk backplane. Each segment of K 3-bit groups is kept in its original relative order and time-aligned before being output as an independent reconstructed SGPIO bit stream signal. In each reconstructed SGPIO bit stream signal, the three indicator bits of each 3-bit group are consistent with the three indicator bits of the corresponding hard disk drive in the SGPIO bit stream signal.

8. The system according to claim 1, characterized in that, The CPLD splits and reconstructs the SGPIO bit stream signal, and outputs M independent reconstructed SGPIO bit stream signals. Each reconstructed SGPIO bit stream signal is a serial data sequence consisting of K consecutive 3-bit groups, where K is the number of hard drives mounted on the cascaded hard drive backplane to which the signal is sent. The CPLD has a preset channel mapping table, which records the correspondence between each reconstructed SGPIO bit stream signal and each cascade connector and cascaded hard disk backplane. The CPLD sends each reconstructed SGPIO bit stream signal to the corresponding cascaded hard disk backplane through the corresponding cascade connector according to the channel mapping table. The j-th 3-bit group in each reconstructed SGPIO bit stream signal corresponds to a set of hard disk status lights for the j-th hard disk on the cascaded hard disk backplane. The activity indicator bit, position indicator bit, and error indicator bit in the 3-bit group correspond to the activity indicator light, position indicator light, and error indicator light in the hard disk status lights, respectively. After receiving the reconstructed SGPIO bitstream signal, the cascaded hard disk backplane parses each 3-bit group bit by bit. When the activity indicator bit in the 3-bit group is high, the corresponding hard disk's activity indicator light is lit; when the activity indicator bit in the 3-bit group is low, the corresponding hard disk's activity indicator light is turned off. When the positioning indicator bit is high, the corresponding hard disk's positioning indicator light is lit; when the positioning indicator bit is low, the corresponding hard disk's positioning indicator light is turned off. When the error indicator bit is high, the corresponding hard disk's error indicator light is lit; when the error indicator bit is low, the corresponding hard disk's error indicator light is turned off.

9. The system according to claim 1, characterized in that, The CPLD is the only programmable logic device on the main hard disk backplane. The CPLD is used to parse the SGPIO bit stream signal to drive the local hard disk status lights on the main hard disk backplane. The CPLD is also used to reconstruct the SGPIO bit stream signal and forward it to the cascaded hard disk backplane to drive the hard disk status lights on the cascaded hard disk backplane.

10. A method for controlling the hard drive status lights on a hard drive backplane, characterized in that, The method includes: The CPLD receives the SGPIO bit stream signal output by the SAS extender, and the SGPIO bit stream signal carries the working status information of the hard disk drive managed by the SAS extender. The CPLD reconstructs the SGPIO bitstream signal to generate a reconstructed SGPIO bitstream signal. The CPLD sends the reconstructed SGPIO bitstream signal to the cascaded hard disk backplane through the cascade connector. The cascaded hard disk backplane parses the reconstructed SGPIO bitstream signal according to the fixed standard SGPIO parsing logic, and drives the status indicator lights corresponding to each hard disk on the cascaded hard disk backplane according to the parsing result.

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