Circuit layout signal trace pattern avoidance method, device, medium and equipment

Abstract

The application discloses a kind of circuit layout signal wiring's graphic avoidance method, device, medium and equipment.The method comprises: obtaining current signal wiring in circuit layout and its current graphic as obstacle through;According to the outer package graphic of preset rule construction surrounding current graphic, it is used as obstacle graphic;Obstacle graphic is detected whether with other graphics without being as obstacle intersects;When detecting intersecting graphic, it is used as obstacle, and outer package graphic is constructed according to preset rule and surrounds intersecting graphic;The part of obstacle graphic and other outer package graphics is not merged to replace obstacle graphic, and the step that whether the other graphics without being as obstacle intersects with the obstacle graphic is repeatedly detected, until there is no intersecting graphic is detected;Current signal wiring is adjusted based on obstacle graphic, to realize graphic avoidance.The application can realize that signal wiring avoids all possible graphics to become obstacle after adjustment, improves layout wiring efficiency.

Description

Technical Field

[0001] This invention relates to the field of circuit layout design, and in particular to a method, apparatus, medium, and device for graphically avoiding signal traces in circuit layout. Background Technology

[0002] In circuit layout design, after drawing the layout graphics of circuit entities such as components and pads, signal traces need to be arranged between the connection points of each layout graphic to represent the signal transmission path. Existing routing methods include manual routing and automatic routing. Manual routing is done by designers manually, while automatic routing is performed automatically by software according to pre-set routing rules.

[0003] However, regardless of the routing method used, the final signal traces may pass through one or more patterns, which is unacceptable because patterns are obstacles to signal traces. In this case, designers need to manually adjust the signal traces locally. However, due to the dense layout, after the signal traces are adjusted, they may pass through other patterns that were not previously passed through, causing designers to constantly adjust the signal traces, thus affecting the layout routing efficiency. Summary of the Invention

[0004] The purpose of this invention is to provide a method, apparatus, medium, and device for avoiding patterns in circuit layout signal traces, so as to solve the problem in the prior art that signal traces need to be manually adjusted to avoid different patterns. This invention enables signal traces to avoid all patterns that may become obstacles after a single adjustment, thereby improving layout routing efficiency.

[0005] To solve the above technical problems, the present invention provides a method for graphic avoidance of signal traces in circuit layout, comprising:

[0006] Get the current signal traces in the circuit layout and the current shapes that they pass through and act as obstacles;

[0007] Construct an outer shape that surrounds the current shape according to preset rules, and use the outer shape of the current shape as an obstacle shape;

[0008] Detect whether the obstacle pattern intersects with other patterns that do not act as obstacles;

[0009] When intersecting shapes are detected, an outer shape is constructed to enclose the intersecting shape according to the preset rules, and the intersecting shape is used as an obstacle;

[0010] The non-intersecting portions of the obstacle graphic and other enclosing graphics are merged to replace the obstacle graphic, and the step of detecting whether the obstacle graphic intersects with other graphics that are not obstacles is repeated until no intersecting graphics are detected.

[0011] The current signal routing is adjusted based on the obstacle pattern to achieve pattern avoidance.

[0012] Preferably, constructing the outer shape surrounding the current shape according to preset rules includes:

[0013] Detect whether the current graphic is a circle;

[0014] If the shape is circular, the current shape is enlarged at equal intervals to form concentric circles, and the first minimum bounding rectangle of the concentric circles is constructed as the outer rectangle; otherwise, the second minimum bounding rectangle of the current shape is constructed, and the second minimum bounding rectangle is enlarged at equal intervals to form the outer rectangle.

[0015] The four corners of the outer rectangle are chamfered to form the outer shape.

[0016] Preferably, the shape of the outer rectangle being cut off is an equilateral right triangle, and the obstacle shape is an octagon.

[0017] Preferably, constructing the outer shape surrounding the current shape according to preset rules includes:

[0018] Construct the minimum bounding convex polygon of the current shape;

[0019] Parallel lines are generated at equal distances from the outer side of each side of the minimum circumscribed convex polygon;

[0020] Obtain the intersection point of the parallel lines of every two adjacent sides of the minimum circumscribed convex polygon;

[0021] Connect the intersections of all parallel lines in sequence to form the outer shape.

[0022] Preferably, adjusting the current signal routing based on the obstacle pattern includes:

[0023] Obtain the two intersection points between the current signal trace and the obstacle pattern, and delete the portion of the current signal trace between the two intersection points;

[0024] Select one of the two contour lines on the obstacle pattern that are divided by two intersection points and connect it with the remaining part of the current signal trace to form a new signal trace.

[0025] Preferably, when the two contour lines have the same length, the selected contour line is a random segment of the two contour lines.

[0026] Preferably, when the two contour lines have different lengths, the selected contour line is the shorter of the two contour lines or the one with fewer inflection points.

[0027] To solve the above-mentioned technical problems, the present invention also provides a circuit layout signal trace pattern avoidance device, comprising:

[0028] The acquisition module is used to acquire the current signal traces in the circuit layout and the current graphics that they pass through and act as obstacles.

[0029] The first construction module is used to construct an outer shape that surrounds the current shape according to preset rules, and to use the outer shape of the current shape as an obstacle shape.

[0030] The detection module is used to detect whether the obstacle graphic intersects with other graphics that do not act as obstacles;

[0031] The second construction module is used to construct an outer shape that surrounds the intersecting shape according to the preset rules when intersecting shapes are detected, and to use the intersecting shape as an obstacle;

[0032] The merging module is used to merge the non-intersecting parts of the obstacle graphic and other outgoing graphics to replace the obstacle graphic, and return to the detection module to repeatedly detect whether the obstacle graphic intersects with other graphics that are not obstacles, until no intersecting graphics are detected.

[0033] The adjustment module is used to adjust the current signal routing based on the obstacle pattern in order to achieve pattern avoidance.

[0034] To address the aforementioned technical problems, the present invention also provides a storage medium storing a computer program configured to execute the graphical avoidance method for circuit layout signal traces described in any of the preceding claims when running.

[0035] To address the aforementioned technical problems, the present invention also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the graphical avoidance method for circuit layout signal traces described in any of the preceding claims.

[0036] Unlike existing technologies, the circuit layout signal trace pattern avoidance method provided by this invention first obtains the current pattern that the current signal trace passes through and acts as an obstacle. Then, it constructs an outer pattern surrounding the current pattern according to preset rules and uses it as an obstacle pattern to detect whether it intersects with other patterns that are not obstacles. If they intersect, it constructs an outer pattern surrounding the intersecting pattern according to preset rules, treats the intersecting pattern as an obstacle, and merges the non-intersecting parts of the obstacle pattern and other outer patterns to replace the obstacle pattern. The detection process is repeated until no intersecting patterns are detected. Finally, the current signal trace is adjusted based on the obstacle pattern to achieve pattern avoidance. Since all possible obstacle patterns have been detected before adjusting the signal trace, the signal trace only needs to be adjusted once to avoid these patterns. This allows the signal trace to avoid all possible obstacle patterns after a single adjustment, improving layout routing efficiency.

[0037] The circuit layout signal trace pattern avoidance device, storage medium and electronic device provided by the present invention belong to the same inventive concept as the circuit layout signal trace pattern avoidance method, and therefore have the same beneficial effects, which will not be repeated here. Attached Figure Description

[0038] Figure 1 A schematic flowchart illustrating the circuit layout signal routing graphic avoidance method provided in an embodiment of the present invention.

[0039] Figure 2 This is a diagram showing the obstacle graphic and the current graphic.

[0040] Figure 3 This is a schematic diagram of the outer shape of the obstacle shape and the intersecting shape.

[0041] Figure 4 This is a schematic diagram of the merged obstacle graphic and other graphics.

[0042] Figure 5 This is a schematic diagram showing the current signal routing after adjustments.

[0043] Figure 6 This is a diagram showing the outer rectangle when the current graphic is a circle.

[0044] Figure 7 This is a diagram showing the outer rectangle when the current shape is not a circle.

[0045] Figure 8 This is a schematic diagram of the outer rectangle and the outer graphic.

[0046] Figure 9 This is a schematic diagram of the current shape and the smallest circumscribed convex polygon.

[0047] Figure 10A schematic diagram of parallel lines generated on the outer side of the smallest circumscribed convex polygon.

[0048] Figure 11 This is a schematic diagram of the current signal routing and obstacle patterns.

[0049] Figure 12 This is a schematic diagram of the two outlines and the remaining part of the current signal trace.

[0050] Figure 13 This is a schematic diagram of the current signal routing and the new signal routing.

[0051] Figure 14 A schematic block diagram of a circuit layout signal trace avoidance device provided in an embodiment of the present invention. Detailed Implementation

[0052] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0053] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0054] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0055] Please refer to Figure 1 This invention provides a method for graphically avoiding signal traces in a circuit layout, the method comprising the following steps:

[0056] S1: Get the current signal trace in the circuit layout and the current pattern that it passes through and acts as an obstacle.

[0057] In circuit routing design, signal traces are used to connect different patterns. Some of these patterns represent circuit components, some represent pads, and some represent vias, etc. Therefore, these patterns are obstacles for signal traces, and in principle, signal traces should not pass through the areas covered by these patterns. However, due to the limitations of manual or automatic routing, situations may occur where signal traces pass through patterns.

[0058] The current pattern can be a specific one among multiple patterns that the current signal trace passes through, or the first one it passes through.

[0059] For a computer, the current signal trace and the current graphic are represented as a series of data, including the coordinates of points (start point, end point, inflection point, vertex, etc.) and the order of the points. Reading this data allows you to obtain the current signal trace and the current graphic.

[0060] S2: Construct an outer shape that surrounds the current shape according to preset rules, and use the outer shape of the current shape as an obstacle shape.

[0061] The outer shape completely encompasses the current shape; that is, the size of the outer shape is at least the size of the current shape. The shape of the outer shape is determined by preset rules.

[0062] Please refer to Figure 2 This is a schematic diagram of the obstacle pattern and the current pattern. The current pattern tar is traversed by the current signal trace lay, and the obstacle pattern obs is the outer shape of the current pattern tar, box. The obstacle pattern obs surrounds the current pattern tar.

[0063] S3: Detect whether the obstacle graphic intersects with other graphics that are not obstacles.

[0064] Among them, the obstacle graphic is the outer graphic, and the outer graphic surrounds the current graphic. Then the outer graphic may intersect with other graphics near the current graphic that are not obstacles. If the signal routing is adjusted at this time, it is necessary to continue to bypass the intersecting graphic. Otherwise, the signal routing may pass through the intersecting graphic again after the signal routing is adjusted.

[0065] S4: When intersecting graphics are detected, construct an outer shape that surrounds the intersecting graphics according to preset rules, and treat the intersecting graphics as obstacles.

[0066] In this context, the outer shape of the intersecting shape is generated using the same preset rules as the outer shape of the current shape. If the obstacle shape intersects with the intersecting shape, then the outer shape of the intersecting shape must intersect with the obstacle shape.

[0067] Please refer to Figure 3This is a schematic diagram of the outer shape of the obstacle shape and the intersecting shape. The intersecting shape `int` is partially within the coverage area of ​​the obstacle shape `obs`, and the outer shape `box` of the intersecting shape `int` is also partially within the coverage area of ​​the obstacle shape `obs`.

[0068] S5: Merge the non-intersecting parts of the obstacle graphic and other enclosing graphics to replace the obstacle graphic, and repeat the step of detecting whether the obstacle graphic intersects with other graphics that are not obstacles until no intersecting graphics are detected.

[0069] When the non-intersecting parts of the obstacle graphic and other outgoing graphics are merged, a larger graphic is obtained, which replaces the obstacle graphic. In other words, the obstacle graphic becomes larger after merging.

[0070] At this point, step S3 is repeated to check whether the new obstacle graphic intersects with other graphics that are not obstacles. If intersecting graphics are detected, steps S3-S5 are repeated. If no intersecting graphics are detected, step S6 is performed.

[0071] Please refer to the reference. Figure 3 and Figure 4 , Figure 4 This is a schematic diagram of the merged obstacle graphic and other graphics. The merged obstacle graphic obs surrounds the current graphic tar and the intersecting graphic int, but the obstacle graphic obs intersects with the graphic gra1. At this time, steps S3-S5 need to be repeated. The graphic gra1 becomes a new intersecting graphic, which will result in a larger obstacle graphic. The larger obstacle graphic does not intersect with the nearest graphic gra2. At this time, the obstacle graphic no longer changes.

[0072] S6: Adjust the current signal routing based on the obstacle pattern to achieve pattern avoidance.

[0073] The obstacle pattern has a definite shape. By simply adjusting a local part of the current signal trace, the obstacle can be avoided and no longer pass through any pattern.

[0074] Please refer to the reference. Figure 4 and Figure 5 , Figure 5 This is a schematic diagram of the current signal routing after adjustment. Before the adjustment, the current signal routing lay passed through the current graphic tar. After the adjustment, the current signal routing lay avoids the current graphic tar, the intersecting graphic int, and graphic gra1, which are obstacles, and will not pass through graphic gra2.

[0075] In the above manner, the circuit layout signal trace graphic avoidance method provided by the present invention first detects the graphics that the current signal trace may pass through before and after adjustment, uses these graphics as obstacles, and then adjusts the current signal trace to avoid these graphics that serve as obstacles. In this way, the signal trace can avoid all graphics that may become obstacles after one adjustment, which can improve the layout routing efficiency.

[0076] In this embodiment, the step of constructing an outer shape that surrounds the current shape according to preset rules includes:

[0077] S21A: Detect whether the current graphic is a circle.

[0078] S22A: If it is a circle, enlarge the current shape at equal intervals to form concentric circles, and construct the first minimum bounding rectangle of the concentric circles as the outer rectangle; otherwise, construct the second minimum bounding rectangle of the current shape, and enlarge the second minimum bounding rectangle at equal intervals to form the outer rectangle.

[0079] When the current graphic is circular, it is enlarged at equal intervals to form concentric circles. These concentric circles share the same center as the current graphic and have a radius greater than the current graphic's radius. Each side of the first minimum bounding rectangle is tangent to the concentric circles. Since circuit layouts are typically drawn based on a reference coordinate system, the first minimum bounding rectangle is usually generated along a fixed direction; that is, its axis runs along a fixed direction, such as the X-axis of the reference coordinate system.

[0080] Please refer to Figure 6 This is a schematic diagram of the outer rectangle when the current graphic is a circle. The left side of the diagram is a schematic diagram of concentric circles, and the right side is a schematic diagram of the outer rectangle. After the current graphic tar is enlarged at equal intervals, it forms a concentric circle sur. The first minimum outer rectangle squ1 surrounds the concentric circle sur and is tangent to the concentric circle sur. At this time, the first minimum outer rectangle squ1 serves as the outer rectangle squ0.

[0081] If the current shape is not a circle, then directly construct the second minimum bounding rectangle of the current shape. The second minimum bounding rectangle is also constructed along a fixed direction. After enlarging the second minimum bounding rectangle at equal intervals, we obtain the outer rectangle. The four sides of the outer rectangle are parallel to the four sides of the second minimum bounding rectangle, and the spacing between them is equal.

[0082] Please refer to Figure 7This is a schematic diagram of the outer rectangle when the current shape is not circular. The left side of the diagram shows the second smallest bounding rectangle, and the right side shows the outer rectangle. The second smallest bounding rectangle squ2 encloses the current shape tar and is tangent to it. The second smallest bounding rectangle squ2 is enlarged at equal intervals to form the outer rectangle squ0. The outer rectangle squ0 and the second smallest bounding rectangle squ2 have the same center.

[0083] S23A: Cut the corners of the outer rectangle to form an outer shape. The shortest distance from any point on the outer shape to the current shape is not less than a preset distance.

[0084] In this embodiment, the shape of the outer rectangle that is cut off is an equilateral right triangle, and the outer shape is an octagon. Furthermore, the four cut-off equilateral right triangles are of equal size, thus making the outer shape a symmetrical octagon.

[0085] Please refer to Figure 8 This is a schematic diagram of the outer rectangle and the outer graphic. The left side of the diagram is the outer rectangle, and the right side is the outer graphic. The outer graphic (box) is formed by cutting off the four corners of the outer rectangle (squ0), and it is a regular octagon. The shortest distance from any point on the outer graphic (box) to the current graphic (tar) is not less than a preset distance.

[0086] In other embodiments of this application, the step of constructing an outer graph surrounding the current graph according to preset rules includes:

[0087] S21B: Construct the smallest circumscribed convex polygon of the current figure.

[0088] In geometry, the smallest bounding convex polygon is a convex polygon that contains the original shape, formed by connecting all the convex points of the original shape. In other words, if the target shape is a convex polygon, then the smallest bounding convex polygon has the same shape as the target shape; if the target shape is a concave polygon, then the smallest bounding convex polygon has a different shape than the target shape, but it contains the target shape.

[0089] Please refer to Figure 9 This diagram illustrates the current shape and its minimum bounding convex polygon. The left side of the diagram represents the current shape, and the right side represents the minimum bounding convex polygon. The minimum bounding convex polygon squ3 encloses the current shape tar, which is a concave polygon. The vertices of the current shape tar are A, B, C, D, E, F, and G. Except for vertex D, which is concave, all other vertices are convex. The minimum bounding convex polygon squ3 is formed by connecting the convex vertices A, B, E, F, and G.

[0090] S22B: Generate parallel lines at a preset distance outside each side of the smallest circumscribed convex polygon.

[0091] Please refer to the following: Figure 10 This is a schematic diagram of the parallel lines generated on the outer side of the smallest circumscribed convex polygon. The distance between each parallel line (shown as a dashed line in the diagram) and the edge of the corresponding smallest circumscribed convex polygon squ3 is a preset distance d.

[0092] S23B: Obtain the intersection of the parallel lines of every two adjacent sides of the smallest circumscribed convex polygon.

[0093] Since the two adjacent sides of the smallest circumscribed convex polygon intersect, the parallel lines of the two adjacent sides must also intersect.

[0094] Please continue to refer to this. Figure 10 The intersection points of the parallel lines of each pair of adjacent sides of the smallest circumscribed convex polygon squ3 are A', B', E', F', and G', which correspond to the vertices A, B, E, F, and G of the current graph tar.

[0095] S24B: Connect the intersections of all parallel lines in sequence to form an outer shape.

[0096] Please refer to the following: Figure 9 and Figure 10 The intersection points A', B', E', F', and G' of the parallel lines are connected in pairs in sequence to form a closed outer shape, box.

[0097] When adjusting signal traces, the outline of the obstacle pattern can be used. Specifically, in this embodiment, the step of adjusting the current signal trace based on the obstacle pattern, i.e., step S6, includes:

[0098] S61: Obtain the two intersection points of the current signal trace and the obstacle pattern, and delete the portion of the current signal trace between the two intersection points.

[0099] Since the current signal trace passes through the obstacle pattern, it must have two intersection points with the outline of the obstacle pattern. In other words, a part of the current signal trace is within the coverage area of ​​the obstacle pattern. This part is the portion of the current signal trace between the two intersection points, and this part needs to be deleted in this step.

[0100] Please refer to Figure 11 , Figure 11 This is a schematic diagram of the current signal trace and the obstacle pattern. Assume the outline of the obstacle pattern obs has eight vertices: A, B, C, D, E, F, G, and H. The two intersection points of the current signal trace lay with the outline of the obstacle pattern obs are points M and N. The portion of the current signal trace lay between these two intersection points M and N, i.e., line segment MN, needs to be deleted.

[0101] S62: One of the two contour lines on the selection barrier pattern, which are divided by two intersection points, is connected to the remaining part of the current signal trace to form a new signal trace.

[0102] In this process, after a portion of the current signal trace is deleted, the remaining part is divided into two traces. These two traces still intersect the outline of the obstacle pattern. Since the obstacle pattern's outline is a closed shape, the two intersection points divide the outline into two segments: one segment running clockwise from the first intersection point to the second, and another segment running counter-clockwise from the first intersection point to the second. Both segments can connect to the remaining two segments of the current signal trace. Therefore, when one of these two segments connects to the remaining portion of the current signal trace, a new signal trace is formed.

[0103] The new signal traces are only partially changed compared to the current signal traces. In other words, the current signal traces are not completely changed. Compared to rewiring, the overall trace layout of the circuit diagram is maintained to a certain extent.

[0104] One of the two contour lines can be selected based on actual needs. However, in some applications, to reduce the length of the signal trace or the number of bends, when the two contour lines are of the same length, the selected contour line is a random segment of the two contour lines. Alternatively, when the two contour lines are of different lengths, the selected contour line is the shorter segment or the segment with fewer inflection points.

[0105] Please refer to the reference. Figure 11 and Figure 12 , Figure 12 This is a schematic diagram of the two outlines and the remaining portion of the current signal trace. The remaining portion of the current signal trace (lay) consists of two traces, JM and NK. The intersection point M of JM and the obstacle pattern (obs) lies on line segment BC, and the intersection point N of NK and the obstacle pattern (obs) lies on line segment DE. These two intersection points M and N divide the obstacle pattern (obs) into two outlines: outline MCDN and outline MBAHGFEN. Since the length of outline MCDN is shorter than that of outline MBAHGFEN, outline MCDN is connected to the remaining portion of the current signal trace (lay), i.e., line segments JM and NK, to form the obstacle trace JMCDNK.

[0106] Please refer to Figure 13This is a schematic diagram of the current signal trace and the new signal trace. The left side of the diagram represents the current signal trace, and the right side represents the new signal trace. Assuming that after steps S3-S5 of the pattern avoidance method of this application, only the current pattern acts as an obstacle, and the current signal trace 'lay' crosses the current pattern 'tar', after step S6, compared to the current signal trace 'lay', the new signal trace 'lay' only differs from the current signal trace 'lay' near the current pattern 'tar', while the rest remains unchanged, thus maintaining the overall trace layout of the circuit layout.

[0107] Please refer to Figure 14 This invention also provides a graphic avoidance device for circuit layout signal traces, the graphic avoidance device comprising:

[0108] The acquisition module 11 is used to acquire the current signal traces in the circuit layout and the current patterns they pass through that act as obstacles. In circuit routing design, signal traces are used to connect different patterns, some representing circuit devices, others pads, and still others vias. Therefore, these patterns are obstacles for signal traces, and in principle, signal traces should not pass through areas covered by these patterns. However, due to limitations of manual or automatic routing, situations may occur where signal traces pass through patterns.

[0109] The current pattern can be a specific one among multiple patterns that the current signal trace passes through, or the first one it passes through.

[0110] For a computer, the current signal trace and the current graphic are represented as a series of data, including the coordinates of points (start point, end point, inflection point, vertex, etc.) and the order of the points. Reading this data allows you to obtain the current signal trace and the current graphic.

[0111] The first construction module 12 is used to construct an outer shape that surrounds the current shape according to preset rules, using the outer shape as an obstacle shape. The outer shape completely contains the current shape; that is, the size of the outer shape is at least the size of the current shape. The shape of the outer shape is determined by preset rules.

[0112] The detection module 13 is used to detect whether the obstacle graphic intersects with other graphics that do not act as obstacles. Here, the obstacle graphic is an enclosing graphic, and since the enclosing graphic surrounds the current graphic, the enclosing graphic may intersect with other graphics that do not act as obstacles near the current graphic. If the signal routing is adjusted in this case, it is necessary to continue to bypass the intersecting graphic; otherwise, the signal routing may pass through the intersecting graphic again after the signal routing is adjusted.

[0113] The second construction module 14 is used to construct an outer shape that surrounds the intersecting shape according to a preset rule when an intersecting shape is detected, and to treat the intersecting shape as an obstacle. Specifically, the outer shape of the intersecting shape is generated using the same preset rule as the outer shape of the current shape, and since the obstacle shape intersects with the intersecting shape, the outer shape of the intersecting shape must also intersect with the obstacle shape.

[0114] The merging module 15 is used to merge the non-intersecting parts of the obstacle graphic and other outlying graphics to replace the obstacle graphic, and then return to the detection module 13 to repeatedly detect whether the obstacle graphic intersects with other graphics that are not obstacles, until no intersecting graphics are detected. After merging the non-intersecting parts of the obstacle graphic and other outlying graphics, a larger graphic is obtained, which replaces the obstacle graphic; that is, after merging, the obstacle graphic becomes larger.

[0115] At this point, the detection module 13 is repeatedly returned to check whether the new obstacle graphic intersects with other graphics that are not obstacles. If intersecting graphics are detected again, the detection module 13 is returned to again. If no intersecting graphics are detected, the adjustment module 16 is run.

[0116] The adjustment module 16 is used to adjust the current signal routing based on the obstacle pattern to achieve pattern avoidance. The obstacle pattern has a definite shape; by adjusting only a portion of the current signal routing, pattern avoidance can be achieved, preventing the signal from passing through any obstacle.

[0117] The circuit layout signal trace graphic avoidance device of this embodiment may also include other technical features of the circuit layout signal trace graphic avoidance method of the foregoing embodiment, implement all the steps of the circuit layout signal trace graphic avoidance method of the foregoing embodiment, and have the same technical effect as the graphic avoidance method of the foregoing embodiment, which will not be repeated here.

[0118] The present invention also provides a storage medium storing a computer program, which is configured to execute the graphical avoidance method for circuit layout signal traces of the foregoing embodiments when running.

[0119] Specifically, in this embodiment, the storage medium may include, but is not limited to, USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks, and other media capable of storing computer programs.

[0120] The present invention also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to execute the graphical avoidance method for circuit layout signal traces of the foregoing embodiments.

[0121] Specifically, the memory and processor can be connected via a data bus. Furthermore, the aforementioned electronic device may also include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0122] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0123] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A method for graphically avoiding signal traces in a circuit layout, characterized in that, include: Get the current signal traces in the circuit layout and the current shapes that they pass through and act as obstacles; Construct an outer shape that surrounds the current shape according to preset rules, and use the outer shape of the current shape as an obstacle shape; Detect whether the obstacle pattern intersects with other patterns that do not act as obstacles; When intersecting shapes are detected, an outer shape is constructed to enclose the intersecting shape according to the preset rules, and the intersecting shape is used as an obstacle; The non-intersecting portions of the obstacle graphic and other enclosing graphics are merged to replace the obstacle graphic, and the step of detecting whether the obstacle graphic intersects with other graphics that are not obstacles is repeated until no intersecting graphics are detected. The current signal routing is adjusted based on the obstacle pattern to achieve pattern avoidance.

2. The graphic avoidance method according to claim 1, characterized in that, The step of constructing an outer shape that surrounds the current shape according to preset rules includes: Detect whether the current graphic is a circle; If the shape is circular, the current shape is enlarged at equal intervals to form concentric circles, and the first minimum bounding rectangle of the concentric circles is constructed as the outer rectangle; otherwise, the second minimum bounding rectangle of the current shape is constructed, and the second minimum bounding rectangle is enlarged at equal intervals to form the outer rectangle. The four corners of the outer rectangle are chamfered to form an outer shape, and the shortest distance from any point on the outer shape to the current shape is not less than a preset distance.

3. The graphic avoidance method according to claim 2, characterized in that, The outer rectangle is cut off into an equilateral right triangle, and the outer shape is an octagon.

4. The graphic avoidance method according to claim 1, characterized in that, The step of constructing an outer shape that surrounds the current shape according to preset rules includes: Construct the minimum bounding convex polygon of the current shape; A parallel line is generated at a predetermined distance outside each side of the minimum circumscribed convex polygon. Obtain the intersection point of the parallel lines of every two adjacent sides of the minimum circumscribed convex polygon; Connect the intersections of all parallel lines in sequence to form the outer shape.

5. The graphic avoidance method according to any one of claims 1 to 4, characterized in that, The adjustment of the current signal routing based on the obstacle pattern includes: Obtain the two intersection points between the current signal trace and the obstacle pattern, and delete the portion of the current signal trace between the two intersection points; Select one of the two contour lines on the obstacle pattern that are divided by two intersection points and connect it with the remaining part of the current signal trace to form a new signal trace.

6. The graphic avoidance method according to claim 5, characterized in that, When the two contour lines are of the same length, the selected contour line is a random segment of the two contour lines.

7. The graphic avoidance method according to claim 5, characterized in that, When the two contour lines have different lengths, the selected contour line is the shorter of the two contour lines or the one with fewer inflection points.

8. A circuit layout signal trace pattern avoidance device, characterized in that, include: The acquisition module is used to acquire the current signal traces in the circuit layout and the current graphics that they pass through and act as obstacles. The first construction module is used to construct an outer shape that surrounds the current shape according to preset rules, and to use the outer shape of the current shape as an obstacle shape. The detection module is used to detect whether the obstacle graphic intersects with other graphics that do not act as obstacles; The second construction module is used to construct an outer shape that surrounds the intersecting shape according to the preset rules when intersecting shapes are detected, and to use the intersecting shape as an obstacle; The merging module is used to merge the non-intersecting parts of the obstacle graphic and other outgoing graphics to replace the obstacle graphic, and return to the detection module to repeatedly detect whether the obstacle graphic intersects with other graphics that are not obstacles, until no intersecting graphics are detected. The adjustment module is used to adjust the current signal routing based on the obstacle pattern in order to achieve pattern avoidance.

9. A storage medium, characterized in that, The storage medium stores a computer program, which is configured to execute the graphical avoidance method for circuit layout signal traces as described in any one of claims 1 to 7 when it is run.

10. An electronic device, characterized in that, The device includes a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the graphical avoidance method for circuit layout signal traces as described in any one of claims 1 to 7.

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