Switching power supply conversion control method based on feedback gain segment mapping

Abstract

The application relates to the technical field of switching power supply conversion control, and discloses a switching power supply conversion control method based on feedback gain segmented mapping, which comprises the following steps: obtaining a feedback voltage representing the output voltage fluctuation amount, and comparing the feedback voltage with a preset intermittent hysteresis voltage threshold; when the feedback voltage is lower than the threshold, the system is switched to an intermittent mode and the original side peak current is clamped, the power consumption optimization is taken as the first target, real-time closed-loop regulation is not performed on the ripple, the standby power consumption is reduced to the limit; when the feedback voltage is not lower than the threshold, the system is switched to a linear regulation mode and the current clamping is released, the proportional mapping of the feedback voltage, the original side peak current and the switching frequency is established, the high-precision ripple suppression is taken as the first target, the power consumption constraint is relaxed, and the voltage ripple is ensured to be stabilized within 0.001, the application utilizes the segmented loop gain mechanism to realize the strategy connection of target control in different power intervals, and breaks the all-time consideration conflict between the power consumption and the ripple.

Description

Technical Field

[0001] This invention relates to a switching power supply conversion control method based on feedback gain segmented mapping, belonging to the field of switching power supply conversion control technology. Background Technology

[0002] Currently, switching power supplies widely adopt intermittent mode to reduce conversion losses under light load conditions. Power switching transistors reduce switching losses generated by power devices by performing periodic turn-off, enabling the system to meet energy efficiency standby standards. This energy pulse-based control method has been established in basic applications in smart meter power supply systems. However, with the increasing demands for power output quality from smart meters, especially under specific load conditions such as carrier communication interface testing, the above control method reveals limitations due to mutually exclusive physical characteristics. To reduce standby losses, it is usually necessary to extend the turn-off sleep period of the power switching transistors. Since the output filter capacitor continuously discharges charge to the load circuit during the turn-off sleep period, the output voltage experiences a potential drop. This physical charge discharge process directly leads to an increase in the output ripple voltage, interfering with the transmission accuracy of the carrier signal.

[0003] To address the balance between loss suppression and ripple control, existing technologies typically employ methods such as increasing the output filter capacitor capacity or adding multi-stage secondary filter networks. This approach increases the power supply system size and incurs additional material costs, while also introducing feedback loop pole shift, leading to system stability degradation over a wide load range. Furthermore, conventional control chips use a fixed proportional loop gain to adjust the relationship between the feedback voltage and the primary-side peak current. This linear adjustment mechanism masks a physical mismatch: in extremely light load ranges, there is a physical mismatch between the magnetic field energy transmitted by the transformer in a single cycle and the discharge time constant of the output-side filter capacitor. Specifically, existing technologies suffer from the following shortcomings: 1. Existing feedback loops use a single proportional gain, which, when extending the sleep cycle to reduce power consumption, cannot suppress the deep voltage drop caused by the discharge of the output filter capacitor; 2. Existing solutions suppress ripple by adding external hardware filters, resulting in hardware redundancy, increased size, and decreased dynamic response characteristics in the power supply system. The aforementioned control mechanism suffers from a conflict between balancing losses and ripple throughout the entire operation, neglecting the asymmetric performance requirements of specific application scenarios such as smart meters. During most of its operation, the system is in a light-load standby state, where the carrier communication interface is inactive. The secondary circuit does not impose high-precision constraints on the output voltage ripple, making reducing standby static power consumption the sole core indicator. Only during extremely short carrier communication transients does the system have strict tolerance requirements for voltage regulation accuracy, i.e., within one-thousandth. In the light-load range, traditional solutions, in order to maintain ripple performance throughout the entire operation, are forced to frequently trigger switching transistors to inject energy, preventing the power transistors from achieving deep, long-cycle sleep and limiting further power consumption reduction. If the sleep time is blindly extended, the traditional fixed-gain loop cannot meet the transient response during load step changes, leading to excessive ripple during communication. This inherent conflict makes it difficult for the power supply system to simultaneously meet ultra-low standby power consumption and carrier interface voltage regulation accuracy without increasing hardware costs.

[0004] Therefore, the technical problem to be solved by this invention is how to use the segmented adjustment mechanism of feedback gain to decouple the strategies of power consumption-dominated control and high-precision ripple-dominated control under different power ranges and specific operating conditions without adding external filtering hardware, and to solve the physical constraints between loss suppression and ripple smoothing of switching power supplies under light load conditions. Summary of the Invention

[0005] To address the problems mentioned in the background section, the technical solution of this invention is as follows:

[0006] A switching power supply conversion control method based on feedback gain piecewise mapping, the method includes the following steps: Step 101: Obtain the feedback voltage that characterizes the voltage fluctuation at the output terminal; Step 102: Compare the feedback voltage with a preset intermittent hysteresis voltage threshold, wherein the intermittent hysteresis voltage threshold is set based on the discharge cutoff voltage of the filter capacitor at the output end under a preset test load condition, so as to anchor the intermittent hysteresis voltage threshold to the physical discharge boundary of the filter capacitor. Step 103: Based on the comparison results, switch the control logic between intermittent mode and linear regulation mode. If the feedback voltage is lower than the intermittent hysteresis voltage threshold, the system enters intermittent mode. The control logic cuts off the real-time regulation of the primary peak current of the transformer by the feedback voltage and clamps the primary peak current to a preset current peak limit to maximize the energy storage of the switching transistor in a single cycle. In this mode, the system prioritizes power consumption optimization and does not perform real-time closed-loop smoothing regulation of the output voltage ripple. It allows the output filter capacitor to perform deep charge discharge during the extended sleep cycle until it approaches the physical discharge boundary, thereby maximizing the reduction of the switching frequency of the switching transistor and putting the entire system into standby mode. When power consumption is suppressed to the limit, if the feedback voltage is not lower than the intermittent hysteresis voltage threshold, the system switches to linear regulation mode. The control logic releases the clamping of the primary side peak current and establishes a proportional mapping relationship between the feedback voltage, the primary side peak current, and the switching frequency in real time. Based on the proportional mapping relationship, a control pulse is output to drive the switching transistor. In this mode, the system switches to high-precision voltage regulation and ripple suppression as the primary control objectives, temporarily relaxing the constraints on power consumption indicators during this period. By increasing the loop gain of the control loop and dynamically adjusting the current amplitude, continuous stepless energy injection into the secondary side is achieved, ensuring that the output voltage ripple remains stable within one-thousandth of the rated output voltage under transient load steps.

[0007] Preferably, after releasing the clamp on the primary side peak current in step 103, the control logic performs loop gain segmented control to switch the controller gain of the switching power converter, wherein the loop gain coefficient in the linear adjustment mode is greater than the equivalent gain in the intermittent mode, and the primary side peak current increases with the increase of the feedback voltage.

[0008] Preferably, obtaining the feedback voltage in step 101 includes: receiving the sampled voltage signal output from the output terminal via the optically isolated feedback circuit through the error amplifier, and performing gain mapping by the subsequent circuit of the error amplifier to generate an internal control signal for adjusting the primary side peak current and the switching frequency.

[0009] Preferably, step 102, anchoring the intermittent hysteresis voltage threshold to the physical discharge boundary of the filter capacitor, includes: obtaining the 12mV ripple tolerance of the output terminal under carrier interface test conditions, and determining the upper boundary value of the intermittent hysteresis voltage threshold based on the 12mV ripple tolerance and the capacitance value of the filter capacitor.

[0010] Preferably, step 103, clamping the primary-side peak current to a preset peak current limit, includes: in intermittent mode, maintaining the primary-side peak current at a constant amplitude, and responding to changes in output load power by adjusting the sleep cycle length of the switching transistor.

[0011] Preferably, in step 103, the primary peak current and switching frequency in the linear regulation mode are synchronously controlled by the feedback voltage, and the adjustment step size of the primary peak current is based on the difference between the real-time sampled value of the feedback voltage and the intermittent hysteresis voltage threshold to respond to the step current of the 1.5W carrier test load.

[0012] Preferably, the method further includes the following steps: Step 104, real-time monitoring of the slope of the feedback voltage change; Step 105, if the slope of the feedback voltage change exceeds a preset rate of change threshold, the control logic is forced to exit the intermittent mode, and the switching transistor is controlled to execute the full power output logic until the feedback voltage recovers to the adjustment range of the linear adjustment mode.

[0013] Preferably, setting the discharge cutoff voltage of the output filter capacitor under preset test load conditions in step 102 includes: determining the voltage deviation component corresponding to the intermittent hysteresis voltage threshold based on the rated output voltage and the 12mV ripple tolerance at the output terminal. Voltage deviation component The following quantitative relationship must be satisfied: ,in, The load current is the preset test load condition, C is the capacitance value of the filter capacitor, and Δt is the sleep cycle length in intermittent mode.

[0014] Preferably, the control logic switching in step 103 is achieved through a hysteresis comparator integrated inside the controller. The positive input of the hysteresis comparator is connected to the feedback voltage, and the flip point of the hysteresis comparator corresponds to the intermittent hysteresis voltage threshold, so as to suppress control oscillations at the mode switching boundary.

[0015] Preferably, the control logic sets the transconductance parameter of the error amplifier inside the control chip to enable the switching power converter to generate a voltage ripple of less than 12mV at a 12V output voltage, and maintains the standby power consumption of the whole machine below 0.4W.

[0016] Compared with the prior art, the beneficial effects of the present invention are: 1. In the switching power supply conversion control, by configuring gain segmentation mapping logic in the feedback loop, the proportional adjustment link between the feedback voltage and the primary side peak current is cut off in the intermittent mode, and the primary side peak current command value is forced to clamp to the maximum saturation threshold allowed by the system. This maximizes the energy packet transmitted by the magnetic component in a single switching action, increases the proportion of intermittent stop time of the system under extremely light load conditions, and reduces the dynamic loss generated by the switching action of the power transistor from a physical perspective, effectively reducing the standby power consumption of the whole machine. Under this long-term extremely light load standby state, the control logic actively releases the closed-loop high-frequency excitation constraint required to maintain low ripple, allowing the filter capacitor to perform natural discharge with a large time constant, thereby reducing the static power consumption to the physical limit.

[0017] 2. This invention anchors the intermittent hysteresis voltage threshold point to the physical discharge boundary of the output filter capacitor under preset load conditions. When the load current increases, causing the output voltage to drop and the feedback voltage level to rise, the control logic is triggered to jump from the saturation clamping state to the linear mapping state. After entering the linear mapping state, the control logic releases the current clamp and establishes a real-time proportional relationship between the feedback voltage, the primary current, and the switching frequency. By continuously injecting energy, the deep drop of the capacitor voltage under long-period sleep is suppressed. In the short-term high-load range triggered by specific test conditions such as carrier communication, the system prioritizes meeting the ripple smoothing requirements of the one-thousandth accuracy level by increasing the loop gain of the controller and continuously injecting energy, ensuring that the output ripple meets the technical specifications under specific test conditions such as carrier communication.

[0018] 3. By utilizing the piecewise nonlinear decoupling mechanism of feedback gain, this approach overcomes the design flaw of traditional control strategies that blindly consider both performance indicators across the entire power range. The system exhibits loss suppression characteristics in extremely light load ranges and transforms into ripple smoothing characteristics in load boundary ranges. This resolves the physical mutual exclusion between power consumption optimization and ripple suppression in power conversion control. This solution eliminates the need to rely on increasing the output filter capacitor capacity or adding secondary multi-stage filter networks. Instead, it addresses voltage fluctuations caused by long sleep cycles through internal logic reconfiguration of the control chip, avoiding hardware redundancy costs at the power system level and improving conversion efficiency. Attached Figure Description

[0019] Figure 1 This is a flowchart of the dual-mode switching control for feedback gain segmentation mapping in this invention; Figure 2 This is a diagram of the feedback control architecture of the present invention, which includes hysteresis comparison and logical operations.

[0020] The objectives, features, and advantages of this invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0022] A switching power supply conversion control method based on feedback gain piecewise mapping, the method includes the following steps: Step 101: Obtain the feedback voltage that characterizes the voltage fluctuation at the output terminal; Step 102: Compare the feedback voltage with a preset intermittent hysteresis voltage threshold, wherein the intermittent hysteresis voltage threshold is set based on the discharge cutoff voltage of the filter capacitor at the output end under a preset test load condition, so as to anchor the intermittent hysteresis voltage threshold to the physical discharge boundary of the filter capacitor. Step 103: Based on the comparison results, switch the control logic between intermittent mode and linear regulation mode. If the feedback voltage is lower than the intermittent hysteresis voltage threshold, the system enters intermittent mode. The control logic cuts off the real-time regulation of the primary peak current of the transformer by the feedback voltage and clamps the primary peak current to a preset current peak limit to maximize the energy storage of the switching transistor in a single cycle. In this mode, the system prioritizes power consumption optimization and does not perform real-time closed-loop smoothing regulation of the output voltage ripple. It allows the output filter capacitor to perform deep charge discharge during the extended sleep cycle until it approaches the physical discharge boundary, thereby maximizing the reduction of the switching frequency of the switching transistor and putting the entire system into standby mode. When power consumption is suppressed to the limit, if the feedback voltage is not lower than the intermittent hysteresis voltage threshold, the system switches to linear regulation mode. The control logic releases the clamping of the primary side peak current and establishes a proportional mapping relationship between the feedback voltage, the primary side peak current, and the switching frequency in real time. Based on the proportional mapping relationship, a control pulse is output to drive the switching transistor. In this mode, the system switches to high-precision voltage regulation and ripple suppression as the primary control objectives, temporarily relaxing the constraints on power consumption indicators during this period. By increasing the loop gain of the control loop and dynamically adjusting the current amplitude, continuous stepless energy injection into the secondary side is achieved, ensuring that the output voltage ripple remains stable within one-thousandth of the rated output voltage under transient load steps.

[0023] Preferably, after releasing the clamp on the primary side peak current in step 103, the control logic performs loop gain segmented control to switch the controller gain of the switching power converter, wherein the loop gain coefficient in the linear adjustment mode is greater than the equivalent gain in the intermittent mode, and the primary side peak current increases with the increase of the feedback voltage.

[0024] Preferably, obtaining the feedback voltage in step 101 includes: receiving the sampled voltage signal output from the output terminal via the optically isolated feedback circuit through the error amplifier, and performing gain mapping by the subsequent circuit of the error amplifier to generate an internal control signal for adjusting the primary side peak current and the switching frequency.

[0025] Preferably, step 102, anchoring the intermittent hysteresis voltage threshold to the physical discharge boundary of the filter capacitor, includes: obtaining the 12mV ripple tolerance of the output terminal under carrier interface test conditions, and determining the upper boundary value of the intermittent hysteresis voltage threshold based on the 12mV ripple tolerance and the capacitance value of the filter capacitor.

[0026] Preferably, step 103, clamping the primary-side peak current to a preset peak current limit, includes: in intermittent mode, maintaining the primary-side peak current at a constant amplitude, and responding to changes in output load power by adjusting the sleep cycle length of the switching transistor.

[0027] Preferably, in step 103, the primary peak current and switching frequency in the linear regulation mode are synchronously controlled by the feedback voltage, and the adjustment step size of the primary peak current is based on the difference between the real-time sampled value of the feedback voltage and the intermittent hysteresis voltage threshold to respond to the step current of the 1.5W carrier test load.

[0028] Preferably, the method further includes the following steps: Step 104, real-time monitoring of the slope of the feedback voltage change; Step 105, if the slope of the feedback voltage change exceeds a preset rate of change threshold, the control logic is forced to exit the intermittent mode, and the switching transistor is controlled to execute the full power output logic until the feedback voltage recovers to the adjustment range of the linear adjustment mode.

[0029] Preferably, setting the discharge cutoff voltage of the output filter capacitor under preset test load conditions in step 102 includes: determining the voltage deviation component corresponding to the intermittent hysteresis voltage threshold based on the rated output voltage and the 12mV ripple tolerance at the output terminal. Voltage deviation component The following quantitative relationship must be satisfied: ,in, The load current is the preset test load condition, C is the capacitance value of the filter capacitor, and Δt is the sleep cycle length in intermittent mode.

[0030] Preferably, the control logic switching in step 103 is achieved through a hysteresis comparator integrated inside the controller. The positive input of the hysteresis comparator is connected to the feedback voltage, and the flip point of the hysteresis comparator corresponds to the intermittent hysteresis voltage threshold, so as to suppress control oscillations at the mode switching boundary.

[0031] Preferably, the control logic sets the transconductance parameter of the error amplifier inside the control chip to enable the switching power converter to generate a voltage ripple of less than 12mV at a 12V output voltage, and maintains the standby power consumption of the whole machine below 0.4W.

[0032] Example 1: When a single-phase smart meter operates under alternating conditions of 0.3W standby load and 1.5W carrier communication load, the control mechanism using a fixed-proportion loop gain to adjust the primary-side peak current and switching frequency suffers from a physical mismatch. Specifically, within the sleep cycle that meets the 0.4W standby power consumption standard, the magnetic field energy transmitted by the transformer in a single cycle deviates from the discharge time constant of the output-side filter capacitor. Furthermore, the discharge voltage drop of the filter capacitor during the sleep period exceeds the 12mV ripple tolerance. For the above operating conditions, a switching power supply conversion control method based on feedback gain segmented mapping receives the sampled voltage signal output from the output terminal via an optically isolated feedback circuit through an error amplifier, thereby obtaining a characterization of the output... The feedback voltage for the output voltage fluctuation is used; the control logic compares the feedback voltage with a preset intermittent hysteresis voltage threshold; the intermittent hysteresis voltage threshold is determined based on the rated output voltage and 12mV ripple tolerance of the output terminal to determine its corresponding voltage deviation component, and is set based on the discharge cutoff voltage of the filter capacitor at the output terminal under preset test load conditions; when the hysteresis comparator detects that the feedback voltage is lower than the intermittent hysteresis voltage threshold, the system enters the intermittent mode, the control logic cuts off the real-time adjustment link of the feedback voltage to the peak current of the transformer primary side, and clamps the peak current of the primary side to the preset current peak limit. By setting a constant peak current, a fixed single transmission energy packet is obtained, thereby extending the intermittent time of the switching transistor stopping operation and reducing dynamic switching losses.

[0033] When the output load jumps to 1.5W, causing the output voltage to drop and the feedback voltage to rise, if the feedback voltage is not lower than the intermittent hysteresis voltage threshold, the system switches to linear regulation mode. The control logic releases the clamping of the primary peak current and establishes a proportional mapping relationship between the feedback voltage, the primary peak current, and the switching frequency in real time. During this stage, the loop gain coefficient in linear regulation mode is greater than the equivalent gain in intermittent mode. The primary peak current increases with the rise of the feedback voltage, thereby achieving smooth energy injection to the secondary side by increasing the continuous switching frequency and dynamically adjusting the current amplitude. The above control flow performs primary peak current clamping in the 0.3W light load range and switches to proportional mapping regulation logic when the feedback voltage touches the intermittent hysteresis voltage threshold. Through the segmented mapping mechanism of the feedback gain, the system solves the technical contradiction between power consumption reduction and ripple suppression within a single control architecture, avoids the hardware system redundancy problem of adding a secondary filter network, maintains the standby power consumption of the whole machine below 0.4W, and generates a voltage ripple of less than 12mV at a 12V output voltage.

[0034] Example 2: When testing the dynamic response and steady-state efficiency of a single-phase smart meter switching power supply converter, a hardware test platform including a power analyzer and a mixed-signal oscilloscope was built. An AC power signal with a signal-to-noise ratio of 20dB and superimposed with a 50Hz power frequency fluctuation was injected into the input of the test platform to provide grid disturbance. A programmable electronic load was connected to the output to provide a transient load step of 0.3W to 1.5W. In this test environment, an intermittent hysteresis voltage threshold was set. Based on the discharge cutoff voltage of the filter capacitor at the output under preset test load conditions, the intermittent hysteresis voltage threshold was anchored to the physical discharge boundary of the filter capacitor to balance the switching losses under light load and the voltage drop amplitude during load changes. When the set threshold is too high, the system is prone to erroneously triggering the linear regulation mode, leading to increased standby power consumption. When the set threshold is too low, the discharge of the filter capacitor during sleep period causes a voltage overshoot exceeding the tolerance. In this experiment, the intermittent hysteresis voltage threshold was set to a voltage level corresponding to an 11.5mV deviation.

[0035] The experiment was conducted with three control groups running synchronously. The experimental group employed the switching power supply conversion control method based on feedback gain segmented mapping of this invention. The first control group used fixed proportional loop gain control logic, the second control group used the control logic of this invention with the intermittent hysteresis voltage threshold set to the operating point corresponding to a deviation of 15.0mV, and the third control group with the intermittent hysteresis voltage threshold set to the operating point corresponding to a deviation of 5.0mV. Each group operated continuously for 10 minutes under a 0.3W standby load condition. Data collected by the power analyzer showed that the steady-state standby power consumption of the first control group was 0.52W. The experimental group's control logic entered intermittent mode when the feedback voltage was lower than the intermittent hysteresis voltage threshold, cutting off the real-time adjustment of the feedback voltage on the peak current of the transformer primary side and clamping the peak current of the primary side to the preset peak current limit. The steady-state standby power consumption was measured. The power consumption of the machine is 0.32W. When the programmable electronic load triggers a sudden change in the output load to 1.5W, the output-side filter capacitor accelerates discharge, causing the feedback voltage to rise. The first control group generates an output voltage ripple of 18.5mV due to linear regulation lag. The second control group has an output voltage ripple of 24.3mV due to the system state switching lag caused by the threshold deviating from the lower limit of the safety window. The third control group generates an output voltage ripple of 8.2mV, and its light load power consumption rises to 0.45W due to the system frequently leaving the intermittent mode. When the feedback voltage is not lower than the intermittent hysteresis voltage threshold, the clamping of the primary side peak current is released and the linear regulation mode is entered. The proportional mapping relationship between the feedback voltage, the primary side peak current, and the switching frequency is established. Under the above-mentioned input disturbance superimposed environment, the peak value of the output voltage ripple when the load jumps is measured to converge to 10.8mV.

[0036] Example 3: In the design scenario of a single-phase smart meter switching power supply with real physical parameter constraints, to solve the discontinuity phenomenon in feedback gain adjustment during the transition between extremely light load and sudden heavy load, the switching power supply conversion control method based on feedback gain segmentation mapping of the present invention executes closed-loop parameter calibration and logic operation procedures; during the system initialization phase, the control logic obtains the nominal capacitance value of the output filter capacitor and the static leakage current discharge rate of the system under 0.3W standby condition; based on the above physical parameters, the control logic calculates the discharge time window when the output voltage naturally drops from the 12V rated operating point to the 12mV physical ripple boundary; the pre-sampling unit of the error amplifier combines the inherent time domain of the optically isolated feedback circuit. The transfer ratio and the pull-up resistor value of the primary-side circuit convert the output voltage drop corresponding to the 12mV ripple threshold into a feedback voltage characteristic component within the controller. The system writes this feedback voltage characteristic component into the reference voltage register of the internal hysteresis comparator, thereby accurately anchoring the intermittent hysteresis voltage threshold to the physical discharge boundary of the filter capacitor. Regarding the determination of the intermittent hysteresis voltage threshold, during the system initialization calibration phase, a 1.5W constant resistive load is connected, and the voltage waveform at the output terminal in the sleep state of the switching transistor is monitored using the pre-sampling unit. The time window required for the output voltage to drop 12mV from the rated voltage point is recorded, and the 12mV voltage drop is converted into an internal feedback voltage based on the voltage transfer ratio of the opto-isolated feedback circuit. The logic offset is accumulated and added to the stable operating point feedback voltage reference value to obtain the trigger reference in the reference voltage register. In subsequent steady-state operation, if the actual detected feedback voltage is lower than the intermittent hysteresis voltage threshold, the control logic cuts off the real-time adjustment of the feedback voltage on the peak current of the transformer primary side, clamps the peak current command value of the primary side to a preset constant limit level, so as to extend the sleep cycle of the switching transistor and control the power consumption of the whole machine to below 0.4W.

[0037] When a sudden 1.5W carrier communication load causes the filter capacitor to discharge rapidly and the feedback voltage to exceed the intermittent hysteresis voltage threshold, the controller's internal state machine triggers a jump mechanism to enter linear regulation mode. The subsequent logic circuit of the error amplifier constructs a proportional mapping relationship between the feedback voltage and the primary side peak current through an internal multiplier. This mapping relationship follows the control formula. ;in, This is the commanded value of the primary side peak current of the transformer. This is the loop gain coefficient preset in linear adjustment mode. This is the difference between the real-time sampled feedback voltage and the intermittent hysteresis voltage threshold. To obtain the initial peak current reference extracted at the instant the system is released from clamping, the control logic generates cycle-modulated switching pulses according to this arithmetic rule, so that the primary-side peak current and switching frequency change accordingly. The system increases synchronously with the rise of the voltage; based on the determined calculation path, the system injects a smooth energy flow into the secondary side. Under the condition that the set loop gain coefficient is greater than the equivalent gain in intermittent mode, it solves the physical mismatch between power consumption optimization and dynamic ripple suppression, and converges the output voltage fluctuation within the 12mV tolerance. In linear adjustment mode, the loop gain coefficient... Based on the peak-to-peak ripple value under a step load of 0.3W to 1.5W, the output voltage drop was determined by iteratively increasing the value and observing the voltage drop amplitude until it converged to the range of 10.8mV to 11.5mV. To maintain a constant operating value, the slope of the feedback voltage change is obtained by acquiring four consecutive sampling points. The sequence is analyzed and numerical difference terms are calculated for monitoring. If the ratio of the difference term to the sampling period exceeds a preset rate of change threshold... The control logic exits the intermittent mode and controls the switching transistor to execute the full power output logic.

[0038] Example 4: When facing the deployment conditions of mass production of single-phase smart meters and fluctuations in the parasitic parameters of the underlying hardware, the switching power supply conversion control method based on feedback gain segmented mapping initiates a baseline calibration procedure before formally executing dynamic load adjustment to mitigate the influence of manufacturing tolerances in the opto-isolated feedback circuit and the output filter capacitor. The controller injects a constant test pulse signal with preset power into the secondary side to extract the actual time-domain current transfer ratio of the opto-isolated feedback circuit and the equivalent series resistance value of the filter capacitor. The control logic calculates a linear compensation coefficient based on the deviation between the extracted physical impedance parameters and the standard model parameters, and corrects the voltage reference vector pre-stored in the non-volatile memory according to the compensation coefficient. The system overwrites the calibrated reference value into the reference voltage register of the internal hysteresis comparator, and blocks the interference of external component consistency fluctuations on the feedback voltage comparison process by updating the physical mapping point of the intermittent hysteresis voltage threshold.

[0039] After hardware tolerance baseline calibration, the control logic executes the loop gain coefficient calibration process in linear adjustment mode. The system triggers a step excitation test with a continuously set period at the transition boundary between 0.3W standby mode and 1.5W carrier communication load. The pre-sampling unit of the error amplifier extracts the peak-to-peak fluctuation of the output feedback voltage within each period. The subsequent logic circuit adjusts the loop gain coefficient in the control formula based on the deviation slope between the extracted peak-to-peak fluctuation and the preset ripple convergence curve. The initial assignment; through multiple step tests, until the output voltage downslope amplitude in three consecutive test cycles converges within the 12mV tolerance physical boundary, the control logic solidifies the loop gain coefficient after iterative convergence into an operating constant and writes it into the instruction register; this calibration process eliminates parameter mismatch between the operation logic and the physical entity, enabling the switching power converter to output a smooth energy flow under load step conditions and maintain standby power consumption below 0.4W.

[0040] Example 5: When a single-phase smart meter operates in the critical range between extremely light load standby and carrier communication load and encounters transient disturbances in the power grid, the mode switching edge of the system control logic is prone to triggering high-frequency oscillations. To address this engineering problem, this invention resolves the risk of state reversal caused by non-ideal physical characteristics by executing boundary alignment and hysteresis window calibration procedures within the control chip. Before entering formal power regulation, the system injects a voltage scan test signal into the control reference terminal to measure the physical hysteresis response curve of the internal hysteresis comparator. The control unit, based on this response curve and in conjunction with the output filter capacitor, operates under a 0.3W load. The natural discharge slope is used to set the positive wake-up level and reverse sleep level of the hysteresis comparator, respectively. The control logic sets the difference between these two values ​​to be greater than the peak-to-peak value of the typical spike noise generated by the high-frequency operation of the switching transistor coupled to the feedback terminal through parasitic capacitance. This physical voltage difference band is used to reconstruct the intermittent hysteresis voltage threshold into a window range that includes noise immunity margin. When the system is at the critical point of switching from intermittent mode to linear regulation mode, the error amplifier captures the actual sustaining level corresponding to the clamping control in intermittent mode. The control logic directly uses this actual sustaining level as the initial peak current reference for the proportional mapping formula in linear regulation mode. And write it into the hardware register.

[0041] After completing the aforementioned reference alignment and window calibration, the analog-to-digital conversion unit of the control logic implements phase-locked loop configuration between the sampling clock of the feedback voltage and the pulse modulation carrier of the driving switch transistor. Through this synchronous sampling mechanism, the system obtains the dynamic deviation parameter of the feedback voltage at the moment it crosses the positive wake-up level. When the hysteresis comparator determines that the feedback voltage crosses the positive wake-up level, the system jumps to linear regulation mode. The control logic uses the initial peak current reference already stored in the register. And the dynamic deviation parameter sampled in real time, and the execution control formula The specified proportional multiplication operation continuously outputs a steplessly varying primary-side peak current command; the calibration procedure and phase-locked sampling strategy block the current step jump at the multi-mode switching interface, so that the energy injected into the transformer primary side maintains physical continuity at the moment of strategy reconstruction, thereby suppressing the output voltage ripple within the set boundary of 12mV under critical operating conditions and external electromagnetic disturbances.

[0042] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0043] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A switching power supply conversion control method based on feedback gain piecewise mapping, characterized in that, The method includes the following steps: Step 101: Obtain the feedback voltage that characterizes the voltage fluctuation at the output terminal; Step 102: Compare the feedback voltage with a preset intermittent hysteresis voltage threshold, wherein the intermittent hysteresis voltage threshold is set based on the discharge cutoff voltage of the filter capacitor at the output end under a preset test load condition, so as to anchor the intermittent hysteresis voltage threshold to the physical discharge boundary of the filter capacitor. Step 103: Based on the comparison results, switch the control logic between intermittent mode and linear regulation mode: If the feedback voltage is lower than the intermittent hysteresis voltage threshold, the system enters the intermittent mode, the control logic cuts off the real-time regulation of the feedback voltage on the peak current of the transformer primary side, and clamps the peak current of the primary side to the preset peak current limit so that the energy storage of the switching tube in a single cycle is maximized. In this mode, the system prioritizes power consumption optimization as its primary control objective. It does not perform real-time closed-loop smoothing of the output voltage ripple, allowing the output filter capacitor to undergo deep charge discharge during the extended sleep cycle until it approaches the physical discharge boundary. This maximizes the reduction of the switching frequency of the switching transistor, thereby suppressing the overall standby power consumption to its limit. If the feedback voltage is not lower than the intermittent hysteresis voltage threshold, the system switches to linear regulation mode. The control logic releases the clamping of the primary-side peak current and establishes a proportional mapping relationship between the feedback voltage, the primary-side peak current, and the switching frequency in real time. Based on this proportional mapping relationship, it outputs control pulses to drive the switching transistor. In this mode, the system switches to high-precision voltage regulation and ripple suppression as its primary control objectives, temporarily relaxing the constraints on power consumption indicators during this period. By increasing the loop gain of the control loop and dynamically adjusting the current amplitude, it achieves continuous stepless energy injection to the secondary side, ensuring that the output voltage ripple remains stable within one-thousandth of the rated output voltage even under transient load steps.

2. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, After the clamping of the primary side peak current is released in step 103, the control logic performs loop gain segmented control to switch the controller gain of the switching power converter. In this case, the loop gain coefficient in the linear regulation mode is greater than the equivalent gain in the intermittent mode, and the primary side peak current increases with the increase of the feedback voltage.

3. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, The step 101 of obtaining the feedback voltage includes: receiving the sampled voltage signal output from the output terminal via the optically isolated feedback circuit through the error amplifier, and performing gain mapping by the subsequent circuit of the error amplifier to generate an internal control signal for adjusting the primary side peak current and the switching frequency.

4. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, Step 102, which anchors the intermittent hysteresis voltage threshold to the physical discharge boundary of the filter capacitor, includes: obtaining the 12mV ripple tolerance of the output terminal under the carrier interface test conditions, and determining the upper boundary value of the intermittent hysteresis voltage threshold based on the 12mV ripple tolerance and the capacitance value of the filter capacitor.

5. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, Step 103, clamping the primary-side peak current to a preset peak current limit, includes: in intermittent mode, maintaining the primary-side peak current at a constant amplitude, and responding to changes in output load power by adjusting the sleep cycle length of the switching transistor.

6. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, In step 103, the primary peak current and switching frequency in the linear regulation mode are synchronously controlled by the feedback voltage, and the adjustment step size of the primary peak current is based on the difference between the real-time sampled value of the feedback voltage and the intermittent hysteresis voltage threshold to respond to the step current of the 1.5W carrier test load.

7. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, The method also includes the following steps: Step 104, real-time monitoring of the slope of the feedback voltage change; Step 105, if the slope of the feedback voltage change exceeds the preset rate of change threshold, the control logic is forced to exit the intermittent mode and the switching transistor is controlled to execute the full power output logic until the feedback voltage recovers to the adjustment range of the linear adjustment mode.

8. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, Step 102, which sets the discharge cutoff voltage of the output filter capacitor under preset test load conditions, includes: determining the voltage deviation component corresponding to the intermittent hysteresis voltage threshold based on the rated output voltage and the 12mV ripple tolerance. Voltage deviation component The following quantitative relationship must be satisfied: ,in, The load current is the preset test load condition, C is the capacitance value of the filter capacitor, and Δt is the sleep cycle length in intermittent mode.

9. The switching power supply conversion control method based on feedback gain segmented mapping according to claim 1, characterized in that, In step 103, the control logic switching is achieved through the hysteresis comparator integrated inside the controller. The positive input of the hysteresis comparator is connected to the feedback voltage, and the flip point of the hysteresis comparator corresponds to the intermittent hysteresis voltage threshold.

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