Indium phosphide substrate, method for manufacturing indium phosphide substrate, and semiconductor epitaxial wafer

Abstract

Provided is an indium phosphide substrate, a method for manufacturing an indium phosphide substrate, and a semiconductor epitaxial wafer, which can suppress the occurrence of contamination of the surface of the indium phosphide substrate caused by residues in the edge portion. An indium phosphide substrate, wherein the indium phosphide substrate has an edge portion including at least a surface having a curvature, and wherein, with respect to the surface roughness of the edge portion, each of the measured values of the root mean square height Sq calculated using a laser microscope and applying an L filter with a cutoff wavelength of 20 μm at a plurality of positions on the entire surface of the edge portion is 0.15 μm or less.

Description

[0001] This application is a divisional application of the following application: Invention title: Indium phosphide substrate, method for manufacturing indium phosphide substrate, and semiconductor epitaxial wafer. International application date: October 7, 2021. International application number: PCT / JP2021 / 037241. National application number: 202180054263.9. Technical Field

[0002] This invention relates to an indium phosphide substrate, a method for manufacturing an indium phosphide substrate, and a semiconductor epitaxial wafer. Background Technology

[0003] Indium phosphide (InP) is a group III-V compound semiconductor material composed of group III indium (In) and group V phosphorus (P). Regarding its properties as a semiconductor material, it has the following characteristics: a band gap of 1.35 eV and an upper limit of electron mobility of 5400 cm⁻¹. 2 The electron mobility under high electric fields is higher than that of other common semiconductor materials such as silicon and gallium arsenide, at / V·s. In addition, the stable crystal structure at room temperature and pressure is a cubic zincblende structure, and its lattice constant has the following characteristics: it has a larger lattice constant than compound semiconductors such as gallium arsenide (GaAs) and gallium phosphide (GaP).

[0004] Indium phosphide ingots, which are used as raw materials for indium phosphide substrates, are usually sliced ​​to a specified thickness, ground into a desired shape, and then subjected to appropriate mechanical polishing in order to remove polishing debris and damage caused by polishing, and are then subjected to etching, precision polishing (polishing), etc. (Patent Document 1).

[0005] The edge processing of indium phosphide substrates is usually carried out by a chamfering device, which is performed by grinding using abrasives with a grit size of #800 or #1200.

[0006] Existing technical documents Patent documents Patent Document 1: Japanese Patent No. 6701418 Summary of the Invention

[0007] The problem that the invention aims to solve If the surface roughness of the indium phosphide substrate's edges is high, the abrasive grains and polishing fluid used in subsequent chamfering processes will remain at the edges. These edge residues are carried over to the final cleaning process and migrate towards the substrate surface due to the lift-off effect of the cleaning fluid. This migration of residues to the substrate surface leads to contamination of the indium phosphide substrate as the final product, potentially reducing the yield during substrate manufacturing. Furthermore, if the substrate surface is contaminated, the surface quality after epitaxial growth may also be reduced.

[0008] The present invention was made to solve the above-mentioned problems, and its purpose is to provide an indium phosphide substrate, a method for manufacturing an indium phosphide substrate, and a semiconductor epitaxial wafer, wherein the indium phosphide substrate can suppress the generation of contamination on the surface of the indium phosphide substrate caused by residues at the edges.

[0009] Solution for solving the problem The above problems are solved by specific embodiments of the present invention as described below.

[0010] (1) An indium phosphide substrate, wherein the surface roughness of the edge portion of the substrate, the root mean square height Sq measured by laser microscopy over the entire surface of the edge portion is less than 0.15 μm.

[0011] (2) The indium phosphide substrate according to (1), wherein the root mean square height Sq is less than 0.07 μm.

[0012] (3) The indium phosphide substrate according to (1) or (2), wherein the edge portion of the substrate has: a surface inclined from one surface; and a curved surface extending from the end of the inclined surface to the end of the inclined surface from another surface, wherein the root mean square height Sq at the inclined surface, as measured by a laser microscope, is 0.15 μm or less, and the root mean square height Sq at the curved surface, as measured by a laser microscope, is 0.15 μm or less.

[0013] (4) A method for manufacturing an indium phosphide substrate, comprising: a step of chamfering the outer peripheral portion of an indium phosphide wafer; a step of grinding the entire surface of the edge portion of the wafer after chamfering using a grinding film with a particle size of #4000; and a step of etching the wafer after the edge portion has been ground.

[0014] (5) The method for manufacturing an indium phosphide substrate according to (4) further includes, between the step of chamfering the outer peripheral portion of the indium phosphide wafer and the step of polishing the entire surface of the edge portion of the wafer produced after chamfering using a polishing film with a particle size of #4000, a step of polishing at least one surface of the wafer.

[0015] (6) A semiconductor epitaxial wafer having: an indium phosphide substrate as described in any one of (1) to (3); and an epitaxial crystalline layer disposed on the main surface of the indium phosphide substrate.

[0016] Invention Effects According to embodiments of the present invention, an indium phosphide substrate, a method for manufacturing an indium phosphide substrate, and a semiconductor epitaxial wafer can be provided, wherein the indium phosphide substrate can suppress the generation of contamination on the surface of the indium phosphide substrate caused by residues at the edges. Attached Figure Description

[0017] Figure 1 This is a cross-sectional schematic diagram of the area near the edge of an indium phosphide substrate according to an embodiment of the present invention.

[0018] Figure 2 This is a top view of the indium phosphide substrate of the embodiment.

[0019] Figure 3 This is a schematic cross-sectional view of the area near the edge of the indium phosphide substrate in an embodiment. Detailed Implementation

[0020] [Indium phosphide substrate] The structure of the indium phosphide substrate in this embodiment will be described below.

[0021] The indium phosphide (InP) substrate of this embodiment includes a substrate surface, a substrate back surface, and an edge portion. The edge portion may also have an orientation plane (OF) indicating the orientation of the crystal and an index plane (IF) for distinguishing the main surface and the back surface of the substrate.

[0022] The main surface of the indium phosphide substrate can be used as the surface for forming an epitaxial crystal layer. The surface for forming an epitaxial crystal layer refers to the surface on which epitaxial growth is actually performed when the indium phosphide substrate of this embodiment is used as a substrate for epitaxial growth in order to form a semiconductor device structure.

[0023] The maximum diameter of the main surface of the indium phosphide substrate is not particularly limited and can be 49–151 mm or 49–101 mm. The planar shape of the indium phosphide substrate can be circular or rectangular, such as quadrilateral.

[0024] The thickness of the indium phosphide substrate is not particularly limited, but is preferably 300–900 μm, and more preferably 300–700 μm. Especially when the aperture is large, if the indium phosphide substrate is less than 300 μm, it may crack, and if it exceeds 900 μm, it may sometimes cause waste of the base material crystals.

[0025] In this embodiment, the indium phosphide substrate can have a carrier concentration of 1×10⁻⁶. 16 cm -3 Above and 1×10 19 cm -3 The following methods include Zn as a dopant (impurity), and the carrier concentration can also be 1×10⁻⁶. 16 cm-3 Above and 1×10 19 cm -3 The following methods include S as a dopant (impurity), and the carrier concentration can also be 1×10⁻⁶. 16 cm -3 Above and 1×10 19 cm -3 The following methods include Sn as a dopant (impurity), and the carrier concentration can also be 1×10⁻⁶. 6 cm -3 Above and 1×10 9 cm -3 The following methods involve Fe as a dopant (impurity).

[0026] Figure 1 The diagram shows a cross-sectional view near the edge of an indium phosphide substrate according to an embodiment of the present invention. Figure 1 As shown, the cross-section of the edge portion of the indium phosphide substrate is chamfered, resulting in a curved shape. In this invention, "edge portion" refers to the side surface of the indium phosphide substrate, i.e., the outer surface excluding the main surface and the back surface; specifically, it refers to... Figure 1 The area shown extends from point P, located at the end of the main surface (where the flat main surface begins to slope), across the side of the substrate to point Q, located at the end of the back surface (where the flat back surface begins to slope). Furthermore, the "edge" of this invention also includes an orientation plane (OF) and an indicator plane (IF).

[0027] It should be noted that, Figure 1 These are drawings showing the main surface, back surface, and edge portions of an indium phosphide substrate used to understand embodiments of the present invention, and they do not represent the indium phosphide substrate of the present invention exactly as is.

[0028] Regarding the indium phosphide substrate according to the embodiments of the present invention, the root mean square height Sq, measured using a laser microscope, is 0.15 μm or less across the entire surface of the edge. By controlling the root mean square height Sq of the indium phosphide substrate edge to 0.15 μm or less, the residue of grinding particles and polishing fluid used in post-beveling processing is suppressed at the edge. Therefore, it is possible to prevent residues (particles, etc.) from moving to the substrate surface, suppressing contamination of the indium phosphide substrate surface and reducing yield during substrate manufacturing. If contamination of the substrate surface can be prevented, the surface quality after epitaxial growth is improved.

[0029] The root mean square height Sq of the edge portion of the indium phosphide substrate in the embodiments of the present invention is a parameter representing the standard deviation relative to the mean plane, measured according to ISO 25178. The root mean square height Sq of the edge portion of the indium phosphide substrate in the embodiments of the present invention can be measured, for example, using an OLYMPUS 3D measuring laser microscope OLS5000.

[0030] Regarding the indium phosphide substrate according to embodiments of the present invention, it is preferable that, regarding the surface roughness of the edge portion, the root mean square height Sq, measured using a laser microscope, is 0.07 μm or less across the entire surface of the edge portion. Furthermore, the lower limit of this root mean square height Sq at the edge portion of the indium phosphide substrate according to embodiments of the present invention is not particularly limited, and can be 0.01 μm or more, or 0.015 μm or more.

[0031] Regarding the indium phosphide substrate according to embodiments of the present invention, it is preferable that, with regard to the surface roughness of the edge portion, the edge portion has: a surface inclined from one surface; and a curved surface extending from the end of the inclined surface to the end of the inclined surface of another surface, wherein the root mean square height Sq at the inclined surface, as measured by laser microscopy, is 0.15 μm or less, and the root mean square height Sq at the curved surface, as measured by laser microscopy, is 0.15 μm or less. With this configuration, it is possible to better prevent residues (particles, etc.) from moving to the substrate surface, and to better suppress contamination of the indium phosphide substrate surface and reduce yield during substrate manufacturing. Here, the "surface inclined from one surface" will be described later. Figure 3 The surface shown, which slopes from the main surface (i.e., the surface shown in measurement area 1), is described later as "a surface with curvature extending from the end of one sloped surface to the end of another sloped surface." Figure 3 The surface shown in measurement area 2 is the arc-shaped region of the edge of the surface with curvature, which extends from the end of the inclined surface of the main surface of measurement area 1 to the end of the inclined surface of the back surface.

[0032] [Indium phosphide substrate manufacturing method] Next, the manufacturing method of the indium phosphide substrate according to an embodiment of the present invention will be described.

[0033] As a method for manufacturing indium phosphide substrates, firstly, indium phosphide ingots are produced using known methods.

[0034] Next, the indium phosphide ingot is ground to form a cylinder. At this time, an orientation plane (OF) and an indicator plane (IF) can also be formed at specified positions on the outer periphery of the wafer.

[0035] Next, wafers with a front and back face are cut from the ground indium phosphide ingot. At this point, a wire saw or similar tool is used to cut the crystal ends of the indium phosphide ingot along a specified crystal plane, cutting multiple wafers to a specified thickness.

[0036] Next, in order to remove the processing-induced altered layer generated during the cutting process using a wire saw, the cut wafer is subjected to double-sided etching (single etching) using a prescribed etching solution. The wafer can be etched by immersing the entire wafer in the etching solution.

[0037] Next, the outer periphery of the wafer is chamfered. After chamfering, at least one surface of the wafer, preferably both sides, may be ground (polished). This grinding process, also known as lapping, removes surface irregularities of the wafer by grinding with a specified abrasive while maintaining the flatness of the wafer.

[0038] If grinding has been performed after chamfering, the entire surface of the edge portion of the wafer produced after chamfering is ground using an abrasive film with a grit size of #4000 after the grinding process. Since the entire edge portion of the wafer is ground using the same abrasive film with a grit size of #4000, the surface roughness of the entire edge portion of the wafer is controlled to be the same. That is, the surface roughness of the wafer edge portion is controlled through this grinding process so that the root mean square height Sq is less than 0.15 μm when measured using a laser microscope on the entire edge portion surface.

[0039] Next, the wafer, after its edges have been ground, is subjected to double-sided etching (secondary etching) using a prescribed etching solution. The wafer can be etched by immersing the entire wafer in the etching solution.

[0040] Next, the main surface of the wafer is polished using polishing materials for mirror polishing to achieve a mirror finish.

[0041] Next, cleaning is performed, thereby manufacturing the indium phosphide substrate according to the embodiment of the present invention.

[0042] The indium phosphide substrate of the embodiments of the present invention, as described above, can be a substrate having an edge portion that has been chamfered and polished with a polishing film of grit size #4000, or it can be a substrate that has been polished with a polishing film and then etched, mirror polished, cleaned, etc.

[0043] [Semiconductor epitaxial wafer] An epitaxial crystalline layer can be formed by epitaxially growing a semiconductor thin film on the main surface of an indium phosphide substrate according to embodiments of the present invention using known methods, thereby fabricating a semiconductor epitaxial wafer. As an example of this epitaxial growth, a HEMT (High Electron Mobility Transistor) structure can be formed by epitaxially growing an InAlAs buffer layer, an InGaAs channel layer, an InAlAs spacer layer, and an InP electron supply layer on the main surface of an indium phosphide substrate. In fabricating a semiconductor epitaxial wafer with such a HEMT structure, generally, an etching process using an etching solution such as sulfuric acid / hydrogen peroxide water is performed on a mirror-finished indium phosphide substrate to remove impurities such as silicon (Si) adhering to the substrate surface. With the back side of the etched indium phosphide substrate in contact with a suscepter and supported, an epitaxial film is formed on the main surface of the indium phosphide substrate using molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD).

[0044] Example The following are embodiments provided to better understand the present invention and its advantages, but the present invention is not limited to these embodiments.

[0045] (Example 1) First, single crystal ingots of indium phosphide grown to a specified diameter were prepared.

[0046] Next, the outer periphery of the indium phosphide single crystal ingot is ground to form a cylinder. At this time, an orientation plane (OF) and an indicator plane (IF) are formed at predetermined positions on the outer periphery of the wafer.

[0047] Next, wafers with a front and back side are cut from the ground indium phosphide ingot. At this point, a wire saw is used to cut the crystal ends of the indium phosphide ingot along a specified crystal plane, cutting multiple wafers to a specified thickness. During the wafer cutting process, a new wire is continuously fed while the metal wire is reciprocating, and the indium phosphide is moved towards the wire saw. The wafers produced here have a diameter of 76.2 mm and a thickness of 750 μm.

[0048] Next, in order to remove the processing-induced altered layer generated during the cutting process using a wire saw, the cut wafer was etched from both sides using a mixed solution of 85% by mass aqueous phosphoric acid and 30% by mass aqueous hydrogen peroxide (single etching). The wafer was etched by immersing the entire wafer in the etching solution.

[0049] Next, the outer periphery of the wafer was chamfered. Then, both sides of the chamfered wafer were ground (polished). At this point, by using an abrasive, the unevenness on the wafer surface was removed while maintaining the flatness of the wafer.

[0050] Next, the entire surface of the edge portion of the wafer, created by chamfering, was polished onto a polishing film with a particle size of #4000.

[0051] Next, the wafer, after being polished on both sides of the membrane, was etched (secondary etching) with a total etch thickness of 8–15 μm using a mixed solution of 85% by mass phosphoric acid aqueous solution, 30% by mass hydrogen peroxide aqueous solution, and ultrapure water. The wafer was etched by immersing the entire wafer in the etching solution.

[0052] Next, the main surface of the wafer is polished using a polishing material for mirror polishing to achieve a mirror finish. After cleaning, an indium phosphide substrate is produced.

[0053] Figure 2 The diagram shows a top view of the indium phosphide substrate fabricated in Example 1. Furthermore, Figure 3 The diagram shows a cross-sectional view near the edge of the indium phosphide substrate fabricated in Example 1. Figure 3 In the figure, T = 650 μm, X1 = 494 μm, X2 = 432 μm, Y1 = 126 μm, Y2 = 108 μm, Y3 = 416 μm, R1 = 167 μm, R2 = 184 μm (R1 and R2 are the radii of curvature of the circular part at the edge), θ1 = 14.5 degrees, θ2 = 13.9 degrees (θ1 and θ2 are the tilt angles of the edge).

[0054] (Comparative Example 1) As a comparative example 1, in the above-mentioned Example 1, after the grinding process, edge grinding using a polishing film was not performed, but a second etching was performed. Otherwise, an indium phosphide substrate was fabricated in the same manner as in Example 1.

[0055] (evaluate) The edge portion of the indium phosphide substrate being measured, such as Figure 2 As shown, it is divided into a region located on the opposite side of OF (region A) and a region located on the opposite side of IF (region B), and, as Figure 3 As shown, (1) the surface inclined from the main surface is designated as measurement area 1, and (2) the arc region of the edge of the curved surface from the end of the surface inclined from the main surface of measurement area 1 to the end of the surface inclined from the back surface is designated as measurement area 2.

[0056] Furthermore, the measurement area 1 in region A is set as “A-region 1”, the measurement area 2 in region A is set as “A-region 2”, the measurement area 1 in region B is set as “B-region 1”, and the measurement area 2 in region B is set as “B-region 2”.

[0057] The root mean square height Sq was measured in a total of 4 regions at these edges (each measurement area size: 258μm×258μm) using an OLYMPUS 3D measurement laser microscope OLS5000.

[0058] It should be noted that, in order to evaluate the curvature at the edges, measurements were performed using a cutoff filter (L filter: cutoff wavelength 20 μm).

[0059] The evaluation results are shown in Table 1.

[0060] [Table 1] (Inspection) In Example 1, an indium phosphide substrate was obtained with the following surface roughness: the root mean square height Sq of each of the A-regions 1 and 2 and B-regions 1 and 2 at the edge of the substrate, as measured by laser microscopy, was less than 0.15 μm. It can be assumed that the entire surface of the edge of the substrate was polished using a polishing film with a particle size of #4000, and that the inclined region corresponding to measurement region 1 on the entire surface of the edge obtained the same surface roughness as A-region 1 and B-region 1. Furthermore, it can be assumed that the relatively flat region (arc region) corresponding to measurement region 2 on the entire surface of the edge, as described above, obtained the same surface roughness as A-region 2 and B-region 2.

[0061] It should be noted that the difference in root mean square height Sq between regions 1 and 2 at the edge can be attributed to the effects of grinding the substrate surface after the edge has been ground with an abrasive film, followed by mirror polishing or similar processes. In summary, if the entire surface of the substrate edge has just been ground with an abrasive film of grit size #4000, then the root mean square height Sq will be the same regardless of which region is measured on the entire edge surface.

[0062] In addition, the Si concentration on the substrate surface of Example 1 was measured at two locations using TOF-SIMS (Time-of-Flight Secondary Ion Mass Spectrometry), and the result was 80.3 (×10⁻⁶). 10 atoms / cm 2 ), 115.8 (×10) 10 atoms / cm 2At this point, the sensitivity coefficient of the analytical device is determined based on a standard sample with known concentration, and the ionic strength of Si is normalized and quantified using the In strength.

[0063] The analytical conditions for TOF-SIMS analysis are as follows. Device name: Physical Electronics TRIFTIII. Ion source: Au. + Primary ion energy: 22 kV. Analytical region: 25 μm × 25 μm.

[0064] After the chamfering and grinding processes, the indium phosphide substrate of Comparative Example 1 was not polished on the entire surface of the edge portion of the substrate using an abrasive film with a particle size of #4000. Therefore, the root mean square height Sq of the surface roughness of each of the A-regions 1 and 2 and B-regions 1 and 2 at the edge portion of the substrate, as measured by laser microscopy, exceeded 0.15 μm.

Claims

1. An indium phosphide substrate, wherein, The indium phosphide substrate has an edge portion, the edge portion comprising at least a surface with curvature, and the surface roughness of the edge portion is measured at multiple locations covering the entire surface of the edge portion, with each measured value being less than 0.15 μm when the root mean square height Sq calculated using a laser microscope and applying an L filter with a cutoff wavelength of 20 μm is measured at each of the multiple locations.

2. The indium phosphide substrate according to claim 1, wherein, The edge portion of the substrate has: a surface inclined from one surface; and a curved surface extending from the end of the inclined surface to the end of the inclined surface from another surface, wherein the root mean square height Sq of the inclined surface, calculated using a laser microscope with an L-filter having a cutoff wavelength of 20 μm, is less than 0.15 μm, and the root mean square height Sq of the curved surface, calculated using a laser microscope with an L-filter having a cutoff wavelength of 20 μm, is less than 0.15 μm.

3. The indium phosphide substrate according to claim 1, wherein, The root mean square height Sq is below 0.07 μm.

4. A method for manufacturing an indium phosphide substrate, which is the method for manufacturing an indium phosphide substrate as described in claim 1 or 2, the method comprising: The process of chamfering the outer periphery of the indium phosphide wafer in such a way that the edge of the wafer has a curved surface; The process of grinding the entire surface of the edge portion of the wafer produced after beveling using a grinding film with a particle size of #4000; and the process of etching the wafer after the edge portion has been ground.

5. The method for manufacturing an indium phosphide substrate according to claim 4, wherein, The process of chamfering the outer periphery of the wafer is to chamfer the outer periphery of the wafer in such a way that the edge of the substrate has the following surfaces: a surface inclined from one surface; and a curved surface from the end of the inclined surface to the end of the inclined surface from another surface.

6. The method for manufacturing an indium phosphide substrate according to claim 4, wherein, Between the step of chamfering the outer periphery of the indium phosphide wafer and the step of polishing the entire surface of the edge of the wafer after chamfering using a polishing film with a particle size of #4000, there is also a step of polishing at least one surface of the wafer.

7. A semiconductor epitaxial wafer comprising: an indium phosphide substrate as described in claim 1 or 2; and an epitaxial crystalline layer disposed on the main surface of the indium phosphide substrate.

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