Surface coupling and beam expansion system in photonic integrated circuits

Abstract

The present disclosure relates to an integrated photonic chip for optical coupling. The photonic chip includes a substrate, a spot size converter formed on a front surface of the substrate, a mirror formed on the front surface of the substrate, and a superlens formed in or on a back surface of the substrate. The spot size converter expands a diameter of an optical beam in the photonic chip from a smaller mode field size to a larger mode field size. The mirror receives the larger mode field size optical beam from the spot size converter and reflects the optical beam at an angle into the substrate. The superlens collimates the optical beam reflected by the mirror and expanded while passing through the substrate and outputs the collimated optical beam toward an optical device.

Description

Technical Field

[0001] This disclosure relates to photonic chips or integrated circuits (PICs) and optical coupling techniques. This disclosure provides an integrated photonic chip for optically coupling to optical devices (such as fiber optic devices or optical devices with on-chip waveguides). The photonic chip of this disclosure employs surface coupling and beam dilation techniques. Background Technology

[0002] Optical input / output (I / O) and interconnect technologies are designed to enhance signal transmission between integrated circuit (IC) nodes. To achieve this, vertically stacked assemblies of both electrical and optical components are implemented at the wafer level. Ultimately, the transmitted signals can be delivered to fiber optic array connectors for long-distance transmission. The coupling interface between the photonic chip (PIC) and the fiber optic array connector is crucial for ensuring low-loss, reliable packaging.

[0003] Conventional surface coupling methods for fiber Bragg optics (PICs) typically rely on fiber grating couplers, which are inherently limited by the spectral bandwidth and small mode field diameter of single-mode operation. A promising alternative is beam dilation, which expands and collimates the beam from the PIC before it reaches the fiber array connector. Expanding the beam diameter—typically to tens of micrometers—improves mechanical alignment tolerance and thus facilitates pluggable designs. Overall robustness and performance are also enhanced.

[0004] However, conventional beam amplification technology typically requires complex processing and bonding steps during manufacturing and usually does not employ a full wafer-level integration process. Summary of the Invention

[0005] In view of the above, the object of this disclosure is to provide an integrated photonic chip for surface coupling and using beam dilation. A full wafer-level integration process is required. Furthermore, one objective is to avoid spectral bandwidth issues.

[0006] These and other objectives are achieved by the various embodiments of this disclosure as described in the independent claims. Advantageous embodiments are described in the dependent claims.

[0007] A first aspect of this disclosure provides an integrated photonic chip (also known as a PIC) for optically coupling to an optical device, the integrated photonic chip comprising: a substrate; a spot size converter formed on a front surface of the substrate and configured to expand the diameter of a beam in the photonic chip from a smaller mode field size to a larger mode field size; a mirror formed on the front surface of the substrate and configured to receive the larger mode field size beam from the spot size converter and reflect the beam into the substrate at an angle; and a superlens formed in or on a back surface of the substrate and configured to collimate the beam reflected by the mirror and expanded as it passes through the substrate, and to output the collimated beam toward the optical device.

[0008] Therefore, this disclosure proposes a novel surface coupling interface between a photonic chip and an optical device, wherein the optical device may be a fiber array connector. According to the solution of this disclosure, a mirror is integrated with a superlens to realize a micro-optical beam expansion and collimation system. This is achieved through an integration process and results in enhanced coupling performance of the photonic chip. Furthermore, spot size conversion is also achieved. Separately defining the spot size converter and the mirror provides good system flexibility, such as flexibility in waveguide material selection, and allows for mode field shaping of the beam expansion.

[0009] The fabrication of mirrors and superlenses can be well integrated into silicon photonics processes. If the mirror is made of silicon, good angle control of the mirror angle is possible, and a cost-effective process can be established.

[0010] In one implementation, the photonic chip further includes a first anti-reflection layer and / or a second anti-reflection layer, the first anti-reflection layer being disposed in the optical path of the beam between the spot size converter and the reflector, and the second anti-reflection layer being disposed in or on the back surface of the substrate.

[0011] Generally speaking, the corresponding anti-reflective layer can be integrated at any interface between any different materials in the photonic chip of the first aspect to enhance efficiency.

[0012] In one implementation of a photonic chip, a spot size converter and a mirror are embedded in a dielectric layer disposed on the front surface of a substrate.

[0013] In one implementation of a photonic chip, the mirror is made of crystalline silicon, such as epitaxial silicon or a silicon portion of a substrate.

[0014] This approach allows for better control of the reflector angle and enables a cost-effective process.

[0015] In one implementation of a photonic chip, the mirror includes a first vertical surface facing the spot size converter and a first tilted surface facing away from the spot size converter.

[0016] In one implementation of a photonic chip, the first anti-reflection layer is an anti-reflection coating disposed on a first flat surface and facing the spot size converter.

[0017] In one implementation of a photonic chip, the mirror includes a second vertical surface facing away from the spot size converter and a second tilted surface facing the spot size converter, wherein the first tilted surface and the second tilted surface are arranged between the first vertical surface and the second vertical surface.

[0018] In one implementation of a photonic chip, the angles between the first vertical surface and the first inclined surface and / or between the second vertical surface and the second inclined surface are determined by the crystal orientation of the mirror material and / or within the range of 35°-45°.

[0019] For example, this included angle can be determined by the crystal orientation of the mirror material (e.g., epitaxial silicon). As a specific example, the included angle could be 35.27° or 45°. Crystal orientation ensures good accuracy in angle formation, which is beneficial for system control.

[0020] In one implementation of a photonic chip, the spot size converter includes a tapered waveguide or wavefront shaping element; and / or the spot size converter is made of silicon nitride, silicon, or silicon oxynitride.

[0021] For example, as proposed in this disclosure, the spot size converter and the reflector can be defined separately during the manufacturing process. This provides better mode field shape design capabilities for the beam expansion system.

[0022] In one implementation of a photonic chip, the superlens includes periodic patterning of the back surface of the substrate.

[0023] In one implementation, the photonic chip further includes at least one alignment structure disposed on or formed in the back surface of the substrate; wherein the at least one alignment structure is configured to align the photonic chip with an optical device.

[0024] A second aspect of this disclosure provides a system comprising an integrated photonic chip and an optical device according to the first aspect, wherein the optical device includes: at least one alignment structure configured to align the optical device with the photonic chip; and a collimating lens arranged to receive a collimated light beam output from the photonic chip and focus the light beam into an optical fiber or on-chip waveguide of the optical device when the optical device is aligned with the photonic chip.

[0025] The second aspect of the system enjoys the advantages of the photonic chip in the first aspect. Specifically, it allows for surface coupling between the photonic chip and optical devices, achieving high mechanical alignment tolerance and coupling efficiency.

[0026] A third aspect of this disclosure provides a method for manufacturing an integrated photonic chip according to the first aspect, the method comprising: providing a substrate; forming a spot size converter and a mirror on a front surface of the substrate; and forming a superlens in or on a back surface of the substrate.

[0027] The third approach enables integrated processes, such as full wafer-level fabrication of the photonic chip used in the first approach, to achieve back-side emission. This process allows for the use of silicon nitride (SiN) waveguides and spot size converters to achieve better mode field diameter (MFD) control.

[0028] In one implementation of the method, forming a reflector includes: forming a trench through a dielectric layer on a substrate, the dielectric layer being formed on a front surface of the substrate or within the substrate; wherein the substrate is made of silicon; if the trench is formed through the dielectric layer, epitaxially growing crystalline silicon into the trench; wet etching the epitaxially grown silicon into the trench or wet etching the silicon substrate containing the trench to form at least one tilted surface of the reflector; and coating the at least one tilted surface of the reflector with a reflective coating.

[0029] The reflector is formed accordingly on the front surface of the substrate.

[0030] In one implementation of the method, forming a superlens includes: forming a resist layer on the back surface of a substrate; patterning the resist layer, for example, by nanoimprinting; and etching the patterned resist layer to form a structure for the superlens in the back surface of the substrate.

[0031] The third approach can have further implementations corresponding to the various implementations of the photonic chip of the first approach. The third approach and its implementation achieve the effects and advantages described above regarding the photonic chip and its implementation of the first approach.

[0032] In summary, based on the above aspects and implementation, a photonic chip with improved optical coupling is proposed.

[0033] In this photonic chip, a photonic spot size converter is used to amplify the MFD of light. The spot size converter can be implemented using photonic waveguide tapering or wavefront shaping techniques. The material of the spot size converter can be SiN or Si, but is not limited to these.

[0034] In addition, an anti-reflective layer can be used, which can be a single layer or multiple layers of anti-reflective coating. For example, it can be designed for a specific operating wavelength (e.g., O-band, with a center wavelength of 1310 nm) and propagation direction. Material choices for the anti-reflective layer include SiN, TiO, and others.

[0035] Furthermore, a reflector is employed, which can be fabricated through a combination of crystalline silicon epitaxy and anisotropic wet etching (such as using KOH and TMAH). Chemical mechanical polishing (CMP) can be applied after epitaxy to smooth the reflector surface. The thickness of the silicon epitaxial material determines the reflector height, and the crystal orientation of the reflector material determines the angle of the reflector relative to the vertical axis (aligned with the epitaxial growth direction).

[0036] Furthermore, the substrate serves as a carrier for the optical elements of the photonic chip. To match the target propagation distance of the beam expansion of the light field, processing steps such as polishing, thinning, or deposition of additional materials can be performed.

[0037] The optical superlens of a photonic chip can be silicon-based and used as a collimating lens. The superlens fabrication can be performed on the back side of the substrate. The position of the superlens can be determined through optical system design to optimize its relative position to the mirror. Brief description of the attached figures

[0038] The above aspects and implementations are explained in the following specific embodiments with reference to the accompanying drawings: Figure 1 An exemplary photonic chip according to this disclosure is shown, which integrates a spot size converter, a mirror, and a superlens.

[0039] Figure 2 An exemplary photonic chip according to this disclosure is shown, which has one or more anti-reflective layers.

[0040] Figure 3 An exemplary system according to this disclosure is shown, including a photonic chip and optical devices coupled together.

[0041] Figure 4 The sequence of events associated with the light beam in the photonic chip is shown.

[0042] Figure 5 A flowchart illustrating a general method for manufacturing a photonic chip according to this disclosure is shown.

[0043] Figure 6 Exemplary steps for fabricating a superlens for a photonic chip are shown.

[0044] Figure 7 Exemplary steps for fabricating a superlens for a photonic chip are shown.

[0045] Figure 8Exemplary steps for fabricating a mirror for a photonic chip are shown.

[0046] Figure 9 As shown in (a) Figure 2 The simulated intensity profile of the light field in the cross-sectional view of the photonic chip is shown. (b) and (c) show the efficiency spectrum of the mirror, indicating the proportion of light that is vertically reflected.

[0047] Figure 10 An exemplary photonic chip according to the present disclosure is shown, wherein a reflector is formed in a substrate.

[0048] Note that the same elements shown in the attached figures are labeled with the same reference numerals and can be implemented in the same way. Detailed Implementation

[0049] Figure 1 An integrated photonic chip 10 according to this disclosure is shown. The photonic chip 10 is configured to be optically coupled to an optical device ( Figure 1 Not shown in the image, but Figure 3 (Seen as optical device 100). Optical device 100 may be a fiber array connector, a fiber device, or a device with a waveguide, wherein light from photonic chip 10 is ultimately coupled to the fiber array, fiber, or waveguide of optical device 100.

[0050] A photonic chip (also known as a photonic integrated circuit, PIC) is a microchip that integrates optical components such as waveguides, lasers, modulators, and detectors to process and transmit information using light instead of electricity. Similar to electronic integrated circuits (ICs), photonic chips enable high-speed data transmission, low power consumption, and miniaturized optical systems for applications such as telecommunications, data centers, sensing, and quantum computing.

[0051] The photonic chip 10 disclosed herein includes a substrate 11, a spot size converter 12 formed on the front surface of the substrate 11, a reflector 13 formed on the front surface of the substrate 11, and a superlens 14 formed in or on the back surface of the substrate 11. The substrate 11 may be a silicon substrate or a wafer. The front and back surfaces of the substrate 11 are two opposing surfaces of the substrate 11. The front surface is typically available for processing the spot size converter 12 and the reflector 13 (e.g., as the exposed top surface of a wafer), while the back surface is accessible before processing the superlens 14, or is formed first by a processing step such as thinning. The spot size converter 12 and the reflector 13 may be at least partially embedded in a dielectric layer disposed on the front surface of the substrate 11.

[0052] The beam size converter 12 is configured to expand the diameter of the beam 15a—illustrated schematically by arrows—in the photonic chip from a smaller mode field size to a larger mode field size. The beam size converter 12 can be used to asymptotically expand the diameter, for example, to asymptotically expand the optical mode. For this purpose, the beam size converter 12 may include a tapered waveguide or a wavefront shaping element. The beam size converter 12 may be made of silicon nitride, silicon, or silicon oxynitride.

[0053] The reflector 13 is configured to receive a large mode field size beam 15a from the spot size converter 12 and reflect the beam 15a into the substrate 11 at an angle. This angle can be approximately 90°, but it can also be smaller, for example, between 10° and 90°. As it passes through the substrate 11, the beam 15a expands, and the expanded beam 15b reaches the superlens.

[0054] The superlens 14 is configured to collimate the expanded light beam 15b reflected by the mirror 13 and output the collimated light beam 15c toward the optics. The superlens 14 can manipulate the light beam 15b at a subwavelength scale using a nanostructured metasurface. For example, the superlens 14 may include a periodic patterning of the back surface of the substrate 11, which serves as such a metasurface. The nanostructured metasurface can control the phase, polarization, and / or apply wavefront shaping to collimate the light beam 15c.

[0055] Figure 2 An exemplary photonic chip 10 according to this disclosure is shown, which is based on Figure 1 Photonic chip 10.

[0056] Figure 2 The photonic chip 10 also includes a first anti-reflection layer 21, which is arranged in the optical path of the beam 15a between the spot size converter 12 and the reflector 13. Back reflection can be controlled through the anti-reflection layer 21.

[0057] As an example, the reflector 13 may include a first vertical surface facing the spot size converter 12 and a first inclined surface facing away from the spot size converter 12. In this case, the first anti-reflective layer 21 may be an anti-reflective coating disposed on the first flat surface and facing the spot size converter 12.

[0058] The reflector 13 may also include a second vertical surface facing away from the spot size converter 12 and a second inclined surface facing the spot size converter 12. In this case, the first inclined surface and the second inclined surface are arranged between the first vertical surface and the second vertical surface. The reflector 13 may be symmetrical. Another anti-reflective layer 24 may be disposed on the second flat surface and facing away from the spot size converter 12. It may face another spot size converter 23 on the other side of the reflector 13.

[0059] The first included angle of the reflector 13 can be defined between the first vertical surface and the first inclined surface. The second included angle of the reflector 13 can be defined between the second vertical surface and the second inclined surface. The first included angle and / or the second included angle can be determined by the crystal orientation of the reflector material and / or can be in the range of 35°-45° respectively. The first included angle and the second included angle of the reflector 13 are generally equal.

[0060] The mirror 13 may be made of crystalline silicon, such as epitaxial silicon (e.g. grown onto substrate 11 or grown into trenches of substrate 11) or silicon portions of substrate 11 (e.g. formed from substrate 11).

[0061] The photonic chip 10 may also include another anti-reflection layer disposed in or on the back surface of the substrate 11. Figure 2 (Not shown in the image).

[0062] exist Figure 2 In this example, the spot size converter 12 and the reflector 13 are embedded in a dielectric layer 22 disposed on the front surface of the substrate 11. The dielectric layer 22 may be made of silicon dioxide.

[0063] For example, Figure 2 An exemplary structure of the photonic chip 10 can be shown, wherein total internal reflection (TIR) ​​is used in a silicon mirror 13 having a Si / SiO2 interface. The material of the spot size converter 12 may be SiN.

[0064] With optical devices ( Figure 2 Not shown in the image, but see [link / reference]. Figure 3 The coupling of the photonic chip 10 can be achieved via back-side coupling, where light propagates through the silicon substrate 11. The table below summarizes some possible parameter ranges for the structure of the photonic chip 10. These ranges were determined by simulation results, which demonstrate good coupling performance.

[0065]

[0066] like Figure 2 As shown, parameter a is the height of the reflector 13 from the front surface of the substrate 11, and is given in µm.

[0067] like Figure 2 As shown, parameter b is the thickness of substrate 11, and is given in µm.

[0068] like Figure 2 As shown, parameter c is the distance from the antireflective layer 21 to the near end of the spot size converter 12, and is given in µm.

[0069] The parameter S represents the direction of the light field. Figure 2 The arrow indicates the middle.

[0070] The SiN width is the width of the spot size converter 12, and is given in nm (along...). Figure 2 (The y-axis direction of the coordinate system shown).

[0071] The SiN height is the width of the spot size converter 12, and is given in nm (along...). Figure 2 (The z-axis direction of the coordinate system shown).

[0072] The ARC thickness is the thickness of the anti-reflective layer 21, and is given in nm (along...). Figure 2 (The x-axis direction of the coordinate system shown).

[0073] The included angle θ is the aforementioned included angle defined between the vertical surface and the inclined surface of the reflector 13, such as... Figure 2 As shown, and given in degrees.

[0074] Figure 3 A system is shown, including an integrated photonic chip 10 (e.g., as described above) and an optical device 100 according to the present disclosure.

[0075] The optical device 100 includes at least one alignment structure 101 configured to align the optical device 100 with the photonic chip 10. Similarly, the photonic chip 10 may include at least one alignment structure 34 disposed on or formed in the back surface of the substrate 11 and configured to align the photonic chip 10 with the optical device 100.

[0076] like Figure 3 As shown, the optical device 100 also includes a collimating lens 102, which is arranged as shown to receive the collimated beam 15c output by the photonic chip 10 when the optical device 100 is aligned with the photonic chip 10, and to focus the beam 15d into the optical fiber 103 (as shown) or the on-chip waveguide (not shown) of the optical device 100. The optical fiber 103 may include a cladding 104, a core 103 between the cladding layers 104, and a coating 105 surrounding the cladding layers 104.

[0077] Figure 4 The general working principle of the photonic chip 10 is explained from the perspective of light. Initially (box 41), there is an optical field from the photonic chip 10, such as a light beam 15a, which can be generated and / or transmitted within the photonic chip 10.

[0078] Then (box 42), the optical field confined within the photonic chip 10 (e.g., its waveguide) is injected into the spot size converter 12 to expand the optical mode field diameter (MFD). The expanded MFD and its intensity distribution are determined by the size of the spot size converter 12 and its material.

[0079] An optical field is configured to propagate through an antireflective layer 21 (frame 43), which is formed, for example, as a dielectric thin film layer. Layer 21 is designed as an antireflective coating to reduce reflections between interfaces of different materials, particularly at silicon / silicon dioxide (Si / SiO2) interfaces.

[0080] The optical field is then incident on mirror 13 (box 44), which reflects the light in a specific direction, such as towards the back surface of substrate 11, for surface coupling. The material of mirror 13 can be crystalline silicon, and the angle of mirror 13 can be determined by the silicon lattice orientation during fabrication. Mirror 13 may be able to perform nearly wavelength-independent reflection, allowing the system to overcome spectral bandwidth limitations. Optionally, a metallic coating may be applied to protect the mirror surface.

[0081] Because the light MFD from the spot size converter 12 is small, the reflected light exhibits a large divergence. The light can propagate in the substrate 11 to expand the light MFD (box 45).

[0082] The expanded beam is then collimated by optical superlens 14 (box 46) and can subsequently be output from photonic chip 10 to achieve free-space coupling between photonic chip 10 and optical device 100 (e.g., fiber array connector).

[0083] Note that due to the reciprocity of the light field, the photonic chip 10 can also receive optical signals from the optical device 100 (e.g., a fiber optic array connector), meaning that the interface can be adapted as a transceiver and a receiver.

[0084] Figure 5 A flowchart is shown for a general method 50 for manufacturing a photonic chip 10. Method 50 includes a step 51 of providing a substrate 11, a step 52 of forming a spot size converter 12 and a reflector 13 on the front surface of the substrate 11, and a step 53 of forming a superlens 14 in or on the back surface of the substrate 11. Possible implementation details are described below.

[0085] Figure 6 Exemplary steps for fabricating a superlens 14 for a photonic chip 10 are shown. Figure 6 (a) Assuming the front processing of the spot size converter 12 and the reflector 13 (in this case, with the anti-reflection layer 21) has been completed, the processing method will refer to... Figure 8 Describe it. Note that... Figure 6 Backside processing can also be done Figure 8 The front-side processing is completed beforehand.

[0086] according to Figure 6 Forming the superlens 14 includes the step of forming a resist layer 61 on the back surface of the substrate 11, such as... Figure 6 As shown in (b), the resist layer 61 can be spin-coated onto the substrate 11. This then includes a step of patterning the resist layer 61, for example by nanoimprinting 62, such as... Figure 6 As shown in (c), nanoimprint lithography is a high-precision photolithography technique that forms nanoscale patterns (e.g., periodic patterns) on a surface by mechanically imprinting a structured mold onto a material (in this case, a resist). Furthermore, the fabrication of the superlens 14 includes a step of etching the patterned resist layer 63 (e.g., ...). Figure 6 As shown in (d), a structure for the superlens 14 is formed in the back surface of the substrate 11 (as shown in (d)). Figure 6 (As shown in (e)). Etching can be dry etching.

[0087] Figure 7 Exemplary steps for fabricating the superlens 14 of the photonic chip 10 are also shown, wherein Figure 7 Show Figure 6 Replacement processing method. Figure 7 In (a), it is also assumed that the front processing of the spot size converter 12 and the reflector 13 (in this case, with the anti-reflection layer 21) has been completed. The processing method will refer to... Figure 8 Describe it. Note that... Figure 7 Backside processing can also be done Figure 8 The front-side processing is completed beforehand.

[0088] according to Figure 7 Forming the superlens 14 also includes the step of forming a resist layer 71 on the back surface of the substrate 11, such as... Figure 7 As shown in (b), the resist layer 71 can be spin-coated onto the substrate 11. This then includes a step of patterning the resist layer 71, for example, in this case, photolithography using a mask, such as... Figure 7 As shown in (c). The subsequent step is development of the resist (after illumination has passed through the mask), as follows... Figure 7 As shown in (d), the resist layer 71 is patterned. The patterned resist layer 73 can be further used as a hard mask to pattern the back surface of the substrate into a structure for the superlens 14, such as... Figure 7 As shown in (e).

[0089] Figure 8 Exemplary steps for fabricating a reflector 13 for a photonic chip 10 are shown. This fabrication includes forming a trench 81 through a dielectric layer 80 formed on the front surface of a substrate 11 (see [link to documentation]). Figure 8 (a) and (b)). Alternatively, trenches may be formed in substrate 11 (not shown). Substrate 11 is made of silicon.

[0090] If trench 81 is formed to penetrate dielectric layer 80 (e.g.) Figure 8 As shown in (b), an anti-reflection layer 21 can be formed on the exposed sidewall of the dielectric layer 80 within the trench 81, such as Figure 8 As shown in (c). Furthermore, crystalline silicon 82 can be epitaxially grown into trench 81, as... Figure 8 As shown in (d). Then, the epitaxially grown silicon 82 is wet-etched to form at least one tilted surface of the mirror 13, as shown. Figure 8 As shown in (e). Furthermore, the reflector 13 may be filled with a dielectric material 83 (such as...). Figure 8 As shown in (f), and / or may be coated with a reflective coating 84 that also acts as a protective layer (as shown in f). Figure 8 (as shown in (g)).

[0091] Alternatively, if the trench 81 is formed within the substrate 11, the silicon substrate 11 containing the trench 81 can be wet-etched to form at least one tilted surface of the mirror 13. Figure 10 The diagram shows a possible structure with a spot size converter 12 and a reflector 13 containing a reflective coating 84.

[0092] To verify the photonic chip 10, a series of simulations based on finite-difference time-domain (FDTD) have been performed. Figure 9 As shown in (a) Figure 2 The image shows a cross-sectional view of the photonic chip 10, outlining the simulated intensity of the light field. Note that the z-direction has been flipped to maintain the positive propagation direction in the modeling. Essentially, it can be seen that when the reflector 13 is set at 45°, the light field is reflected perpendicularly.

[0093] Figure 9 (b) shows the efficiency spectrum of mirror 13, which indicates the proportion of vertically reflected light. Most of the light is effectively reflected, with a loss of only 0.03 dB at a wavelength of 1310 nm. Figure 9 The back reflection spectrum is shown in (c). Back reflection can be controlled by using a single-layer or double-layer structure to optimize the anti-reflection layer 21. Note that the efficiency spectrum shows a very flat spectrum with a tendency to be almost independent of wavelength.

[0094] To experimentally characterize the photonic chip 10, a free-space optical detector can be used to measure the light field intensity. Far-field measurements or transformations can also be performed to define the divergence of the light field. Relevant parameters may include the mode diameter, divergence, integrated power, and intensity distribution of the light field. A tunable laser source and a precision multi-axis tunable platform can be used to set up the measurements.

[0095] In summary, this disclosure presents a novel surface coupling interface between the photonic chip 10 and the optical device 100 (such as a fiber array connector). The method of this disclosure is to integrate the photonic waveguide mirror 13 with the micro-optical collimating superlens 14 to provide a more compact photonic chip 10 with improved coupling performance and to simplify the integration process for manufacturing the photonic chip 10.

[0096] In the claims and in the description herein, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plural. A single element may perform the function of several entities or items recited in the claims. The mere fact that certain measures are stated in mutually different dependent claims does not imply that combinations of these measures cannot be used in an advantageous implementation.

Claims

1. An integrated photonic chip (10) for optical coupling to an optical device, the integrated photonic chip (10) comprising: substrate(11); A spot size converter (12) is formed on the front surface of the substrate (11) and configured to expand the diameter of the light beam (15a) in the photonic chip (10) from a smaller mode field size to a larger mode field size; A reflector (13) is formed on the front surface of the substrate (11) and is configured to receive a large mode field size beam (15a) from the spot size converter (12) and reflect the beam (15a) into the substrate (11) at a certain angle. A superlens (14) is formed in or on the back surface of the substrate (11) and is configured to collimate a beam of light (15b) that is reflected by the mirror (13) and expanded as it passes through the substrate (11) and to output the collimated beam of light (15c) toward the optical device.

2. The photonic chip (10) according to claim 1, characterized in that, Also includes: A first anti-reflective layer (21) is disposed on the light beam (15a) in the optical path between the spot size converter (12) and the reflector (13); and / or A second anti-reflective layer is disposed in or on the back surface of the substrate (11).

3. The photonic chip (10) according to claim 1 or 2, characterized in that, The spot size converter (12) and the reflector (13) are embedded in the dielectric layer (22), which is disposed on the front surface of the substrate (11).

4. The photonic chip (10) according to any one of claims 1 to 3, characterized in that, The mirror (13) is made of crystalline silicon, for example, epitaxial silicon or a silicon portion of the substrate (11).

5. The photonic chip (10) according to any one of claims 1 to 4, characterized in that, The reflector (13) includes a first vertical surface facing the spot size converter (12) and a first inclined surface facing away from the spot size converter (12).

6. The photonic chip (10) according to claims 5 and 2, characterized in that, The first anti-reflective layer (21) is an anti-reflective coating disposed on the first flat surface and facing the spot size converter (12).

7. The photonic chip (10) according to claim 5 or 6, characterized in that, The reflector (13) includes a second vertical surface facing away from the spot size converter (12) and a second inclined surface facing the spot size converter (12), wherein the first inclined surface and the second inclined surface are arranged between the first vertical surface and the second vertical surface.

8. The photonic chip (10) according to any one of claims 5 to 7, characterized in that, The angles between the first vertical surface and the first inclined surface and / or between the second vertical surface and the second inclined surface are determined by the crystal orientation of the mirror material and / or within the range of 35°-45°.

9. The photonic chip (10) according to any one of claims 1 to 8, characterized in that: The spot size converter (12) includes a tapered waveguide or wavefront shaping element; and / or The spot size converter (12) is made of silicon nitride, silicon or silicon oxynitride.

10. The photonic chip (10) according to any one of claims 1 to 9, characterized in that, The superlens (14) includes a periodic patterning of the back surface of the substrate (11).

11. The photonic chip (10) according to any one of claims 1 to 10, characterized in that, Also includes: At least one alignment structure (34) is disposed on the back surface of the substrate (11) or is formed in the back surface of the substrate (11). The at least one alignment structure (34) is configured to align the photonic chip (10) with the optical device (100).

12. A system comprising an integrated photonic chip (10) according to any one of claims 1 to 11 and the optical device (100), wherein the optical device (100) comprises: At least one alignment structure (101) is configured to align the optical device (100) with the photonic chip (10); as well as A collimating lens (102) is arranged to receive the collimated light beam (15c) output by the photonic chip (10) and focus the light beam (15d) into the optical fiber (103) or on-chip waveguide of the optical device (100) when the optical device (100) is aligned with the photonic chip (10).

13. A method (50) for manufacturing an integrated photonic chip (10) according to any one of claims 1 to 11, the method (50) comprising: Provide (51) the substrate (11); The spot size converter (12) and the reflector (13) are formed (52) on the front surface of the substrate (11); and The superlens (14) is formed (53) in or on the back surface of the substrate (11).

14. The method (50) according to claim 13, characterized in that, Forming the mirror (13) includes: A trench (81) is formed on the substrate (11) through the dielectric layer (80), the dielectric layer (80) being formed on the front surface of the substrate (11) or the trench (81) being formed in the substrate (11). The substrate (11) is made of silicon; If the trench (81) is formed to pass through the dielectric layer (80), then crystalline silicon (82) is epitaxially grown into the trench (81). Wet etching is performed on the epitaxially grown silicon (82) grown into the trench (81) or on the silicon substrate (11) containing the trench (81) to form at least one tilted surface of the mirror (13); and The at least one inclined surface of the reflector (13) is coated with a reflective coating.

15. The method (50) according to claim 13 or 14, characterized in that, Forming the superlens (14) includes: A resist layer (61, 71) is formed on the back surface of the substrate (11). For example, the resist layer (61, 71) can be patterned using nanoimprinting (62); and The patterned resist layer (63, 73) is etched to form a structure for the superlens (14) in the back surface of the substrate (11).

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