MOSFET parallel current conducting structure and semiconductor device

Abstract

The application provides a MOSFET parallel current conducting structure and a semiconductor device, which comprises a substrate, a current busbar, a MOSFET and a current conducting block, the current conducting block is connected between the current busbar and the MOSFET on the substrate, and is electrically connected with the current busbar and a source pin of the MOSFET respectively. The current conducting structure of the MOSFET is adjusted, so that the GATE switch oscillation is effectively reduced, the heat loss caused by the oscillation of Vgs is reduced, the damage probability of the MOSFET caused by Vds overvoltage is reduced, and the current carrying capacity of the power device is improved.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and more specifically, to a MOSFET parallel conduction structure and semiconductor device suitable for TOLL and TO263-7 packages. Background Technology

[0002] MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is a semiconductor device widely used for switching purposes and amplifying electronic signals in electronic devices. TOLL and TO263-7 packages are two existing packaging technologies widely used in high-power surface-mount MOSFET / silicon carbide device packaging.

[0003] In power devices, MOSFETs packaged using the aforementioned traditional method are prone to significant heat buildup when carrying large currents, which affects their performance. The reason for this is as follows: When the MOSFET's source contact is too close to the current bus, the equivalent resistance and equivalent inductance on the bus generate very large spurious signals during high-current, high-frequency switching. During high-frequency switching of the MOSFET, the gate controls the switching by inputting the reference source's turn-on voltage. When the source level is spurious, it will directly interfere with the gate signal through the parasitic parameter Cgs, causing the turn-on and turn-off voltage oscillations to intensify, resulting in additional heat generation in the MOSFET. At the same time, the Vds spike will be difficult to suppress, making the power device very easy to damage and unable to take full advantage of the high-current capability of TOLL-packaged and TO263-7-packaged MOSFETs. Summary of the Invention

[0004] In view of the deficiencies in the prior art, the purpose of this invention is to provide a MOSFET parallel current conduction structure and semiconductor device.

[0005] According to the present invention, a MOSFET parallel current-conducting structure includes: substrate; A current bus is connected to the substrate; MOSFETs are connected to the substrate; A current guide block is connected on the substrate between the current bus and the MOSFET, and is electrically connected to the current bus and the source pin of the MOSFET, respectively.

[0006] Furthermore, the length of the current guide block is 80-100% of the equivalent length of the source pin of the MOSFET soldered on the substrate.

[0007] Furthermore, the width of the current guide block is at least large enough to accommodate the driving resistor and the driving diode.

[0008] Furthermore, the width value is 3-5mm.

[0009] Furthermore, the thickness of the guide block is 2-3 mm.

[0010] Furthermore, the guide block is a copper block.

[0011] Furthermore, the guide block is one or more interconnected structures.

[0012] Furthermore, the current guide block, the current bus, and the source pin of the MOSFET are connected in close contact to form a path, and are connected to the substrate by reflow soldering.

[0013] Furthermore, the substrate is an aluminum substrate.

[0014] A semiconductor device according to the present invention includes the aforementioned MOSFET parallel current-conducting structure.

[0015] Compared with the prior art, the present invention has the following beneficial effects: This invention significantly reduces bus switching noise by adding a current-conducting copper block to push the bus access point further away. The voltage level at the source end is more stable and cleaner, the Vgs switching is more efficient, and the Vgs and Vds spikes are significantly reduced, thereby improving the effective load capacity of power devices. Attached Figure Description

[0016] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is a front view of a MOSFET parallel current-conducting structure according to an embodiment of the present invention; Figure 2 This is a front view of a MOSFET parallel current-conducting structure according to another embodiment of the present invention; Figure 3 This is a perspective view of a MOSFET parallel current-conducting structure according to another embodiment of the present invention. Detailed Implementation

[0017] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0018] Example 1 like Figure 1 As shown, this embodiment provides a MOSFET parallel current-conducting structure, including: a substrate 1 and a current bus 2, a MOSFET 3 and a current-conducting block 4 connected to the substrate 1. The current-conducting block 4 is connected on the substrate 1 between the current bus 2 and the MOSFET 3, and is electrically connected to the source pins of the current bus 2 and the MOSFET 3 respectively. The current-conducting block 4 quickly conducts heat from the source and pushes the bus access point further away, which greatly reduces the switching noise of the bus, makes the source level more stable and cleaner, makes Vgs switching more efficient, and significantly reduces the peaks of Vgs and Vds.

[0019] In this embodiment, there are two current buses 2. One is connected to the source pin of the MOSFET 3 via a current-conducting block, and the other can be connected to the drain of the MOSFET 3 in a conventional manner. This invention does not limit this connection. The substrate 1 is preferably an aluminum substrate, which has a higher thermal conductivity and can quickly conduct the heat generated during device operation to the heat dissipation structure, avoiding local overheating that could lead to device performance degradation or damage. In addition, the aluminum substrate has good mechanical strength and corrosion resistance, and its processing difficulty is relatively low, which helps to reduce the cost and cycle time of substrate production.

[0020] In this embodiment, the current guide block 4 forms a path with the current bus 2 and the source pins of the MOSFET 3 through close contact, and is connected to the substrate 1 by reflow soldering. The length of the current guide block 4 is 80-100% of the equivalent solder length of the source pins of the MOSFET 3 on the substrate, thereby enabling electrical connection with all the source pin arrays. The width of the current guide block 4 is 3-5mm, preferably 4mm, so that the remaining space between the MOSFET 3 and the current bus 2 can accommodate the space for the 0805 packaged drive resistor and drive diode, such as... Figure 3 As shown. Considering cost and ease of SMT reflow soldering, the thickness of the flow guide 4 is selected to be 2-3mm.

[0021] Example 2 like Figure 2 and Figure 3As shown, based on Embodiment 1, this embodiment changes the number and arrangement of the current-conducting blocks 4. In this embodiment, there are multiple current-conducting blocks 4, and their function remains unchanged. The only difference is that multiple current-conducting blocks 4 are spliced ​​together to form different shapes, thus adapting to different circuit structures and design needs. In this embodiment, the shape of the current-conducting blocks 4 remains unchanged. Only one current-conducting block 4 is placed near the source pin of the MOSFET 3, while multiple current-conducting blocks 4 are designed to be connected side-by-side with the current bus 2 near the current bus 2. This design is suitable for situations where there are many MOSFETs 3 arranged in multiple rows, facilitating the connection of the current-conducting blocks 4 to the source pins of the MOSFETs 3 directly or through conductive paths within the aluminum substrate to the current-conducting blocks 4 connected to the current bus 2.

[0022] In other embodiments, the shape of the guide block 4 is not limited to the rectangular structure shown in this invention, but can be any other shape.

[0023] The MOSFET parallel current conduction structure of the present invention can be applied to various semiconductor devices, such as motor controllers.

[0024] In the description of this application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0025] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A MOSFET parallel current-conducting structure, characterized in that, include: substrate(1); A current bus (2) is connected to the substrate (1); MOSFET (3) is connected to the substrate (1); The current guide block (4) is connected on the substrate (1) between the current bus (2) and the MOSFET (3), and is electrically connected to the source pins of the current bus (2) and the MOSFET (3), respectively.

2. The MOSFET parallel current-conducting structure according to claim 1, characterized in that, The length of the current guide block (4) is 80-100% of the equivalent length of the source pin of the MOSFET (3) on the substrate.

3. The MOSFET parallel current-conducting structure according to claim 1, characterized in that, The width of the current guide block (4) is at least large enough to accommodate the driving resistor and the driving diode.

4. The MOSFET parallel current-conducting structure according to claim 3, characterized in that, The width value is 3-5mm.

5. The MOSFET parallel current-conducting structure according to claim 1, characterized in that, The thickness of the guide block (4) is 2-3 mm.

6. The MOSFET parallel current-conducting structure according to claim 1, characterized in that, The guide block (4) is a copper block.

7. The MOSFET parallel current-conducting structure according to claim 1, characterized in that, The guide block (4) is one or more interconnected structures.

8. The MOSFET parallel current-conducting structure according to claim 1, characterized in that, The current guide block (4) forms a path with the current bus (2) and the source pin of the MOSFET (3) through close contact, and is connected to the substrate (1) by reflow soldering.

9. The MOSFET parallel current-conducting structure according to claim 1, characterized in that, The substrate (1) is an aluminum substrate.

10. A semiconductor device, characterized in that, Includes the MOSFET parallel conduction structure as described in any one of claims 1-9.

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