Intelligent positioning and stacking method of multilayer microfluidic chip

Abstract

The present application relates to the technical fields of multilayer microfluidic chip preparation, and particularly relates to an intelligent positioning and stacking method for multilayer microfluidic chip, which comprises the following steps: based on the actual first rotation angle value of a plurality of round sleeve crosses of the flow channel layer and the sealing layer, the alignment duration between the cavity layer and the flow channel layer and the compensation alignment duration of the flow channel layer are preliminarily determined; based on the actual first position offset value of a plurality of round sleeve crosses on the flow channel layer after compensation alignment according to the current compensation alignment duration, the alignment duration between the cavity layer and the flow channel layer is determined again; based on the actual second rotation angle value and the actual second position offset value, the regulation and control strategy of the preliminarily determined alignment duration between the cavity layer and the flow channel layer and the subsequent feeding speed are determined. The present application dynamically coordinates the alignment accuracy of a single structure layer when the multilayer microfluidic chip is stacked layer by layer, improves the alignment reliability under abnormal alignment conditions, and improves the stability and yield of the multilayer microfluidic chip stacking and packaging.

Description

Technical Field

[0001] This invention relates to the field of multilayer microfluidic chip fabrication technology, and in particular to an intelligent positioning and stacking method for multilayer microfluidic chips. Background Technology

[0002] Microfluidic chip technology integrates the basic operational units of sample preparation, reaction, separation, and detection in biological, chemical, and medical analysis processes onto a single micrometer-scale chip, automating the entire analysis process. The market demands a large number of high-throughput, low-cost microfluidic chips for detection. For example, a certain biological cervical cancer diagnostic chip can screen for 12 pathogens at once, and DaAn Gene's PCR amplification chip can screen for 8 pathogens simultaneously. These examples reflect the market's strong reliance on rapid, multi-pathogen detection and provide ample room for the development of microfluidic chips. However, most domestic companies remain in the design and verification stage and cannot advance to mass production. Current production methods involve first injection molding a part with micrometer-level flow channels, then sealing the fine lines with a thin film to create micrometer-level fluid channels. This method suffers from drawbacks such as the difficulty and high cost of manufacturing mirror-level molds with micrometer-level flow channels, the challenge of achieving injection molding flatness, low encapsulation efficiency, and the inability to mass-produce on a large scale.

[0003] Chinese Patent Publication No. CN121551853A discloses a laser-thin film stacking system and method for multilayer microfluidic chips from Jingyuan Metamaterials, relating to the field of thin film stacking technology. This invention improves the accuracy and coverage of quality monitoring in microfluidic chip laser processing, adapting to the differentiated processing needs and energy density adjustment characteristics of different flow channel types. This enables efficient and accurate flow channel forming, significantly improving quality assurance efficiency and product qualification rate in the microfluidic chip production process. It effectively prevents the omission of high-matching combinations due to fixed pairing methods, avoids pairing deviations and packaging quality degradation caused by subjective judgment, and enables intelligent configuration and differentiated investment of bonding and packaging resources. This effectively enhances the pertinence and implementation effect of the optimal bonding scheme. By identifying abnormal deviation areas that affect flow channel forming, it ensures a high degree of consistency between quality control measures and actual processing defect risks.

[0004] Therefore, the aforementioned Jingyuan Metamaterials multilayer microfluidic chip laser-thin film stacking system and method have the following problems: it is difficult to dynamically coordinate the alignment accuracy of a single structural layer when stacking multilayer microfluidic chips layer by layer, it cannot improve the alignment reliability under abnormal alignment conditions, and it cannot improve the stability and yield of multilayer microfluidic chip stacking packaging. Summary of the Invention

[0005] To address this, the present invention provides an intelligent positioning and stacking method for multilayer microfluidic chips, which overcomes the problems in the prior art where it is difficult to dynamically coordinate the alignment accuracy of a single structural layer when stacking multilayer microfluidic chips layer by layer, thus failing to improve alignment reliability under abnormal alignment conditions and failing to improve the stability and yield of multilayer microfluidic chip stacking packaging.

[0006] To achieve the above objectives, the present invention provides a method for intelligent positioning and stacking of multilayer microfluidic chips, comprising: Based on the actual first rotation angle value of several circular crosses of the flow channel layer and sealing layer aligned at the initial feeding speed, the alignment time between the cavity layer and the flow channel layer and the compensation alignment time of the flow channel layer are preliminarily determined. Based on the actual first position offset value of several circular crosses on the flow channel layer after compensation and alignment according to the current compensation alignment time, the alignment time between the cavity layer and the flow channel layer is determined again. Based on the actual second rotation angle value and actual second position offset value of several circular crosses on the cavity layer, the qualification of the cavity layer stacking position is determined, so as to determine the control strategy for the initial determination of the alignment time between the cavity layer and the flow channel layer and the subsequent feeding speed. Obtain the actual axial distance value of the circular cross between the observation layer and the sealing layer stacked according to the determined feeding speed, determine the stacking accuracy qualification, and redetermine the initial feeding speed.

[0007] Furthermore, the process of determining the preset second angle value during the initial determination of the alignment time between the cavity layer and the flow channel layer includes, Compare the actual first rotation angle value with the preset first angle value to determine the coarse positioning qualification. In response to the actual first rotation angle value being greater than a preset first angle value, a preset second angle value is determined to be reduced based on the first rotation angle excess value, wherein the first rotation angle excess value is determined by subtracting the preset first angle value from the actual first rotation angle value.

[0008] Furthermore, in response to the actual first rotation angle value being greater than the preset first angle value, it is determined that the alignment time of the alignment mechanism should be increased according to the first rotation angle excess value, wherein the first rotation angle excess value is determined based on the difference between the actual first rotation angle value and the preset first angle value.

[0009] Furthermore, in response to the actual first rotation angle value being greater than the preset first angle value, the compensation alignment time is determined based on the first rotation angle excess value.

[0010] Furthermore, the process of determining the preset second angle value during the process of re-determining the alignment time between the cavity layer and the flow channel layer includes, Compare the actual first position offset value with the preset first position offset value to determine the compliance of the displacement deviation; In response to the actual first position offset value being greater than the preset first position offset value, a preset second angle value is determined to be reduced based on the first position excess value, wherein the first position excess value is determined by subtracting the preset first position offset value from the actual first position offset value.

[0011] Furthermore, in response to the actual first position offset value being greater than the preset first position offset value, it is determined that the alignment time of the alignment mechanism will be increased again based on the first position excess value.

[0012] Furthermore, the process of determining the suitability of the cavity layer stacking position includes, The actual second rotation angle value and the actual second position offset value are compared with their respective preset thresholds to determine the qualification of the cavity layer stacking position. In response to the actual second rotation angle value being greater than the preset second angle value and the actual second position offset value being greater than the preset second position offset value, the adjustment range of the alignment time between the cavity layer and the flow channel layer is initially determined based on the second position excess value, wherein the second position excess value is determined based on the difference between the actual second position offset value and the preset second position offset value.

[0013] Furthermore, in response to increasing the adjustment range of the alignment time between the initially determined cavity layer and the flow channel layer, the subsequent feeding speed is reduced based on the value exceeding the second position.

[0014] Furthermore, in response to the actual second rotation angle value being less than or equal to the preset second angle value, and the actual second position offset value being less than or equal to the preset second position offset value, the adjustment range of reducing the preliminarily determined alignment time between the cavity layer and the flow channel layer based on the second position deficiency value is determined, wherein the second position deficiency value is determined based on the difference between the preset second position offset value and the actual second position offset value.

[0015] Furthermore, the process of determining the stacking accuracy qualification includes, Compare the actual wheelbase value with the preset wheelbase value to determine the stacking accuracy qualification; In response to the actual wheelbase value being greater than the preset wheelbase value, the initial feeding speed is reduced based on the wheelbase excess value, wherein the wheelbase excess value is determined by subtracting the preset wheelbase value from the actual wheelbase value.

[0016] Compared with the prior art, the beneficial effect of the intelligent positioning and stacking method of multilayer microfluidic chips of the present invention is that by dynamically coordinating the alignment accuracy of a single structural layer when multilayer microfluidic chips are stacked layer by layer, the alignment reliability under the condition of alignment abnormality is improved, and the stability and yield of multilayer microfluidic chip stacking packaging are improved.

[0017] Furthermore, by adjusting the alignment accuracy of the flow channel layer to control the alignment time of the cavity layer, the performance degradation caused by alignment anomalies in the multilayer microfluidic chip can be suppressed and compensated, thereby improving the performance stability of the multilayer microfluidic chip after stacking and packaging. By detecting the alignment of the cavity layer, the correction effect of adjusting the alignment time of the cavity layer to match the alignment anomalies of the flow channel layer is verified. If the expected effect of suppressing the performance degradation of the multilayer microfluidic chip cannot be achieved, the subsequent transport speed is reduced to further enhance the stability of single-structure layer transport and enhance the subsequent alignment accuracy, thereby improving the reliability of the multilayer microfluidic chip stacking and packaging. When an alignment anomaly occurs in the stacking, the subsequent stacking accuracy requirements are dynamically adjusted to improve the stringency under alignment anomaly conditions, thereby improving the reliability and stability of the multilayer microfluidic chip stacking and packaging, and increasing the yield of the multilayer microfluidic chip.

[0018] Furthermore, by monitoring the rotation angle of the channel layer stacked on the sealing layer, the stacking accuracy of subsequent single structural layers is adjusted. When the current channel layer stacking accuracy exceeds expectations, the stacking accuracy of the subsequent cavity layer is tightened to enhance the stacking accuracy of the cavity layer and the channel layer. This ensures the reliability of stable liquid flow without leakage, reduces the risk of interconnection of several planned independent fluid flow channels, and improves the yield rate during multilayer microfluidic chip packaging.

[0019] Furthermore, when the rotation angle of the channel layer relative to the sealing layer exceeds expectations after the current channel layer alignment, while maintaining stringent alignment accuracy requirements between the cavity layer and the channel layer to prevent the accumulation of alignment errors that would render the multilayer microfluidic chip unusable during packaging, the alignment time of the alignment mechanism is increased based on the first excessive rotation angle value. By providing subsequent single structural layers with more sufficient alignment time, the alignment accuracy of single structural layers is enhanced, thereby improving the single-layer alignment accuracy of several single structural layers of the multilayer microfluidic chip, and ultimately improving the overall alignment accuracy of the multilayer microfluidic chip, thus increasing the yield rate of multilayer microfluidic chip packaging.

[0020] Furthermore, by adding a compensation alignment step, the situation where the rotation angle of the current flow channel layer relative to the sealing layer exceeds the expectation is reduced, and the degree to which the rotation angle exceeds the expectation during the alignment of the flow channel layer is corrected in a timely manner. This reduces the alignment error between the current flow channel layer and the sealing layer, and avoids the alignment error being too large, which would make the alignment error tolerance of several subsequent single structural layers too small, resulting in the inability to package a multilayer microfluidic chip with qualified performance.

[0021] Furthermore, by adjusting the preset second angle value that determines the stacking accuracy of the cavity layer relative to the flow channel layer, the displacement deviation of the current flow channel layer relative to the sealing layer is matched, and the alignment accuracy of several single structural layers is dynamically coordinated. Under the risk that the increased alignment accuracy of the current single structural layer will degrade the performance of the microfluidic chip, the alignment accuracy requirements of subsequent layers are tightened. By improving the alignment accuracy of subsequent single structural layers, the trend of performance degradation of the microfluidic chip is suppressed, the reliability and stability of the stacking accuracy of multilayer microfluidic chips are improved, and the yield of multilayer microfluidic chips is increased.

[0022] Furthermore, by further increasing the alignment time of the alignment mechanism to improve the stability of the alignment process, the subsequent alignment accuracy is improved to suppress the degree of decrease in the alignment accuracy of the overall stack of multilayer microfluidic chips, thereby improving the reliability of liquid flow when using multilayer microfluidic chips, enhancing the reliability and stability of multilayer microfluidic chips, and reducing the defect rate of multilayer microfluidic chips.

[0023] Furthermore, by strictly controlling the alignment accuracy between the cavity layer and the channel layer, the alignment time of the cavity layer is automatically adjusted under the current alignment anomaly. If the alignment accuracy of the cavity layer is not improved, and the expected reduction in alignment anomalies is not achieved, the adjustment range when the initial cavity layer alignment time is increased is further increased. This enhances the effect of suppressing the overall performance degradation of the multilayer microfluidic chip, reduces the degree of overall performance degradation of the multilayer microfluidic chip, improves the reliability of the overall alignment accuracy when several single structural layers are stacked, and thus improves the yield of the multilayer microfluidic chip.

[0024] Furthermore, when the alignment anomaly is detected as insufficient, the subsequent feeding speed is reduced based on the positional deviation of the cavity layer displacement. This reduces the kinetic energy impact when a single structural layer enters the alignment process from transportation, thereby reducing the initial difficulty of alignment, increasing the effective alignment time, improving alignment accuracy to reduce alignment anomalies, enhancing the stability and reliability of multilayer microfluidic chip stacking, and improving the stability of the performance of multilayer microfluidic chip stack after packaging.

[0025] Furthermore, in the case of alignment anomalies, the alignment time is increased to increase the alignment effectiveness, the stacking efficiency is reduced to improve the alignment accuracy and reduce the degree of alignment anomalies, thereby improving the stacking accuracy of the multilayer microfluidic chip. When the cavity layer stacking position is detected to be excessively qualified, the degree of over-correction of the initially determined alignment time between the cavity layer and the channel layer is reduced, the adjustment range of the subsequent initially determined alignment time between the cavity layer and the channel layer is reduced, and the stacking efficiency is improved.

[0026] Furthermore, by detecting whether the stacking accuracy of multilayer microfluidic chips is up to standard, if the stacking accuracy is not up to standard, the initial transport speed is reduced to decrease the kinetic energy impact during alignment, enhance the stability of transport, and thus reduce the initial difficulty of alignment, thereby improving the alignment accuracy under a given alignment time. This improves the alignment accuracy of individual structural layers and the overall alignment, enhances the reliability and stability of multilayer microfluidic chip stacking and packaging, and increases the yield of multilayer microfluidic chips. Attached Figure Description

[0027] Figure 1 This is a flowchart illustrating an intelligent positioning and stacking method for multilayer microfluidic chips according to an embodiment of the present invention; Figure 2 This is a flowchart for determining the coarse positioning qualification in an embodiment of the present invention; Figure 3 This is a flowchart illustrating the process of determining the passability of displacement deviation according to an embodiment of the present invention; Figure 4 This is a flowchart illustrating the control strategy for determining the initial alignment time between the cavity layer and the flow channel layer in an embodiment of the present invention. Detailed Implementation

[0028] To make the objectives and advantages of the present invention clearer, the present invention will be further described below with reference to embodiments; it should be understood that the specific embodiments described herein are merely for explaining the present invention and are not intended to limit the present invention.

[0029] Preferred embodiments of the present invention will now be described with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are merely illustrative of the technical principles of the present invention and are not intended to limit the scope of protection of the present invention.

[0030] Please see Figure 1 The diagram shows a flowchart of an intelligent positioning and stacking method for multilayer microfluidic chips according to an embodiment of the present invention; the method of this embodiment includes, Step S1: Based on the actual first rotation angle values ​​of several circular crosses of the flow channel layer and the sealing layer aligned at the initial feeding speed, the alignment time between the cavity layer and the flow channel layer and the compensation alignment time of the flow channel layer are initially determined. Step S2: Based on the actual first position offset value of several circular crosses on the flow channel layer after compensation and alignment according to the current compensation alignment time, determine the alignment time between the cavity layer and the flow channel layer again. Step S3: Based on the actual second rotation angle value and actual second position offset value of several circular crosses on the cavity layer, determine the qualification of the cavity layer stacking position, so as to determine the control strategy for the initial determination of the alignment time between the cavity layer and the flow channel layer and the subsequent feeding speed. Step S4: Obtain the actual axial distance value of the circular cross of the observation layer and the sealing layer stacked according to the determined feeding speed, determine the stacking accuracy qualification, and redetermine the initial feeding speed.

[0031] In this embodiment, when stacking several single structural layers of a single multilayer microfluidic chip, if an alignment anomaly occurs in the stacking of the channel layer, the alignment time of the cavity layer is first adjusted by controlling the rotation degree of the channel layer using the actual first rotation angle value of several circular crosses. This improves the alignment accuracy of the cavity layer, compensates for the current alignment anomaly, and prevents the alignment anomaly from continuing and causing the performance of the multilayer microfluidic chip to deteriorate to the point where it cannot meet performance requirements. Based on the deviation of the actual first position offset value of several circular crosses on the channel layer after compensation alignment according to the current compensation alignment time, the alignment time of the cavity layer is adjusted again to match the alignment situation indicated after the channel layer is aligned. This dynamically coordinates the alignment accuracy of each of the several single structural layers. The actual second rotation angle value and the actual first position offset value of several circular crosses on the cavity layer are then used to adjust the alignment time. The two position offset values ​​are used to verify the results of suppressing and compensating for the current stacking accuracy error, and to determine the qualification of the cavity layer stacking position. This is to re-determine whether the initial alignment time between the cavity layer and the channel layer is appropriate. If the current initial alignment time between the cavity layer and the channel layer cannot effectively suppress and compensate for the alignment error, the subsequent feeding speed is determined to match the current alignment anomaly, so as to further improve the alignment accuracy of several single structural layers, thereby reducing the cumulative degree of alignment error of several single structural layers and improving the stacking stability of multilayer microfluidic chips. The actual axial distance between the observation layer and the sealing layer is used to determine the stacking accuracy of multilayer microfluidic chips, so as to dynamically coordinate the stacking speed and stacking accuracy, and accelerate the stacking efficiency while ensuring the performance of multilayer microfluidic chips.

[0032] This invention regulates the alignment time of the cavity layer by adjusting the alignment accuracy of the flow channel layer to suppress and compensate for the performance degradation caused by alignment anomalies in multilayer microfluidic chips, thereby improving the performance stability of stacked multilayer microfluidic chips. By detecting the alignment of the cavity layer, the correction effect of adjusting the alignment time of the cavity layer to match the alignment anomalies of the flow channel layer is verified. If the expected effect of suppressing the performance degradation of the multilayer microfluidic chip cannot be achieved, the subsequent transport speed is reduced to further enhance the stability of single-layer transport and improve subsequent alignment accuracy, thereby improving the reliability of the stacked multilayer microfluidic chip. When alignment anomalies occur in the stack, the subsequent stacking accuracy requirements are dynamically adjusted to increase the stringency under alignment anomalies, improving the reliability and stability of the stacked multilayer microfluidic chip and increasing the yield rate of the multilayer microfluidic chip.

[0033] Please see Figure 2 As shown, it is a flowchart for determining the coarse positioning qualification in an embodiment of the present invention; In this embodiment, the process of determining the preset second angle value during the initial determination of the alignment time between the cavity layer and the flow channel layer includes the following steps: Compare the actual first rotation angle value with the preset first angle value to determine the coarse positioning qualification. In response to the actual first rotation angle value being greater than a preset first angle value, a preset second angle value is determined by reducing the first rotation angle excess value, wherein the first rotation angle excess value is determined by subtracting the preset first angle value from the actual first rotation angle value. The preset second angle value and the first rotation angle excess value are linearly proportional.

[0034] The number of the plurality of circular crosses is at least two. In this embodiment, the number of the plurality of circular crosses is preferably two, and the two circular crosses are arranged diagonally.

[0035] The axial coordinates of the circular cross-shaped structure of the flow channel layer and sealing layer are obtained using an industrial camera and motion platform. The first axis line is determined based on the axis coordinates of the two circular crosses on the flow channel layer; The reference axis is determined by the axis coordinates of the circular cross-shaped seal layer. The actual first rotation angle value is determined based on the angle between the first axis and the reference axis.

[0036] The multilayer microfluidic chip includes several single structural layers. In this embodiment, the several single structural layers preferably include a liquid injection layer, an observation layer, a cavity layer, a flow channel layer, and a sealing layer. The preset angle value is determined based on the allowable rotation angle when stacking multilayer microfluidic chips; the preset angle value includes a single preset angle value corresponding to the alignment of several single structural layers; The preset position offset value is a displacement deviation with a margin set based on experience under the expected alignment accuracy of adjacent single structural layers. The preset position offset value includes a single preset position offset value corresponding to the alignment of several single structural layers. The accuracy of the alignment when stacking several single structural layers does not exceed the corresponding single preset angle value and single preset position offset value, which can meet the performance requirements of multilayer microfluidic chips.

[0037] A preset first angle value is determined based on the allowable rotation angle between the flow channel layer and the sealing layer, in order to determine whether the expected rotation angle requirement is met when the flow channel layers are stacked.

[0038] It is understandable that the number of single structural layers can be other numbers of structural layers, and the number of single structural layers can be adjusted according to the specific design of the microfluidic chip; the specific values ​​of the single preset angle value and the single preset position offset value are determined according to the degree of influence of the corresponding single structural layer on the performance of the multilayer microfluidic chip.

[0039] Specifically, the injection layer, observation layer, cavity layer, and flow channel layer have different impacts or importance on the performance of multilayer microfluidic chips, and the preset angle values ​​are different.

[0040] When the actual first rotation angle value is less than or equal to the preset first angle value, it indicates that after stacking the flow channel layer on the sealing layer according to the initial feeding speed, the coarse alignment accuracy between the flow channel layer and the sealing layer is qualified, the rotation angle of the flow channel layer is in the expected state, which meets the requirements for stacking the flow channel layer. It is not necessary to strictly require the rotation angle of the cavity layer during stacking based on the rotation angle of the flow channel layer, and the coarse positioning is qualified.

[0041] When the actual first rotation angle value is greater than the preset first angle value, it indicates that the rotation angle of the current flow channel layer relative to the sealing layer exceeds the expectation. If the cavity layer is still stacked according to the current preset second angle value, the rotation angle of the cavity layer relative to the flow channel layer and the rotation angle relative to the sealing layer will exceed the expectation even more. The greater the deviation in the accuracy of the cavity layer and the subsequently stacked materials, the greater the degradation in the quality of the multilayer microfluidic chip, and the coarse positioning is deemed unqualified.

[0042] The difference between the actual first rotation angle value and the preset first angle value is calculated to obtain the first rotation angle excess value, which characterizes the degree of deviation between the actual position of the flow channel layer stack and the expected position.

[0043] The larger the first rotation angle exceeds the expected value, the greater the rotation angle of the current channel layer stack relative to the sealing layer exceeds the expected rotation degree. When stacking the cavity layer subsequently, the greater the unexpected rotation angle of the cavity layer relative to the channel layer, the more stringent the subsequent stacking accuracy needs to be, thereby reducing the accumulation of accuracy errors. This prevents the accumulation of accuracy errors from becoming too large, which would make it impossible to correct the position of a single structure layer when adjusting the corresponding microfluidic chip single structure layer in one go. Instead, the position of the cavity layer needs to be corrected multiple times to ensure that the performance of the multilayer microfluidic chip meets the expected requirements. The preset second angle value is reduced according to the first rotation angle exceeding the expected value to increase the stringency of subsequent stacking and reduce the degree of accumulation of accuracy errors in subsequent single structure layer stacking.

[0044] This invention regulates the stacking accuracy of subsequent single structural layers by monitoring the rotation angle of the channel layer stacked on the sealing layer. When the current channel layer stacking accuracy exceeds expectations, the stacking accuracy of the cavity layer is enhanced by strictly controlling the subsequent cavity layer stacking accuracy. This ensures stable liquid flow and reliability without leakage, reduces the risk of interconnection of several planned independent fluid flow channels, and improves the yield rate during multilayer microfluidic chip packaging.

[0045] In this embodiment, in response to the actual first rotation angle value being greater than the preset first angle value, the alignment time of the alignment mechanism is increased according to the first rotation angle excess value, wherein the alignment time of the alignment mechanism is linearly proportional to the first rotation angle excess value.

[0046] The preferred alignment mechanism is the UVW alignment platform, which is an existing piece of equipment.

[0047] In this embodiment, when the actual first rotation angle value is greater than the preset first angle value, it indicates that the deviation in rotation angle during the current flow channel layer stacking exceeds expectations, and the alignment process has a deviation. Based on the first rotation angle exceeding the value, the alignment time of the alignment mechanism is increased, thereby giving the alignment mechanism more alignment time, reducing the degree to which the deviation cannot be fully reduced due to rapid alignment, and enhancing the accuracy of the alignment mechanism in subsequent single structural layer alignment.

[0048] In cases where the rotation angle of the channel layer relative to the sealing layer exceeds expectations after the current channel layer alignment, this invention, while maintaining stringent alignment accuracy requirements between the cavity layer and the channel layer to prevent the accumulation of alignment errors that would render the multilayer microfluidic chip unusable during packaging, increases the alignment time of the alignment mechanism based on the first excessive rotation angle. By providing subsequent single structural layers with more sufficient alignment time, the accuracy of single structural layer alignment is enhanced, thereby improving the single-layer alignment accuracy of several single structural layers in the multilayer microfluidic chip, and ultimately improving the overall alignment accuracy of the multilayer microfluidic chip, thus increasing the yield rate of multilayer microfluidic chip packaging.

[0049] In this embodiment, in response to the actual first rotation angle value being greater than the preset first angle value, the compensation alignment time is determined based on the first rotation angle exceeding the value.

[0050] In this embodiment, when the first rotation angle value is greater than the preset first angle value, the rotation angle of the flow channel layer relative to the sealing layer exceeds the expectation. In order to prevent the cumulative alignment accuracy error of several subsequent single structural layers from exceeding the expected total alignment accuracy error of the multilayer microfluidic chip, a compensation alignment time is determined based on the first rotation angle exceeding the value. Through compensation alignment, the first rotation angle exceeding the value is reduced within the compensation alignment time to reduce the degree of deviation of the rotation angle between the flow channel layer and the sealing layer. The compensation alignment time is increased based on the basic alignment time, which is determined according to the minimum time that alignment can be performed, giving the alignment mechanism a reaction time to ensure that the correction of alignment abnormalities is completed within the compensation alignment time.

[0051] This invention reduces the situation where the rotation angle of the current flow channel layer relative to the sealing layer exceeds the expectation by adding a compensation alignment step. It corrects the extent to which the rotation angle exceeds the expectation during the alignment of the flow channel layer in a timely manner, thereby reducing the alignment error between the current flow channel layer and the sealing layer. This avoids the alignment error being too large, which would make the alignment error tolerance of several subsequent single structural layers too small, resulting in the inability to package a multilayer microfluidic chip with qualified performance.

[0052] Please see Figure 3 As shown, it is a flowchart for determining the passability of displacement deviation according to an embodiment of the present invention; In this embodiment, the process of determining the preset second angle value during the re-determination of the alignment time between the cavity layer and the flow channel layer includes the following steps: Compare the actual first position offset value with the preset first position offset value to determine the compliance of the displacement deviation; In response to the actual first position offset value being greater than the preset first position offset value, a preset second angle value is determined to be reduced based on the first position excess value, wherein the first position excess value is determined by subtracting the preset first position offset value from the actual first position offset value.

[0053] In this embodiment, image data of the circular cross of the flow channel layer and the sealing layer are acquired by an industrial camera and a motion platform. The actual position offset values ​​in two directions are determined based on the distance between the center points of the ends of the cross in the circular cross in the image data. The actual first position offset value is determined based on the maximum value of the two actual position offset values. A preset first position offset value is a displacement deviation with a margin set based on experience and the expected alignment accuracy of the channel layer and the sealing layer. It is used to determine whether the current channel layer stacking alignment process has reached a warning state that would degrade the performance of the multilayer microfluidic chip.

[0054] When the actual first position offset value is less than or equal to the preset first position offset value, it indicates that the alignment accuracy of the currently stacked flow channel layer and sealing layer has reached the expected level. When the actual first rotation angle value is less than or equal to the preset first angle value, the alignment error of the flow channel layer and sealing layer cannot cause the performance of the multilayer microfluidic chip to deteriorate to the point that it cannot meet the performance requirements, and the displacement deviation is deemed to be qualified.

[0055] When the actual first position offset value is greater than the preset first position offset value, it indicates that the alignment accuracy of the currently stacked flow channel layer and sealing layer is within the allowable range, but has not reached the expected state. There is a risk that the alignment error of the flow channel layer and sealing layer, combined with the alignment error of several subsequent single structural layers, will cause the performance of the multilayer microfluidic chip to deteriorate to the point that it cannot meet the performance requirements. It is necessary to strictly control the alignment accuracy requirements of several subsequent single structural layers to reduce the risk that the multilayer microfluidic chip cannot meet the performance requirements. The displacement deviation is judged to be unqualified.

[0056] The first position excess value is determined by subtracting the preset first position offset value from the actual first position offset value. The larger the first position excess value, the greater the risk that the alignment error between the flow channel layer and the sealing layer, combined with the alignment error of several subsequent single structural layers, will cause the multilayer microfluidic chip performance to deteriorate to the point of failing to meet performance requirements. The higher the defect rate of the multilayer microfluidic chip, the more stringent the alignment accuracy of the subsequent single structural layers is required. Among them, the stacking accuracy of the cavity layer relative to the flow channel layer has the greatest impact on the performance of the microfluidic chip. Therefore, the larger the preset second angle value used to detect the stacking accuracy of the cavity layer relative to the flow channel layer needs to be adjusted, the better it can ensure that the overall alignment error of the cavity layer, flow channel layer and sealing layer is within the expected range, thereby ensuring the performance of the microfluidic chip.

[0057] This invention adjusts a preset second angle value to determine the stacking accuracy of the cavity layer relative to the flow channel layer, matches the displacement deviation of the current flow channel layer relative to the sealing layer, and dynamically coordinates the alignment accuracy of several individual structural layers. Under the risk of increased alignment accuracy of the current individual structural layer degrading the performance of the microfluidic chip, it tightens the alignment accuracy requirements of subsequent layers. By improving the alignment accuracy of subsequent individual structural layers, it suppresses the trend of performance degradation of the microfluidic chip, improves the reliability and stability of the stacking accuracy of multilayer microfluidic chips, and improves the yield of multilayer microfluidic chips.

[0058] In this embodiment, in response to the actual first position offset value being greater than the preset first position offset value, it is determined that the alignment time of the alignment mechanism will be increased again based on the first position excess value.

[0059] The larger the value of the first position error, the greater the performance degradation of the multilayer microfluidic chip caused by the superposition of the current alignment error and the alignment errors of several subsequent single structural layers. Therefore, it is more necessary to improve the subsequent alignment accuracy to suppress the performance degradation of the microfluidic chip. This can be achieved by increasing the alignment time of the alignment mechanism again, giving the single structural layer a more stable alignment process, thereby suppressing the degree to which the stacking accuracy error of the multilayer microfluidic chip degrades the performance of the microfluidic chip.

[0060] This invention improves the stability of the alignment process by further increasing the alignment time of the alignment mechanism, thereby increasing the subsequent alignment accuracy and suppressing the decrease in alignment accuracy of the overall stack of multilayer microfluidic chips. This improves the reliability of liquid flow when using multilayer microfluidic chips, enhances the reliability and stability of multilayer microfluidic chips, and reduces the defect rate of multilayer microfluidic chips.

[0061] Please see Figure 4 As shown, it is a flowchart of the control strategy for determining the initial alignment time between the cavity layer and the flow channel layer in an embodiment of the present invention; The process for determining the suitability of the cavity layer stacking position in this embodiment includes: The actual second rotation angle value and the actual second position offset value are compared with their respective preset thresholds to determine the qualification of the cavity layer stacking position. In response to the actual second rotation angle value being greater than the preset second angle value and the actual second position offset value being greater than the preset second position offset value, the adjustment range of the alignment time between the cavity layer and the flow channel layer is initially determined based on the second position excess value, wherein the second position excess value is determined based on the difference between the actual second position offset value and the preset second position offset value.

[0062] The principle for determining the preset second position offset value is the same as that for determining the preset first position offset value.

[0063] When the actual second rotation angle value is greater than the preset second angle value, and the actual second position offset value is greater than the preset second position offset value, it indicates that the rotation angle of the cavity layer relative to the flow channel layer after alignment exceeds the expectation, and the displacement deviation also exceeds the expectation. The cavity layer has not been able to fully reduce the risk of performance degradation of the multilayer microfluidic chip after the flow channel layer is aligned. Even after increasing the alignment time of the alignment mechanism, the abnormality of the alignment process has not been fully eliminated. Therefore, the cavity layer stacking position is deemed unqualified.

[0064] The larger the second position exceeds the value, the more it indicates that in the process of initially determining the alignment time between the cavity layer and the channel layer, the adjustment range of the alignment time of the alignment mechanism based on the first rotation angle exceeding the value has not been sufficient to reduce the abnormal situation in the alignment process. It is necessary to increase the adjustment range of the alignment time when initially determining the alignment time between the cavity layer and the channel layer, further improve the alignment accuracy of the cavity layer, enhance the effect of suppressing the performance degradation of the microfluidic chip, dynamically coordinate the relationship between the alignment accuracy and alignment efficiency of several single structural layers, and improve the stability and reliability of multi-layer microfluidic chip stacking.

[0065] When the actual second rotation angle value is less than or equal to the preset second angle value, or the actual second position offset value is less than or equal to the preset second position offset value, it indicates that the current reduction of the alignment abnormality is effective. Under the condition of increasing the current alignment strictness, the performance degradation trend of the layer microfluidic chip has been suppressed, and the cavity layer stacking position is determined to be qualified.

[0066] This invention achieves strict alignment accuracy between the cavity layer and the channel layer. In the event of an alignment anomaly, it automatically adjusts the alignment time of the cavity layer to improve alignment accuracy. If the expected reduction in alignment anomalies is not achieved, the adjustment range of the initially determined cavity layer alignment time is further increased. This enhances the effect of suppressing the overall performance degradation of the multilayer microfluidic chip, reduces the degree of overall performance degradation, and improves the reliability of the overall alignment accuracy when several single structural layers are stacked, thereby improving the yield of the multilayer microfluidic chip.

[0067] In this embodiment, in response to increasing the adjustment range of the alignment time between the initially determined cavity layer and the flow channel layer, the subsequent feeding speed is reduced based on the value exceeding the second position.

[0068] In this embodiment, when the alignment time between the cavity layer and the channel layer is initially determined, if the adjustment range of the alignment time is too small, it will not be able to completely suppress the alignment anomaly during the current stacking. This indicates that the supply and alignment accuracy of the current single structural layer have decreased. Therefore, by reducing the subsequent feeding speed of the single structural layer, the transport stability of the single structural layer is increased, and the kinetic energy during the transition from feeding to alignment is reduced, thereby enhancing the smoothness of the transport of the single structural layer, reducing the initial difficulty of alignment, and further improving the quality of the alignment of the single structural layer, improving the alignment accuracy to fully suppress alignment anomalies, and improving the alignment stability of the multilayer microfluidic chip. At this time, reducing the subsequent feeding speed is for the feeding speed of the current stacking alignment. When stacking several single structural layers of the next multilayer microfluidic chip, the transport will still be carried out according to the initial feeding speed.

[0069] When the present invention detects that the alignment anomaly has not been sufficiently reduced, it reduces the subsequent feeding speed based on the positional deviation of the cavity layer displacement, thereby reducing the kinetic energy impact when a single structural layer enters the alignment process from transportation, thus reducing the initial difficulty of alignment, increasing the effective alignment time, improving alignment accuracy to reduce alignment anomalies, improving the stability and reliability of multilayer microfluidic chip stacking, and improving the stability of the performance of multilayer microfluidic chip stack after packaging.

[0070] In this embodiment, in response to the actual second rotation angle value being less than or equal to the preset second angle value, and the actual second position offset value being less than or equal to the preset second position offset value, the adjustment range of the preliminarily determined alignment time between the cavity layer and the flow channel layer is reduced based on the second position deficiency value. The second position deficiency value is determined based on the difference between the preset second position offset value and the actual second position offset value.

[0071] When the actual second rotation angle value is less than or equal to the preset second angle value, and the actual second position offset value is less than or equal to the preset second position offset value, it indicates that the current adjusted alignment time has sufficiently reduced the alignment error that exceeds the expectation during the alignment of the flow channel layer. Under the condition of strict cavity layer alignment accuracy to suppress and compensate for the performance degradation of the microfluidic chip, it has fully compensated for the excess of the flow channel layer alignment error. However, there is an overcompensation situation, and there is an excessive pursuit of suppressing the performance degradation of the microfluidic chip. It is necessary to reduce the adjustment range of the initially determined alignment time between the cavity layer and the flow channel layer in order to improve the stacking efficiency while ensuring the stacking accuracy of the multilayer microfluidic chip.

[0072] In cases of misalignment, this invention increases the alignment time to enhance alignment effectiveness, reduces stacking efficiency to improve alignment accuracy, and thus reduces the degree of misalignment, thereby improving the stacking accuracy of multilayer microfluidic chips. When the cavity layer stacking position is detected to be excessively qualified, the invention reduces the degree of over-correction of the initially determined alignment time between the cavity layer and the channel layer, thereby reducing the adjustment range of the subsequent initially determined alignment time between the cavity layer and the channel layer and improving stacking efficiency.

[0073] The process for determining the stacking accuracy qualification in this embodiment includes: Compare the actual wheelbase value with the preset wheelbase value to determine the stacking accuracy qualification; In response to the actual wheelbase value being greater than the preset wheelbase value, the initial feeding speed is reduced based on the wheelbase excess value, wherein the wheelbase excess value is determined by subtracting the preset wheelbase value from the actual wheelbase value.

[0074] In this embodiment, the axis coordinates of the circular cross of the observation layer are obtained by an industrial camera and a motion platform, and the actual wheelbase value is determined based on the axis coordinates of the circular cross of the observation layer and the axis coordinates of the circular cross of the sealing layer. The preset axis distance value is determined based on the maximum actual axis distance value corresponding to several multilayer microfluidic chips that have achieved the expected performance requirements and are at the expected yield rate, in order to determine whether the alignment accuracy of several single structural layers currently stacked is within the expected range.

[0075] When the actual wheelbase value is less than or equal to the preset wheelbase value, it indicates that the current accumulated alignment error is within the expected range, meets the performance requirements of the multilayer microfluidic chip, the performance degradation of the microfluidic chip caused by stacking is within the expected range, and effectively suppresses the alignment abnormality during stacking, improves the accuracy requirements of multilayer microfluidic chip stacking, enhances the stability and reliability of stacking several single structural layers, improves the yield rate of multilayer microfluidic chip stacking, and determines that the stacking accuracy is qualified.

[0076] When the actual wheelbase value is greater than the preset wheelbase value, it indicates that the current accumulated alignment error exceeds the expected range, which may degrade the performance of the multilayer microfluidic chip to the point that it cannot meet the performance requirements. Under the condition of abnormal alignment, the current transportation speed cannot meet the yield requirements of multilayer microfluidic chip stacking and packaging, and the stacking accuracy is judged to be unqualified.

[0077] The larger the wheelbase exceeds the value, the greater the degree to which the current accumulated alignment error deviates from the expectation, and the more serious the performance degradation after multilayer microfluidic chip stacking and packaging. This indicates that the current mismatch between transport speed and alignment accuracy is more serious, and it is more necessary to reduce the initial transport speed so that the initial transport speed matches the alignment anomaly, which can improve the stacking accuracy of multilayer microfluidic chips.

[0078] This invention detects whether the stacking accuracy of multilayer microfluidic chips is up to standard. If the stacking accuracy is not up to standard, the initial transport speed is reduced to decrease the kinetic energy impact during alignment, enhance the stability of transport, and thus reduce the initial difficulty of alignment. This improves the alignment accuracy under a given alignment time, thereby improving the alignment accuracy of individual structural layers and the overall alignment, enhancing the reliability and stability of multilayer microfluidic chip stacking and packaging, and increasing the yield of multilayer microfluidic chips.

[0079] The technical solution of the present invention has been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of the present invention is obviously not limited to these specific embodiments. Without departing from the principles of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the scope of protection of the present invention.

Claims

1. A method for intelligent positioning and stacking of multilayer microfluidic chips, characterized in that, include, Based on the actual first rotation angle value of several circular crosses of the flow channel layer and sealing layer aligned at the initial feeding speed, the alignment time between the cavity layer and the flow channel layer and the compensation alignment time of the flow channel layer are preliminarily determined. Based on the actual first position offset value of several circular crosses on the flow channel layer after compensation and alignment according to the current compensation alignment time, the alignment time between the cavity layer and the flow channel layer is determined again. Based on the actual second rotation angle value and actual second position offset value of several circular crosses on the cavity layer, the qualification of the cavity layer stacking position is determined, so as to determine the control strategy for the initial determination of the alignment time between the cavity layer and the flow channel layer and the subsequent feeding speed. Obtain the actual axial distance value of the circular cross between the observation layer and the sealing layer stacked according to the determined feeding speed, determine the stacking accuracy qualification, and redetermine the initial feeding speed.

2. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 1, characterized in that, The process of determining the preset second angle value during the initial determination of the alignment time between the cavity layer and the flow channel layer includes: Compare the actual first rotation angle value with the preset first angle value to determine the coarse positioning qualification. In response to the actual first rotation angle value being greater than a preset first angle value, a preset second angle value is determined to be reduced based on the first rotation angle excess value, wherein the first rotation angle excess value is determined by subtracting the preset first angle value from the actual first rotation angle value.

3. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 2, characterized in that, In response to the actual first rotation angle value being greater than the preset first angle value, it is determined that the alignment time of the alignment mechanism should be increased according to the first rotation angle excess value, wherein the first rotation angle excess value is determined based on the difference between the actual first rotation angle value and the preset first angle value.

4. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 2, characterized in that, In response to the actual first rotation angle value being greater than the preset first angle value, the compensation alignment time is determined based on the first rotation angle exceeding the value.

5. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 1, characterized in that, The process of determining the preset second angle value during the process of re-determining the alignment time between the cavity layer and the flow channel layer includes: Compare the actual first position offset value with the preset first position offset value to determine the compliance of the displacement deviation; In response to the actual first position offset value being greater than the preset first position offset value, a preset second angle value is determined to be reduced based on the first position excess value, wherein the first position excess value is determined by subtracting the preset first position offset value from the actual first position offset value.

6. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 5, characterized in that, In response to the actual first position offset value being greater than the preset first position offset value, it is determined that the alignment time of the alignment mechanism will be increased again based on the first position excess value.

7. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 1, characterized in that, The process of determining the suitability of the cavity layer stacking position includes: The actual second rotation angle value and the actual second position offset value are compared with their respective preset thresholds to determine the qualification of the cavity layer stacking position. In response to the actual second rotation angle value being greater than the preset second angle value and the actual second position offset value being greater than the preset second position offset value, the adjustment range of the alignment time between the cavity layer and the flow channel layer is initially determined based on the second position excess value, wherein the second position excess value is determined based on the difference between the actual second position offset value and the preset second position offset value.

8. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 7, characterized in that, In response to increasing the adjustment range of the alignment time between the initially determined cavity layer and the flow channel layer, the subsequent feeding speed is reduced based on the value exceeding the second position.

9. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 7, characterized in that, In response to the actual second rotation angle value being less than or equal to the preset second angle value, and the actual second position offset value being less than or equal to the preset second position offset value, the adjustment range of the preliminarily determined alignment time between the cavity layer and the flow channel layer is determined based on the second position deficiency value, wherein the second position deficiency value is determined based on the difference between the preset second position offset value and the actual second position offset value.

10. The intelligent positioning and stacking method for multilayer microfluidic chips according to claim 1, characterized in that, The process for determining the stacking accuracy qualification includes: Compare the actual wheelbase value with the preset wheelbase value to determine the stacking accuracy qualification; In response to the actual wheelbase value being greater than the preset wheelbase value, the initial feeding speed is reduced based on the wheelbase excess value, wherein the wheelbase excess value is determined by subtracting the preset wheelbase value from the actual wheelbase value.

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