Fast charging power supply circuit, chip and electronic device

Abstract

The application relates to the technical field of electronic circuits, in particular to a fast-charging power supply circuit, a chip and an electronic device. The fast-charging power supply circuit comprises a fast-charging control circuit and a switched capacitor step-down circuit. The switched capacitor step-down circuit is arranged on a path between an output end of the fast-charging control circuit and an input end of a low-dropout linear voltage regulator. The fast-charging power supply circuit controls the switched capacitor step-down circuit to work in different voltage conversion modes according to the size relationship between an input voltage and a preset voltage threshold. When the voltage value of the input voltage is greater than or equal to the preset voltage threshold, the switched capacitor step-down circuit is controlled to perform step-down processing on the input voltage. This is equivalent to first using the switched capacitor step-down circuit with high efficiency to reduce the input voltage to a lower level, thereby avoiding the generation of a large amount of heat when directly using the low-dropout linear voltage regulator to greatly step down the input voltage, ensuring the stability of chip protocol communication, and avoiding the technical problem of triggering overheat protection.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuits, and in particular to a fast charging power supply circuit, a chip and an electronic device. BACKGROUND

[0002] With the popularization of fast charging protocols, source devices begin to support output voltages of 28V, 36V, 48V (EPR) levels. As the core processing unit of the fast charging protocol, the protocol control chip needs to directly take power from the VBUS bus to provide stable low-voltage power (such as 3.3V or 5V) for internal digital logic, analog circuits and driving circuits.

[0003] In related technologies, the way of integrating a low dropout linear regulator (LDO) inside the chip is often used to directly reduce the input voltage from a higher input voltage to a lower supply voltage to provide stable power supply for other functional units. This way of directly using a low dropout linear regulator for a large voltage drop results in a lot of heat generated inside the chip, which can cause the chip temperature to rise too high under the condition of small packaging (such as Quad Flat No-lead Package, QFN) without a heat sink, affecting the stability of protocol communication, and even triggering over-temperature protection. SUMMARY

[0004] The present application provides a fast charging power supply circuit, a chip and an electronic device to solve the technical problem that a large amount of heat is generated when a low dropout linear regulator is used to reduce the input voltage by a large margin in related technologies, which causes the chip temperature to rise too high, affecting the stability of protocol communication, and even triggering over-temperature protection.

[0005] In a first aspect, the present application provides a fast charging power supply circuit for use in an electronic device, the power supply circuit comprising: a fast charging control circuit and a switched capacitor voltage reduction circuit, the switched capacitor voltage reduction circuit being arranged on a path between an output end of the fast charging control circuit and an input end of a low dropout linear regulator, and a control end of the switched capacitor voltage reduction circuit being electrically connected to the fast charging control circuit, the fast charging control circuit being configured to control the working mode of the switched capacitor voltage reduction circuit. The fast charging control circuit is configured to detect the voltage value of the input voltage, and when it is detected that the voltage value of the input voltage is greater than or equal to a preset voltage threshold, the switched capacitor voltage reduction circuit is controlled to work in a voltage reduction mode to reduce the input voltage and output an intermediate voltage after voltage reduction to the low dropout linear regulator. When it is detected that the voltage value of the input voltage is less than the preset voltage threshold, the switch capacitor buck circuit is controlled to work in a pass-through mode to directly output the input voltage to the low-dropout linear regulator.

[0006] In a possible design of the present application, the fast charging power supply circuit includes one or more low-dropout linear regulators, and an output terminal of the switch capacitor buck circuit is connected to an input terminal of the low-dropout linear regulator. The switch capacitor buck circuit is configured to output the input voltage after voltage reduction to the low-dropout linear regulator, or the switch capacitor buck circuit is configured to directly output the input voltage to the low-dropout linear regulator.

[0007] In a possible design of the present application, the fast charging control circuit includes an input voltage detection module, an input terminal of the input voltage detection module is connected to an input bus, and an output terminal of the input voltage detection module is connected to an input terminal of a mode control logic module. The input voltage detection module is configured to detect the voltage value of the input voltage.

[0008] In a possible design of the present application, the fast charging control circuit further includes a mode control logic module, and an output terminal of the mode control logic module is connected to an input terminal of a driving control module and the switch capacitor buck circuit respectively. The mode control logic module is configured to receive the voltage value detected by the input voltage detection module, compare the voltage value of the input voltage with the preset voltage threshold, and output a corresponding working mode control signal according to a comparison result. The working mode control signal is configured to control the switch capacitor buck circuit to work in different working modes.

[0009] In a possible design of the present application, the fast charging power supply circuit further includes a driving control module, an input terminal of the driving control module is connected to a control output terminal of the mode control logic module, and a driving output terminal of the driving control module is connected to a driving terminal of the switch capacitor buck circuit. The driving control module is configured to receive the working mode control signal output by the mode control logic module, and output a corresponding working mode driving signal according to the working mode control signal. The working mode driving signal is configured to drive the switch capacitor buck circuit to work in different working modes.

[0010] In a possible design of the present application, the switch capacitor buck circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor and a first capacitor. The first electrode of the first transistor is an input end of the switched-capacitor step-down circuit, configured to receive the input voltage; the second electrode of the first transistor is connected with the first electrode of the second transistor and the first end of the first capacitor respectively; the second electrode of the second transistor is connected with the second electrode of the third transistor; the second electrode of the second transistor and the second electrode of the third transistor are output ends of the switched-capacitor step-down circuit, configured to output the intermediate voltage; the first electrode of the third transistor is connected with the first electrode of the fourth transistor and the second end of the first capacitor respectively; and the second electrode of the fourth transistor is grounded. The control electrodes of the first transistor, the second transistor, the third transistor and the fourth transistor are connected with a driving output end of the driving control module; and the working mode driving signal is used to drive the conduction or turn-off of each transistor, so as to control the switched-capacitor step-down circuit to work in different working modes.

[0011] In a possible design of the present application, the switched-capacitor step-down circuit comprises a second capacitor, the first end of the second capacitor is connected with the second electrode of the third transistor, and the second end of the second capacitor is grounded.

[0012] In a possible design of the present application, the mode control logic module is further configured to control the switched-capacitor step-down circuit to work in the pass-through mode in an initial stage of power-on of the input end.

[0013] In a second aspect, the present application further provides a chip, which comprises the fast-charging power supply circuit according to any one of the above.

[0014] In a third aspect, the present application further provides an electronic device, which comprises the fast-charging power supply circuit according to any one of the above, or the electronic device comprises the chip according to the above.

[0015] The fast charging power supply circuit provided by the first aspect comprises a fast charging control circuit and a switched capacitor buck circuit, the switched capacitor buck circuit is arranged on a path between an output end of the fast charging control circuit and an input end of a low dropout linear regulator, and a control end of the switched capacitor buck circuit is electrically connected with the fast charging control circuit. The fast charging control circuit is configured to control a working mode of the switched capacitor buck circuit. The fast charging control circuit is configured to detect a voltage value of an input voltage. When it is detected that the voltage value of the input voltage is greater than or equal to a preset voltage threshold, the switched capacitor buck circuit is controlled to work in a buck mode, so as to perform buck processing on the input voltage, and output an intermediate voltage after buck to the low dropout linear regulator. When it is detected that the voltage value of the input voltage is less than the preset voltage threshold, the switched capacitor buck circuit is controlled to work in a pass-through mode, so as to directly output the input voltage to the low dropout linear regulator. It can be seen that, by using the fast charging power supply circuit provided by the present application, the switched capacitor buck circuit can be controlled to work in different voltage conversion modes according to the size relationship between the input voltage and the preset voltage threshold. When the voltage value of the input voltage is greater than or equal to the preset voltage threshold, the switched capacitor buck circuit is first controlled to perform buck processing on the input voltage, and output the intermediate voltage after buck to the low dropout linear regulator. This is equivalent to first using the switched capacitor buck circuit with high efficiency to reduce the input voltage to a lower level, avoiding the generation of a large amount of heat when directly using the low dropout linear regulator to perform large-amplitude buck processing on the input voltage, ensuring the stability of chip protocol communication, and avoiding the technical problem of triggering overheat protection. At the same time, when the voltage value of the input voltage is less than the preset voltage threshold, the input voltage is directly output to the low dropout linear regulator, ensuring the power supply efficiency of the circuit at low voltage input.

[0016] The beneficial effects provided by the other aspects and the possible designs of the other aspects described above can be referred to the beneficial effects brought by the first aspect and the possible embodiments of the first aspect, which will not be described here again. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 The fast charging power supply circuit provided by the first aspect comprises a fast charging control circuit and a switched capacitor buck circuit, the switched capacitor buck circuit is arranged on a path between an output end of the fast charging control circuit and an input end of a low dropout linear regulator, and a control end of the switched capacitor buck circuit is electrically connected with the fast charging control circuit. The fast charging control circuit is configured to control a working mode of the switched capacitor buck circuit. The fast charging control circuit is configured to detect a voltage value of an input voltage. When it is detected that the voltage value of the input voltage is greater than or equals to a preset voltage threshold, the switched capacitor buck circuit is controlled to work in a buck mode to perform buck processing on the input voltage, and output an intermediate voltage after buck to the low drop out linear regulator. When it is detected that the voltage value of the input voltage is less than the pre-set voltage threshold, the switched capacitor buck circuit is controlled to work in a pass-through mode to directly output the input voltage to the low drop out linear regulator. Figure 2 The fast charging power supply circuit provided by the first aspect comprises a fast charging control circuit and the switched capacitor buck circuit, the switched capacitor buck circuit is arranged on a path between an output end and an input end of a low dropout linear regulator, and a control end of the switched capacitor is electrically connected with the fast charging control circuit. The fast charging control circuit is configured to detect a voltage value of an input voltage. The fast charging control circuit is configured to detect a voltage value of an input voltage. When the voltage value of the input voltage is greater than or equals to a preset voltage threshold, the fast charging control circuit is controlled to work in a buck mode to perform buck processing on the input voltage, and the switched capacitor buck circuit is controlled to output an intermediate voltage after buck to the low drop out linear regulator. When the voltage value of the input voltage is less than the preset voltage threshold, the fast charging control circuit is controlled to work in a pass-through mode to directly output the input voltage to the low dropout linear regulator. Figure 3 The fast charging power supply circuit provided by the first aspect comprises a fast charging control circuit and an input voltage, and the switched capacitor buck circuit is arranged on a path between an output end of the fast charging control Figure 4 The fast charging power supply circuit provided by the first aspect comprises a fast charging control circuit and Figure 5This is a schematic diagram of the drive signal and output voltage waveforms when the switched capacitor step-down circuit provided in the embodiment of this application is in operation. Detailed Implementation

[0018] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c alone can mean: a alone, b alone, c alone, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c, where a, b, and c can be single or multiple. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0019] The terms “center,” “longitudinal,” “lateral,” “up,” “down,” “left,” “right,” “front,” and “rear,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0020] The terms "connected" and "connected" should be interpreted broadly. For example, in circuit structures, "connected" or "connected" can refer not only to physical connections but also to electrical or signal connections. This could be a direct connection (physical connection) or an indirect connection via at least one intermediate component, as long as the circuit is connected. It could also refer to the internal connection between two components. Similarly, a signal connection can refer to a connection via a circuit or a medium, such as radio waves. Those skilled in the art will understand the specific meaning of these terms in this application based on the specific circumstances.

[0021] The transistor in this application is a three-terminal transistor, with its three terminals being a control terminal, a first terminal, and a second terminal. The transistor can be a bipolar transistor (BPT) or a field-effect transistor (FET), etc. For example, when the transistor is a BPT, its control terminal is the base of the BPT, the first terminal can be the collector or emitter of the BPT, and the corresponding second terminal can be the emitter or collector of the BPT; when the transistor is a FET, its control terminal is the gate of the FET, the first terminal can be the drain or source of the FET, and the corresponding second terminal can be the source or drain of the FET.

[0022] With the widespread adoption of the USB (Universal Serial Bus) PD (Power Delivery) 3.1 fast charging protocol, power supply devices have begun to support output voltages of 28V, 36V, and 48V (EPR). As the core processing unit of the fast charging protocol, the protocol control chip needs to draw power directly from the VBUS bus to provide a stable low-voltage power supply (such as 3.3V or 5V) for its internal digital logic, analog circuits, and driver circuits.

[0023] Currently, the mainstream PD protocol chip power supply solutions on the market mainly suffer from the following pain points: 1. High voltage drop leads to severe heat loss in the chip: Current technologies often use integrated low-dropout linear regulators (LDOs) to directly reduce the input 48V voltage to 3.3V. According to the formula P_loss = (V_in - V_out) * I_load, when the input voltage V_in is 48V, the output voltage V_out is 3.3V, and the load current I_load is 5mA, the heat P_loss that the chip itself will withstand will exceed 220mW. In small packages (such as QFN) without heat sinks, this can lead to excessively high chip temperatures, affecting the stability of protocol communication and even triggering overheat protection.

[0024] 2. External step-down solutions increase system cost and complexity: Some designs use external DC-DC step-down circuits, such as Buck regulator circuits, to pre-step the input 48V voltage down to 12V or 5V before supplying it to the protocol chip. While this solves the heat problem, it adds power inductors, capacitors, and integrated circuit (IC) chips, increasing the cost of the bill of materials (BOM) and occupying valuable printed circuit board (PCB) space, which contradicts the trend of miniaturization in fast charging adapters.

[0025] 3. Insufficient wide input voltage range coverage: The PD (Power Delivery) protocol requires the chip to support a wide input range from 5V to 48V. When the input voltage is low (e.g., 5V), if a 2:1 step-down is still used, the output is only 2.5V, which cannot meet the input voltage requirements of the chip's internal low-dropout linear regulator. Related technologies require the addition of complex auxiliary power switching circuits, leading to increased hardware costs.

[0026] To overcome the shortcomings of the aforementioned related technologies, this application provides the following technical concept: 1. To address the thermal power consumption issue of protocol chips under high-voltage input conditions: This application provides a built-in high-efficiency step-down scheme to avoid excessive voltage differences on the internal LDO of the chip, thereby significantly reducing chip temperature rise and improving system reliability and integration.

[0027] 2. To balance cost and performance: This application avoids the use of expensive and space-consuming external inductive DC-DC converters, and uses switched capacitor technology to achieve efficient voltage reduction of non-magnetic components, so as to achieve the goal of voltage conversion in a low-cost and small-area manner.

[0028] 3. To achieve seamless wide input voltage adaptation: This addresses the issue of insufficient output voltage from a single fixed buck converter (e.g., a 2:1 buck ratio) at low input voltages (e.g., 5V). This application provides automatic input voltage range detection, activating a high-efficiency buck mode at high input voltages and switching to pass-through mode at low input voltages, ensuring that the protocol chip receives stable and sufficient power across the entire voltage range (5V-48V).

[0029] To achieve the above-mentioned inventive concept, this application provides a fast charging power supply circuit, which includes a fast charging control circuit and a switched capacitor step-down circuit. The switched capacitor step-down circuit is disposed in the path between the output terminal of the fast charging control circuit and the input terminal of the low dropout linear regulator, and the control terminal of the switched capacitor step-down circuit is electrically connected to the fast charging control circuit. The fast charging control circuit is used to control the operating mode of the switched capacitor step-down circuit. Specifically, the fast charging control circuit is used to detect the voltage value of the input voltage. When the detected input voltage value is greater than or equal to a preset voltage threshold, it controls the switched capacitor step-down circuit to operate in step-down mode to step down the input voltage and output the intermediate voltage after step-down to the low dropout linear regulator. When the detected input voltage value is less than the preset voltage threshold, it controls the switched capacitor step-down circuit to operate in pass-through mode to directly output the input voltage to the low dropout linear regulator.

[0030] As can be seen, by using the fast charging power supply circuit provided in this application, the switched capacitor buck circuit can be controlled to operate in different voltage conversion modes according to the relationship between the input voltage and the preset voltage threshold. When the input voltage is greater than or equal to the preset voltage threshold, the switched capacitor buck circuit will first be controlled to step down the input voltage and output the intermediate voltage after stepping down to the low dropout linear regulator. This is equivalent to first using the highly efficient switched capacitor buck circuit to reduce the input voltage to a lower level, avoiding the large amount of heat generated when directly using the low dropout linear regulator to step down the input voltage significantly, ensuring the stability of the chip protocol communication, and avoiding the technical problem of triggering overheat protection. At the same time, when the input voltage is less than the preset voltage threshold, the input voltage is directly output to the low dropout linear regulator, ensuring the power supply efficiency of the circuit when the input voltage is low.

[0031] Figure 1 For a schematic diagram of the overall structure of the fast charging power supply circuit provided in the embodiments of this application, please refer to [link / reference]. Figure 1 As shown, the fast charging power supply circuit provided in this embodiment includes: a fast charging control circuit 11 and a switched capacitor step-down circuit 12. The switched capacitor step-down circuit 12 is disposed in the path between the output terminal of the fast charging control circuit 11 and the input terminal of the low-dropout linear regulator 13, and the control terminal of the switched capacitor step-down circuit 12 is electrically connected to the fast charging control circuit 11. The fast charging control circuit 11 is used to control the operating mode of the switched capacitor step-down circuit 12. The fast charging control circuit 11 is used to detect the voltage value VBUS of the input voltage VIN. When the input voltage VIN is detected to be greater than or equal to the preset voltage threshold Vth, the switched capacitor buck circuit 12 is controlled to operate in buck mode to step down the input voltage VBUS and output the intermediate voltage after step-down to the low dropout linear regulator 13; when the fast charging control circuit 11 detects that the input voltage VIN is less than the preset voltage threshold Vth, the switched capacitor buck circuit 12 is controlled to operate in pass-through mode to directly output the input voltage VIN to the low dropout linear regulator 13.

[0032] The fast-charging power supply circuit provided in this application embodiment can control the switched capacitor buck circuit 12 to operate in different voltage conversion modes according to the relationship between the input voltage value VBUS and the preset voltage threshold Vth. When the input voltage value VBUS is greater than or equal to the preset voltage threshold Vth, the switched capacitor buck circuit 12 will first be controlled to step down the input voltage VIN and output the intermediate voltage after step-down to the low dropout linear regulator 13. This is equivalent to first using the switched capacitor buck circuit 12 with high voltage conversion efficiency to reduce the input voltage to a lower level, avoiding the large amount of heat generated when the low dropout linear regulator 13 is used to step down the input voltage significantly, ensuring the stability of chip protocol communication, and avoiding the technical problem of triggering overheat protection. At the same time, when the input voltage value VBUS is less than the preset voltage threshold Vth, the switched capacitor buck circuit 12 is controlled to operate in pass-through mode, and the input voltage VIN will not be stepped down. The input voltage VIN will be directly output to the low dropout linear regulator 13, ensuring the power supply efficiency of the circuit when the input voltage is low.

[0033] Please continue reading Figure 1 As shown, in one embodiment of this application, the fast charging power supply circuit includes one or more low-dropout linear regulators 13. The output terminal of the switched-capacitor buck circuit 12 is connected to the input terminal of the low-dropout linear regulator 13. When the switched-capacitor buck circuit 12 is controlled to operate in buck mode, it outputs the bucked input voltage to the low-dropout linear regulator 13. Alternatively, when the switched-capacitor buck circuit 12 is controlled to operate in pass-through mode, it directly outputs the input voltage to the low-dropout linear regulator 13. The low-dropout linear regulator 13 further buckles and regulates the input voltage to power other functional units of the chip.

[0034] Thus, the input voltage is first reduced to a lower level using a switched-capacitor step-down circuit 12 with high voltage conversion efficiency. For example, when the input voltage VIN is a high voltage of 48V, directly using the chip's integrated low-dropout linear regulator to reduce the input 48V voltage to 3.3V would be problematic. According to the formula P_loss = (V_in - V_out) * I_load, when the load current I_load is 5mA, the heat P_loss that the chip itself will bear will exceed 220mW. Under the condition of small package and no heat sink, this would lead to excessive chip temperature rise, affecting the stability of protocol communication and even triggering overheat protection. However, by using the switched-capacitor step-down circuit 12 provided in this embodiment, the switched-capacitor step-down circuit 12 pre-steps the input 48V voltage to 24V before supplying it to the low-dropout linear regulator 13. This avoids the large amount of heat generated when directly using the low-dropout linear regulator 13 to significantly reduce the input voltage, ensuring the stability of chip protocol communication and avoiding the technical problem of triggering overheat protection. In other words, this avoids the low-dropout linear regulator 13 inside the chip from being subjected to excessive voltage difference, thereby significantly reducing chip temperature rise and improving system reliability and integration.

[0035] Figure 2 For a detailed structural diagram of the fast charging power supply circuit provided in the embodiments of this application, please refer to [link / reference]. Figure 2 As shown, the fast charging control circuit 11 includes an input voltage detection module 111. The input terminal of the input voltage detection module 111 is connected to the input bus, and the output terminal of the input voltage detection module 111 is connected to the input terminal of the mode control logic module 112. The input voltage detection module 111 is used to detect the voltage value VBUS of the input voltage and output the detected voltage value VBUS of the input voltage VIN to the mode control logic module 112. The mode control logic module 112 performs logic control based on the detected voltage value VBUS of the input voltage VIN, thereby controlling the switched capacitor buck circuit 12 to work in buck mode or through mode.

[0036] Please continue reading Figure 2As shown, in one embodiment of this application, the fast charging control circuit 11 further includes a mode control logic module 112. The output terminal of the mode control logic module 112 is connected to the input terminal of the drive control module 113 and the input terminal of the switched capacitor step-down circuit 12, respectively. The mode control logic module 112 is used to receive the voltage value detected by the input voltage detection module 111, compare the voltage value VBUS of the input voltage VIN with the preset voltage threshold Vth, and output a corresponding working mode control signal according to the comparison result. The working mode control signal is used to control the switched capacitor step-down circuit 12 to work in different working modes. Specifically, when the voltage value VBUS of the input voltage VIN is detected to be greater than or equal to the preset voltage threshold Vth, the switched capacitor step-down circuit 12 is controlled to work in step-down mode to step down the input voltage VIN; when the voltage value VBUS of the input voltage VIN is detected to be less than the preset voltage threshold Vth, the switched capacitor step-down circuit 12 is controlled to work in pass-through mode to directly output the input voltage VIN to the low dropout linear regulator 13.

[0037] Please continue reading Figure 2 As shown, in one embodiment of this application, the fast charging control circuit 11 further includes a drive control module 113. The input terminal of the drive control module 113 is connected to the control output terminal of the mode control logic module 112, and the drive output terminal of the drive control module 113 is connected to the drive terminal of the switched capacitor step-down circuit 12. The drive control module 113 is used to receive the working mode control signal output by the mode control logic module 112, and then output a corresponding working mode drive signal according to the working mode control signal. The working mode drive signal is used to drive the switched capacitor step-down circuit 12 to work in different working modes.

[0038] In one embodiment of this application, the switched capacitor buck circuit 12 is a charge pump circuit composed of multiple transistors and flying capacitors. The drive control module 113 is connected to the gate of each transistor to control the conduction and turn-off of each transistor, thereby controlling the conduction loop of the switched capacitor buck circuit 12. Finally, the switched capacitor buck circuit 12 is controlled to switch between buck mode and pass-through mode to achieve the buck and input voltage VIN pass-through requirements of this application.

[0039] In one embodiment of this application, the switched capacitor buck circuit 12 in this embodiment may be composed of four high-voltage power NMOS (N-Metal-Oxide-Semiconductor) transistors, a flying capacitor and an output capacitor.

[0040] Figure 3 For a schematic diagram of the switched capacitor step-down circuit provided in the embodiments of this application, please refer to [link / reference]. Figure 3 As shown, the switched capacitor step-down circuit 12 provided in this embodiment includes a first transistor S1, a second transistor S2, a third transistor S3, a fourth transistor S4, and a first capacitor CFLY. The first terminal of the first transistor S1 is the input terminal of the switched capacitor step-down circuit 12, used to receive the input voltage VIN. The second terminal of the first transistor S1 is connected to the first terminal of the second transistor S2 and the first terminal of the first capacitor CFLY. The second terminal of the second transistor S2 is connected to the second terminal of the third transistor S3. The second terminals of the second transistor S2 and the second terminal of the third transistor S3 form the switched capacitor step-down circuit 12. The output terminal of circuit 12 is used to output the intermediate voltage; the first terminal of the third transistor S3 is connected to the first terminal of the fourth transistor S4 and the second terminal of the first capacitor CFLY, respectively, and the second terminal of the fourth transistor S4 is grounded to GND; wherein, in this embodiment, the control terminals of the first transistor S1, the second transistor S2, the third transistor S3, and the fourth transistor S4 are all connected to the drive output terminal of the drive control module 113; the working mode drive signal is used to drive the transistors to turn on or off, thereby controlling the switched capacitor buck circuit 12 to work in different working modes.

[0041] In one embodiment of this application, the first transistor S1, the second transistor S2, the third transistor S3, and the fourth transistor S4 in the above embodiments can all be NMOS (N-Metal-Oxide-Semiconductor) transistors, with their first electrode being the drain, their second electrode being the source, and their control electrode being the gate. In other embodiments, the first transistor S1, the second transistor S2, the third transistor S3, and the fourth transistor S4 in the above embodiments can also be PMOS (P-Metal-Oxide-Semiconductor) transistors. For example, when the first transistor S1 is an NMOS transistor, its first electrode is the drain, its second electrode is the source, and its control electrode is the gate.

[0042] Please continue reading Figure 3As shown, in this embodiment, the first transistor S1 is disposed between the input terminal V_IN and node A (CF+). Specifically, the drain of the first transistor S1 is connected to the input terminal V_IN, and the source of the first transistor S1 is connected to node A (CF+). The second transistor S2 is disposed between node A (CF+) and the output terminal V_OUT. Specifically, the drain of the second transistor S2 is connected to node A (CF+), and the source of the second transistor S2 is connected to the output terminal V_OUT. The third transistor S3 is disposed between node B (CF-) and the output terminal V_OUT. Specifically, the drain of the third transistor S3 is connected to node B (CF-), and the source of the third transistor S3 is connected to the output terminal V_OUT, with the output voltage at the output terminal V_OUT being VOUT. The fourth transistor S4 is disposed between node B (CF-) and the common ground GND. The drain of the fourth transistor S4 is connected to node B (CF-), and the source of the fourth transistor S4 is connected to the common ground GND. The first capacitor (i.e., the flying capacitor) CFLY is connected across node A (CF+). Between node SCC and node B (CF-). Node SCC is typically the center tap or soft-start control node of the first capacitor (i.e., the flying capacitor). In steady-state operation, it can be left floating or used for pre-charge control and does not participate in power transfer.

[0043] Please continue reading Figure 3 As shown, the switched capacitor step-down circuit 12 provided in this embodiment operates under a two-phase alternating condition to achieve an input voltage: output voltage ratio of 2:1. Each working cycle is divided into two working stages. In the first stage of each working cycle, the gates of the first transistor S1 and the third transistor S3 are used to receive the first turn-on control signal output by the drive control module 113. The first turn-on control signal is used to control the first transistor S1 and the third transistor S3 to switch to the turn-on state in the first stage of the working cycle. In the first stage of each working cycle, the gates of the second transistor S2 and the fourth transistor S4 are used to receive the first turn-off control signal output by the drive control module 113. The first turn-off control signal is used to control the second transistor S2 and the fourth transistor S4 to switch to the turn-off state in the first stage of the working cycle. At this time, the current loop of the switched capacitor step-down circuit 12 is as follows: the input voltage VIN flows into the first transistor S1 through the input terminal V_IN, then through the first capacitor (i.e., the flying capacitor) CFLY to the third transistor S3, and finally flows out through the third transistor S3 to the output terminal V_OUT. During this process, the input voltage VIN charges the first capacitor CFLY through the first transistor S1, so that the first capacitor CFLY stores energy. At this time, the voltage on the first capacitor CFLY is VCF, which is equal to the input voltage VIN minus the output voltage VOUT.

[0044] In the second phase of each operating cycle, the gates of the first transistor S1 and the third transistor S3 are both used to receive the second turn-off control signal output by the drive control module 113. This second turn-off control signal controls the first transistor S1 and the third transistor S3 to switch to the turn-off state in the second phase of the operating cycle. In the second phase of each operating cycle, the gates of the second transistor S2 and the fourth transistor S4 are both used to receive the second turn-on control signal output by the drive control module 113. This second turn-on control signal controls the second transistor S2 and the fourth transistor S4 to switch to the turn-on state in the second phase of the operating cycle. At this time, the current loop of the switched capacitor step-down circuit 12 is formed by the first capacitor CFLY, the second transistor S2, the fourth transistor S4, and the common ground GND. The voltage VCF on the first capacitor CFLY discharges to the output terminal V_OUT through the second transistor S2, and simultaneously, the voltage VCF on the first capacitor CFLY discharges to the common ground GND through the fourth transistor S4. At this time, the voltage on the first capacitor CFLY is VCF = the output voltage VOUT.

[0045] In this embodiment, the drive control module 113 is mainly used to receive the switching timing from the mode control logic module 112, generate four non-overlapping drive signals (G1-G4), ensure that S1 / S4 and S2 / S3 are alternately turned on, and set a dead time to prevent shoot-through.

[0046] Figure 5 For a schematic diagram of the drive signal and output voltage waveforms of the switched capacitor buck circuit provided in this application embodiment, please refer to [link / reference]. Figure 5 As shown, the drive control unit 113 is mainly used to receive four non-overlapping drive signals output from the mode control logic module 112, namely G1, G2, G3, and G4. Drive signal G1 is the drive signal on the gate of the first transistor S1, drive signal G2 is the drive signal on the gate of the second transistor S2, drive signal G3 is the drive signal on the gate of the third transistor S3, and drive signal G4 is the drive signal on the gate of the fourth transistor S4. It can be seen that: When drive signals G1 and G3 are high and drive signals G2 and G4 are low, the gates of the first transistor S1 and the third transistor S3 are used to receive drive signals G1 and G3 output by the drive control module 113. These drive signals G1 and G3 are used to control the first transistor S1 and the third transistor S3 to switch to the on state in the first stage of the working cycle. In the first stage of each working cycle, the gates of the second transistor S2 and the fourth transistor S4 are used to receive drive signals G2 and G4 output by the drive control module 113. These drive signals G2 and G4 are used to control the second transistor S2 and the fourth transistor S4 to switch to the off state in the first stage of the working cycle. At this time, the current loop of the switched capacitor step-down circuit 12 is as follows: the input voltage VIN flows into the first transistor S1 through the input terminal V_IN, then through the first capacitor (i.e., the flying capacitor) CFLY to the third transistor S3, and finally flows out through the third transistor S3 to the output terminal V_OUT. During this process, the input voltage VIN charges the first capacitor CFLY through the first transistor S1, so that the first capacitor CFLY stores energy. At this time, the voltage on the first capacitor CFLY is VCF, which is equal to the input voltage VIN minus the output voltage VOUT.

[0047] When drive signals G1 and G3 are low and drive signals G2 and G4 are high, the gates of the first transistor S1 and the third transistor S3 are used to receive drive signals G1 and G3 output by the drive control module 113. These drive signals G1 and G3 are used to control the first transistor S1 and the third transistor S3 to switch to the off state in the second phase of the working cycle. In the second phase of each working cycle, the gates of the second transistor S2 and the fourth transistor S4 are used to receive drive signals G2 and G4 output by the drive control module 113. These drive signals G2 and G4 are used to control the second transistor S2 and the fourth transistor S4 to switch to the on state in the second phase of the working cycle. At this time, the current loop of the switched capacitor step-down circuit 12 is formed by the first capacitor CFLY, the second transistor S2, the fourth transistor S4 and the common ground GND. The voltage VCF on the first capacitor CFLY discharges to the output terminal V_OUT through the second transistor S2, and at the same time, the voltage VCF on the first capacitor CFLY discharges to the common ground GND through the fourth transistor S4. At this time, the voltage across the first capacitor CFLY is VCF = output voltage VOUT.

[0048] It is understandable that when the switched capacitor buck circuit 12 is operating in buck mode, after the circuit reaches steady state, the output voltage VOUT is equal to half the input voltage VIN.

[0049] Please continue reading Figure 3As shown, in one embodiment of this application, the switched capacitor step-down circuit 12 includes a second capacitor COUT. The first terminal of the second capacitor COUT is connected to the source of the third transistor S3. In other words, the first terminal of the second capacitor COUT is connected to the output terminal V_OUT, and the second terminal of the second capacitor COUT is grounded. The second capacitor COUT serves to regulate the output voltage VOUT.

[0050] In one embodiment of this application, the input terminal V_IN is connected to the output terminal V_OUT through the fourth transistor S4 and the third transistor S3. When the switched capacitor buck circuit 12 is operating in the pass-through mode, the mode control logic module 112 switches both the fourth transistor S4 and the third transistor S3 to the on state so that the input terminal V_IN and the output terminal V_OUT are pass-through, thereby directly outputting the input voltage VIN to the output terminal V_OUT.

[0051] In one embodiment of this application, a bypass switch is provided between the input terminal V_IN and the output terminal V_OUT. When it is necessary to control the switched capacitor buck circuit 12 to work in the pass-through mode, the mode control logic module 112 controls the bypass switch to switch to the on state so that the input terminal V_IN and the output terminal V_OUT can be directly connected, thereby directly outputting the input voltage VIN to the output terminal V_OUT.

[0052] Please continue reading Figure 3 As shown, in one embodiment of this application, when the input voltage VIN is detected to be high, the mode control logic module 112 controls the switched capacitor step-down circuit 12 to operate in a 2:1 step-down mode to achieve step-down processing of the input voltage VIN; assuming the input voltage is 48V, when the mode control logic module 112 controls the switched capacitor step-down circuit 12 to operate in step-down mode, the specific workflow is as follows: Mode 1: 2:1 buck mode (high voltage input, e.g., input voltage VIN = 48V) Conditional triggering: When the input voltage detection module 111 detects the input voltage VIN voltage value VBUS = 48V, assuming the preset threshold Vth is 12V, the voltage value VBUS is greater than the preset threshold Vth, then the input voltage detection module 111 outputs V_BUS_HIGH = 1 to the mode control logic module 112.

[0053] Logic Control: After receiving V_BUS_HIGH = 1, the mode control logic module 112 outputs CTRL_BYPASS = 0 (disable pass-through) and CTRL_CP = 1 (enable the switched capacitor buck circuit 12 to operate in buck mode). At the same time, it outputs a specific frequency (e.g., 1MHz) of control timing to the drive control module 113.

[0054] Switched capacitor buck circuit 12 operation: Gate drive module 140 generates two-phase alternating clock control signals: Phase A (Charging Phase): Controls the conduction of the first transistor S1 and the fourth transistor S4, and controls the turn-off of the second transistor S2 and the third transistor S3. At this time, the current path is: Input V_IN → First transistor S1 → CFLY (positive to negative) → Fourth transistor S4 → Common ground GND. The voltage of the first capacitor CFLY is charged to approximately equal to the input voltage VIN.

[0055] Phase B (Discharge Phase): Controls turn off the first transistor S1 and the fourth transistor S4, and turn on the second transistor S2 and the third transistor S3. At this time, the negative terminal (originally grounded) of the first capacitor CFLY is pulled to the input voltage VIN by the third transistor S3, and the positive terminal (node ​​A) of the first capacitor CFLY is connected to the common ground GND through the second transistor S2. According to the charge pump principle, a typical 2:1 buck charge pump connects the output terminal to the negative terminal of the first capacitor CFLY, and the output terminal to ground is connected to the second capacitor COUT. The specific connection must ensure that the output is stable at VIN / 2. The standard connection is: the output terminal is led out from the negative terminal of the first capacitor CFLY, and in Phase B, the positive terminal of the first capacitor CFLY is grounded to GND, and the negative terminal is connected to the output terminal V_OUT. In practice, the first transistor S1, the second transistor S2, the third transistor S3, and the fourth transistor S4 constitute a cross-coupled charge pump, with an output voltage VOUT = VIN / 2. Simplified description: Using two flying capacitors and four switches, a step-down voltage of half the input voltage is achieved. The final result is: VCOUT ≈ VIN / 2 = 24V.

[0056] The operation of the low-dropout linear regulator 13: The low-dropout linear regulator 13 receives a stable 24V input and easily converts it to 3.3V. Its own power consumption is only (24V - 3.3V) * I_load. Compared with direct conversion from 48V, the dropout is reduced by half and the power consumption is reduced by nearly 50%.

[0057] As can be seen, the embodiments of this application integrate a configurable 2:1 voltage ratio switched capacitor buck circuit 12 within the fast charging protocol chip, and combine it with adaptive mode switching control logic. This solution has the following advantages compared to solutions in related technologies: The 2:1 high-efficiency switched-capacitor buck architecture integrated on the fast-charging chip integrates a 2:1 switched-capacitor circuit within the Power Management Unit (PMU) of the protocol chip. This circuit consists of multiple high-voltage power switching transistors (such as double-diffused MOSFETs, DMOS) and flying capacitors (which can be externally connected or integrated on-chip). Utilizing the charging and discharging principle of capacitors, this circuit can theoretically and efficiently reduce the 48V input voltage to 24V (VOUT ≈ VBUS / 2). Compared to related technical solutions, this embodiment offers the following advantages: Compared to the traditional low-dropout linear regulator 13, the switched-capacitor buck circuit 12 theoretically achieves a conversion efficiency of 100% (actually over 95%), reducing the 224mW power consumption originally borne by the chip to only about 10mW. Simultaneously, it eliminates the need for an external power inductor, significantly reducing chip power consumption and temperature rise, and exhibits superior electromagnetic interference (EMI) characteristics compared to inductive switching power supplies.

[0058] Mode 2: Straight-through mode (low voltage input, such as VBUS = 5V or when the chip starts up) Condition trigger: When the input voltage detection module 111 measures the input voltage VIN = 5V < preset threshold (12V), the input voltage detection module 111 outputs V_BUS_HIGH = 0.

[0059] Logic Control: The mode control logic module 112 outputs CTRL_BYPASS = 1 and CTRL_CP = 0. It forces the third transistor S3 and the fourth transistor S4 to be turned on (or turns on a dedicated bypass switch), while simultaneously turning off the first transistor S1 and the second transistor S2.

[0060] Switched capacitor step-down circuit 12: At this time, the input voltage VIN is directly connected to the output terminal V_OUT through the conducting third transistor S3 and fourth transistor S4 (or bypass switch). The switching action of the charge pump is completely stopped, avoiding switching losses.

[0061] The technical advantages of this embodiment are: output voltage VOUT = input voltage VIN = 5V. The subsequent low-dropout linear regulator 13 generates a 3.3V output with a 5V input, and the voltage drop is only 1.7V. The power consumption of the subsequent low-dropout linear regulator 13 is extremely low, and it works perfectly normally.

[0062] Smooth transition: As the input voltage VIN gradually rises from 5V to 48V, once it exceeds the 12V threshold, the mode control logic module 112 will smoothly switch the switched capacitor buck circuit 12 from the pass-through mode to the 2:1 buck mode. During the switching process, all switches will be briefly turned off, and the voltage will be maintained by the second capacitor COUT to avoid output voltage drop or overshoot.

[0063] The adaptive bypass mode based on input voltage threshold works as follows: This embodiment adds an input voltage detection module 111. When the input voltage VIN is detected to be higher than the preset threshold Vth (e.g., 10V or 15V), the mode control logic module 112 enables the 2:1 voltage ratio switched capacitor step-down circuit 12 to efficiently step down the high voltage. When the input voltage VIN is lower than the preset threshold (e.g., lower than 5V) or the chip is in the initial startup stage, the mode control logic module 112 automatically configures the switched capacitor step-down circuit 12 to "straight-through mode", that is, controls the conduction of the third transistor S3 and the fourth transistor S4 (or conducts a dedicated bypass switch), while controlling the turn-off of the first transistor S1 and the second transistor S2, so that the input voltage VIN is directly transmitted to the subsequent low dropout linear regulator 13 with almost no loss.

[0064] The technical effect of this embodiment: The technical solution provided in this embodiment perfectly solves the problem of excessively low voltage caused by a 2:1 step-down in low input voltage scenarios (such as a 5V conventional PD or during system startup). It ensures that the internal low-dropout linear regulator 13 always has sufficient input margin (e.g., if the 5V input is pass-through, the low-dropout linear regulator 13 can easily be converted to 3.3V), achieving seamless compatibility with an ultra-wide input voltage range of 5V-48V.

[0065] In one embodiment of this application, the mode control logic module 112 is further configured to control the switched capacitor buck circuit 12 to operate in pass-through mode during the initial stage of detecting that the input terminal V_IN is powered on.

[0066] In this embodiment, a startup and protection mechanism can be set, specifically: Soft start: Upon initial power-up, regardless of the detected input voltage VIN at the input terminal V_IN, the mode control logic module 112 forcibly controls the switched capacitor buck circuit 12 to enter shoot-through mode and supplies power to the internal low-dropout linear regulator 13 through a current-limiting circuit. Once the output of the low-dropout linear regulator 13 stabilizes, the mode switching is determined based on the input voltage VIN. This avoids the large inrush current generated on the first capacitor CFLY at the moment of startup of the switched capacitor buck circuit 12.

[0067] In one embodiment of this application, the mode control logic module 112 also needs to set a dead time: the drive control module 113 ensures that at any time, the first transistor S1 / fourth transistor S4 and the second transistor S2 / third transistor S3 are not turned on at the same time, to prevent a short circuit from the input terminal V_IN to the common ground GND.

[0068] In this embodiment, a dedicated drive control module 113 and dead-time control are designed for the on-chip high-voltage power transistor to prevent shoot-through between the upper and lower transistors. Simultaneously, to address the potential voltage imbalance issue with the flying capacitor, pre-charge or voltage equalization control timing is introduced to ensure that the chip does not experience inrush current due to capacitor short circuits at power-on. This improves the robustness and reliability of the circuit, ensuring stable operation under high-frequency switching conditions.

[0069] Figure 4 For a schematic diagram of the logic control flow of the fast charging power supply circuit provided in the embodiments of this application, please refer to [link / reference]. Figure 4 As shown, the logic control flow of the fast charging power supply circuit provided in this embodiment mainly includes: Step S1: At the initial moment of the fast charging power supply circuit operation, the fast charging power supply circuit is powered on / reset, and the mode control logic module 112 controls the switched capacitor step-down circuit 12 to work in the forced pass-through mode (STARTUP mode). In the forced pass-through mode (STARTUP mode), the pre-charging of the first capacitor CFLY is disabled, and the voltage value VUSB of the input voltage VIN is waited for to stabilize. Step S2: After the system is powered on, the system tends to be stable. The low dropout linear regulator 13 and the input voltage detection module 111 inside the chip work stably. Then the input voltage detection module 111 outputs a signal Vbus_OK=1 to the mode control logic module 112, which means that the input voltage detection module 111 has worked stably and can effectively detect the voltage value VUSB of the input voltage VIN. Step S3: The mode control logic module 112 first controls the switched capacitor step-down circuit 12 to work in the pass-through mode (BYPASS). At this time, the switched capacitor step-down circuit 12 does not work, and the output voltage VOUT of the output terminal V_OUT is equal to the input voltage VIN. Step S4: When the input voltage detection module 111 detects that the input voltage VIN's voltage value VBUS is greater than the threshold voltage Vth, for example, if the threshold voltage Vth is set to 12V, and the mode control logic module 112 detects that the duration of this state is greater than the debounce time T_debounce, then the input voltage detection module 111 outputs V_BUS_HIGH = 1 to the mode control logic module 112. In this embodiment, the debounce time T_debounce can be set to 10ms. After receiving V_BUS_HIGH = 1, the mode control logic module 112 outputs CTRL_BYPASS = 0 (disable pass-through) and CTRL_CP = 1 (enable the switching capacitor buck circuit 12 to operate in buck mode). Specifically, the voltage conversion ratio of the switching capacitor buck circuit 12 in this embodiment can be set to 2:1. Therefore, when the mode control logic module 112 controls the switching capacitor buck circuit 12 to operate in buck mode, the output voltage VOUT output by the output terminal V_OUT of the switching capacitor buck circuit 12 is equal to half the voltage value VBUS of the input voltage VIN.

[0070] Step S5: When the switched capacitor buck circuit 12 is operating in buck mode, the input voltage detection module 111 continues to operate. When the input voltage detection module 111 detects that the input voltage VIN's voltage value VBUS is less than the threshold voltage Vth, or when the input voltage detection module 111 detects that the input voltage VIN's voltage value VBUS is less than (threshold voltage Vth - hysteresis voltage Vhys), and the mode control logic module 112 detects that the duration of this state is greater than the debounce time T_debounce, the mode control logic module 112 outputs CTRL_BYPASS = 1 and CTRL_CP = 0. It will force the third transistor S3 and the fourth transistor S4 to be turned on (or turn on a dedicated bypass switch), while simultaneously controlling the first transistor S1 and the second transistor S2 to be turned off; thereby controlling the switched capacitor buck circuit 12 to operate in pass-through mode.

[0071] Step S6: When the input voltage detection module 111 detects that the input voltage VIN voltage value VBUS is less than the reset voltage (for example, the reset voltage can be set to 4V), or when the mode control logic module 112 receives the soft reset control signal, the switched capacitor buck circuit 12 is controlled to work in the forced pass-through mode again.

[0072] The coordinated dynamic power supply strategy of the switched-capacitor buck circuit 12 and the subsequent low-dropout linear regulator 13 provided in this embodiment is as follows: the output of the switched-capacitor buck circuit 12 with a 2:1 voltage ratio is not directly supplied to the digital core, but is used as the input of the subsequent low-dropout linear regulator 13. This low-dropout linear regulator 13 is responsible for ultimately generating a stable voltage such as 3.3V or 1.8V. The system can dynamically adjust the switching frequency of the switched-capacitor buck circuit 12 or put it into Skip Mode according to the load conditions (such as chip sleep mode or operating mode). The technical effect of this embodiment is that in standby mode, the switched-capacitor buck circuit 12 can operate at an extremely low frequency, further reducing standby power consumption to the milliwatt level, meeting energy efficiency specifications (such as the industry's CoC V5 Tier 2 requirements).

[0073] The technical solutions provided in this application can produce the following beneficial technical effects: 1. Significantly reduces the temperature rise of the protocol chip, addressing thermal issues. Actual testing showed that the fast charging power supply circuit provided in this embodiment performs well under typical operating conditions with an input voltage of 48V and a 10mA load: Using a traditional internal low-dropout linear regulator, the input 48V voltage is directly stepped down to 3.3V (i.e., 48V→3.3V): the chip power consumption is about 447mW, the junction temperature rises by more than 40℃, and the chip surface becomes hot to the touch.

[0074] Using the solution provided in this embodiment, the input 48V voltage is first stepped down to 24V via a switched capacitor step-down circuit 12, and then the 24V voltage is output to the low-dropout linear regulator 13, i.e., 48V → 24V CP → 3.3V LDO. Since the switched capacitor step-down circuit 12 has an efficiency of approximately 95% and a self-loss of approximately 12mW, and the subsequent low-dropout linear regulator 13 has a loss of approximately 207mW, the total loss is approximately 219mW, resulting in a power consumption reduction of over 50%. The chip temperature rise is controlled within an acceptable range of 20°C, allowing for stable operation without a heatsink. It can be seen that the technical solution provided in this embodiment significantly improves the thermal reliability of the chip in high-power-density fast charging adapters.

[0075] 2. Achieve efficient voltage reduction using a pure capacitor without inductors, balancing cost and area considerations. The technical solution provided in this application does not require any external power inductor, large-capacity filter capacitor, or dedicated DC-DC controller. Only a low-cost, small-size ceramic capacitor (CFLY) is needed to achieve efficiency far exceeding that of low-dropout linear regulators. The entire circuit is fully integrated within the protocol chip (except for the CFLY), saving PCB board area, reducing BOM costs and surface mount costs, and facilitating the miniaturization and thinning design of fast charging adapters.

[0076] 3. Seamless adaptive power supply with an ultra-wide input voltage range of 5V-48V has been achieved. The adaptive threshold switching technology provided in this embodiment solves the inherent problem of insufficient output voltage (2.5V) in traditional 2:1 fixed buck circuits, which cause the chip to malfunction due to low input voltage (e.g., 5V). This embodiment provides sufficient input voltage (ensuring its voltage drop) to the subsequent low-dropout linear regulator 13 across the entire voltage range (5V, 9V, 15V, 20V, 28V, 36V, 48V), achieving true "plug-and-play" wide voltage compatibility without any external configuration.

[0077] 4. Improved system efficiency and standby power consumption. In standby mode (chip sleep, load current reduced to 1μA), the mode control logic module 112 can further reduce the switching frequency of the switched capacitor buck circuit 12 to an extremely low level (such as a burst mode of 100Hz), reducing the power consumption of the switched capacitor buck circuit 12 itself to the microwatt level. The overall standby power consumption can easily be lower than 5mW, meeting or even exceeding the energy efficiency specifications (such as DoELevel VI, CoC V5 Tier 2) requirements for no-load power consumption.

[0078] 5. Improved electromagnetic interference (EMI) characteristics The switched capacitor buck circuit 12 in this embodiment operates at a high frequency (e.g., 1MHz), but has no inductive components. Its noise mainly comes from the spikes of switching action, and the spectrum is relatively concentrated and the amplitude is low.

[0079] This application embodiment also provides a chip, which includes the fast charging power supply circuit as described above, a fast charging control circuit 11, and a switched capacitor step-down circuit 12. The switched capacitor step-down circuit 12 is disposed in a path between the output terminal of the fast charging control circuit 11 and the input terminal of the low-dropout linear regulator 13, and the control terminal of the switched capacitor step-down circuit 12 is electrically connected to the fast charging control circuit 11. The fast charging control circuit 11 is used to control the operating mode of the switched capacitor step-down circuit 12. The fast charging control circuit 11 is used to detect the voltage value V of the input voltage VIN. When the input voltage VIN is detected to be greater than or equal to a preset voltage threshold Vth, the switched capacitor buck circuit 12 is controlled to operate in buck mode to step down the input voltage VBUS and output the intermediate voltage after step-down to the low dropout linear regulator 13. When the fast charging control circuit 11 detects that the input voltage VIN is less than the preset voltage threshold Vth, the switched capacitor buck circuit 12 is controlled to operate in pass-through mode to directly output the input voltage VIN to the low dropout linear regulator 13.

[0080] Using the fast charging chip provided in this application embodiment, the switched capacitor step-down circuit 12 can be controlled to operate in different voltage conversion modes according to the relationship between the input voltage value and the preset voltage threshold Vth, which greatly improves the thermal reliability of the chip in high power density fast charging adapters.

[0081] This application embodiment also provides an electronic device, which includes the fast charging power supply circuit as described above; or the electronic device includes the chip as described above. The fast charging control circuit 11 and the switched capacitor step-down circuit 12 are provided, wherein the switched capacitor step-down circuit 12 is disposed in the path between the output terminal of the fast charging control circuit 11 and the input terminal of the low dropout linear regulator 13, and the control terminal of the switched capacitor step-down circuit 12 is electrically connected to the fast charging control circuit 11. The fast charging control circuit 11 is used to control the operating mode of the switched capacitor step-down circuit 12; wherein the fast charging control circuit 11 is used to detect the voltage value VBUS of the input voltage VIN, and when the input voltage VI is detected... When the voltage value VBUS of N is greater than or equal to the preset voltage threshold Vth, the switched capacitor buck circuit 12 is controlled to operate in buck mode to step down the input voltage VBUS and output the intermediate voltage after step-down to the low dropout linear regulator 13; when the fast charging control circuit 11 detects that the voltage value VBUS of the input voltage is less than the preset voltage threshold Vth, the switched capacitor buck circuit 12 is controlled to operate in pass-through mode to directly output the input voltage VIN to the low dropout linear regulator 13.

[0082] The electronic device provided in this application embodiment can control the switched capacitor step-down circuit 12 to operate in different voltage conversion modes according to the relationship between the input voltage value and the preset voltage threshold Vth, which greatly improves the thermal reliability of the chip in the high power density fast charging adapter.

[0083] Finally, it should be noted that the above embodiments are merely specific implementations of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A fast charging power supply circuit for use in electronic devices, characterized in that, The fast charging power supply circuit includes a fast charging control circuit and a switched capacitor step-down circuit. The switched capacitor step-down circuit is located in the path between the output terminal of the fast charging control circuit and the input terminal of the low dropout linear regulator. The control terminal of the switched capacitor step-down circuit is electrically connected to the fast charging control circuit. The fast charging control circuit is used to control the working mode of the switched capacitor step-down circuit. The fast charging control circuit is used to detect the input voltage value. When the input voltage value is detected to be greater than or equal to a preset voltage threshold, the switch capacitor buck circuit is controlled to work in buck mode to buck the input voltage and output the bucked intermediate voltage to the low dropout linear regulator. When the input voltage is detected to be less than the preset voltage threshold, the switched capacitor buck circuit is controlled to operate in pass-through mode so that the input voltage is directly output to the low dropout linear regulator.

2. The fast charging power supply circuit according to claim 1, characterized in that, The fast charging power supply circuit includes one or more low dropout linear regulators. The output terminal of the switched capacitor step-down circuit is connected to the input terminal of the low dropout linear regulator. The switched capacitor step-down circuit is used to output the step-down input voltage to the low dropout linear regulator, or the switched capacitor step-down circuit is used to directly output the input voltage to the low dropout linear regulator.

3. The fast charging power supply circuit according to claim 2, characterized in that, The fast charging control circuit includes an input voltage detection module. The input terminal of the input voltage detection module is connected to the input bus, and the output terminal of the input voltage detection module is connected to the input terminal of the mode control logic module. The input voltage detection module is used to detect the voltage value of the input voltage.

4. The fast charging power supply circuit according to claim 3, characterized in that, The fast charging control circuit also includes a mode control logic module, the output of which is connected to the drive control module and the input of the switched capacitor step-down circuit, respectively. The mode control logic module is used to receive the voltage value detected by the input voltage detection module, compare the input voltage value with the preset voltage threshold, and output a corresponding working mode control signal based on the comparison result. The working mode control signal is used to control the switched capacitor buck circuit to work in different working modes.

5. The fast charging power supply circuit according to claim 4, characterized in that, The fast charging power supply circuit also includes a drive control module. The input terminal of the drive control module is connected to the control output terminal of the mode control logic module, and the drive output terminal of the drive control module is connected to the drive terminal of the switched capacitor step-down circuit. The drive control module is used to receive the working mode control signal output by the mode control logic module, and then output a corresponding working mode drive signal according to the working mode control signal. The working mode drive signal is used to drive the switched capacitor buck circuit to work in different working modes.

6. The fast charging power supply circuit according to claim 5, characterized in that, The switched capacitor step-down circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a first capacitor; The first terminal of the first transistor is the input terminal of the switched capacitor buck circuit, used to receive the input voltage. The second terminal of the first transistor is connected to the first terminal of the second transistor and the first terminal of the first capacitor. The second terminal of the second transistor is connected to the second terminal of the third transistor. The second terminals of the second transistor and the second terminal of the third transistor are the output terminals of the switched capacitor buck circuit, used to output the intermediate voltage. The first terminal of the third transistor is connected to the first terminal of the fourth transistor and the second terminal of the first capacitor. The second terminal of the fourth transistor is grounded. The control terminals of the first transistor, the second transistor, the third transistor, and the fourth transistor are all connected to the drive output terminal of the drive control module; the operating mode drive signal is used to drive each transistor to turn on or off, thereby controlling the switched capacitor buck circuit to operate in different operating modes.

7. The fast charging power supply circuit according to claim 6, characterized in that, The switched capacitor step-down circuit includes a second capacitor, the first terminal of which is connected to the second terminal of the third transistor, and the second terminal of which is grounded.

8. The fast charging power supply circuit according to claim 5, characterized in that, The mode control logic module is also used to control the switched capacitor buck circuit to operate in pass-through mode during the initial stage of detecting power-on at the input terminal.

9. A chip, characterized in that, The chip includes the fast charging power supply circuit as described in any one of claims 1-8.

10. An electronic device, characterized in that, The electronic device includes a fast charging power supply circuit as described in any one of claims 1-8; or the electronic device includes a chip as described in claim 9.

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