A dc bus capacitor discharging device and method

By using an integrated DC bus capacitor discharge device, which utilizes the auxiliary power supply main power topology circuit and boost circuit, the problems of slow DC bus capacitor discharge speed and low reliability are solved, achieving a high-efficiency and safe discharge process, suitable for high-power PCS equipment.

CN123034710APending Publication Date: 2026-11-03FUJIAN NEBULA ELECTRONICS CO LTD
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Patent Information

Application Number
CN202610995375.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-06
Publication Date
2026-11-03

AI Technical Summary

Technical Problem

Existing DC bus capacitor discharge methods suffer from high cost, large size, slow discharge speed, low reliability, and limited service life, which limits their application, especially in high-power PCS equipment.

Method used

An integrated DC bus capacitor discharge device is adopted, which uses the auxiliary power supply main power topology circuit to convert residual electrical energy into load consumption. Combined with the boost circuit and energy storage capacitor, it provides temporary power when the voltage is insufficient, ensuring that the power chip works normally until the electrical energy is exhausted.

Benefits of technology

It achieves faster discharge speed, improves reliability and service life, and reduces system cost and size, making it suitable for high-voltage applications, especially energy storage converter equipment.

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Abstract

The application provides a DC bus capacitor discharging device and method in the field of power electronics, which comprises a power supply chip U1, a voltage boosting circuit, an auxiliary power supply main power topology circuit, an energy storage capacitor C1 and a diode D1; one end of the energy storage capacitor C1 is connected with the output end of the auxiliary power supply main power topology circuit and the input end of the voltage boosting circuit, and the other end is grounded; the input end of the diode D1 is connected with the output end of the voltage boosting circuit, and the output end is connected with the power supply chip U1; and the control end of the auxiliary power supply main power topology circuit is connected with the power supply chip U1. The application has the advantages that the discharging speed, reliability and service life are greatly improved, and the system cost and volume are greatly reduced.
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Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a DC bus capacitor discharge device and method. Background Technology

[0002] In switching power supply systems, DC bus capacitors are used for voltage smoothing and energy storage. Their operating voltage is typically as high as 500V to 2000V, and they store a large amount of energy. After the equipment is powered off, to ensure the safety of maintenance personnel and prevent the risk of electric shock, international standards have strict regulations on the discharge rate and residual voltage of DC bus capacitors. Therefore, efficient and reliable discharge methods are required.

[0003] Currently, common methods for discharging DC bus capacitors primarily employ a branch consisting of a resistor connected in series with a relay or electronic switch, and then connected in parallel across the bus capacitor. When the equipment is powered off, the control circuit activates the relay or electronic switch, allowing residual electrical energy in the DC bus capacitor to be released through the resistor. To achieve automatic discharge even when the equipment is powered off, normally closed relays are typically used: when the equipment is powered normally, the relay opens to cut off the discharge circuit; after the power supply is interrupted, the relay automatically closes to form a discharge path. This method generally relies on a combination of high-power resistors (such as cement resistors) and relays.

[0004] However, traditional methods have the following significant shortcomings: (1) High cost and large size: In order to meet the requirements of high voltage withstand and heat dissipation, the discharge resistor often needs to be connected in series and parallel with multiple cement resistors, resulting in a large overall weight, a lot of space occupied, and increased cost.

[0005] (2) Slow discharge speed and low reliability: If the resistance value is reduced in order to speed up the discharge, the instantaneous power of the discharge will increase sharply, which may exceed the thermal tolerance limit of the resistor, causing the resistor to melt or even catch fire; if multiple discharges are required in a short period of time, the resistor may also be damaged due to heat accumulation.

[0006] (3) Limited service life: The operation of the relay depends on the signal of the main control chip and must meet strict safety certification requirements in a high-voltage environment; at the same time, the high-temperature working environment inside the equipment will accelerate the aging of resistors and relays, affecting the overall service life.

[0007] These drawbacks limit the application of traditional discharge methods in high-efficiency, compact equipment, especially high-power PCS equipment. Such equipment has large bus capacitors and high energy storage capacity, placing higher demands on the voltage withstand capability, power, and reliability of discharge resistors and relays, further exacerbating the conflict between cost, size, and reliability.

[0008] Therefore, how to provide a DC bus capacitor discharge device and method that can improve discharge speed, reliability and service life, and reduce system cost and size has become an urgent technical problem to be solved. Summary of the Invention

[0009] The technical problem to be solved by the present invention is to provide a DC bus capacitor discharge device and method, which improves discharge speed, reliability and service life, and reduces system cost and size.

[0010] In a first aspect, the present invention provides a DC bus capacitor discharge device, comprising a power chip U1, a boost circuit, an auxiliary power main power topology circuit, an energy storage capacitor C1, and a diode D1. One end of the energy storage capacitor C1 is connected to the output terminal of the auxiliary power supply main power topology circuit and the input terminal of the boost circuit, and the other end is grounded; the input terminal of the diode D1 is connected to the output terminal of the boost circuit, and the output terminal is connected to the power chip U1; the control terminal of the auxiliary power supply main power topology circuit is connected to the power chip U1.

[0011] Furthermore, the boost circuit includes a boost chip U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, a fuse F1, a diode D2, a diode D3, and a diode D4. Pin 1 of the boost chip U2 is connected to one end of fuse F1, one end of inductor L1, one end of capacitor C2, and one end of diode D3; pin 2 is connected to the output of diode D4 and one end of resistor R1; pin 3 is connected to the other end of inductor L1 and the input of diode D2; pin 4 is connected to one end of capacitor C3, one end of resistor R4, and one end of capacitor C4 and grounded; pin 5 is connected to one end of resistor R3; and pin 6 is connected to the other end of resistor R4 and one end of resistor R2. The other end of the fuse F1 is connected to one end of the energy storage capacitor C1; The other end of diode D3 is connected to the other end of capacitor C2 and the input terminal of diode D4 and grounded; The output terminal of diode D2 is connected to the other end of resistor R1, the other end of resistor R2, the other end of capacitor C4, and the input terminal of diode D1. The other end of the resistor R3 is connected to the other end of the capacitor C3.

[0012] Furthermore, the boost chip U2 is model SGM6607AYTN6G / TRT.

[0013] Furthermore, the diode D3 is a bidirectional transient voltage suppressor diode.

[0014] Furthermore, the diode D4 is a Schottky barrier diode.

[0015] Furthermore, the positive and negative input terminals of the auxiliary power supply main power topology circuit are used to connect the DC bus capacitor, and the positive and negative output terminals are used to connect the load.

[0016] Secondly, the present invention provides a method for discharging a DC bus capacitor, comprising the following steps: Step S1: Connect the positive and negative input terminals of the auxiliary power supply main power topology circuit in parallel to the two ends of the DC bus capacitor of the energy storage converter, so as to connect the discharge device to the energy storage converter. Step S2: When the energy storage converter is powered on, it charges the DC bus capacitor. When the energy storage converter stops working, the discharge device and the load connected to the auxiliary power supply main power topology circuit consume the electrical energy stored in the DC bus capacitor. Step S3: When the output voltage V1 of the DC bus capacitor continuously decreases and falls below the minimum operating voltage V2 of the power chip U1, it discharges through the energy storage capacitor C1 to maintain the operation of the power chip U1. Step S4: When the output voltage V3 of the energy storage capacitor C1 is lower than the UVL0 function threshold of the power chip U1, the boost circuit is started to perform boost operation to maintain the operation of the power chip U1 until the electrical energy stored in the DC bus capacitor is exhausted.

[0017] The advantages of this invention are: 1. By adopting the active discharge principle of "energy reuse," the traditional high-power cement resistors and mechanical relays are eliminated, fundamentally solving the original problems. Specifically, the residual energy of the DC bus capacitor is converted by a set of efficient auxiliary power supply main power topology circuits and supplied to the actual load for consumption, rather than being wasted as heat in the resistors. This not only utilizes the load power to achieve a faster discharge speed, but also completely avoids the risk of resistor burnout due to power surges, significantly improving reliability. At the same time, since all solid-state electronic components (such as power chips, diodes, capacitors, and inductors) are used and the mechanical lifespan bottleneck of relays is eliminated, the lifespan of the device is extended. Ultimately, this integrated switching power supply solution significantly reduces size, weight, and cost compared to the bulky resistor-relay combination. In addition, the innovative boost circuit and energy storage capacitor work together to maintain the normal operation of the control chip when the bus voltage is extremely low, ensuring that the discharge process can continue to the end, further guaranteeing the final safety and reliability, thereby greatly improving the discharge speed, reliability, and lifespan, and greatly reducing system cost and size.

[0018] 2. By integrating a boost circuit and energy storage capacitor C1, the power chip U1 can still operate even when the DC bus capacitor voltage drops below the minimum operating voltage of the power chip U1. This allows the auxiliary power supply main power topology circuit to continuously consume power until the DC bus capacitor is completely depleted. This design effectively solves the problem of premature termination of discharge due to insufficient voltage in traditional discharge methods, resulting in residual charge on the capacitor. It avoids the risk of electric shock or equipment damage caused by residual charge and is particularly suitable for high-voltage applications such as energy storage converters, significantly improving the safety and reliability of the system.

[0019] 3. By using the energy storage capacitor C1 to provide temporary power when the DC bus capacitor voltage is insufficient, and in conjunction with the boost circuit to perform a boost operation when the energy storage capacitor voltage is below the threshold, the power chip U1 can operate stably over a wide voltage range (from high voltage to extremely low voltage). This low-voltage start-up and sustaining capability ensures that the discharge process will not be interrupted by a drop in input voltage, thereby ensuring that the electrical energy of the DC bus capacitor is completely depleted, avoiding potential safety hazards caused by residual energy, and improving the integrity and controllability of the discharge process.

[0020] 4. The boost circuit employs a specific combination of components, such as the high-efficiency boost chip SGM6607AYTN6G / TRT, a bidirectional transient voltage suppressor diode (D3) for overvoltage protection, and a Schottky barrier diode (D4) to reduce switching losses. These components work together to not only improve voltage conversion efficiency and reduce energy loss, but also enhance the circuit's anti-interference capability and stability. At the same time, the auxiliary power supply main power topology circuit is connected to the load and actively consumes the electrical energy of the DC bus capacitor, which may achieve effective energy utilization or recovery, thereby optimizing overall energy management and reducing system operating costs.

[0021] 5. From connecting the device to consuming electrical energy, to activating the energy storage capacitor and boost circuit when the voltage is low, until the electrical energy is exhausted, this method does not require complex control logic or additional external power supply. It is easy to integrate into existing energy storage converters and other equipment, reducing the complexity of retrofitting and maintenance. At the same time, the device has a compact structure and implements functions through common electronic components, which helps to reduce manufacturing costs and improve scalability, making it suitable for large-scale industrial applications.

[0022] 6. Fuse F1 prevents overcurrent damage; bidirectional transient voltage suppressor diode (D3) suppresses voltage transients; the combination of boost circuit and energy storage capacitor C1 prevents power chip failure under abnormal voltage; these features together improve the device's shock resistance and environmental adaptability, ensuring reliable operation under voltage fluctuations or harsh conditions, extending the device's service life, and reducing the risk of system downtime due to discharge faults.

[0023] 7. By working in concert with the energy storage capacitor and the boost circuit, the energy of the DC bus capacitor is ensured to be continuously and completely consumed even when its voltage drops to extremely low levels. This fundamentally solves the problems of discharge interruption and residual charge safety caused by insufficient voltage, significantly improving the safety of the system. At the same time, the high-efficiency boost chip and specific protection diodes used optimize energy conversion efficiency and circuit reliability. The entire method is simple, easy to implement, and requires no complex control. While providing multiple protections such as overvoltage and overcurrent, it enhances the robustness and practical value of the device. Attached Figure Description

[0024] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0025] Figure 1 This is a circuit block diagram of a DC bus capacitor discharge device according to the present invention.

[0026] Figure 2 This is a circuit diagram of the boost circuit of the present invention.

[0027] Figure 3 This is a flowchart of a DC bus capacitor discharge method according to the present invention. Detailed Implementation

[0028] The technical solution in this application embodiment has the following general idea: the residual electrical energy of the DC bus capacitor is converted by the auxiliary power supply main power topology circuit and supplied to the actual load for consumption, instead of being wasted as heat on the resistor. This not only utilizes the load power to achieve a faster discharge speed, but also completely avoids the risk of the resistor burning out due to power surges. Since all solid-state electronic components are used and the mechanical lifespan bottleneck of relays is eliminated, the service life is extended. Finally, this integrated switching power supply solution significantly reduces the size, weight and cost compared to the bulky resistor-relay combination. In addition, the boost circuit and the energy storage capacitor work together to maintain the normal operation of the control chip when the bus voltage is extremely low, ensuring that the discharge process can continue to the end, further ensuring the final safety and reliability.

[0029] Please refer to Figures 1 to 3 As shown, a preferred embodiment of the DC bus capacitor discharge device of the present invention includes a power chip U1, a boost circuit, an auxiliary power supply main power topology circuit, an energy storage capacitor C1, and a diode D1. The power chip U1 serves as the control core of the entire discharge device, generating and controlling the PWM (Pulse Width Modulation) signals or other control signals required to drive the auxiliary power supply main power topology circuit. The auxiliary power supply main power topology circuit can be a common switching power supply topology, such as a flyback, forward, or LLC resonant converter. Its core function is to convert the high voltage on the DC bus capacitor into a lower voltage suitable for the downstream load, actively consuming the energy stored in the DC bus capacitor during this process. When the DC bus capacitor voltage is insufficient, the energy storage capacitor C1 acts as a temporary energy source to power the power chip U1. The diode D1 acts as an isolation element, preventing the voltage output from the boost circuit from flowing back into the energy storage capacitor C1 or the output of the auxiliary power supply main power topology circuit, ensuring that energy flows unidirectionally to the power chip U1.

[0030] One end of the energy storage capacitor C1 is connected to the output terminal of the auxiliary power supply main power topology circuit and the input terminal of the boost circuit, and the other end is grounded; the input terminal of the diode D1 is connected to the output terminal of the boost circuit, and the output terminal is connected to the power chip U1; the control terminal of the auxiliary power supply main power topology circuit is connected to the power chip U1.

[0031] The boost circuit includes a boost chip U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, a fuse F1, a diode D2, a diode D3, and a diode D4. Pin 1 of the boost chip U2 is connected to one end of fuse F1, one end of inductor L1, one end of capacitor C2, and one end of diode D3; pin 2 is connected to the output of diode D4 and one end of resistor R1; pin 3 is connected to the other end of inductor L1 and the input of diode D2; pin 4 is connected to one end of capacitor C3, one end of resistor R4, and one end of capacitor C4 and grounded; pin 5 is connected to one end of resistor R3; and pin 6 is connected to the other end of resistor R4 and one end of resistor R2. The boost circuit is essentially a boost converter based on the boost chip U2. Its operation is as follows: When the boost chip U2 is enabled, its internal switching transistor periodically turns on and off. When the switching transistor is on, current flows through inductor L1 to store energy, and the energy storage capacitor C1 provides the initial energy for the entire boost circuit. When the switching transistor is off, inductor L1 generates an induced electromotive force (EMF), with the polarity being negative on the left and positive on the right. This EMF is superimposed on the voltage of the energy storage capacitor C1 and delivers a higher voltage to the output terminal (i.e., the input terminal of diode D1) through diode D2, thereby boosting the input voltage. Resistors R1 and R2 form a voltage divider sampling network, feeding the output voltage back to the feedback pin of the boost chip U2 to stabilize the output voltage. Resistor R3 and capacitor C3 are used to set the switching frequency of the boost chip. Fuse F1 provides overcurrent protection. Diode D3 (TVS) is used to absorb instantaneous high-voltage spikes in the circuit, protecting the boost chip U2. Diode D4 (Schottky diode) is used to provide a path during chip startup or specific operating conditions.

[0032] The other end of the fuse F1 is connected to one end of the energy storage capacitor C1; The other end of diode D3 is connected to the other end of capacitor C2 and the input terminal of diode D4 and grounded; The output terminal of diode D2 is connected to the other end of resistor R1, the other end of resistor R2, the other end of capacitor C4, and the input terminal of diode D1. The other end of the resistor R3 is connected to the other end of the capacitor C3.

[0033] The boost chip U2 is model SGM6607AYTN6G / TRT.

[0034] The diode D3 is a bidirectional transient voltage suppressor diode used to suppress surge voltage and electrostatic discharge (ESD) from the power line, thereby enhancing the electromagnetic compatibility and reliability of the circuit.

[0035] The diode D4 is a Schottky barrier diode; its low forward voltage drop and fast switching characteristics help reduce switching losses and improve the conversion efficiency of the boost circuit.

[0036] The positive and negative input terminals of the auxiliary power supply main power topology circuit are used to connect the DC bus capacitor, and the positive and negative output terminals are used to connect the load.

[0037] The load connected to the output of the auxiliary power supply main power topology circuit can be an auxiliary power load inside the energy storage converter, such as a fan, control board, or display unit. Its key function is to provide an effective 'energy consumption path' for the discharge of the DC bus capacitor, rather than converting energy uselessly into heat like a traditional resistor. This 'energy reuse' method is the core of this invention's ability to achieve efficient and rapid discharge.

[0038] Compared to the traditional resistor + relay discharge circuit, this invention eliminates the branch where the resistor + relay is connected in parallel to the DC bus capacitor, and adds an input line for the discharge device connected to the DC bus capacitor. When both the AC and DC sides of the energy storage converter are powered down and the AC and DC switches are open, the discharge device will draw power from the DC bus capacitor. As the discharge device operates and the load connected to the back end of the auxiliary power supply main power topology circuit consumes power, the voltage on the DC bus capacitor will drop rapidly.

[0039] To allow the discharge device to continue operating even after all inputs have lost power, an energy storage capacitor C1 is added, so that the power chip U1 can still be powered and operate to continue discharging the DC bus capacitor.

[0040] Because many power chips on the market have UVLO (undervoltage lockout) function, that is, when the power supply voltage of the power chip is lower than a certain value, the power chip will stop working. This means that the energy on the energy storage capacitor C1 cannot be fully utilized. Therefore, a boost circuit is added to boost the voltage when the voltage of the energy storage capacitor C1 is lower than the UVLO function threshold of the power chip, thereby further extending the working time of the power chip U1 and thus further extending the overall discharge time.

[0041] The 'two-stage power supply guarantee mechanism' (i.e., first powered by the energy storage capacitor C1, and then powered by the boost circuit when the voltage of C1 is insufficient) ensures that the power chip U1 can work continuously over a wide range from very high (e.g., 1000V) to extremely low (e.g., tens of volts or even a few volts) DC bus capacitor voltage. This drives the auxiliary power supply main power topology circuit to completely deplete the residual energy of the DC bus capacitor, effectively avoiding the problem of discharge interruption due to insufficient voltage and greatly improving safety.

[0042] A preferred embodiment of the DC bus capacitor discharge method of the present invention includes the following steps: Step S1: Connect the positive and negative input terminals of the auxiliary power supply main power topology circuit in parallel to the two ends of the DC bus capacitor of the energy storage converter, so as to connect the discharge device to the energy storage converter. Step S2: When the energy storage converter is powered on, it charges the DC bus capacitor. When the energy storage converter stops working, the discharge device and the load connected to the auxiliary power supply main power topology circuit consume the electrical energy stored in the DC bus capacitor. Step S3: When the output voltage V1 of the DC bus capacitor continuously decreases and falls below the minimum operating voltage V2 of the power chip U1, it discharges through the energy storage capacitor C1 to maintain the operation of the power chip U1. Step S4: When the output voltage V3 of the energy storage capacitor C1 is lower than the UVL0 function threshold of the power chip U1, the boost circuit is started to perform boost operation to maintain the operation of the power chip U1 until the electrical energy stored in the DC bus capacitor is exhausted.

[0043] In summary, the advantages of this invention are as follows: 1. By adopting the active discharge principle of "energy reuse," the traditional high-power cement resistors and mechanical relays are eliminated, fundamentally solving the original problems. Specifically, the residual energy of the DC bus capacitor is converted by a set of efficient auxiliary power supply main power topology circuits and supplied to the actual load for consumption, rather than being wasted as heat in the resistors. This not only utilizes the load power to achieve a faster discharge speed, but also completely avoids the risk of resistor burnout due to power surges, significantly improving reliability. At the same time, since all solid-state electronic components (such as power chips, diodes, capacitors, and inductors) are used and the mechanical lifespan bottleneck of relays is eliminated, the lifespan of the device is extended. Ultimately, this integrated switching power supply solution significantly reduces size, weight, and cost compared to the bulky resistor-relay combination. In addition, the innovative boost circuit and energy storage capacitor work together to maintain the normal operation of the control chip when the bus voltage is extremely low, ensuring that the discharge process can continue to the end, further guaranteeing the final safety and reliability, thereby greatly improving the discharge speed, reliability, and lifespan, and greatly reducing system cost and size.

[0044] 2. By integrating a boost circuit and energy storage capacitor C1, the power chip U1 can still operate even when the DC bus capacitor voltage drops below the minimum operating voltage of the power chip U1. This allows the auxiliary power supply main power topology circuit to continuously consume power until the DC bus capacitor is completely depleted. This design effectively solves the problem of premature termination of discharge due to insufficient voltage in traditional discharge methods, resulting in residual charge on the capacitor. It avoids the risk of electric shock or equipment damage caused by residual charge and is particularly suitable for high-voltage applications such as energy storage converters, significantly improving the safety and reliability of the system.

[0045] 3. By using the energy storage capacitor C1 to provide temporary power when the DC bus capacitor voltage is insufficient, and in conjunction with the boost circuit to perform a boost operation when the energy storage capacitor voltage is below the threshold, the power chip U1 can operate stably over a wide voltage range (from high voltage to extremely low voltage). This low-voltage start-up and sustaining capability ensures that the discharge process will not be interrupted by a drop in input voltage, thereby ensuring that the electrical energy of the DC bus capacitor is completely depleted, avoiding potential safety hazards caused by residual energy, and improving the integrity and controllability of the discharge process.

[0046] 4. The boost circuit employs a specific combination of components, such as the high-efficiency boost chip SGM6607AYTN6G / TRT, a bidirectional transient voltage suppressor diode (D3) for overvoltage protection, and a Schottky barrier diode (D4) to reduce switching losses. These components work together to not only improve voltage conversion efficiency and reduce energy loss, but also enhance the circuit's anti-interference capability and stability. At the same time, the auxiliary power supply main power topology circuit is connected to the load and actively consumes the electrical energy of the DC bus capacitor, which may achieve effective energy utilization or recovery, thereby optimizing overall energy management and reducing system operating costs.

[0047] 5. From connecting the device to consuming electrical energy, to activating the energy storage capacitor and boost circuit when the voltage is low, until the electrical energy is exhausted, this method does not require complex control logic or additional external power supply. It is easy to integrate into existing energy storage converters and other equipment, reducing the complexity of retrofitting and maintenance. At the same time, the device has a compact structure and implements functions through common electronic components, which helps to reduce manufacturing costs and improve scalability, making it suitable for large-scale industrial applications.

[0048] 6. Fuse F1 prevents overcurrent damage; bidirectional transient voltage suppressor diode (D3) suppresses voltage transients; the combination of boost circuit and energy storage capacitor C1 prevents power chip failure under abnormal voltage; these features together improve the device's shock resistance and environmental adaptability, ensuring reliable operation under voltage fluctuations or harsh conditions, extending the device's service life, and reducing the risk of system downtime due to discharge faults.

[0049] 7. By working in concert with the energy storage capacitor and the boost circuit, the energy of the DC bus capacitor is ensured to be continuously and completely consumed even when its voltage drops to extremely low levels. This fundamentally solves the problems of discharge interruption and residual charge safety caused by insufficient voltage, significantly improving the safety of the system. At the same time, the high-efficiency boost chip and specific protection diodes used optimize energy conversion efficiency and circuit reliability. The entire method is simple, easy to implement, and requires no complex control. While providing multiple protections such as overvoltage and overcurrent, it enhances the robustness and practical value of the device.

[0050] While specific embodiments of the present invention have been described above, those skilled in the art should understand that the specific embodiments described are merely illustrative and not intended to limit the scope of the invention. Equivalent modifications and variations made by those skilled in the art in accordance with the spirit of the invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A DC bus capacitor discharge device, characterized in that: It includes a power chip U1, a boost circuit, an auxiliary power supply main power topology circuit, an energy storage capacitor C1, and a diode D1; One end of the energy storage capacitor C1 is connected to the output terminal of the auxiliary power supply main power topology circuit and the input terminal of the boost circuit, and the other end is grounded; the input terminal of the diode D1 is connected to the output terminal of the boost circuit, and the output terminal is connected to the power chip U1; the control terminal of the auxiliary power supply main power topology circuit is connected to the power chip U1.

2. The DC bus capacitor discharge device as described in claim 1, characterized in that: The boost circuit includes a boost chip U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, a fuse F1, a diode D2, a diode D3, and a diode D4. Pin 1 of the boost chip U2 is connected to one end of fuse F1, one end of inductor L1, one end of capacitor C2, and one end of diode D3; pin 2 is connected to the output of diode D4 and one end of resistor R1; pin 3 is connected to the other end of inductor L1 and the input of diode D2; pin 4 is connected to one end of capacitor C3, one end of resistor R4, and one end of capacitor C4 and grounded; pin 5 is connected to one end of resistor R3; and pin 6 is connected to the other end of resistor R4 and one end of resistor R2. The other end of the fuse F1 is connected to one end of the energy storage capacitor C1; The other end of diode D3 is connected to the other end of capacitor C2 and the input terminal of diode D4 and grounded; The output terminal of diode D2 is connected to the other end of resistor R1, the other end of resistor R2, the other end of capacitor C4, and the input terminal of diode D1. The other end of the resistor R3 is connected to the other end of the capacitor C3.

3. The DC bus capacitor discharge device as described in claim 2, characterized in that: The boost chip U2 is model SGM6607AYTN6G / TRT.

4. The DC bus capacitor discharge device as described in claim 2, characterized in that: The diode D3 is a bidirectional transient voltage suppressor diode.

5. The DC bus capacitor discharge device as described in claim 2, characterized in that: The diode D4 is a Schottky barrier diode.

6. The DC bus capacitor discharge device as described in claim 1, characterized in that: The positive and negative input terminals of the auxiliary power supply main power topology circuit are used to connect the DC bus capacitor, and the positive and negative output terminals are used to connect the load.

7. A method for discharging a DC bus capacitor, characterized in that: The method requires the use of the DC bus capacitor discharge device as described in any one of claims 1 to 6, and includes the following steps: Step S1: Connect the positive and negative input terminals of the auxiliary power supply main power topology circuit in parallel to the two ends of the DC bus capacitor of the energy storage converter, so as to connect the discharge device to the energy storage converter. Step S2: When the energy storage converter is powered on, it charges the DC bus capacitor. When the energy storage converter stops working, the discharge device and the load connected to the auxiliary power supply main power topology circuit consume the electrical energy stored in the DC bus capacitor. Step S3: When the output voltage V1 of the DC bus capacitor continuously decreases and falls below the minimum operating voltage V2 of the power chip U1, it discharges through the energy storage capacitor C1 to maintain the operation of the power chip U1. Step S4: When the output voltage V3 of the energy storage capacitor C1 is lower than the UVL0 function threshold of the power chip U1, the boost circuit is started to perform boost operation to maintain the operation of the power chip U1 until the electrical energy stored in the DC bus capacitor is exhausted.